xref: /openbmc/linux/drivers/net/phy/marvell.c (revision f7af616c)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * drivers/net/phy/marvell.c
4  *
5  * Driver for Marvell PHYs
6  *
7  * Author: Andy Fleming
8  *
9  * Copyright (c) 2004 Freescale Semiconductor, Inc.
10  *
11  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12  */
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
26 #include <linux/mm.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/ethtool_netlink.h>
31 #include <linux/phy.h>
32 #include <linux/marvell_phy.h>
33 #include <linux/bitfield.h>
34 #include <linux/of.h>
35 
36 #include <linux/io.h>
37 #include <asm/irq.h>
38 #include <linux/uaccess.h>
39 
40 #define MII_MARVELL_PHY_PAGE		22
41 #define MII_MARVELL_COPPER_PAGE		0x00
42 #define MII_MARVELL_FIBER_PAGE		0x01
43 #define MII_MARVELL_MSCR_PAGE		0x02
44 #define MII_MARVELL_LED_PAGE		0x03
45 #define MII_MARVELL_VCT5_PAGE		0x05
46 #define MII_MARVELL_MISC_TEST_PAGE	0x06
47 #define MII_MARVELL_VCT7_PAGE		0x07
48 #define MII_MARVELL_WOL_PAGE		0x11
49 
50 #define MII_M1011_IEVENT		0x13
51 #define MII_M1011_IEVENT_CLEAR		0x0000
52 
53 #define MII_M1011_IMASK			0x12
54 #define MII_M1011_IMASK_INIT		0x6400
55 #define MII_M1011_IMASK_CLEAR		0x0000
56 
57 #define MII_M1011_PHY_SCR			0x10
58 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN		BIT(11)
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK	GENMASK(14, 12)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX		8
61 #define MII_M1011_PHY_SCR_MDI			(0x0 << 5)
62 #define MII_M1011_PHY_SCR_MDI_X			(0x1 << 5)
63 #define MII_M1011_PHY_SCR_AUTO_CROSS		(0x3 << 5)
64 
65 #define MII_M1011_PHY_SSR			0x11
66 #define MII_M1011_PHY_SSR_DOWNSHIFT		BIT(5)
67 
68 #define MII_M1111_PHY_LED_CONTROL	0x18
69 #define MII_M1111_PHY_LED_DIRECT	0x4100
70 #define MII_M1111_PHY_LED_COMBINE	0x411c
71 #define MII_M1111_PHY_EXT_CR		0x14
72 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK	GENMASK(11, 9)
73 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX	8
74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN	BIT(8)
75 #define MII_M1111_RGMII_RX_DELAY	BIT(7)
76 #define MII_M1111_RGMII_TX_DELAY	BIT(1)
77 #define MII_M1111_PHY_EXT_SR		0x1b
78 
79 #define MII_M1111_HWCFG_MODE_MASK		0xf
80 #define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
81 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
82 #define MII_M1111_HWCFG_MODE_RTBI		0x7
83 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN	0x8
84 #define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
85 #define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
86 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN	0xc
87 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS	BIT(12)
88 #define MII_M1111_HWCFG_FIBER_COPPER_RES	BIT(13)
89 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO	BIT(15)
90 
91 #define MII_88E1121_PHY_MSCR_REG	21
92 #define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
93 #define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
94 #define MII_88E1121_PHY_MSCR_DELAY_MASK	(BIT(5) | BIT(4))
95 
96 #define MII_88E1121_MISC_TEST				0x1a
97 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
98 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
99 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
100 #define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
101 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
102 #define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f
103 
104 #define MII_88E1510_TEMP_SENSOR		0x1b
105 #define MII_88E1510_TEMP_SENSOR_MASK	0xff
106 
107 #define MII_88E1540_COPPER_CTRL3	0x1a
108 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK	GENMASK(11, 10)
109 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS	0
110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS	1
111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS	2
112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS	3
113 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN		BIT(9)
114 
115 #define MII_88E6390_MISC_TEST		0x1b
116 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S	(0x0 << 14)
117 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE		(0x1 << 14)
118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT	(0x2 << 14)
119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE		(0x3 << 14)
120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK			(0x3 << 14)
121 #define MII_88E6393_MISC_TEST_SAMPLES_2048	(0x0 << 11)
122 #define MII_88E6393_MISC_TEST_SAMPLES_4096	(0x1 << 11)
123 #define MII_88E6393_MISC_TEST_SAMPLES_8192	(0x2 << 11)
124 #define MII_88E6393_MISC_TEST_SAMPLES_16384	(0x3 << 11)
125 #define MII_88E6393_MISC_TEST_SAMPLES_MASK	(0x3 << 11)
126 #define MII_88E6393_MISC_TEST_RATE_2_3MS	(0x5 << 8)
127 #define MII_88E6393_MISC_TEST_RATE_6_4MS	(0x6 << 8)
128 #define MII_88E6393_MISC_TEST_RATE_11_9MS	(0x7 << 8)
129 #define MII_88E6393_MISC_TEST_RATE_MASK		(0x7 << 8)
130 
131 #define MII_88E6390_TEMP_SENSOR		0x1c
132 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK	0xff00
133 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT	8
134 #define MII_88E6390_TEMP_SENSOR_MASK		0xff
135 #define MII_88E6390_TEMP_SENSOR_SAMPLES		10
136 
137 #define MII_88E1318S_PHY_MSCR1_REG	16
138 #define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
139 
140 /* Copper Specific Interrupt Enable Register */
141 #define MII_88E1318S_PHY_CSIER				0x12
142 /* WOL Event Interrupt Enable */
143 #define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
144 
145 /* LED Timer Control Register */
146 #define MII_88E1318S_PHY_LED_TCR			0x12
147 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT		BIT(15)
148 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE		BIT(7)
149 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW		BIT(11)
150 
151 /* Magic Packet MAC address registers */
152 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2		0x17
153 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1		0x18
154 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0		0x19
155 
156 #define MII_88E1318S_PHY_WOL_CTRL				0x10
157 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS		BIT(12)
158 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE	BIT(14)
159 
160 #define MII_PHY_LED_CTRL	        16
161 #define MII_88E1121_PHY_LED_DEF		0x0030
162 #define MII_88E1510_PHY_LED_DEF		0x1177
163 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE	0x1040
164 
165 #define MII_M1011_PHY_STATUS		0x11
166 #define MII_M1011_PHY_STATUS_1000	0x8000
167 #define MII_M1011_PHY_STATUS_100	0x4000
168 #define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
169 #define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
170 #define MII_M1011_PHY_STATUS_RESOLVED	0x0800
171 #define MII_M1011_PHY_STATUS_LINK	0x0400
172 
173 #define MII_88E3016_PHY_SPEC_CTRL	0x10
174 #define MII_88E3016_DISABLE_SCRAMBLER	0x0200
175 #define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
176 
177 #define MII_88E1510_GEN_CTRL_REG_1		0x14
178 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
179 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
180 #define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */
181 
182 #define MII_VCT5_TX_RX_MDI0_COUPLING	0x10
183 #define MII_VCT5_TX_RX_MDI1_COUPLING	0x11
184 #define MII_VCT5_TX_RX_MDI2_COUPLING	0x12
185 #define MII_VCT5_TX_RX_MDI3_COUPLING	0x13
186 #define MII_VCT5_TX_RX_AMPLITUDE_MASK	0x7f00
187 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT	8
188 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION	BIT(15)
189 
190 #define MII_VCT5_CTRL				0x17
191 #define MII_VCT5_CTRL_ENABLE				BIT(15)
192 #define MII_VCT5_CTRL_COMPLETE				BIT(14)
193 #define MII_VCT5_CTRL_TX_SAME_CHANNEL			(0x0 << 11)
194 #define MII_VCT5_CTRL_TX0_CHANNEL			(0x4 << 11)
195 #define MII_VCT5_CTRL_TX1_CHANNEL			(0x5 << 11)
196 #define MII_VCT5_CTRL_TX2_CHANNEL			(0x6 << 11)
197 #define MII_VCT5_CTRL_TX3_CHANNEL			(0x7 << 11)
198 #define MII_VCT5_CTRL_SAMPLES_2				(0x0 << 8)
199 #define MII_VCT5_CTRL_SAMPLES_4				(0x1 << 8)
200 #define MII_VCT5_CTRL_SAMPLES_8				(0x2 << 8)
201 #define MII_VCT5_CTRL_SAMPLES_16			(0x3 << 8)
202 #define MII_VCT5_CTRL_SAMPLES_32			(0x4 << 8)
203 #define MII_VCT5_CTRL_SAMPLES_64			(0x5 << 8)
204 #define MII_VCT5_CTRL_SAMPLES_128			(0x6 << 8)
205 #define MII_VCT5_CTRL_SAMPLES_DEFAULT			(0x6 << 8)
206 #define MII_VCT5_CTRL_SAMPLES_256			(0x7 << 8)
207 #define MII_VCT5_CTRL_SAMPLES_SHIFT			8
208 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK			(0x0 << 6)
209 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK		(0x1 << 6)
210 #define MII_VCT5_CTRL_MODE_OFFSET			(0x2 << 6)
211 #define MII_VCT5_CTRL_SAMPLE_POINT			(0x3 << 6)
212 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT			3
213 
214 #define MII_VCT5_SAMPLE_POINT_DISTANCE		0x18
215 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX	511
216 #define MII_VCT5_TX_PULSE_CTRL			0x1c
217 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN	BIT(12)
218 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS	(0x0 << 10)
219 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS		(0x1 << 10)
220 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS		(0x2 << 10)
221 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS		(0x3 << 10)
222 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT	10
223 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV	(0x0 << 8)
224 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV	(0x1 << 8)
225 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV	(0x2 << 8)
226 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV	(0x3 << 8)
227 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT	8
228 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP			BIT(7)
229 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV		(0x6 << 0)
230 
231 /* For TDR measurements less than 11 meters, a short pulse should be
232  * used.
233  */
234 #define TDR_SHORT_CABLE_LENGTH	11
235 
236 #define MII_VCT7_PAIR_0_DISTANCE	0x10
237 #define MII_VCT7_PAIR_1_DISTANCE	0x11
238 #define MII_VCT7_PAIR_2_DISTANCE	0x12
239 #define MII_VCT7_PAIR_3_DISTANCE	0x13
240 
241 #define MII_VCT7_RESULTS	0x14
242 #define MII_VCT7_RESULTS_PAIR3_MASK	0xf000
243 #define MII_VCT7_RESULTS_PAIR2_MASK	0x0f00
244 #define MII_VCT7_RESULTS_PAIR1_MASK	0x00f0
245 #define MII_VCT7_RESULTS_PAIR0_MASK	0x000f
246 #define MII_VCT7_RESULTS_PAIR3_SHIFT	12
247 #define MII_VCT7_RESULTS_PAIR2_SHIFT	8
248 #define MII_VCT7_RESULTS_PAIR1_SHIFT	4
249 #define MII_VCT7_RESULTS_PAIR0_SHIFT	0
250 #define MII_VCT7_RESULTS_INVALID	0
251 #define MII_VCT7_RESULTS_OK		1
252 #define MII_VCT7_RESULTS_OPEN		2
253 #define MII_VCT7_RESULTS_SAME_SHORT	3
254 #define MII_VCT7_RESULTS_CROSS_SHORT	4
255 #define MII_VCT7_RESULTS_BUSY		9
256 
257 #define MII_VCT7_CTRL		0x15
258 #define MII_VCT7_CTRL_RUN_NOW			BIT(15)
259 #define MII_VCT7_CTRL_RUN_ANEG			BIT(14)
260 #define MII_VCT7_CTRL_DISABLE_CROSS		BIT(13)
261 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK	BIT(12)
262 #define MII_VCT7_CTRL_IN_PROGRESS		BIT(11)
263 #define MII_VCT7_CTRL_METERS			BIT(10)
264 #define MII_VCT7_CTRL_CENTIMETERS		0
265 
266 #define LPA_PAUSE_FIBER		0x180
267 #define LPA_PAUSE_ASYM_FIBER	0x100
268 
269 #define NB_FIBER_STATS	1
270 
271 MODULE_DESCRIPTION("Marvell PHY driver");
272 MODULE_AUTHOR("Andy Fleming");
273 MODULE_LICENSE("GPL");
274 
275 struct marvell_hw_stat {
276 	const char *string;
277 	u8 page;
278 	u8 reg;
279 	u8 bits;
280 };
281 
282 static struct marvell_hw_stat marvell_hw_stats[] = {
283 	{ "phy_receive_errors_copper", 0, 21, 16},
284 	{ "phy_idle_errors", 0, 10, 8 },
285 	{ "phy_receive_errors_fiber", 1, 21, 16},
286 };
287 
288 struct marvell_priv {
289 	u64 stats[ARRAY_SIZE(marvell_hw_stats)];
290 	char *hwmon_name;
291 	struct device *hwmon_dev;
292 	bool cable_test_tdr;
293 	u32 first;
294 	u32 last;
295 	u32 step;
296 	s8 pair;
297 };
298 
299 static int marvell_read_page(struct phy_device *phydev)
300 {
301 	return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
302 }
303 
304 static int marvell_write_page(struct phy_device *phydev, int page)
305 {
306 	return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
307 }
308 
309 static int marvell_set_page(struct phy_device *phydev, int page)
310 {
311 	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
312 }
313 
314 static int marvell_ack_interrupt(struct phy_device *phydev)
315 {
316 	int err;
317 
318 	/* Clear the interrupts by reading the reg */
319 	err = phy_read(phydev, MII_M1011_IEVENT);
320 
321 	if (err < 0)
322 		return err;
323 
324 	return 0;
325 }
326 
327 static int marvell_config_intr(struct phy_device *phydev)
328 {
329 	int err;
330 
331 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
332 		err = marvell_ack_interrupt(phydev);
333 		if (err)
334 			return err;
335 
336 		err = phy_write(phydev, MII_M1011_IMASK,
337 				MII_M1011_IMASK_INIT);
338 	} else {
339 		err = phy_write(phydev, MII_M1011_IMASK,
340 				MII_M1011_IMASK_CLEAR);
341 		if (err)
342 			return err;
343 
344 		err = marvell_ack_interrupt(phydev);
345 	}
346 
347 	return err;
348 }
349 
350 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
351 {
352 	int irq_status;
353 
354 	irq_status = phy_read(phydev, MII_M1011_IEVENT);
355 	if (irq_status < 0) {
356 		phy_error(phydev);
357 		return IRQ_NONE;
358 	}
359 
360 	if (!(irq_status & MII_M1011_IMASK_INIT))
361 		return IRQ_NONE;
362 
363 	phy_trigger_machine(phydev);
364 
365 	return IRQ_HANDLED;
366 }
367 
368 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
369 {
370 	u16 val;
371 
372 	switch (polarity) {
373 	case ETH_TP_MDI:
374 		val = MII_M1011_PHY_SCR_MDI;
375 		break;
376 	case ETH_TP_MDI_X:
377 		val = MII_M1011_PHY_SCR_MDI_X;
378 		break;
379 	case ETH_TP_MDI_AUTO:
380 	case ETH_TP_MDI_INVALID:
381 	default:
382 		val = MII_M1011_PHY_SCR_AUTO_CROSS;
383 		break;
384 	}
385 
386 	return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
387 				  MII_M1011_PHY_SCR_AUTO_CROSS, val);
388 }
389 
390 static int marvell_config_aneg(struct phy_device *phydev)
391 {
392 	int changed = 0;
393 	int err;
394 
395 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
396 	if (err < 0)
397 		return err;
398 
399 	changed = err;
400 
401 	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
402 			MII_M1111_PHY_LED_DIRECT);
403 	if (err < 0)
404 		return err;
405 
406 	err = genphy_config_aneg(phydev);
407 	if (err < 0)
408 		return err;
409 
410 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
411 		/* A write to speed/duplex bits (that is performed by
412 		 * genphy_config_aneg() call above) must be followed by
413 		 * a software reset. Otherwise, the write has no effect.
414 		 */
415 		err = genphy_soft_reset(phydev);
416 		if (err < 0)
417 			return err;
418 	}
419 
420 	return 0;
421 }
422 
423 static int m88e1101_config_aneg(struct phy_device *phydev)
424 {
425 	int err;
426 
427 	/* This Marvell PHY has an errata which requires
428 	 * that certain registers get written in order
429 	 * to restart autonegotiation
430 	 */
431 	err = genphy_soft_reset(phydev);
432 	if (err < 0)
433 		return err;
434 
435 	err = phy_write(phydev, 0x1d, 0x1f);
436 	if (err < 0)
437 		return err;
438 
439 	err = phy_write(phydev, 0x1e, 0x200c);
440 	if (err < 0)
441 		return err;
442 
443 	err = phy_write(phydev, 0x1d, 0x5);
444 	if (err < 0)
445 		return err;
446 
447 	err = phy_write(phydev, 0x1e, 0);
448 	if (err < 0)
449 		return err;
450 
451 	err = phy_write(phydev, 0x1e, 0x100);
452 	if (err < 0)
453 		return err;
454 
455 	return marvell_config_aneg(phydev);
456 }
457 
458 #if IS_ENABLED(CONFIG_OF_MDIO)
459 /* Set and/or override some configuration registers based on the
460  * marvell,reg-init property stored in the of_node for the phydev.
461  *
462  * marvell,reg-init = <reg-page reg mask value>,...;
463  *
464  * There may be one or more sets of <reg-page reg mask value>:
465  *
466  * reg-page: which register bank to use.
467  * reg: the register.
468  * mask: if non-zero, ANDed with existing register value.
469  * value: ORed with the masked value and written to the regiser.
470  *
471  */
472 static int marvell_of_reg_init(struct phy_device *phydev)
473 {
474 	const __be32 *paddr;
475 	int len, i, saved_page, current_page, ret = 0;
476 
477 	if (!phydev->mdio.dev.of_node)
478 		return 0;
479 
480 	paddr = of_get_property(phydev->mdio.dev.of_node,
481 				"marvell,reg-init", &len);
482 	if (!paddr || len < (4 * sizeof(*paddr)))
483 		return 0;
484 
485 	saved_page = phy_save_page(phydev);
486 	if (saved_page < 0)
487 		goto err;
488 	current_page = saved_page;
489 
490 	len /= sizeof(*paddr);
491 	for (i = 0; i < len - 3; i += 4) {
492 		u16 page = be32_to_cpup(paddr + i);
493 		u16 reg = be32_to_cpup(paddr + i + 1);
494 		u16 mask = be32_to_cpup(paddr + i + 2);
495 		u16 val_bits = be32_to_cpup(paddr + i + 3);
496 		int val;
497 
498 		if (page != current_page) {
499 			current_page = page;
500 			ret = marvell_write_page(phydev, page);
501 			if (ret < 0)
502 				goto err;
503 		}
504 
505 		val = 0;
506 		if (mask) {
507 			val = __phy_read(phydev, reg);
508 			if (val < 0) {
509 				ret = val;
510 				goto err;
511 			}
512 			val &= mask;
513 		}
514 		val |= val_bits;
515 
516 		ret = __phy_write(phydev, reg, val);
517 		if (ret < 0)
518 			goto err;
519 	}
520 err:
521 	return phy_restore_page(phydev, saved_page, ret);
522 }
523 #else
524 static int marvell_of_reg_init(struct phy_device *phydev)
525 {
526 	return 0;
527 }
528 #endif /* CONFIG_OF_MDIO */
529 
530 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
531 {
532 	int mscr;
533 
534 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
535 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
536 		       MII_88E1121_PHY_MSCR_TX_DELAY;
537 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
538 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
539 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
540 		mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
541 	else
542 		mscr = 0;
543 
544 	return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
545 				MII_88E1121_PHY_MSCR_REG,
546 				MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
547 }
548 
549 static int m88e1121_config_aneg(struct phy_device *phydev)
550 {
551 	int changed = 0;
552 	int err = 0;
553 
554 	if (phy_interface_is_rgmii(phydev)) {
555 		err = m88e1121_config_aneg_rgmii_delays(phydev);
556 		if (err < 0)
557 			return err;
558 	}
559 
560 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
561 	if (err < 0)
562 		return err;
563 
564 	changed = err;
565 
566 	err = genphy_config_aneg(phydev);
567 	if (err < 0)
568 		return err;
569 
570 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
571 		/* A software reset is used to ensure a "commit" of the
572 		 * changes is done.
573 		 */
574 		err = genphy_soft_reset(phydev);
575 		if (err < 0)
576 			return err;
577 	}
578 
579 	return 0;
580 }
581 
582 static int m88e1318_config_aneg(struct phy_device *phydev)
583 {
584 	int err;
585 
586 	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
587 			       MII_88E1318S_PHY_MSCR1_REG,
588 			       0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
589 	if (err < 0)
590 		return err;
591 
592 	return m88e1121_config_aneg(phydev);
593 }
594 
595 /**
596  * linkmode_adv_to_fiber_adv_t
597  * @advertise: the linkmode advertisement settings
598  *
599  * A small helper function that translates linkmode advertisement
600  * settings to phy autonegotiation advertisements for the MII_ADV
601  * register for fiber link.
602  */
603 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
604 {
605 	u32 result = 0;
606 
607 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
608 		result |= ADVERTISE_1000XHALF;
609 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
610 		result |= ADVERTISE_1000XFULL;
611 
612 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
613 	    linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
614 		result |= ADVERTISE_1000XPSE_ASYM;
615 	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
616 		result |= ADVERTISE_1000XPAUSE;
617 
618 	return result;
619 }
620 
621 /**
622  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
623  * @phydev: target phy_device struct
624  *
625  * Description: If auto-negotiation is enabled, we configure the
626  *   advertising, and then restart auto-negotiation.  If it is not
627  *   enabled, then we write the BMCR. Adapted for fiber link in
628  *   some Marvell's devices.
629  */
630 static int marvell_config_aneg_fiber(struct phy_device *phydev)
631 {
632 	int changed = 0;
633 	int err;
634 	u16 adv;
635 
636 	if (phydev->autoneg != AUTONEG_ENABLE)
637 		return genphy_setup_forced(phydev);
638 
639 	/* Only allow advertising what this PHY supports */
640 	linkmode_and(phydev->advertising, phydev->advertising,
641 		     phydev->supported);
642 
643 	adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
644 
645 	/* Setup fiber advertisement */
646 	err = phy_modify_changed(phydev, MII_ADVERTISE,
647 				 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
648 				 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
649 				 adv);
650 	if (err < 0)
651 		return err;
652 	if (err > 0)
653 		changed = 1;
654 
655 	return genphy_check_and_restart_aneg(phydev, changed);
656 }
657 
658 static int m88e1111_config_aneg(struct phy_device *phydev)
659 {
660 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
661 	int err;
662 
663 	if (extsr < 0)
664 		return extsr;
665 
666 	/* If not using SGMII or copper 1000BaseX modes, use normal process.
667 	 * Steps below are only required for these modes.
668 	 */
669 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
670 	    (extsr & MII_M1111_HWCFG_MODE_MASK) !=
671 	    MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
672 		return marvell_config_aneg(phydev);
673 
674 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
675 	if (err < 0)
676 		goto error;
677 
678 	/* Configure the copper link first */
679 	err = marvell_config_aneg(phydev);
680 	if (err < 0)
681 		goto error;
682 
683 	/* Then the fiber link */
684 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
685 	if (err < 0)
686 		goto error;
687 
688 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
689 		/* Do not touch the fiber advertisement if we're in copper->sgmii mode.
690 		 * Just ensure that SGMII-side autonegotiation is enabled.
691 		 * If we switched from some other mode to SGMII it may not be.
692 		 */
693 		err = genphy_check_and_restart_aneg(phydev, false);
694 	else
695 		err = marvell_config_aneg_fiber(phydev);
696 	if (err < 0)
697 		goto error;
698 
699 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
700 
701 error:
702 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
703 	return err;
704 }
705 
706 static int m88e1510_config_aneg(struct phy_device *phydev)
707 {
708 	int err;
709 
710 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
711 	if (err < 0)
712 		goto error;
713 
714 	/* Configure the copper link first */
715 	err = m88e1318_config_aneg(phydev);
716 	if (err < 0)
717 		goto error;
718 
719 	/* Do not touch the fiber page if we're in copper->sgmii mode */
720 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
721 		return 0;
722 
723 	/* Then the fiber link */
724 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
725 	if (err < 0)
726 		goto error;
727 
728 	err = marvell_config_aneg_fiber(phydev);
729 	if (err < 0)
730 		goto error;
731 
732 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
733 
734 error:
735 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
736 	return err;
737 }
738 
739 static void marvell_config_led(struct phy_device *phydev)
740 {
741 	u16 def_config;
742 	int err;
743 
744 	switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
745 	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
746 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
747 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
748 		def_config = MII_88E1121_PHY_LED_DEF;
749 		break;
750 	/* Default PHY LED config:
751 	 * LED[0] .. 1000Mbps Link
752 	 * LED[1] .. 100Mbps Link
753 	 * LED[2] .. Blink, Activity
754 	 */
755 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
756 		if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
757 			def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
758 		else
759 			def_config = MII_88E1510_PHY_LED_DEF;
760 		break;
761 	default:
762 		return;
763 	}
764 
765 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
766 			      def_config);
767 	if (err < 0)
768 		phydev_warn(phydev, "Fail to config marvell phy LED.\n");
769 }
770 
771 static int marvell_config_init(struct phy_device *phydev)
772 {
773 	/* Set default LED */
774 	marvell_config_led(phydev);
775 
776 	/* Set registers from marvell,reg-init DT property */
777 	return marvell_of_reg_init(phydev);
778 }
779 
780 static int m88e3016_config_init(struct phy_device *phydev)
781 {
782 	int ret;
783 
784 	/* Enable Scrambler and Auto-Crossover */
785 	ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
786 			 MII_88E3016_DISABLE_SCRAMBLER,
787 			 MII_88E3016_AUTO_MDIX_CROSSOVER);
788 	if (ret < 0)
789 		return ret;
790 
791 	return marvell_config_init(phydev);
792 }
793 
794 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
795 					   u16 mode,
796 					   int fibre_copper_auto)
797 {
798 	if (fibre_copper_auto)
799 		mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
800 
801 	return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
802 			  MII_M1111_HWCFG_MODE_MASK |
803 			  MII_M1111_HWCFG_FIBER_COPPER_AUTO |
804 			  MII_M1111_HWCFG_FIBER_COPPER_RES,
805 			  mode);
806 }
807 
808 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
809 {
810 	int delay;
811 
812 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
813 		delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
814 	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
815 		delay = MII_M1111_RGMII_RX_DELAY;
816 	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
817 		delay = MII_M1111_RGMII_TX_DELAY;
818 	} else {
819 		delay = 0;
820 	}
821 
822 	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
823 			  MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
824 			  delay);
825 }
826 
827 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
828 {
829 	int temp;
830 	int err;
831 
832 	err = m88e1111_config_init_rgmii_delays(phydev);
833 	if (err < 0)
834 		return err;
835 
836 	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
837 	if (temp < 0)
838 		return temp;
839 
840 	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
841 
842 	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
843 		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
844 	else
845 		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
846 
847 	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
848 }
849 
850 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
851 {
852 	int err;
853 
854 	err = m88e1111_config_init_hwcfg_mode(
855 		phydev,
856 		MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
857 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
858 	if (err < 0)
859 		return err;
860 
861 	/* make sure copper is selected */
862 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
863 }
864 
865 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
866 {
867 	int err;
868 
869 	err = m88e1111_config_init_rgmii_delays(phydev);
870 	if (err < 0)
871 		return err;
872 
873 	err = m88e1111_config_init_hwcfg_mode(
874 		phydev,
875 		MII_M1111_HWCFG_MODE_RTBI,
876 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
877 	if (err < 0)
878 		return err;
879 
880 	/* soft reset */
881 	err = genphy_soft_reset(phydev);
882 	if (err < 0)
883 		return err;
884 
885 	return m88e1111_config_init_hwcfg_mode(
886 		phydev,
887 		MII_M1111_HWCFG_MODE_RTBI,
888 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
889 }
890 
891 static int m88e1111_config_init_1000basex(struct phy_device *phydev)
892 {
893 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
894 	int err, mode;
895 
896 	if (extsr < 0)
897 		return extsr;
898 
899 	/* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
900 	mode = extsr & MII_M1111_HWCFG_MODE_MASK;
901 	if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
902 		err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
903 				 MII_M1111_HWCFG_MODE_MASK |
904 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
905 				 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
906 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
907 		if (err < 0)
908 			return err;
909 	}
910 	return 0;
911 }
912 
913 static int m88e1111_config_init(struct phy_device *phydev)
914 {
915 	int err;
916 
917 	if (phy_interface_is_rgmii(phydev)) {
918 		err = m88e1111_config_init_rgmii(phydev);
919 		if (err < 0)
920 			return err;
921 	}
922 
923 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
924 		err = m88e1111_config_init_sgmii(phydev);
925 		if (err < 0)
926 			return err;
927 	}
928 
929 	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
930 		err = m88e1111_config_init_rtbi(phydev);
931 		if (err < 0)
932 			return err;
933 	}
934 
935 	if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
936 		err = m88e1111_config_init_1000basex(phydev);
937 		if (err < 0)
938 			return err;
939 	}
940 
941 	err = marvell_of_reg_init(phydev);
942 	if (err < 0)
943 		return err;
944 
945 	return genphy_soft_reset(phydev);
946 }
947 
948 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
949 {
950 	int val, cnt, enable;
951 
952 	val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
953 	if (val < 0)
954 		return val;
955 
956 	enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
957 	cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
958 
959 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
960 
961 	return 0;
962 }
963 
964 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
965 {
966 	int val, err;
967 
968 	if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
969 		return -E2BIG;
970 
971 	if (!cnt) {
972 		err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
973 				     MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
974 	} else {
975 		val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
976 		val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
977 
978 		err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
979 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
980 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
981 				 val);
982 	}
983 
984 	if (err < 0)
985 		return err;
986 
987 	return genphy_soft_reset(phydev);
988 }
989 
990 static int m88e1111_get_tunable(struct phy_device *phydev,
991 				struct ethtool_tunable *tuna, void *data)
992 {
993 	switch (tuna->id) {
994 	case ETHTOOL_PHY_DOWNSHIFT:
995 		return m88e1111_get_downshift(phydev, data);
996 	default:
997 		return -EOPNOTSUPP;
998 	}
999 }
1000 
1001 static int m88e1111_set_tunable(struct phy_device *phydev,
1002 				struct ethtool_tunable *tuna, const void *data)
1003 {
1004 	switch (tuna->id) {
1005 	case ETHTOOL_PHY_DOWNSHIFT:
1006 		return m88e1111_set_downshift(phydev, *(const u8 *)data);
1007 	default:
1008 		return -EOPNOTSUPP;
1009 	}
1010 }
1011 
1012 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1013 {
1014 	int val, cnt, enable;
1015 
1016 	val = phy_read(phydev, MII_M1011_PHY_SCR);
1017 	if (val < 0)
1018 		return val;
1019 
1020 	enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1021 	cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1022 
1023 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1024 
1025 	return 0;
1026 }
1027 
1028 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1029 {
1030 	int val, err;
1031 
1032 	if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1033 		return -E2BIG;
1034 
1035 	if (!cnt) {
1036 		err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1037 				     MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1038 	} else {
1039 		val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1040 		val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1041 
1042 		err = phy_modify(phydev, MII_M1011_PHY_SCR,
1043 				 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1044 				 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1045 				 val);
1046 	}
1047 
1048 	if (err < 0)
1049 		return err;
1050 
1051 	return genphy_soft_reset(phydev);
1052 }
1053 
1054 static int m88e1011_get_tunable(struct phy_device *phydev,
1055 				struct ethtool_tunable *tuna, void *data)
1056 {
1057 	switch (tuna->id) {
1058 	case ETHTOOL_PHY_DOWNSHIFT:
1059 		return m88e1011_get_downshift(phydev, data);
1060 	default:
1061 		return -EOPNOTSUPP;
1062 	}
1063 }
1064 
1065 static int m88e1011_set_tunable(struct phy_device *phydev,
1066 				struct ethtool_tunable *tuna, const void *data)
1067 {
1068 	switch (tuna->id) {
1069 	case ETHTOOL_PHY_DOWNSHIFT:
1070 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1071 	default:
1072 		return -EOPNOTSUPP;
1073 	}
1074 }
1075 
1076 static int m88e1112_config_init(struct phy_device *phydev)
1077 {
1078 	int err;
1079 
1080 	err = m88e1011_set_downshift(phydev, 3);
1081 	if (err < 0)
1082 		return err;
1083 
1084 	return m88e1111_config_init(phydev);
1085 }
1086 
1087 static int m88e1111gbe_config_init(struct phy_device *phydev)
1088 {
1089 	int err;
1090 
1091 	err = m88e1111_set_downshift(phydev, 3);
1092 	if (err < 0)
1093 		return err;
1094 
1095 	return m88e1111_config_init(phydev);
1096 }
1097 
1098 static int marvell_1011gbe_config_init(struct phy_device *phydev)
1099 {
1100 	int err;
1101 
1102 	err = m88e1011_set_downshift(phydev, 3);
1103 	if (err < 0)
1104 		return err;
1105 
1106 	return marvell_config_init(phydev);
1107 }
1108 static int m88e1116r_config_init(struct phy_device *phydev)
1109 {
1110 	int err;
1111 
1112 	err = genphy_soft_reset(phydev);
1113 	if (err < 0)
1114 		return err;
1115 
1116 	msleep(500);
1117 
1118 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1119 	if (err < 0)
1120 		return err;
1121 
1122 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1123 	if (err < 0)
1124 		return err;
1125 
1126 	err = m88e1011_set_downshift(phydev, 8);
1127 	if (err < 0)
1128 		return err;
1129 
1130 	if (phy_interface_is_rgmii(phydev)) {
1131 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1132 		if (err < 0)
1133 			return err;
1134 	}
1135 
1136 	err = genphy_soft_reset(phydev);
1137 	if (err < 0)
1138 		return err;
1139 
1140 	return marvell_config_init(phydev);
1141 }
1142 
1143 static int m88e1318_config_init(struct phy_device *phydev)
1144 {
1145 	if (phy_interrupt_is_valid(phydev)) {
1146 		int err = phy_modify_paged(
1147 			phydev, MII_MARVELL_LED_PAGE,
1148 			MII_88E1318S_PHY_LED_TCR,
1149 			MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1150 			MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1151 			MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1152 		if (err < 0)
1153 			return err;
1154 	}
1155 
1156 	return marvell_config_init(phydev);
1157 }
1158 
1159 static int m88e1510_config_init(struct phy_device *phydev)
1160 {
1161 	int err;
1162 
1163 	/* SGMII-to-Copper mode initialization */
1164 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1165 		/* Select page 18 */
1166 		err = marvell_set_page(phydev, 18);
1167 		if (err < 0)
1168 			return err;
1169 
1170 		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1171 		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1172 				 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1173 				 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1174 		if (err < 0)
1175 			return err;
1176 
1177 		/* PHY reset is necessary after changing MODE[2:0] */
1178 		err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1179 				   MII_88E1510_GEN_CTRL_REG_1_RESET);
1180 		if (err < 0)
1181 			return err;
1182 
1183 		/* Reset page selection */
1184 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1185 		if (err < 0)
1186 			return err;
1187 	}
1188 	err = m88e1011_set_downshift(phydev, 3);
1189 	if (err < 0)
1190 		return err;
1191 
1192 	return m88e1318_config_init(phydev);
1193 }
1194 
1195 static int m88e1118_config_aneg(struct phy_device *phydev)
1196 {
1197 	int err;
1198 
1199 	err = genphy_soft_reset(phydev);
1200 	if (err < 0)
1201 		return err;
1202 
1203 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1204 	if (err < 0)
1205 		return err;
1206 
1207 	err = genphy_config_aneg(phydev);
1208 	return 0;
1209 }
1210 
1211 static int m88e1118_config_init(struct phy_device *phydev)
1212 {
1213 	int err;
1214 
1215 	/* Change address */
1216 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1217 	if (err < 0)
1218 		return err;
1219 
1220 	/* Enable 1000 Mbit */
1221 	err = phy_write(phydev, 0x15, 0x1070);
1222 	if (err < 0)
1223 		return err;
1224 
1225 	/* Change address */
1226 	err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1227 	if (err < 0)
1228 		return err;
1229 
1230 	/* Adjust LED Control */
1231 	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1232 		err = phy_write(phydev, 0x10, 0x1100);
1233 	else
1234 		err = phy_write(phydev, 0x10, 0x021e);
1235 	if (err < 0)
1236 		return err;
1237 
1238 	err = marvell_of_reg_init(phydev);
1239 	if (err < 0)
1240 		return err;
1241 
1242 	/* Reset address */
1243 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1244 	if (err < 0)
1245 		return err;
1246 
1247 	return genphy_soft_reset(phydev);
1248 }
1249 
1250 static int m88e1149_config_init(struct phy_device *phydev)
1251 {
1252 	int err;
1253 
1254 	/* Change address */
1255 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1256 	if (err < 0)
1257 		return err;
1258 
1259 	/* Enable 1000 Mbit */
1260 	err = phy_write(phydev, 0x15, 0x1048);
1261 	if (err < 0)
1262 		return err;
1263 
1264 	err = marvell_of_reg_init(phydev);
1265 	if (err < 0)
1266 		return err;
1267 
1268 	/* Reset address */
1269 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1270 	if (err < 0)
1271 		return err;
1272 
1273 	return genphy_soft_reset(phydev);
1274 }
1275 
1276 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1277 {
1278 	int err;
1279 
1280 	err = m88e1111_config_init_rgmii_delays(phydev);
1281 	if (err < 0)
1282 		return err;
1283 
1284 	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1285 		err = phy_write(phydev, 0x1d, 0x0012);
1286 		if (err < 0)
1287 			return err;
1288 
1289 		err = phy_modify(phydev, 0x1e, 0x0fc0,
1290 				 2 << 9 | /* 36 ohm */
1291 				 2 << 6); /* 39 ohm */
1292 		if (err < 0)
1293 			return err;
1294 
1295 		err = phy_write(phydev, 0x1d, 0x3);
1296 		if (err < 0)
1297 			return err;
1298 
1299 		err = phy_write(phydev, 0x1e, 0x8000);
1300 	}
1301 	return err;
1302 }
1303 
1304 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1305 {
1306 	return m88e1111_config_init_hwcfg_mode(
1307 		phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1308 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1309 }
1310 
1311 static int m88e1145_config_init(struct phy_device *phydev)
1312 {
1313 	int err;
1314 
1315 	/* Take care of errata E0 & E1 */
1316 	err = phy_write(phydev, 0x1d, 0x001b);
1317 	if (err < 0)
1318 		return err;
1319 
1320 	err = phy_write(phydev, 0x1e, 0x418f);
1321 	if (err < 0)
1322 		return err;
1323 
1324 	err = phy_write(phydev, 0x1d, 0x0016);
1325 	if (err < 0)
1326 		return err;
1327 
1328 	err = phy_write(phydev, 0x1e, 0xa2da);
1329 	if (err < 0)
1330 		return err;
1331 
1332 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1333 		err = m88e1145_config_init_rgmii(phydev);
1334 		if (err < 0)
1335 			return err;
1336 	}
1337 
1338 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1339 		err = m88e1145_config_init_sgmii(phydev);
1340 		if (err < 0)
1341 			return err;
1342 	}
1343 	err = m88e1111_set_downshift(phydev, 3);
1344 	if (err < 0)
1345 		return err;
1346 
1347 	err = marvell_of_reg_init(phydev);
1348 	if (err < 0)
1349 		return err;
1350 
1351 	return 0;
1352 }
1353 
1354 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1355 {
1356 	int val;
1357 
1358 	val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1359 	if (val < 0)
1360 		return val;
1361 
1362 	if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1363 		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1364 		return 0;
1365 	}
1366 
1367 	val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1368 
1369 	switch (val) {
1370 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1371 		*msecs = 0;
1372 		break;
1373 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1374 		*msecs = 10;
1375 		break;
1376 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1377 		*msecs = 20;
1378 		break;
1379 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1380 		*msecs = 40;
1381 		break;
1382 	default:
1383 		return -EINVAL;
1384 	}
1385 
1386 	return 0;
1387 }
1388 
1389 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1390 {
1391 	struct ethtool_eee eee;
1392 	int val, ret;
1393 
1394 	if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1395 		return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1396 				      MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1397 
1398 	/* According to the Marvell data sheet EEE must be disabled for
1399 	 * Fast Link Down detection to work properly
1400 	 */
1401 	ret = phy_ethtool_get_eee(phydev, &eee);
1402 	if (!ret && eee.eee_enabled) {
1403 		phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1404 		return -EBUSY;
1405 	}
1406 
1407 	if (*msecs <= 5)
1408 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1409 	else if (*msecs <= 15)
1410 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1411 	else if (*msecs <= 30)
1412 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1413 	else
1414 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1415 
1416 	val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1417 
1418 	ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1419 			 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1420 	if (ret)
1421 		return ret;
1422 
1423 	return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1424 			    MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1425 }
1426 
1427 static int m88e1540_get_tunable(struct phy_device *phydev,
1428 				struct ethtool_tunable *tuna, void *data)
1429 {
1430 	switch (tuna->id) {
1431 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1432 		return m88e1540_get_fld(phydev, data);
1433 	case ETHTOOL_PHY_DOWNSHIFT:
1434 		return m88e1011_get_downshift(phydev, data);
1435 	default:
1436 		return -EOPNOTSUPP;
1437 	}
1438 }
1439 
1440 static int m88e1540_set_tunable(struct phy_device *phydev,
1441 				struct ethtool_tunable *tuna, const void *data)
1442 {
1443 	switch (tuna->id) {
1444 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1445 		return m88e1540_set_fld(phydev, data);
1446 	case ETHTOOL_PHY_DOWNSHIFT:
1447 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1448 	default:
1449 		return -EOPNOTSUPP;
1450 	}
1451 }
1452 
1453 /* The VOD can be out of specification on link up. Poke an
1454  * undocumented register, in an undocumented page, with a magic value
1455  * to fix this.
1456  */
1457 static int m88e6390_errata(struct phy_device *phydev)
1458 {
1459 	int err;
1460 
1461 	err = phy_write(phydev, MII_BMCR,
1462 			BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1463 	if (err)
1464 		return err;
1465 
1466 	usleep_range(300, 400);
1467 
1468 	err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1469 	if (err)
1470 		return err;
1471 
1472 	return genphy_soft_reset(phydev);
1473 }
1474 
1475 static int m88e6390_config_aneg(struct phy_device *phydev)
1476 {
1477 	int err;
1478 
1479 	err = m88e6390_errata(phydev);
1480 	if (err)
1481 		return err;
1482 
1483 	return m88e1510_config_aneg(phydev);
1484 }
1485 
1486 /**
1487  * fiber_lpa_mod_linkmode_lpa_t
1488  * @advertising: the linkmode advertisement settings
1489  * @lpa: value of the MII_LPA register for fiber link
1490  *
1491  * A small helper function that translates MII_LPA bits to linkmode LP
1492  * advertisement settings. Other bits in advertising are left
1493  * unchanged.
1494  */
1495 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1496 {
1497 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1498 			 advertising, lpa & LPA_1000XHALF);
1499 
1500 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1501 			 advertising, lpa & LPA_1000XFULL);
1502 }
1503 
1504 static int marvell_read_status_page_an(struct phy_device *phydev,
1505 				       int fiber, int status)
1506 {
1507 	int lpa;
1508 	int err;
1509 
1510 	if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1511 		phydev->link = 0;
1512 		return 0;
1513 	}
1514 
1515 	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1516 		phydev->duplex = DUPLEX_FULL;
1517 	else
1518 		phydev->duplex = DUPLEX_HALF;
1519 
1520 	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1521 	case MII_M1011_PHY_STATUS_1000:
1522 		phydev->speed = SPEED_1000;
1523 		break;
1524 
1525 	case MII_M1011_PHY_STATUS_100:
1526 		phydev->speed = SPEED_100;
1527 		break;
1528 
1529 	default:
1530 		phydev->speed = SPEED_10;
1531 		break;
1532 	}
1533 
1534 	if (!fiber) {
1535 		err = genphy_read_lpa(phydev);
1536 		if (err < 0)
1537 			return err;
1538 
1539 		phy_resolve_aneg_pause(phydev);
1540 	} else {
1541 		lpa = phy_read(phydev, MII_LPA);
1542 		if (lpa < 0)
1543 			return lpa;
1544 
1545 		/* The fiber link is only 1000M capable */
1546 		fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1547 
1548 		if (phydev->duplex == DUPLEX_FULL) {
1549 			if (!(lpa & LPA_PAUSE_FIBER)) {
1550 				phydev->pause = 0;
1551 				phydev->asym_pause = 0;
1552 			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1553 				phydev->pause = 1;
1554 				phydev->asym_pause = 1;
1555 			} else {
1556 				phydev->pause = 1;
1557 				phydev->asym_pause = 0;
1558 			}
1559 		}
1560 	}
1561 
1562 	return 0;
1563 }
1564 
1565 /* marvell_read_status_page
1566  *
1567  * Description:
1568  *   Check the link, then figure out the current state
1569  *   by comparing what we advertise with what the link partner
1570  *   advertises.  Start by checking the gigabit possibilities,
1571  *   then move on to 10/100.
1572  */
1573 static int marvell_read_status_page(struct phy_device *phydev, int page)
1574 {
1575 	int status;
1576 	int fiber;
1577 	int err;
1578 
1579 	status = phy_read(phydev, MII_M1011_PHY_STATUS);
1580 	if (status < 0)
1581 		return status;
1582 
1583 	/* Use the generic register for copper link status,
1584 	 * and the PHY status register for fiber link status.
1585 	 */
1586 	if (page == MII_MARVELL_FIBER_PAGE) {
1587 		phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1588 	} else {
1589 		err = genphy_update_link(phydev);
1590 		if (err)
1591 			return err;
1592 	}
1593 
1594 	if (page == MII_MARVELL_FIBER_PAGE)
1595 		fiber = 1;
1596 	else
1597 		fiber = 0;
1598 
1599 	linkmode_zero(phydev->lp_advertising);
1600 	phydev->pause = 0;
1601 	phydev->asym_pause = 0;
1602 	phydev->speed = SPEED_UNKNOWN;
1603 	phydev->duplex = DUPLEX_UNKNOWN;
1604 	phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1605 
1606 	if (phydev->autoneg == AUTONEG_ENABLE)
1607 		err = marvell_read_status_page_an(phydev, fiber, status);
1608 	else
1609 		err = genphy_read_status_fixed(phydev);
1610 
1611 	return err;
1612 }
1613 
1614 /* marvell_read_status
1615  *
1616  * Some Marvell's phys have two modes: fiber and copper.
1617  * Both need status checked.
1618  * Description:
1619  *   First, check the fiber link and status.
1620  *   If the fiber link is down, check the copper link and status which
1621  *   will be the default value if both link are down.
1622  */
1623 static int marvell_read_status(struct phy_device *phydev)
1624 {
1625 	int err;
1626 
1627 	/* Check the fiber mode first */
1628 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1629 			      phydev->supported) &&
1630 	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1631 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1632 		if (err < 0)
1633 			goto error;
1634 
1635 		err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1636 		if (err < 0)
1637 			goto error;
1638 
1639 		/* If the fiber link is up, it is the selected and
1640 		 * used link. In this case, we need to stay in the
1641 		 * fiber page. Please to be careful about that, avoid
1642 		 * to restore Copper page in other functions which
1643 		 * could break the behaviour for some fiber phy like
1644 		 * 88E1512.
1645 		 */
1646 		if (phydev->link)
1647 			return 0;
1648 
1649 		/* If fiber link is down, check and save copper mode state */
1650 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1651 		if (err < 0)
1652 			goto error;
1653 	}
1654 
1655 	return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1656 
1657 error:
1658 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1659 	return err;
1660 }
1661 
1662 /* marvell_suspend
1663  *
1664  * Some Marvell's phys have two modes: fiber and copper.
1665  * Both need to be suspended
1666  */
1667 static int marvell_suspend(struct phy_device *phydev)
1668 {
1669 	int err;
1670 
1671 	/* Suspend the fiber mode first */
1672 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1673 			       phydev->supported)) {
1674 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1675 		if (err < 0)
1676 			goto error;
1677 
1678 		/* With the page set, use the generic suspend */
1679 		err = genphy_suspend(phydev);
1680 		if (err < 0)
1681 			goto error;
1682 
1683 		/* Then, the copper link */
1684 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1685 		if (err < 0)
1686 			goto error;
1687 	}
1688 
1689 	/* With the page set, use the generic suspend */
1690 	return genphy_suspend(phydev);
1691 
1692 error:
1693 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1694 	return err;
1695 }
1696 
1697 /* marvell_resume
1698  *
1699  * Some Marvell's phys have two modes: fiber and copper.
1700  * Both need to be resumed
1701  */
1702 static int marvell_resume(struct phy_device *phydev)
1703 {
1704 	int err;
1705 
1706 	/* Resume the fiber mode first */
1707 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1708 			       phydev->supported)) {
1709 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1710 		if (err < 0)
1711 			goto error;
1712 
1713 		/* With the page set, use the generic resume */
1714 		err = genphy_resume(phydev);
1715 		if (err < 0)
1716 			goto error;
1717 
1718 		/* Then, the copper link */
1719 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1720 		if (err < 0)
1721 			goto error;
1722 	}
1723 
1724 	/* With the page set, use the generic resume */
1725 	return genphy_resume(phydev);
1726 
1727 error:
1728 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1729 	return err;
1730 }
1731 
1732 static int marvell_aneg_done(struct phy_device *phydev)
1733 {
1734 	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1735 
1736 	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1737 }
1738 
1739 static void m88e1318_get_wol(struct phy_device *phydev,
1740 			     struct ethtool_wolinfo *wol)
1741 {
1742 	int ret;
1743 
1744 	wol->supported = WAKE_MAGIC;
1745 	wol->wolopts = 0;
1746 
1747 	ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1748 			     MII_88E1318S_PHY_WOL_CTRL);
1749 	if (ret >= 0 && ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1750 		wol->wolopts |= WAKE_MAGIC;
1751 }
1752 
1753 static int m88e1318_set_wol(struct phy_device *phydev,
1754 			    struct ethtool_wolinfo *wol)
1755 {
1756 	int err = 0, oldpage;
1757 
1758 	oldpage = phy_save_page(phydev);
1759 	if (oldpage < 0)
1760 		goto error;
1761 
1762 	if (wol->wolopts & WAKE_MAGIC) {
1763 		/* Explicitly switch to page 0x00, just to be sure */
1764 		err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1765 		if (err < 0)
1766 			goto error;
1767 
1768 		/* If WOL event happened once, the LED[2] interrupt pin
1769 		 * will not be cleared unless we reading the interrupt status
1770 		 * register. If interrupts are in use, the normal interrupt
1771 		 * handling will clear the WOL event. Clear the WOL event
1772 		 * before enabling it if !phy_interrupt_is_valid()
1773 		 */
1774 		if (!phy_interrupt_is_valid(phydev))
1775 			__phy_read(phydev, MII_M1011_IEVENT);
1776 
1777 		/* Enable the WOL interrupt */
1778 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1779 				     MII_88E1318S_PHY_CSIER_WOL_EIE);
1780 		if (err < 0)
1781 			goto error;
1782 
1783 		err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1784 		if (err < 0)
1785 			goto error;
1786 
1787 		/* Setup LED[2] as interrupt pin (active low) */
1788 		err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1789 				   MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1790 				   MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1791 				   MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1792 		if (err < 0)
1793 			goto error;
1794 
1795 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1796 		if (err < 0)
1797 			goto error;
1798 
1799 		/* Store the device address for the magic packet */
1800 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1801 				((phydev->attached_dev->dev_addr[5] << 8) |
1802 				 phydev->attached_dev->dev_addr[4]));
1803 		if (err < 0)
1804 			goto error;
1805 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1806 				((phydev->attached_dev->dev_addr[3] << 8) |
1807 				 phydev->attached_dev->dev_addr[2]));
1808 		if (err < 0)
1809 			goto error;
1810 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1811 				((phydev->attached_dev->dev_addr[1] << 8) |
1812 				 phydev->attached_dev->dev_addr[0]));
1813 		if (err < 0)
1814 			goto error;
1815 
1816 		/* Clear WOL status and enable magic packet matching */
1817 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1818 				     MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1819 				     MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1820 		if (err < 0)
1821 			goto error;
1822 	} else {
1823 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1824 		if (err < 0)
1825 			goto error;
1826 
1827 		/* Clear WOL status and disable magic packet matching */
1828 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1829 				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1830 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1831 		if (err < 0)
1832 			goto error;
1833 	}
1834 
1835 error:
1836 	return phy_restore_page(phydev, oldpage, err);
1837 }
1838 
1839 static int marvell_get_sset_count(struct phy_device *phydev)
1840 {
1841 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1842 			      phydev->supported))
1843 		return ARRAY_SIZE(marvell_hw_stats);
1844 	else
1845 		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1846 }
1847 
1848 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1849 {
1850 	int count = marvell_get_sset_count(phydev);
1851 	int i;
1852 
1853 	for (i = 0; i < count; i++) {
1854 		strlcpy(data + i * ETH_GSTRING_LEN,
1855 			marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1856 	}
1857 }
1858 
1859 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1860 {
1861 	struct marvell_hw_stat stat = marvell_hw_stats[i];
1862 	struct marvell_priv *priv = phydev->priv;
1863 	int val;
1864 	u64 ret;
1865 
1866 	val = phy_read_paged(phydev, stat.page, stat.reg);
1867 	if (val < 0) {
1868 		ret = U64_MAX;
1869 	} else {
1870 		val = val & ((1 << stat.bits) - 1);
1871 		priv->stats[i] += val;
1872 		ret = priv->stats[i];
1873 	}
1874 
1875 	return ret;
1876 }
1877 
1878 static void marvell_get_stats(struct phy_device *phydev,
1879 			      struct ethtool_stats *stats, u64 *data)
1880 {
1881 	int count = marvell_get_sset_count(phydev);
1882 	int i;
1883 
1884 	for (i = 0; i < count; i++)
1885 		data[i] = marvell_get_stat(phydev, i);
1886 }
1887 
1888 static int marvell_vct5_wait_complete(struct phy_device *phydev)
1889 {
1890 	int i;
1891 	int val;
1892 
1893 	for (i = 0; i < 32; i++) {
1894 		val = __phy_read(phydev, MII_VCT5_CTRL);
1895 		if (val < 0)
1896 			return val;
1897 
1898 		if (val & MII_VCT5_CTRL_COMPLETE)
1899 			return 0;
1900 	}
1901 
1902 	phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
1903 	return -ETIMEDOUT;
1904 }
1905 
1906 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
1907 {
1908 	int amplitude;
1909 	int val;
1910 	int reg;
1911 
1912 	reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
1913 	val = __phy_read(phydev, reg);
1914 
1915 	if (val < 0)
1916 		return 0;
1917 
1918 	amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
1919 		MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
1920 
1921 	if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
1922 		amplitude = -amplitude;
1923 
1924 	return 1000 * amplitude / 128;
1925 }
1926 
1927 static u32 marvell_vct5_distance2cm(int distance)
1928 {
1929 	return distance * 805 / 10;
1930 }
1931 
1932 static u32 marvell_vct5_cm2distance(int cm)
1933 {
1934 	return cm * 10 / 805;
1935 }
1936 
1937 static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
1938 					   int distance, int pair)
1939 {
1940 	u16 reg;
1941 	int err;
1942 	int mV;
1943 	int i;
1944 
1945 	err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
1946 			  distance);
1947 	if (err)
1948 		return err;
1949 
1950 	reg = MII_VCT5_CTRL_ENABLE |
1951 		MII_VCT5_CTRL_TX_SAME_CHANNEL |
1952 		MII_VCT5_CTRL_SAMPLES_DEFAULT |
1953 		MII_VCT5_CTRL_SAMPLE_POINT |
1954 		MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
1955 	err = __phy_write(phydev, MII_VCT5_CTRL, reg);
1956 	if (err)
1957 		return err;
1958 
1959 	err = marvell_vct5_wait_complete(phydev);
1960 	if (err)
1961 		return err;
1962 
1963 	for (i = 0; i < 4; i++) {
1964 		if (pair != PHY_PAIR_ALL && i != pair)
1965 			continue;
1966 
1967 		mV = marvell_vct5_amplitude(phydev, i);
1968 		ethnl_cable_test_amplitude(phydev, i, mV);
1969 	}
1970 
1971 	return 0;
1972 }
1973 
1974 static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
1975 {
1976 	struct marvell_priv *priv = phydev->priv;
1977 	int distance;
1978 	u16 width;
1979 	int page;
1980 	int err;
1981 	u16 reg;
1982 
1983 	if (priv->first <= TDR_SHORT_CABLE_LENGTH)
1984 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
1985 	else
1986 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
1987 
1988 	reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
1989 		MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
1990 		MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
1991 
1992 	err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1993 			      MII_VCT5_TX_PULSE_CTRL, reg);
1994 	if (err)
1995 		return err;
1996 
1997 	/* Reading the TDR data is very MDIO heavy. We need to optimize
1998 	 * access to keep the time to a minimum. So lock the bus once,
1999 	 * and don't release it until complete. We can then avoid having
2000 	 * to change the page for every access, greatly speeding things
2001 	 * up.
2002 	 */
2003 	page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2004 	if (page < 0)
2005 		goto restore_page;
2006 
2007 	for (distance = priv->first;
2008 	     distance <= priv->last;
2009 	     distance += priv->step) {
2010 		err = marvell_vct5_amplitude_distance(phydev, distance,
2011 						      priv->pair);
2012 		if (err)
2013 			goto restore_page;
2014 
2015 		if (distance > TDR_SHORT_CABLE_LENGTH &&
2016 		    width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2017 			width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2018 			reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2019 				MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2020 				MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2021 			err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2022 			if (err)
2023 				goto restore_page;
2024 		}
2025 	}
2026 
2027 restore_page:
2028 	return phy_restore_page(phydev, page, err);
2029 }
2030 
2031 static int marvell_cable_test_start_common(struct phy_device *phydev)
2032 {
2033 	int bmcr, bmsr, ret;
2034 
2035 	/* If auto-negotiation is enabled, but not complete, the cable
2036 	 * test never completes. So disable auto-neg.
2037 	 */
2038 	bmcr = phy_read(phydev, MII_BMCR);
2039 	if (bmcr < 0)
2040 		return bmcr;
2041 
2042 	bmsr = phy_read(phydev, MII_BMSR);
2043 
2044 	if (bmsr < 0)
2045 		return bmsr;
2046 
2047 	if (bmcr & BMCR_ANENABLE) {
2048 		ret =  phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2049 		if (ret < 0)
2050 			return ret;
2051 		ret = genphy_soft_reset(phydev);
2052 		if (ret < 0)
2053 			return ret;
2054 	}
2055 
2056 	/* If the link is up, allow it some time to go down */
2057 	if (bmsr & BMSR_LSTATUS)
2058 		msleep(1500);
2059 
2060 	return 0;
2061 }
2062 
2063 static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2064 {
2065 	struct marvell_priv *priv = phydev->priv;
2066 	int ret;
2067 
2068 	ret = marvell_cable_test_start_common(phydev);
2069 	if (ret)
2070 		return ret;
2071 
2072 	priv->cable_test_tdr = false;
2073 
2074 	/* Reset the VCT5 API control to defaults, otherwise
2075 	 * VCT7 does not work correctly.
2076 	 */
2077 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2078 			      MII_VCT5_CTRL,
2079 			      MII_VCT5_CTRL_TX_SAME_CHANNEL |
2080 			      MII_VCT5_CTRL_SAMPLES_DEFAULT |
2081 			      MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2082 			      MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2083 	if (ret)
2084 		return ret;
2085 
2086 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2087 			      MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2088 	if (ret)
2089 		return ret;
2090 
2091 	return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2092 			       MII_VCT7_CTRL,
2093 			       MII_VCT7_CTRL_RUN_NOW |
2094 			       MII_VCT7_CTRL_CENTIMETERS);
2095 }
2096 
2097 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2098 					     const struct phy_tdr_config *cfg)
2099 {
2100 	struct marvell_priv *priv = phydev->priv;
2101 	int ret;
2102 
2103 	priv->cable_test_tdr = true;
2104 	priv->first = marvell_vct5_cm2distance(cfg->first);
2105 	priv->last = marvell_vct5_cm2distance(cfg->last);
2106 	priv->step = marvell_vct5_cm2distance(cfg->step);
2107 	priv->pair = cfg->pair;
2108 
2109 	if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2110 		return -EINVAL;
2111 
2112 	if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2113 		return -EINVAL;
2114 
2115 	/* Disable  VCT7 */
2116 	ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2117 			      MII_VCT7_CTRL, 0);
2118 	if (ret)
2119 		return ret;
2120 
2121 	ret = marvell_cable_test_start_common(phydev);
2122 	if (ret)
2123 		return ret;
2124 
2125 	ret = ethnl_cable_test_pulse(phydev, 1000);
2126 	if (ret)
2127 		return ret;
2128 
2129 	return ethnl_cable_test_step(phydev,
2130 				     marvell_vct5_distance2cm(priv->first),
2131 				     marvell_vct5_distance2cm(priv->last),
2132 				     marvell_vct5_distance2cm(priv->step));
2133 }
2134 
2135 static int marvell_vct7_distance_to_length(int distance, bool meter)
2136 {
2137 	if (meter)
2138 		distance *= 100;
2139 
2140 	return distance;
2141 }
2142 
2143 static bool marvell_vct7_distance_valid(int result)
2144 {
2145 	switch (result) {
2146 	case MII_VCT7_RESULTS_OPEN:
2147 	case MII_VCT7_RESULTS_SAME_SHORT:
2148 	case MII_VCT7_RESULTS_CROSS_SHORT:
2149 		return true;
2150 	}
2151 	return false;
2152 }
2153 
2154 static int marvell_vct7_report_length(struct phy_device *phydev,
2155 				      int pair, bool meter)
2156 {
2157 	int length;
2158 	int ret;
2159 
2160 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2161 			     MII_VCT7_PAIR_0_DISTANCE + pair);
2162 	if (ret < 0)
2163 		return ret;
2164 
2165 	length = marvell_vct7_distance_to_length(ret, meter);
2166 
2167 	ethnl_cable_test_fault_length(phydev, pair, length);
2168 
2169 	return 0;
2170 }
2171 
2172 static int marvell_vct7_cable_test_report_trans(int result)
2173 {
2174 	switch (result) {
2175 	case MII_VCT7_RESULTS_OK:
2176 		return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2177 	case MII_VCT7_RESULTS_OPEN:
2178 		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2179 	case MII_VCT7_RESULTS_SAME_SHORT:
2180 		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2181 	case MII_VCT7_RESULTS_CROSS_SHORT:
2182 		return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2183 	default:
2184 		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2185 	}
2186 }
2187 
2188 static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2189 {
2190 	int pair0, pair1, pair2, pair3;
2191 	bool meter;
2192 	int ret;
2193 
2194 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2195 			     MII_VCT7_RESULTS);
2196 	if (ret < 0)
2197 		return ret;
2198 
2199 	pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2200 		MII_VCT7_RESULTS_PAIR3_SHIFT;
2201 	pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2202 		MII_VCT7_RESULTS_PAIR2_SHIFT;
2203 	pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2204 		MII_VCT7_RESULTS_PAIR1_SHIFT;
2205 	pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2206 		MII_VCT7_RESULTS_PAIR0_SHIFT;
2207 
2208 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2209 				marvell_vct7_cable_test_report_trans(pair0));
2210 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2211 				marvell_vct7_cable_test_report_trans(pair1));
2212 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2213 				marvell_vct7_cable_test_report_trans(pair2));
2214 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2215 				marvell_vct7_cable_test_report_trans(pair3));
2216 
2217 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2218 	if (ret < 0)
2219 		return ret;
2220 
2221 	meter = ret & MII_VCT7_CTRL_METERS;
2222 
2223 	if (marvell_vct7_distance_valid(pair0))
2224 		marvell_vct7_report_length(phydev, 0, meter);
2225 	if (marvell_vct7_distance_valid(pair1))
2226 		marvell_vct7_report_length(phydev, 1, meter);
2227 	if (marvell_vct7_distance_valid(pair2))
2228 		marvell_vct7_report_length(phydev, 2, meter);
2229 	if (marvell_vct7_distance_valid(pair3))
2230 		marvell_vct7_report_length(phydev, 3, meter);
2231 
2232 	return 0;
2233 }
2234 
2235 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2236 					      bool *finished)
2237 {
2238 	struct marvell_priv *priv = phydev->priv;
2239 	int ret;
2240 
2241 	if (priv->cable_test_tdr) {
2242 		ret = marvell_vct5_amplitude_graph(phydev);
2243 		*finished = true;
2244 		return ret;
2245 	}
2246 
2247 	*finished = false;
2248 
2249 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2250 			     MII_VCT7_CTRL);
2251 
2252 	if (ret < 0)
2253 		return ret;
2254 
2255 	if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2256 		*finished = true;
2257 
2258 		return marvell_vct7_cable_test_report(phydev);
2259 	}
2260 
2261 	return 0;
2262 }
2263 
2264 #ifdef CONFIG_HWMON
2265 struct marvell_hwmon_ops {
2266 	int (*config)(struct phy_device *phydev);
2267 	int (*get_temp)(struct phy_device *phydev, long *temp);
2268 	int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2269 	int (*set_temp_critical)(struct phy_device *phydev, long temp);
2270 	int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2271 };
2272 
2273 static const struct marvell_hwmon_ops *
2274 to_marvell_hwmon_ops(const struct phy_device *phydev)
2275 {
2276 	return phydev->drv->driver_data;
2277 }
2278 
2279 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2280 {
2281 	int oldpage;
2282 	int ret = 0;
2283 	int val;
2284 
2285 	*temp = 0;
2286 
2287 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2288 	if (oldpage < 0)
2289 		goto error;
2290 
2291 	/* Enable temperature sensor */
2292 	ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2293 	if (ret < 0)
2294 		goto error;
2295 
2296 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2297 			  ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2298 	if (ret < 0)
2299 		goto error;
2300 
2301 	/* Wait for temperature to stabilize */
2302 	usleep_range(10000, 12000);
2303 
2304 	val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2305 	if (val < 0) {
2306 		ret = val;
2307 		goto error;
2308 	}
2309 
2310 	/* Disable temperature sensor */
2311 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2312 			  ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2313 	if (ret < 0)
2314 		goto error;
2315 
2316 	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2317 
2318 error:
2319 	return phy_restore_page(phydev, oldpage, ret);
2320 }
2321 
2322 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2323 {
2324 	int ret;
2325 
2326 	*temp = 0;
2327 
2328 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2329 			     MII_88E1510_TEMP_SENSOR);
2330 	if (ret < 0)
2331 		return ret;
2332 
2333 	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2334 
2335 	return 0;
2336 }
2337 
2338 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2339 {
2340 	int ret;
2341 
2342 	*temp = 0;
2343 
2344 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2345 			     MII_88E1121_MISC_TEST);
2346 	if (ret < 0)
2347 		return ret;
2348 
2349 	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2350 		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2351 	/* convert to mC */
2352 	*temp *= 1000;
2353 
2354 	return 0;
2355 }
2356 
2357 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2358 {
2359 	temp = temp / 1000;
2360 	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2361 
2362 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2363 				MII_88E1121_MISC_TEST,
2364 				MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2365 				temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2366 }
2367 
2368 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2369 {
2370 	int ret;
2371 
2372 	*alarm = false;
2373 
2374 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2375 			     MII_88E1121_MISC_TEST);
2376 	if (ret < 0)
2377 		return ret;
2378 
2379 	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2380 
2381 	return 0;
2382 }
2383 
2384 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2385 {
2386 	int sum = 0;
2387 	int oldpage;
2388 	int ret = 0;
2389 	int i;
2390 
2391 	*temp = 0;
2392 
2393 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2394 	if (oldpage < 0)
2395 		goto error;
2396 
2397 	/* Enable temperature sensor */
2398 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2399 	if (ret < 0)
2400 		goto error;
2401 
2402 	ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2403 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2404 
2405 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2406 	if (ret < 0)
2407 		goto error;
2408 
2409 	/* Wait for temperature to stabilize */
2410 	usleep_range(10000, 12000);
2411 
2412 	/* Reading the temperature sense has an errata. You need to read
2413 	 * a number of times and take an average.
2414 	 */
2415 	for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2416 		ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2417 		if (ret < 0)
2418 			goto error;
2419 		sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2420 	}
2421 
2422 	sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2423 	*temp = (sum  - 75) * 1000;
2424 
2425 	/* Disable temperature sensor */
2426 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2427 	if (ret < 0)
2428 		goto error;
2429 
2430 	ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2431 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2432 
2433 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2434 
2435 error:
2436 	phy_restore_page(phydev, oldpage, ret);
2437 
2438 	return ret;
2439 }
2440 
2441 static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2442 {
2443 	int err;
2444 
2445 	err = m88e1510_get_temp(phydev, temp);
2446 
2447 	/* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2448 	 * T + 75, so we have to subtract another 50
2449 	 */
2450 	*temp -= 50000;
2451 
2452 	return err;
2453 }
2454 
2455 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2456 {
2457 	int ret;
2458 
2459 	*temp = 0;
2460 
2461 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2462 			     MII_88E6390_TEMP_SENSOR);
2463 	if (ret < 0)
2464 		return ret;
2465 
2466 	*temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2467 		  MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2468 
2469 	return 0;
2470 }
2471 
2472 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2473 {
2474 	temp = (temp / 1000) + 75;
2475 
2476 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2477 				MII_88E6390_TEMP_SENSOR,
2478 				MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
2479 				temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
2480 }
2481 
2482 static int m88e6393_hwmon_config(struct phy_device *phydev)
2483 {
2484 	int err;
2485 
2486 	err = m88e6393_set_temp_critical(phydev, 100000);
2487 	if (err)
2488 		return err;
2489 
2490 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2491 				MII_88E6390_MISC_TEST,
2492 				MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
2493 				MII_88E6393_MISC_TEST_SAMPLES_MASK |
2494 				MII_88E6393_MISC_TEST_RATE_MASK,
2495 				MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
2496 				MII_88E6393_MISC_TEST_SAMPLES_2048 |
2497 				MII_88E6393_MISC_TEST_RATE_2_3MS);
2498 }
2499 
2500 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
2501 			      u32 attr, int channel, long *temp)
2502 {
2503 	struct phy_device *phydev = dev_get_drvdata(dev);
2504 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2505 	int err = -EOPNOTSUPP;
2506 
2507 	switch (attr) {
2508 	case hwmon_temp_input:
2509 		if (ops->get_temp)
2510 			err = ops->get_temp(phydev, temp);
2511 		break;
2512 	case hwmon_temp_crit:
2513 		if (ops->get_temp_critical)
2514 			err = ops->get_temp_critical(phydev, temp);
2515 		break;
2516 	case hwmon_temp_max_alarm:
2517 		if (ops->get_temp_alarm)
2518 			err = ops->get_temp_alarm(phydev, temp);
2519 		break;
2520 	}
2521 
2522 	return err;
2523 }
2524 
2525 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
2526 			       u32 attr, int channel, long temp)
2527 {
2528 	struct phy_device *phydev = dev_get_drvdata(dev);
2529 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2530 	int err = -EOPNOTSUPP;
2531 
2532 	switch (attr) {
2533 	case hwmon_temp_crit:
2534 		if (ops->set_temp_critical)
2535 			err = ops->set_temp_critical(phydev, temp);
2536 		break;
2537 	}
2538 
2539 	return err;
2540 }
2541 
2542 static umode_t marvell_hwmon_is_visible(const void *data,
2543 					enum hwmon_sensor_types type,
2544 					u32 attr, int channel)
2545 {
2546 	const struct phy_device *phydev = data;
2547 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2548 
2549 	if (type != hwmon_temp)
2550 		return 0;
2551 
2552 	switch (attr) {
2553 	case hwmon_temp_input:
2554 		return ops->get_temp ? 0444 : 0;
2555 	case hwmon_temp_max_alarm:
2556 		return ops->get_temp_alarm ? 0444 : 0;
2557 	case hwmon_temp_crit:
2558 		return (ops->get_temp_critical ? 0444 : 0) |
2559 		       (ops->set_temp_critical ? 0200 : 0);
2560 	default:
2561 		return 0;
2562 	}
2563 }
2564 
2565 static u32 marvell_hwmon_chip_config[] = {
2566 	HWMON_C_REGISTER_TZ,
2567 	0
2568 };
2569 
2570 static const struct hwmon_channel_info marvell_hwmon_chip = {
2571 	.type = hwmon_chip,
2572 	.config = marvell_hwmon_chip_config,
2573 };
2574 
2575 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
2576  * defined for all PHYs, because the hwmon code checks whether the attributes
2577  * exists via the .is_visible method
2578  */
2579 static u32 marvell_hwmon_temp_config[] = {
2580 	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2581 	0
2582 };
2583 
2584 static const struct hwmon_channel_info marvell_hwmon_temp = {
2585 	.type = hwmon_temp,
2586 	.config = marvell_hwmon_temp_config,
2587 };
2588 
2589 static const struct hwmon_channel_info *marvell_hwmon_info[] = {
2590 	&marvell_hwmon_chip,
2591 	&marvell_hwmon_temp,
2592 	NULL
2593 };
2594 
2595 static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
2596 	.is_visible = marvell_hwmon_is_visible,
2597 	.read = marvell_hwmon_read,
2598 	.write = marvell_hwmon_write,
2599 };
2600 
2601 static const struct hwmon_chip_info marvell_hwmon_chip_info = {
2602 	.ops = &marvell_hwmon_hwmon_ops,
2603 	.info = marvell_hwmon_info,
2604 };
2605 
2606 static int marvell_hwmon_name(struct phy_device *phydev)
2607 {
2608 	struct marvell_priv *priv = phydev->priv;
2609 	struct device *dev = &phydev->mdio.dev;
2610 	const char *devname = dev_name(dev);
2611 	size_t len = strlen(devname);
2612 	int i, j;
2613 
2614 	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2615 	if (!priv->hwmon_name)
2616 		return -ENOMEM;
2617 
2618 	for (i = j = 0; i < len && devname[i]; i++) {
2619 		if (isalnum(devname[i]))
2620 			priv->hwmon_name[j++] = devname[i];
2621 	}
2622 
2623 	return 0;
2624 }
2625 
2626 static int marvell_hwmon_probe(struct phy_device *phydev)
2627 {
2628 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2629 	struct marvell_priv *priv = phydev->priv;
2630 	struct device *dev = &phydev->mdio.dev;
2631 	int err;
2632 
2633 	if (!ops)
2634 		return 0;
2635 
2636 	err = marvell_hwmon_name(phydev);
2637 	if (err)
2638 		return err;
2639 
2640 	priv->hwmon_dev = devm_hwmon_device_register_with_info(
2641 		dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
2642 	if (IS_ERR(priv->hwmon_dev))
2643 		return PTR_ERR(priv->hwmon_dev);
2644 
2645 	if (ops->config)
2646 		err = ops->config(phydev);
2647 
2648 	return err;
2649 }
2650 
2651 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
2652 	.get_temp = m88e1121_get_temp,
2653 };
2654 
2655 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
2656 	.get_temp = m88e1510_get_temp,
2657 	.get_temp_critical = m88e1510_get_temp_critical,
2658 	.set_temp_critical = m88e1510_set_temp_critical,
2659 	.get_temp_alarm = m88e1510_get_temp_alarm,
2660 };
2661 
2662 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
2663 	.get_temp = m88e6390_get_temp,
2664 };
2665 
2666 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
2667 	.config = m88e6393_hwmon_config,
2668 	.get_temp = m88e6393_get_temp,
2669 	.get_temp_critical = m88e6393_get_temp_critical,
2670 	.set_temp_critical = m88e6393_set_temp_critical,
2671 	.get_temp_alarm = m88e1510_get_temp_alarm,
2672 };
2673 
2674 #define DEF_MARVELL_HWMON_OPS(s) (&(s))
2675 
2676 #else
2677 
2678 #define DEF_MARVELL_HWMON_OPS(s) NULL
2679 
2680 static int marvell_hwmon_probe(struct phy_device *phydev)
2681 {
2682 	return 0;
2683 }
2684 #endif
2685 
2686 static int marvell_probe(struct phy_device *phydev)
2687 {
2688 	struct marvell_priv *priv;
2689 
2690 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2691 	if (!priv)
2692 		return -ENOMEM;
2693 
2694 	phydev->priv = priv;
2695 
2696 	return marvell_hwmon_probe(phydev);
2697 }
2698 
2699 static struct phy_driver marvell_drivers[] = {
2700 	{
2701 		.phy_id = MARVELL_PHY_ID_88E1101,
2702 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2703 		.name = "Marvell 88E1101",
2704 		/* PHY_GBIT_FEATURES */
2705 		.probe = marvell_probe,
2706 		.config_init = marvell_config_init,
2707 		.config_aneg = m88e1101_config_aneg,
2708 		.config_intr = marvell_config_intr,
2709 		.handle_interrupt = marvell_handle_interrupt,
2710 		.resume = genphy_resume,
2711 		.suspend = genphy_suspend,
2712 		.read_page = marvell_read_page,
2713 		.write_page = marvell_write_page,
2714 		.get_sset_count = marvell_get_sset_count,
2715 		.get_strings = marvell_get_strings,
2716 		.get_stats = marvell_get_stats,
2717 	},
2718 	{
2719 		.phy_id = MARVELL_PHY_ID_88E1112,
2720 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2721 		.name = "Marvell 88E1112",
2722 		/* PHY_GBIT_FEATURES */
2723 		.probe = marvell_probe,
2724 		.config_init = m88e1112_config_init,
2725 		.config_aneg = marvell_config_aneg,
2726 		.config_intr = marvell_config_intr,
2727 		.handle_interrupt = marvell_handle_interrupt,
2728 		.resume = genphy_resume,
2729 		.suspend = genphy_suspend,
2730 		.read_page = marvell_read_page,
2731 		.write_page = marvell_write_page,
2732 		.get_sset_count = marvell_get_sset_count,
2733 		.get_strings = marvell_get_strings,
2734 		.get_stats = marvell_get_stats,
2735 		.get_tunable = m88e1011_get_tunable,
2736 		.set_tunable = m88e1011_set_tunable,
2737 	},
2738 	{
2739 		.phy_id = MARVELL_PHY_ID_88E1111,
2740 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2741 		.name = "Marvell 88E1111",
2742 		/* PHY_GBIT_FEATURES */
2743 		.probe = marvell_probe,
2744 		.config_init = m88e1111gbe_config_init,
2745 		.config_aneg = m88e1111_config_aneg,
2746 		.read_status = marvell_read_status,
2747 		.config_intr = marvell_config_intr,
2748 		.handle_interrupt = marvell_handle_interrupt,
2749 		.resume = genphy_resume,
2750 		.suspend = genphy_suspend,
2751 		.read_page = marvell_read_page,
2752 		.write_page = marvell_write_page,
2753 		.get_sset_count = marvell_get_sset_count,
2754 		.get_strings = marvell_get_strings,
2755 		.get_stats = marvell_get_stats,
2756 		.get_tunable = m88e1111_get_tunable,
2757 		.set_tunable = m88e1111_set_tunable,
2758 	},
2759 	{
2760 		.phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
2761 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2762 		.name = "Marvell 88E1111 (Finisar)",
2763 		/* PHY_GBIT_FEATURES */
2764 		.probe = marvell_probe,
2765 		.config_init = m88e1111gbe_config_init,
2766 		.config_aneg = m88e1111_config_aneg,
2767 		.read_status = marvell_read_status,
2768 		.config_intr = marvell_config_intr,
2769 		.handle_interrupt = marvell_handle_interrupt,
2770 		.resume = genphy_resume,
2771 		.suspend = genphy_suspend,
2772 		.read_page = marvell_read_page,
2773 		.write_page = marvell_write_page,
2774 		.get_sset_count = marvell_get_sset_count,
2775 		.get_strings = marvell_get_strings,
2776 		.get_stats = marvell_get_stats,
2777 		.get_tunable = m88e1111_get_tunable,
2778 		.set_tunable = m88e1111_set_tunable,
2779 	},
2780 	{
2781 		.phy_id = MARVELL_PHY_ID_88E1118,
2782 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2783 		.name = "Marvell 88E1118",
2784 		/* PHY_GBIT_FEATURES */
2785 		.probe = marvell_probe,
2786 		.config_init = m88e1118_config_init,
2787 		.config_aneg = m88e1118_config_aneg,
2788 		.config_intr = marvell_config_intr,
2789 		.handle_interrupt = marvell_handle_interrupt,
2790 		.resume = genphy_resume,
2791 		.suspend = genphy_suspend,
2792 		.read_page = marvell_read_page,
2793 		.write_page = marvell_write_page,
2794 		.get_sset_count = marvell_get_sset_count,
2795 		.get_strings = marvell_get_strings,
2796 		.get_stats = marvell_get_stats,
2797 	},
2798 	{
2799 		.phy_id = MARVELL_PHY_ID_88E1121R,
2800 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2801 		.name = "Marvell 88E1121R",
2802 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
2803 		/* PHY_GBIT_FEATURES */
2804 		.probe = marvell_probe,
2805 		.config_init = marvell_1011gbe_config_init,
2806 		.config_aneg = m88e1121_config_aneg,
2807 		.read_status = marvell_read_status,
2808 		.config_intr = marvell_config_intr,
2809 		.handle_interrupt = marvell_handle_interrupt,
2810 		.resume = genphy_resume,
2811 		.suspend = genphy_suspend,
2812 		.read_page = marvell_read_page,
2813 		.write_page = marvell_write_page,
2814 		.get_sset_count = marvell_get_sset_count,
2815 		.get_strings = marvell_get_strings,
2816 		.get_stats = marvell_get_stats,
2817 		.get_tunable = m88e1011_get_tunable,
2818 		.set_tunable = m88e1011_set_tunable,
2819 	},
2820 	{
2821 		.phy_id = MARVELL_PHY_ID_88E1318S,
2822 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2823 		.name = "Marvell 88E1318S",
2824 		/* PHY_GBIT_FEATURES */
2825 		.probe = marvell_probe,
2826 		.config_init = m88e1318_config_init,
2827 		.config_aneg = m88e1318_config_aneg,
2828 		.read_status = marvell_read_status,
2829 		.config_intr = marvell_config_intr,
2830 		.handle_interrupt = marvell_handle_interrupt,
2831 		.get_wol = m88e1318_get_wol,
2832 		.set_wol = m88e1318_set_wol,
2833 		.resume = genphy_resume,
2834 		.suspend = genphy_suspend,
2835 		.read_page = marvell_read_page,
2836 		.write_page = marvell_write_page,
2837 		.get_sset_count = marvell_get_sset_count,
2838 		.get_strings = marvell_get_strings,
2839 		.get_stats = marvell_get_stats,
2840 	},
2841 	{
2842 		.phy_id = MARVELL_PHY_ID_88E1145,
2843 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2844 		.name = "Marvell 88E1145",
2845 		/* PHY_GBIT_FEATURES */
2846 		.probe = marvell_probe,
2847 		.config_init = m88e1145_config_init,
2848 		.config_aneg = m88e1101_config_aneg,
2849 		.config_intr = marvell_config_intr,
2850 		.handle_interrupt = marvell_handle_interrupt,
2851 		.resume = genphy_resume,
2852 		.suspend = genphy_suspend,
2853 		.read_page = marvell_read_page,
2854 		.write_page = marvell_write_page,
2855 		.get_sset_count = marvell_get_sset_count,
2856 		.get_strings = marvell_get_strings,
2857 		.get_stats = marvell_get_stats,
2858 		.get_tunable = m88e1111_get_tunable,
2859 		.set_tunable = m88e1111_set_tunable,
2860 	},
2861 	{
2862 		.phy_id = MARVELL_PHY_ID_88E1149R,
2863 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2864 		.name = "Marvell 88E1149R",
2865 		/* PHY_GBIT_FEATURES */
2866 		.probe = marvell_probe,
2867 		.config_init = m88e1149_config_init,
2868 		.config_aneg = m88e1118_config_aneg,
2869 		.config_intr = marvell_config_intr,
2870 		.handle_interrupt = marvell_handle_interrupt,
2871 		.resume = genphy_resume,
2872 		.suspend = genphy_suspend,
2873 		.read_page = marvell_read_page,
2874 		.write_page = marvell_write_page,
2875 		.get_sset_count = marvell_get_sset_count,
2876 		.get_strings = marvell_get_strings,
2877 		.get_stats = marvell_get_stats,
2878 	},
2879 	{
2880 		.phy_id = MARVELL_PHY_ID_88E1240,
2881 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2882 		.name = "Marvell 88E1240",
2883 		/* PHY_GBIT_FEATURES */
2884 		.probe = marvell_probe,
2885 		.config_init = m88e1112_config_init,
2886 		.config_aneg = marvell_config_aneg,
2887 		.config_intr = marvell_config_intr,
2888 		.handle_interrupt = marvell_handle_interrupt,
2889 		.resume = genphy_resume,
2890 		.suspend = genphy_suspend,
2891 		.read_page = marvell_read_page,
2892 		.write_page = marvell_write_page,
2893 		.get_sset_count = marvell_get_sset_count,
2894 		.get_strings = marvell_get_strings,
2895 		.get_stats = marvell_get_stats,
2896 		.get_tunable = m88e1011_get_tunable,
2897 		.set_tunable = m88e1011_set_tunable,
2898 	},
2899 	{
2900 		.phy_id = MARVELL_PHY_ID_88E1116R,
2901 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2902 		.name = "Marvell 88E1116R",
2903 		/* PHY_GBIT_FEATURES */
2904 		.probe = marvell_probe,
2905 		.config_init = m88e1116r_config_init,
2906 		.config_intr = marvell_config_intr,
2907 		.handle_interrupt = marvell_handle_interrupt,
2908 		.resume = genphy_resume,
2909 		.suspend = genphy_suspend,
2910 		.read_page = marvell_read_page,
2911 		.write_page = marvell_write_page,
2912 		.get_sset_count = marvell_get_sset_count,
2913 		.get_strings = marvell_get_strings,
2914 		.get_stats = marvell_get_stats,
2915 		.get_tunable = m88e1011_get_tunable,
2916 		.set_tunable = m88e1011_set_tunable,
2917 	},
2918 	{
2919 		.phy_id = MARVELL_PHY_ID_88E1510,
2920 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2921 		.name = "Marvell 88E1510",
2922 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2923 		.features = PHY_GBIT_FIBRE_FEATURES,
2924 		.flags = PHY_POLL_CABLE_TEST,
2925 		.probe = marvell_probe,
2926 		.config_init = m88e1510_config_init,
2927 		.config_aneg = m88e1510_config_aneg,
2928 		.read_status = marvell_read_status,
2929 		.config_intr = marvell_config_intr,
2930 		.handle_interrupt = marvell_handle_interrupt,
2931 		.get_wol = m88e1318_get_wol,
2932 		.set_wol = m88e1318_set_wol,
2933 		.resume = marvell_resume,
2934 		.suspend = marvell_suspend,
2935 		.read_page = marvell_read_page,
2936 		.write_page = marvell_write_page,
2937 		.get_sset_count = marvell_get_sset_count,
2938 		.get_strings = marvell_get_strings,
2939 		.get_stats = marvell_get_stats,
2940 		.set_loopback = genphy_loopback,
2941 		.get_tunable = m88e1011_get_tunable,
2942 		.set_tunable = m88e1011_set_tunable,
2943 		.cable_test_start = marvell_vct7_cable_test_start,
2944 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2945 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
2946 	},
2947 	{
2948 		.phy_id = MARVELL_PHY_ID_88E1540,
2949 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2950 		.name = "Marvell 88E1540",
2951 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2952 		/* PHY_GBIT_FEATURES */
2953 		.flags = PHY_POLL_CABLE_TEST,
2954 		.probe = marvell_probe,
2955 		.config_init = marvell_1011gbe_config_init,
2956 		.config_aneg = m88e1510_config_aneg,
2957 		.read_status = marvell_read_status,
2958 		.config_intr = marvell_config_intr,
2959 		.handle_interrupt = marvell_handle_interrupt,
2960 		.resume = genphy_resume,
2961 		.suspend = genphy_suspend,
2962 		.read_page = marvell_read_page,
2963 		.write_page = marvell_write_page,
2964 		.get_sset_count = marvell_get_sset_count,
2965 		.get_strings = marvell_get_strings,
2966 		.get_stats = marvell_get_stats,
2967 		.get_tunable = m88e1540_get_tunable,
2968 		.set_tunable = m88e1540_set_tunable,
2969 		.cable_test_start = marvell_vct7_cable_test_start,
2970 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2971 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
2972 	},
2973 	{
2974 		.phy_id = MARVELL_PHY_ID_88E1545,
2975 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2976 		.name = "Marvell 88E1545",
2977 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2978 		.probe = marvell_probe,
2979 		/* PHY_GBIT_FEATURES */
2980 		.flags = PHY_POLL_CABLE_TEST,
2981 		.config_init = marvell_1011gbe_config_init,
2982 		.config_aneg = m88e1510_config_aneg,
2983 		.read_status = marvell_read_status,
2984 		.config_intr = marvell_config_intr,
2985 		.handle_interrupt = marvell_handle_interrupt,
2986 		.resume = genphy_resume,
2987 		.suspend = genphy_suspend,
2988 		.read_page = marvell_read_page,
2989 		.write_page = marvell_write_page,
2990 		.get_sset_count = marvell_get_sset_count,
2991 		.get_strings = marvell_get_strings,
2992 		.get_stats = marvell_get_stats,
2993 		.get_tunable = m88e1540_get_tunable,
2994 		.set_tunable = m88e1540_set_tunable,
2995 		.cable_test_start = marvell_vct7_cable_test_start,
2996 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2997 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
2998 	},
2999 	{
3000 		.phy_id = MARVELL_PHY_ID_88E3016,
3001 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3002 		.name = "Marvell 88E3016",
3003 		/* PHY_BASIC_FEATURES */
3004 		.probe = marvell_probe,
3005 		.config_init = m88e3016_config_init,
3006 		.aneg_done = marvell_aneg_done,
3007 		.read_status = marvell_read_status,
3008 		.config_intr = marvell_config_intr,
3009 		.handle_interrupt = marvell_handle_interrupt,
3010 		.resume = genphy_resume,
3011 		.suspend = genphy_suspend,
3012 		.read_page = marvell_read_page,
3013 		.write_page = marvell_write_page,
3014 		.get_sset_count = marvell_get_sset_count,
3015 		.get_strings = marvell_get_strings,
3016 		.get_stats = marvell_get_stats,
3017 	},
3018 	{
3019 		.phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
3020 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3021 		.name = "Marvell 88E6341 Family",
3022 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3023 		/* PHY_GBIT_FEATURES */
3024 		.flags = PHY_POLL_CABLE_TEST,
3025 		.probe = marvell_probe,
3026 		.config_init = marvell_1011gbe_config_init,
3027 		.config_aneg = m88e6390_config_aneg,
3028 		.read_status = marvell_read_status,
3029 		.config_intr = marvell_config_intr,
3030 		.handle_interrupt = marvell_handle_interrupt,
3031 		.resume = genphy_resume,
3032 		.suspend = genphy_suspend,
3033 		.read_page = marvell_read_page,
3034 		.write_page = marvell_write_page,
3035 		.get_sset_count = marvell_get_sset_count,
3036 		.get_strings = marvell_get_strings,
3037 		.get_stats = marvell_get_stats,
3038 		.get_tunable = m88e1540_get_tunable,
3039 		.set_tunable = m88e1540_set_tunable,
3040 		.cable_test_start = marvell_vct7_cable_test_start,
3041 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3042 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3043 	},
3044 	{
3045 		.phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
3046 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3047 		.name = "Marvell 88E6390 Family",
3048 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
3049 		/* PHY_GBIT_FEATURES */
3050 		.flags = PHY_POLL_CABLE_TEST,
3051 		.probe = marvell_probe,
3052 		.config_init = marvell_1011gbe_config_init,
3053 		.config_aneg = m88e6390_config_aneg,
3054 		.read_status = marvell_read_status,
3055 		.config_intr = marvell_config_intr,
3056 		.handle_interrupt = marvell_handle_interrupt,
3057 		.resume = genphy_resume,
3058 		.suspend = genphy_suspend,
3059 		.read_page = marvell_read_page,
3060 		.write_page = marvell_write_page,
3061 		.get_sset_count = marvell_get_sset_count,
3062 		.get_strings = marvell_get_strings,
3063 		.get_stats = marvell_get_stats,
3064 		.get_tunable = m88e1540_get_tunable,
3065 		.set_tunable = m88e1540_set_tunable,
3066 		.cable_test_start = marvell_vct7_cable_test_start,
3067 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3068 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3069 	},
3070 	{
3071 		.phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
3072 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3073 		.name = "Marvell 88E6393 Family",
3074 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
3075 		/* PHY_GBIT_FEATURES */
3076 		.flags = PHY_POLL_CABLE_TEST,
3077 		.probe = marvell_probe,
3078 		.config_init = marvell_1011gbe_config_init,
3079 		.config_aneg = m88e1510_config_aneg,
3080 		.read_status = marvell_read_status,
3081 		.config_intr = marvell_config_intr,
3082 		.handle_interrupt = marvell_handle_interrupt,
3083 		.resume = genphy_resume,
3084 		.suspend = genphy_suspend,
3085 		.read_page = marvell_read_page,
3086 		.write_page = marvell_write_page,
3087 		.get_sset_count = marvell_get_sset_count,
3088 		.get_strings = marvell_get_strings,
3089 		.get_stats = marvell_get_stats,
3090 		.get_tunable = m88e1540_get_tunable,
3091 		.set_tunable = m88e1540_set_tunable,
3092 		.cable_test_start = marvell_vct7_cable_test_start,
3093 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3094 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3095 	},
3096 	{
3097 		.phy_id = MARVELL_PHY_ID_88E1340S,
3098 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3099 		.name = "Marvell 88E1340S",
3100 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3101 		.probe = marvell_probe,
3102 		/* PHY_GBIT_FEATURES */
3103 		.config_init = marvell_1011gbe_config_init,
3104 		.config_aneg = m88e1510_config_aneg,
3105 		.read_status = marvell_read_status,
3106 		.config_intr = marvell_config_intr,
3107 		.handle_interrupt = marvell_handle_interrupt,
3108 		.resume = genphy_resume,
3109 		.suspend = genphy_suspend,
3110 		.read_page = marvell_read_page,
3111 		.write_page = marvell_write_page,
3112 		.get_sset_count = marvell_get_sset_count,
3113 		.get_strings = marvell_get_strings,
3114 		.get_stats = marvell_get_stats,
3115 		.get_tunable = m88e1540_get_tunable,
3116 		.set_tunable = m88e1540_set_tunable,
3117 	},
3118 	{
3119 		.phy_id = MARVELL_PHY_ID_88E1548P,
3120 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3121 		.name = "Marvell 88E1548P",
3122 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3123 		.probe = marvell_probe,
3124 		.features = PHY_GBIT_FIBRE_FEATURES,
3125 		.config_init = marvell_1011gbe_config_init,
3126 		.config_aneg = m88e1510_config_aneg,
3127 		.read_status = marvell_read_status,
3128 		.config_intr = marvell_config_intr,
3129 		.handle_interrupt = marvell_handle_interrupt,
3130 		.resume = genphy_resume,
3131 		.suspend = genphy_suspend,
3132 		.read_page = marvell_read_page,
3133 		.write_page = marvell_write_page,
3134 		.get_sset_count = marvell_get_sset_count,
3135 		.get_strings = marvell_get_strings,
3136 		.get_stats = marvell_get_stats,
3137 		.get_tunable = m88e1540_get_tunable,
3138 		.set_tunable = m88e1540_set_tunable,
3139 	},
3140 };
3141 
3142 module_phy_driver(marvell_drivers);
3143 
3144 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
3145 	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
3146 	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
3147 	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
3148 	{ MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
3149 	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
3150 	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3151 	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3152 	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3153 	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3154 	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3155 	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3156 	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3157 	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3158 	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3159 	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3160 	{ MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
3161 	{ MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
3162 	{ MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
3163 	{ MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3164 	{ MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3165 	{ }
3166 };
3167 
3168 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
3169