1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13 #include <linux/kernel.h> 14 #include <linux/string.h> 15 #include <linux/ctype.h> 16 #include <linux/errno.h> 17 #include <linux/unistd.h> 18 #include <linux/hwmon.h> 19 #include <linux/interrupt.h> 20 #include <linux/init.h> 21 #include <linux/delay.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/skbuff.h> 25 #include <linux/spinlock.h> 26 #include <linux/mm.h> 27 #include <linux/module.h> 28 #include <linux/mii.h> 29 #include <linux/ethtool.h> 30 #include <linux/phy.h> 31 #include <linux/marvell_phy.h> 32 #include <linux/bitfield.h> 33 #include <linux/of.h> 34 35 #include <linux/io.h> 36 #include <asm/irq.h> 37 #include <linux/uaccess.h> 38 39 #define MII_MARVELL_PHY_PAGE 22 40 #define MII_MARVELL_COPPER_PAGE 0x00 41 #define MII_MARVELL_FIBER_PAGE 0x01 42 #define MII_MARVELL_MSCR_PAGE 0x02 43 #define MII_MARVELL_LED_PAGE 0x03 44 #define MII_MARVELL_MISC_TEST_PAGE 0x06 45 #define MII_MARVELL_WOL_PAGE 0x11 46 47 #define MII_M1011_IEVENT 0x13 48 #define MII_M1011_IEVENT_CLEAR 0x0000 49 50 #define MII_M1011_IMASK 0x12 51 #define MII_M1011_IMASK_INIT 0x6400 52 #define MII_M1011_IMASK_CLEAR 0x0000 53 54 #define MII_M1011_PHY_SCR 0x10 55 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 56 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12) 57 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8 58 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 59 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 60 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 61 62 #define MII_M1011_PHY_SSR 0x11 63 #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5) 64 65 #define MII_M1111_PHY_LED_CONTROL 0x18 66 #define MII_M1111_PHY_LED_DIRECT 0x4100 67 #define MII_M1111_PHY_LED_COMBINE 0x411c 68 #define MII_M1111_PHY_EXT_CR 0x14 69 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9) 70 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8 71 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8) 72 #define MII_M1111_RGMII_RX_DELAY BIT(7) 73 #define MII_M1111_RGMII_TX_DELAY BIT(1) 74 #define MII_M1111_PHY_EXT_SR 0x1b 75 76 #define MII_M1111_HWCFG_MODE_MASK 0xf 77 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 78 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 79 #define MII_M1111_HWCFG_MODE_RTBI 0x7 80 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 81 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 82 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 83 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 84 85 #define MII_88E1121_PHY_MSCR_REG 21 86 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 87 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 88 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 89 90 #define MII_88E1121_MISC_TEST 0x1a 91 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 92 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 93 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 94 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 95 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 96 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 97 98 #define MII_88E1510_TEMP_SENSOR 0x1b 99 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 100 101 #define MII_88E1540_COPPER_CTRL3 0x1a 102 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) 103 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 104 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 105 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 106 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 107 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) 108 109 #define MII_88E6390_MISC_TEST 0x1b 110 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 111 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 112 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 113 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 114 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 115 116 #define MII_88E6390_TEMP_SENSOR 0x1c 117 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 118 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 119 120 #define MII_88E1318S_PHY_MSCR1_REG 16 121 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 122 123 /* Copper Specific Interrupt Enable Register */ 124 #define MII_88E1318S_PHY_CSIER 0x12 125 /* WOL Event Interrupt Enable */ 126 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 127 128 /* LED Timer Control Register */ 129 #define MII_88E1318S_PHY_LED_TCR 0x12 130 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 131 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 132 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 133 134 /* Magic Packet MAC address registers */ 135 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 136 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 137 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 138 139 #define MII_88E1318S_PHY_WOL_CTRL 0x10 140 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 141 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 142 143 #define MII_PHY_LED_CTRL 16 144 #define MII_88E1121_PHY_LED_DEF 0x0030 145 #define MII_88E1510_PHY_LED_DEF 0x1177 146 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040 147 148 #define MII_M1011_PHY_STATUS 0x11 149 #define MII_M1011_PHY_STATUS_1000 0x8000 150 #define MII_M1011_PHY_STATUS_100 0x4000 151 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 152 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 153 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 154 #define MII_M1011_PHY_STATUS_LINK 0x0400 155 156 #define MII_88E3016_PHY_SPEC_CTRL 0x10 157 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 158 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 159 160 #define MII_88E1510_GEN_CTRL_REG_1 0x14 161 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 162 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 163 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 164 165 #define LPA_PAUSE_FIBER 0x180 166 #define LPA_PAUSE_ASYM_FIBER 0x100 167 168 #define NB_FIBER_STATS 1 169 170 MODULE_DESCRIPTION("Marvell PHY driver"); 171 MODULE_AUTHOR("Andy Fleming"); 172 MODULE_LICENSE("GPL"); 173 174 struct marvell_hw_stat { 175 const char *string; 176 u8 page; 177 u8 reg; 178 u8 bits; 179 }; 180 181 static struct marvell_hw_stat marvell_hw_stats[] = { 182 { "phy_receive_errors_copper", 0, 21, 16}, 183 { "phy_idle_errors", 0, 10, 8 }, 184 { "phy_receive_errors_fiber", 1, 21, 16}, 185 }; 186 187 struct marvell_priv { 188 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 189 char *hwmon_name; 190 struct device *hwmon_dev; 191 }; 192 193 static int marvell_read_page(struct phy_device *phydev) 194 { 195 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 196 } 197 198 static int marvell_write_page(struct phy_device *phydev, int page) 199 { 200 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 201 } 202 203 static int marvell_set_page(struct phy_device *phydev, int page) 204 { 205 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 206 } 207 208 static int marvell_ack_interrupt(struct phy_device *phydev) 209 { 210 int err; 211 212 /* Clear the interrupts by reading the reg */ 213 err = phy_read(phydev, MII_M1011_IEVENT); 214 215 if (err < 0) 216 return err; 217 218 return 0; 219 } 220 221 static int marvell_config_intr(struct phy_device *phydev) 222 { 223 int err; 224 225 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 226 err = phy_write(phydev, MII_M1011_IMASK, 227 MII_M1011_IMASK_INIT); 228 else 229 err = phy_write(phydev, MII_M1011_IMASK, 230 MII_M1011_IMASK_CLEAR); 231 232 return err; 233 } 234 235 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 236 { 237 int reg; 238 int err; 239 int val; 240 241 /* get the current settings */ 242 reg = phy_read(phydev, MII_M1011_PHY_SCR); 243 if (reg < 0) 244 return reg; 245 246 val = reg; 247 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 248 switch (polarity) { 249 case ETH_TP_MDI: 250 val |= MII_M1011_PHY_SCR_MDI; 251 break; 252 case ETH_TP_MDI_X: 253 val |= MII_M1011_PHY_SCR_MDI_X; 254 break; 255 case ETH_TP_MDI_AUTO: 256 case ETH_TP_MDI_INVALID: 257 default: 258 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 259 break; 260 } 261 262 if (val != reg) { 263 /* Set the new polarity value in the register */ 264 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 265 if (err) 266 return err; 267 } 268 269 return val != reg; 270 } 271 272 static int marvell_config_aneg(struct phy_device *phydev) 273 { 274 int changed = 0; 275 int err; 276 277 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 278 if (err < 0) 279 return err; 280 281 changed = err; 282 283 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 284 MII_M1111_PHY_LED_DIRECT); 285 if (err < 0) 286 return err; 287 288 err = genphy_config_aneg(phydev); 289 if (err < 0) 290 return err; 291 292 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 293 /* A write to speed/duplex bits (that is performed by 294 * genphy_config_aneg() call above) must be followed by 295 * a software reset. Otherwise, the write has no effect. 296 */ 297 err = genphy_soft_reset(phydev); 298 if (err < 0) 299 return err; 300 } 301 302 return 0; 303 } 304 305 static int m88e1101_config_aneg(struct phy_device *phydev) 306 { 307 int err; 308 309 /* This Marvell PHY has an errata which requires 310 * that certain registers get written in order 311 * to restart autonegotiation 312 */ 313 err = genphy_soft_reset(phydev); 314 if (err < 0) 315 return err; 316 317 err = phy_write(phydev, 0x1d, 0x1f); 318 if (err < 0) 319 return err; 320 321 err = phy_write(phydev, 0x1e, 0x200c); 322 if (err < 0) 323 return err; 324 325 err = phy_write(phydev, 0x1d, 0x5); 326 if (err < 0) 327 return err; 328 329 err = phy_write(phydev, 0x1e, 0); 330 if (err < 0) 331 return err; 332 333 err = phy_write(phydev, 0x1e, 0x100); 334 if (err < 0) 335 return err; 336 337 return marvell_config_aneg(phydev); 338 } 339 340 #ifdef CONFIG_OF_MDIO 341 /* Set and/or override some configuration registers based on the 342 * marvell,reg-init property stored in the of_node for the phydev. 343 * 344 * marvell,reg-init = <reg-page reg mask value>,...; 345 * 346 * There may be one or more sets of <reg-page reg mask value>: 347 * 348 * reg-page: which register bank to use. 349 * reg: the register. 350 * mask: if non-zero, ANDed with existing register value. 351 * value: ORed with the masked value and written to the regiser. 352 * 353 */ 354 static int marvell_of_reg_init(struct phy_device *phydev) 355 { 356 const __be32 *paddr; 357 int len, i, saved_page, current_page, ret = 0; 358 359 if (!phydev->mdio.dev.of_node) 360 return 0; 361 362 paddr = of_get_property(phydev->mdio.dev.of_node, 363 "marvell,reg-init", &len); 364 if (!paddr || len < (4 * sizeof(*paddr))) 365 return 0; 366 367 saved_page = phy_save_page(phydev); 368 if (saved_page < 0) 369 goto err; 370 current_page = saved_page; 371 372 len /= sizeof(*paddr); 373 for (i = 0; i < len - 3; i += 4) { 374 u16 page = be32_to_cpup(paddr + i); 375 u16 reg = be32_to_cpup(paddr + i + 1); 376 u16 mask = be32_to_cpup(paddr + i + 2); 377 u16 val_bits = be32_to_cpup(paddr + i + 3); 378 int val; 379 380 if (page != current_page) { 381 current_page = page; 382 ret = marvell_write_page(phydev, page); 383 if (ret < 0) 384 goto err; 385 } 386 387 val = 0; 388 if (mask) { 389 val = __phy_read(phydev, reg); 390 if (val < 0) { 391 ret = val; 392 goto err; 393 } 394 val &= mask; 395 } 396 val |= val_bits; 397 398 ret = __phy_write(phydev, reg, val); 399 if (ret < 0) 400 goto err; 401 } 402 err: 403 return phy_restore_page(phydev, saved_page, ret); 404 } 405 #else 406 static int marvell_of_reg_init(struct phy_device *phydev) 407 { 408 return 0; 409 } 410 #endif /* CONFIG_OF_MDIO */ 411 412 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 413 { 414 int mscr; 415 416 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 417 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 418 MII_88E1121_PHY_MSCR_TX_DELAY; 419 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 420 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 421 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 422 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 423 else 424 mscr = 0; 425 426 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 427 MII_88E1121_PHY_MSCR_REG, 428 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 429 } 430 431 static int m88e1121_config_aneg(struct phy_device *phydev) 432 { 433 int changed = 0; 434 int err = 0; 435 436 if (phy_interface_is_rgmii(phydev)) { 437 err = m88e1121_config_aneg_rgmii_delays(phydev); 438 if (err < 0) 439 return err; 440 } 441 442 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 443 if (err < 0) 444 return err; 445 446 changed = err; 447 448 err = genphy_config_aneg(phydev); 449 if (err < 0) 450 return err; 451 452 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 453 /* A software reset is used to ensure a "commit" of the 454 * changes is done. 455 */ 456 err = genphy_soft_reset(phydev); 457 if (err < 0) 458 return err; 459 } 460 461 return 0; 462 } 463 464 static int m88e1318_config_aneg(struct phy_device *phydev) 465 { 466 int err; 467 468 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 469 MII_88E1318S_PHY_MSCR1_REG, 470 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 471 if (err < 0) 472 return err; 473 474 return m88e1121_config_aneg(phydev); 475 } 476 477 /** 478 * linkmode_adv_to_fiber_adv_t 479 * @advertise: the linkmode advertisement settings 480 * 481 * A small helper function that translates linkmode advertisement 482 * settings to phy autonegotiation advertisements for the MII_ADV 483 * register for fiber link. 484 */ 485 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 486 { 487 u32 result = 0; 488 489 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 490 result |= ADVERTISE_1000XHALF; 491 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 492 result |= ADVERTISE_1000XFULL; 493 494 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 495 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 496 result |= ADVERTISE_1000XPSE_ASYM; 497 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 498 result |= ADVERTISE_1000XPAUSE; 499 500 return result; 501 } 502 503 /** 504 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 505 * @phydev: target phy_device struct 506 * 507 * Description: If auto-negotiation is enabled, we configure the 508 * advertising, and then restart auto-negotiation. If it is not 509 * enabled, then we write the BMCR. Adapted for fiber link in 510 * some Marvell's devices. 511 */ 512 static int marvell_config_aneg_fiber(struct phy_device *phydev) 513 { 514 int changed = 0; 515 int err; 516 u16 adv; 517 518 if (phydev->autoneg != AUTONEG_ENABLE) 519 return genphy_setup_forced(phydev); 520 521 /* Only allow advertising what this PHY supports */ 522 linkmode_and(phydev->advertising, phydev->advertising, 523 phydev->supported); 524 525 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising); 526 527 /* Setup fiber advertisement */ 528 err = phy_modify_changed(phydev, MII_ADVERTISE, 529 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL | 530 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM, 531 adv); 532 if (err < 0) 533 return err; 534 if (err > 0) 535 changed = 1; 536 537 return genphy_check_and_restart_aneg(phydev, changed); 538 } 539 540 static int m88e1510_config_aneg(struct phy_device *phydev) 541 { 542 int err; 543 544 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 545 if (err < 0) 546 goto error; 547 548 /* Configure the copper link first */ 549 err = m88e1318_config_aneg(phydev); 550 if (err < 0) 551 goto error; 552 553 /* Do not touch the fiber page if we're in copper->sgmii mode */ 554 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 555 return 0; 556 557 /* Then the fiber link */ 558 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 559 if (err < 0) 560 goto error; 561 562 err = marvell_config_aneg_fiber(phydev); 563 if (err < 0) 564 goto error; 565 566 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 567 568 error: 569 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 570 return err; 571 } 572 573 static void marvell_config_led(struct phy_device *phydev) 574 { 575 u16 def_config; 576 int err; 577 578 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 579 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 580 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 581 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 582 def_config = MII_88E1121_PHY_LED_DEF; 583 break; 584 /* Default PHY LED config: 585 * LED[0] .. 1000Mbps Link 586 * LED[1] .. 100Mbps Link 587 * LED[2] .. Blink, Activity 588 */ 589 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 590 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE) 591 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE; 592 else 593 def_config = MII_88E1510_PHY_LED_DEF; 594 break; 595 default: 596 return; 597 } 598 599 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 600 def_config); 601 if (err < 0) 602 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 603 } 604 605 static int marvell_config_init(struct phy_device *phydev) 606 { 607 /* Set defalut LED */ 608 marvell_config_led(phydev); 609 610 /* Set registers from marvell,reg-init DT property */ 611 return marvell_of_reg_init(phydev); 612 } 613 614 static int m88e3016_config_init(struct phy_device *phydev) 615 { 616 int ret; 617 618 /* Enable Scrambler and Auto-Crossover */ 619 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 620 MII_88E3016_DISABLE_SCRAMBLER, 621 MII_88E3016_AUTO_MDIX_CROSSOVER); 622 if (ret < 0) 623 return ret; 624 625 return marvell_config_init(phydev); 626 } 627 628 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 629 u16 mode, 630 int fibre_copper_auto) 631 { 632 if (fibre_copper_auto) 633 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 634 635 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 636 MII_M1111_HWCFG_MODE_MASK | 637 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 638 MII_M1111_HWCFG_FIBER_COPPER_RES, 639 mode); 640 } 641 642 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 643 { 644 int delay; 645 646 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 647 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 648 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 649 delay = MII_M1111_RGMII_RX_DELAY; 650 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 651 delay = MII_M1111_RGMII_TX_DELAY; 652 } else { 653 delay = 0; 654 } 655 656 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 657 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 658 delay); 659 } 660 661 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 662 { 663 int temp; 664 int err; 665 666 err = m88e1111_config_init_rgmii_delays(phydev); 667 if (err < 0) 668 return err; 669 670 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 671 if (temp < 0) 672 return temp; 673 674 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 675 676 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 677 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 678 else 679 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 680 681 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 682 } 683 684 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 685 { 686 int err; 687 688 err = m88e1111_config_init_hwcfg_mode( 689 phydev, 690 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 691 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 692 if (err < 0) 693 return err; 694 695 /* make sure copper is selected */ 696 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 697 } 698 699 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 700 { 701 int err; 702 703 err = m88e1111_config_init_rgmii_delays(phydev); 704 if (err < 0) 705 return err; 706 707 err = m88e1111_config_init_hwcfg_mode( 708 phydev, 709 MII_M1111_HWCFG_MODE_RTBI, 710 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 711 if (err < 0) 712 return err; 713 714 /* soft reset */ 715 err = genphy_soft_reset(phydev); 716 if (err < 0) 717 return err; 718 719 return m88e1111_config_init_hwcfg_mode( 720 phydev, 721 MII_M1111_HWCFG_MODE_RTBI, 722 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 723 } 724 725 static int m88e1111_config_init(struct phy_device *phydev) 726 { 727 int err; 728 729 if (phy_interface_is_rgmii(phydev)) { 730 err = m88e1111_config_init_rgmii(phydev); 731 if (err < 0) 732 return err; 733 } 734 735 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 736 err = m88e1111_config_init_sgmii(phydev); 737 if (err < 0) 738 return err; 739 } 740 741 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 742 err = m88e1111_config_init_rtbi(phydev); 743 if (err < 0) 744 return err; 745 } 746 747 err = marvell_of_reg_init(phydev); 748 if (err < 0) 749 return err; 750 751 return genphy_soft_reset(phydev); 752 } 753 754 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data) 755 { 756 int val, cnt, enable; 757 758 val = phy_read(phydev, MII_M1111_PHY_EXT_CR); 759 if (val < 0) 760 return val; 761 762 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val); 763 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1; 764 765 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 766 767 return 0; 768 } 769 770 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt) 771 { 772 int val; 773 774 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX) 775 return -E2BIG; 776 777 if (!cnt) 778 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, 779 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); 780 781 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; 782 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); 783 784 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 785 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | 786 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, 787 val); 788 } 789 790 static int m88e1111_get_tunable(struct phy_device *phydev, 791 struct ethtool_tunable *tuna, void *data) 792 { 793 switch (tuna->id) { 794 case ETHTOOL_PHY_DOWNSHIFT: 795 return m88e1111_get_downshift(phydev, data); 796 default: 797 return -EOPNOTSUPP; 798 } 799 } 800 801 static int m88e1111_set_tunable(struct phy_device *phydev, 802 struct ethtool_tunable *tuna, const void *data) 803 { 804 switch (tuna->id) { 805 case ETHTOOL_PHY_DOWNSHIFT: 806 return m88e1111_set_downshift(phydev, *(const u8 *)data); 807 default: 808 return -EOPNOTSUPP; 809 } 810 } 811 812 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data) 813 { 814 int val, cnt, enable; 815 816 val = phy_read(phydev, MII_M1011_PHY_SCR); 817 if (val < 0) 818 return val; 819 820 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val); 821 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1; 822 823 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 824 825 return 0; 826 } 827 828 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt) 829 { 830 int val; 831 832 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX) 833 return -E2BIG; 834 835 if (!cnt) 836 return phy_clear_bits(phydev, MII_M1011_PHY_SCR, 837 MII_M1011_PHY_SCR_DOWNSHIFT_EN); 838 839 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; 840 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); 841 842 return phy_modify(phydev, MII_M1011_PHY_SCR, 843 MII_M1011_PHY_SCR_DOWNSHIFT_EN | 844 MII_M1011_PHY_SCR_DOWNSHIFT_MASK, 845 val); 846 } 847 848 static int m88e1011_get_tunable(struct phy_device *phydev, 849 struct ethtool_tunable *tuna, void *data) 850 { 851 switch (tuna->id) { 852 case ETHTOOL_PHY_DOWNSHIFT: 853 return m88e1011_get_downshift(phydev, data); 854 default: 855 return -EOPNOTSUPP; 856 } 857 } 858 859 static int m88e1011_set_tunable(struct phy_device *phydev, 860 struct ethtool_tunable *tuna, const void *data) 861 { 862 switch (tuna->id) { 863 case ETHTOOL_PHY_DOWNSHIFT: 864 return m88e1011_set_downshift(phydev, *(const u8 *)data); 865 default: 866 return -EOPNOTSUPP; 867 } 868 } 869 870 static int m88e1116r_config_init(struct phy_device *phydev) 871 { 872 int err; 873 874 err = genphy_soft_reset(phydev); 875 if (err < 0) 876 return err; 877 878 msleep(500); 879 880 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 881 if (err < 0) 882 return err; 883 884 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 885 if (err < 0) 886 return err; 887 888 err = m88e1011_set_downshift(phydev, 8); 889 if (err < 0) 890 return err; 891 892 if (phy_interface_is_rgmii(phydev)) { 893 err = m88e1121_config_aneg_rgmii_delays(phydev); 894 if (err < 0) 895 return err; 896 } 897 898 err = genphy_soft_reset(phydev); 899 if (err < 0) 900 return err; 901 902 return marvell_config_init(phydev); 903 } 904 905 static int m88e1318_config_init(struct phy_device *phydev) 906 { 907 if (phy_interrupt_is_valid(phydev)) { 908 int err = phy_modify_paged( 909 phydev, MII_MARVELL_LED_PAGE, 910 MII_88E1318S_PHY_LED_TCR, 911 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 912 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 913 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 914 if (err < 0) 915 return err; 916 } 917 918 return marvell_config_init(phydev); 919 } 920 921 static int m88e1510_config_init(struct phy_device *phydev) 922 { 923 int err; 924 925 /* SGMII-to-Copper mode initialization */ 926 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 927 /* Select page 18 */ 928 err = marvell_set_page(phydev, 18); 929 if (err < 0) 930 return err; 931 932 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 933 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 934 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 935 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 936 if (err < 0) 937 return err; 938 939 /* PHY reset is necessary after changing MODE[2:0] */ 940 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 941 MII_88E1510_GEN_CTRL_REG_1_RESET); 942 if (err < 0) 943 return err; 944 945 /* Reset page selection */ 946 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 947 if (err < 0) 948 return err; 949 } 950 951 return m88e1318_config_init(phydev); 952 } 953 954 static int m88e1118_config_aneg(struct phy_device *phydev) 955 { 956 int err; 957 958 err = genphy_soft_reset(phydev); 959 if (err < 0) 960 return err; 961 962 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 963 if (err < 0) 964 return err; 965 966 err = genphy_config_aneg(phydev); 967 return 0; 968 } 969 970 static int m88e1118_config_init(struct phy_device *phydev) 971 { 972 int err; 973 974 /* Change address */ 975 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 976 if (err < 0) 977 return err; 978 979 /* Enable 1000 Mbit */ 980 err = phy_write(phydev, 0x15, 0x1070); 981 if (err < 0) 982 return err; 983 984 /* Change address */ 985 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 986 if (err < 0) 987 return err; 988 989 /* Adjust LED Control */ 990 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 991 err = phy_write(phydev, 0x10, 0x1100); 992 else 993 err = phy_write(phydev, 0x10, 0x021e); 994 if (err < 0) 995 return err; 996 997 err = marvell_of_reg_init(phydev); 998 if (err < 0) 999 return err; 1000 1001 /* Reset address */ 1002 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1003 if (err < 0) 1004 return err; 1005 1006 return genphy_soft_reset(phydev); 1007 } 1008 1009 static int m88e1149_config_init(struct phy_device *phydev) 1010 { 1011 int err; 1012 1013 /* Change address */ 1014 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1015 if (err < 0) 1016 return err; 1017 1018 /* Enable 1000 Mbit */ 1019 err = phy_write(phydev, 0x15, 0x1048); 1020 if (err < 0) 1021 return err; 1022 1023 err = marvell_of_reg_init(phydev); 1024 if (err < 0) 1025 return err; 1026 1027 /* Reset address */ 1028 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1029 if (err < 0) 1030 return err; 1031 1032 return genphy_soft_reset(phydev); 1033 } 1034 1035 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 1036 { 1037 int err; 1038 1039 err = m88e1111_config_init_rgmii_delays(phydev); 1040 if (err < 0) 1041 return err; 1042 1043 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 1044 err = phy_write(phydev, 0x1d, 0x0012); 1045 if (err < 0) 1046 return err; 1047 1048 err = phy_modify(phydev, 0x1e, 0x0fc0, 1049 2 << 9 | /* 36 ohm */ 1050 2 << 6); /* 39 ohm */ 1051 if (err < 0) 1052 return err; 1053 1054 err = phy_write(phydev, 0x1d, 0x3); 1055 if (err < 0) 1056 return err; 1057 1058 err = phy_write(phydev, 0x1e, 0x8000); 1059 } 1060 return err; 1061 } 1062 1063 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1064 { 1065 return m88e1111_config_init_hwcfg_mode( 1066 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1067 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1068 } 1069 1070 static int m88e1145_config_init(struct phy_device *phydev) 1071 { 1072 int err; 1073 1074 /* Take care of errata E0 & E1 */ 1075 err = phy_write(phydev, 0x1d, 0x001b); 1076 if (err < 0) 1077 return err; 1078 1079 err = phy_write(phydev, 0x1e, 0x418f); 1080 if (err < 0) 1081 return err; 1082 1083 err = phy_write(phydev, 0x1d, 0x0016); 1084 if (err < 0) 1085 return err; 1086 1087 err = phy_write(phydev, 0x1e, 0xa2da); 1088 if (err < 0) 1089 return err; 1090 1091 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1092 err = m88e1145_config_init_rgmii(phydev); 1093 if (err < 0) 1094 return err; 1095 } 1096 1097 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1098 err = m88e1145_config_init_sgmii(phydev); 1099 if (err < 0) 1100 return err; 1101 } 1102 1103 err = marvell_of_reg_init(phydev); 1104 if (err < 0) 1105 return err; 1106 1107 return 0; 1108 } 1109 1110 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) 1111 { 1112 int val; 1113 1114 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); 1115 if (val < 0) 1116 return val; 1117 1118 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { 1119 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; 1120 return 0; 1121 } 1122 1123 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1124 1125 switch (val) { 1126 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: 1127 *msecs = 0; 1128 break; 1129 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: 1130 *msecs = 10; 1131 break; 1132 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: 1133 *msecs = 20; 1134 break; 1135 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: 1136 *msecs = 40; 1137 break; 1138 default: 1139 return -EINVAL; 1140 } 1141 1142 return 0; 1143 } 1144 1145 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) 1146 { 1147 struct ethtool_eee eee; 1148 int val, ret; 1149 1150 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) 1151 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, 1152 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1153 1154 /* According to the Marvell data sheet EEE must be disabled for 1155 * Fast Link Down detection to work properly 1156 */ 1157 ret = phy_ethtool_get_eee(phydev, &eee); 1158 if (!ret && eee.eee_enabled) { 1159 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); 1160 return -EBUSY; 1161 } 1162 1163 if (*msecs <= 5) 1164 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; 1165 else if (*msecs <= 15) 1166 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; 1167 else if (*msecs <= 30) 1168 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; 1169 else 1170 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; 1171 1172 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1173 1174 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, 1175 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1176 if (ret) 1177 return ret; 1178 1179 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, 1180 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1181 } 1182 1183 static int m88e1540_get_tunable(struct phy_device *phydev, 1184 struct ethtool_tunable *tuna, void *data) 1185 { 1186 switch (tuna->id) { 1187 case ETHTOOL_PHY_FAST_LINK_DOWN: 1188 return m88e1540_get_fld(phydev, data); 1189 case ETHTOOL_PHY_DOWNSHIFT: 1190 return m88e1011_get_downshift(phydev, data); 1191 default: 1192 return -EOPNOTSUPP; 1193 } 1194 } 1195 1196 static int m88e1540_set_tunable(struct phy_device *phydev, 1197 struct ethtool_tunable *tuna, const void *data) 1198 { 1199 switch (tuna->id) { 1200 case ETHTOOL_PHY_FAST_LINK_DOWN: 1201 return m88e1540_set_fld(phydev, data); 1202 case ETHTOOL_PHY_DOWNSHIFT: 1203 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1204 default: 1205 return -EOPNOTSUPP; 1206 } 1207 } 1208 1209 /* The VOD can be out of specification on link up. Poke an 1210 * undocumented register, in an undocumented page, with a magic value 1211 * to fix this. 1212 */ 1213 static int m88e6390_errata(struct phy_device *phydev) 1214 { 1215 int err; 1216 1217 err = phy_write(phydev, MII_BMCR, 1218 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1219 if (err) 1220 return err; 1221 1222 usleep_range(300, 400); 1223 1224 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1225 if (err) 1226 return err; 1227 1228 return genphy_soft_reset(phydev); 1229 } 1230 1231 static int m88e6390_config_aneg(struct phy_device *phydev) 1232 { 1233 int err; 1234 1235 err = m88e6390_errata(phydev); 1236 if (err) 1237 return err; 1238 1239 return m88e1510_config_aneg(phydev); 1240 } 1241 1242 /** 1243 * fiber_lpa_mod_linkmode_lpa_t 1244 * @advertising: the linkmode advertisement settings 1245 * @lpa: value of the MII_LPA register for fiber link 1246 * 1247 * A small helper function that translates MII_LPA bits to linkmode LP 1248 * advertisement settings. Other bits in advertising are left 1249 * unchanged. 1250 */ 1251 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1252 { 1253 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1254 advertising, lpa & LPA_1000XHALF); 1255 1256 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1257 advertising, lpa & LPA_1000XFULL); 1258 } 1259 1260 static int marvell_read_status_page_an(struct phy_device *phydev, 1261 int fiber, int status) 1262 { 1263 int lpa; 1264 int err; 1265 1266 if (!fiber) { 1267 err = genphy_read_lpa(phydev); 1268 if (err < 0) 1269 return err; 1270 1271 phy_resolve_aneg_pause(phydev); 1272 } else { 1273 lpa = phy_read(phydev, MII_LPA); 1274 if (lpa < 0) 1275 return lpa; 1276 1277 /* The fiber link is only 1000M capable */ 1278 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1279 1280 if (phydev->duplex == DUPLEX_FULL) { 1281 if (!(lpa & LPA_PAUSE_FIBER)) { 1282 phydev->pause = 0; 1283 phydev->asym_pause = 0; 1284 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1285 phydev->pause = 1; 1286 phydev->asym_pause = 1; 1287 } else { 1288 phydev->pause = 1; 1289 phydev->asym_pause = 0; 1290 } 1291 } 1292 } 1293 1294 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) 1295 return 0; 1296 1297 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1298 phydev->duplex = DUPLEX_FULL; 1299 else 1300 phydev->duplex = DUPLEX_HALF; 1301 1302 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) { 1303 case MII_M1011_PHY_STATUS_1000: 1304 phydev->speed = SPEED_1000; 1305 break; 1306 1307 case MII_M1011_PHY_STATUS_100: 1308 phydev->speed = SPEED_100; 1309 break; 1310 1311 default: 1312 phydev->speed = SPEED_10; 1313 break; 1314 } 1315 1316 return 0; 1317 } 1318 1319 /* marvell_read_status_page 1320 * 1321 * Description: 1322 * Check the link, then figure out the current state 1323 * by comparing what we advertise with what the link partner 1324 * advertises. Start by checking the gigabit possibilities, 1325 * then move on to 10/100. 1326 */ 1327 static int marvell_read_status_page(struct phy_device *phydev, int page) 1328 { 1329 int status; 1330 int fiber; 1331 int err; 1332 1333 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1334 if (status < 0) 1335 return status; 1336 1337 /* Use the generic register for copper link status, 1338 * and the PHY status register for fiber link status. 1339 */ 1340 if (page == MII_MARVELL_FIBER_PAGE) { 1341 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK); 1342 } else { 1343 err = genphy_update_link(phydev); 1344 if (err) 1345 return err; 1346 } 1347 1348 if (page == MII_MARVELL_FIBER_PAGE) 1349 fiber = 1; 1350 else 1351 fiber = 0; 1352 1353 linkmode_zero(phydev->lp_advertising); 1354 phydev->pause = 0; 1355 phydev->asym_pause = 0; 1356 phydev->speed = SPEED_UNKNOWN; 1357 phydev->duplex = DUPLEX_UNKNOWN; 1358 1359 if (phydev->autoneg == AUTONEG_ENABLE) 1360 err = marvell_read_status_page_an(phydev, fiber, status); 1361 else 1362 err = genphy_read_status_fixed(phydev); 1363 1364 return err; 1365 } 1366 1367 /* marvell_read_status 1368 * 1369 * Some Marvell's phys have two modes: fiber and copper. 1370 * Both need status checked. 1371 * Description: 1372 * First, check the fiber link and status. 1373 * If the fiber link is down, check the copper link and status which 1374 * will be the default value if both link are down. 1375 */ 1376 static int marvell_read_status(struct phy_device *phydev) 1377 { 1378 int err; 1379 1380 /* Check the fiber mode first */ 1381 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1382 phydev->supported) && 1383 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1384 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1385 if (err < 0) 1386 goto error; 1387 1388 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1389 if (err < 0) 1390 goto error; 1391 1392 /* If the fiber link is up, it is the selected and 1393 * used link. In this case, we need to stay in the 1394 * fiber page. Please to be careful about that, avoid 1395 * to restore Copper page in other functions which 1396 * could break the behaviour for some fiber phy like 1397 * 88E1512. 1398 */ 1399 if (phydev->link) 1400 return 0; 1401 1402 /* If fiber link is down, check and save copper mode state */ 1403 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1404 if (err < 0) 1405 goto error; 1406 } 1407 1408 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1409 1410 error: 1411 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1412 return err; 1413 } 1414 1415 /* marvell_suspend 1416 * 1417 * Some Marvell's phys have two modes: fiber and copper. 1418 * Both need to be suspended 1419 */ 1420 static int marvell_suspend(struct phy_device *phydev) 1421 { 1422 int err; 1423 1424 /* Suspend the fiber mode first */ 1425 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1426 phydev->supported)) { 1427 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1428 if (err < 0) 1429 goto error; 1430 1431 /* With the page set, use the generic suspend */ 1432 err = genphy_suspend(phydev); 1433 if (err < 0) 1434 goto error; 1435 1436 /* Then, the copper link */ 1437 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1438 if (err < 0) 1439 goto error; 1440 } 1441 1442 /* With the page set, use the generic suspend */ 1443 return genphy_suspend(phydev); 1444 1445 error: 1446 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1447 return err; 1448 } 1449 1450 /* marvell_resume 1451 * 1452 * Some Marvell's phys have two modes: fiber and copper. 1453 * Both need to be resumed 1454 */ 1455 static int marvell_resume(struct phy_device *phydev) 1456 { 1457 int err; 1458 1459 /* Resume the fiber mode first */ 1460 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1461 phydev->supported)) { 1462 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1463 if (err < 0) 1464 goto error; 1465 1466 /* With the page set, use the generic resume */ 1467 err = genphy_resume(phydev); 1468 if (err < 0) 1469 goto error; 1470 1471 /* Then, the copper link */ 1472 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1473 if (err < 0) 1474 goto error; 1475 } 1476 1477 /* With the page set, use the generic resume */ 1478 return genphy_resume(phydev); 1479 1480 error: 1481 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1482 return err; 1483 } 1484 1485 static int marvell_aneg_done(struct phy_device *phydev) 1486 { 1487 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1488 1489 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1490 } 1491 1492 static int m88e1121_did_interrupt(struct phy_device *phydev) 1493 { 1494 int imask; 1495 1496 imask = phy_read(phydev, MII_M1011_IEVENT); 1497 1498 if (imask & MII_M1011_IMASK_INIT) 1499 return 1; 1500 1501 return 0; 1502 } 1503 1504 static void m88e1318_get_wol(struct phy_device *phydev, 1505 struct ethtool_wolinfo *wol) 1506 { 1507 int oldpage, ret = 0; 1508 1509 wol->supported = WAKE_MAGIC; 1510 wol->wolopts = 0; 1511 1512 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1513 if (oldpage < 0) 1514 goto error; 1515 1516 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1517 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1518 wol->wolopts |= WAKE_MAGIC; 1519 1520 error: 1521 phy_restore_page(phydev, oldpage, ret); 1522 } 1523 1524 static int m88e1318_set_wol(struct phy_device *phydev, 1525 struct ethtool_wolinfo *wol) 1526 { 1527 int err = 0, oldpage; 1528 1529 oldpage = phy_save_page(phydev); 1530 if (oldpage < 0) 1531 goto error; 1532 1533 if (wol->wolopts & WAKE_MAGIC) { 1534 /* Explicitly switch to page 0x00, just to be sure */ 1535 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1536 if (err < 0) 1537 goto error; 1538 1539 /* If WOL event happened once, the LED[2] interrupt pin 1540 * will not be cleared unless we reading the interrupt status 1541 * register. If interrupts are in use, the normal interrupt 1542 * handling will clear the WOL event. Clear the WOL event 1543 * before enabling it if !phy_interrupt_is_valid() 1544 */ 1545 if (!phy_interrupt_is_valid(phydev)) 1546 __phy_read(phydev, MII_M1011_IEVENT); 1547 1548 /* Enable the WOL interrupt */ 1549 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1550 MII_88E1318S_PHY_CSIER_WOL_EIE); 1551 if (err < 0) 1552 goto error; 1553 1554 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1555 if (err < 0) 1556 goto error; 1557 1558 /* Setup LED[2] as interrupt pin (active low) */ 1559 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1560 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1561 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1562 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1563 if (err < 0) 1564 goto error; 1565 1566 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1567 if (err < 0) 1568 goto error; 1569 1570 /* Store the device address for the magic packet */ 1571 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1572 ((phydev->attached_dev->dev_addr[5] << 8) | 1573 phydev->attached_dev->dev_addr[4])); 1574 if (err < 0) 1575 goto error; 1576 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1577 ((phydev->attached_dev->dev_addr[3] << 8) | 1578 phydev->attached_dev->dev_addr[2])); 1579 if (err < 0) 1580 goto error; 1581 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1582 ((phydev->attached_dev->dev_addr[1] << 8) | 1583 phydev->attached_dev->dev_addr[0])); 1584 if (err < 0) 1585 goto error; 1586 1587 /* Clear WOL status and enable magic packet matching */ 1588 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1589 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1590 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1591 if (err < 0) 1592 goto error; 1593 } else { 1594 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1595 if (err < 0) 1596 goto error; 1597 1598 /* Clear WOL status and disable magic packet matching */ 1599 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1600 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1601 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1602 if (err < 0) 1603 goto error; 1604 } 1605 1606 error: 1607 return phy_restore_page(phydev, oldpage, err); 1608 } 1609 1610 static int marvell_get_sset_count(struct phy_device *phydev) 1611 { 1612 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1613 phydev->supported)) 1614 return ARRAY_SIZE(marvell_hw_stats); 1615 else 1616 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1617 } 1618 1619 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1620 { 1621 int count = marvell_get_sset_count(phydev); 1622 int i; 1623 1624 for (i = 0; i < count; i++) { 1625 strlcpy(data + i * ETH_GSTRING_LEN, 1626 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1627 } 1628 } 1629 1630 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1631 { 1632 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1633 struct marvell_priv *priv = phydev->priv; 1634 int val; 1635 u64 ret; 1636 1637 val = phy_read_paged(phydev, stat.page, stat.reg); 1638 if (val < 0) { 1639 ret = U64_MAX; 1640 } else { 1641 val = val & ((1 << stat.bits) - 1); 1642 priv->stats[i] += val; 1643 ret = priv->stats[i]; 1644 } 1645 1646 return ret; 1647 } 1648 1649 static void marvell_get_stats(struct phy_device *phydev, 1650 struct ethtool_stats *stats, u64 *data) 1651 { 1652 int count = marvell_get_sset_count(phydev); 1653 int i; 1654 1655 for (i = 0; i < count; i++) 1656 data[i] = marvell_get_stat(phydev, i); 1657 } 1658 1659 #ifdef CONFIG_HWMON 1660 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1661 { 1662 int oldpage; 1663 int ret = 0; 1664 int val; 1665 1666 *temp = 0; 1667 1668 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1669 if (oldpage < 0) 1670 goto error; 1671 1672 /* Enable temperature sensor */ 1673 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1674 if (ret < 0) 1675 goto error; 1676 1677 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1678 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1679 if (ret < 0) 1680 goto error; 1681 1682 /* Wait for temperature to stabilize */ 1683 usleep_range(10000, 12000); 1684 1685 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1686 if (val < 0) { 1687 ret = val; 1688 goto error; 1689 } 1690 1691 /* Disable temperature sensor */ 1692 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1693 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1694 if (ret < 0) 1695 goto error; 1696 1697 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1698 1699 error: 1700 return phy_restore_page(phydev, oldpage, ret); 1701 } 1702 1703 static int m88e1121_hwmon_read(struct device *dev, 1704 enum hwmon_sensor_types type, 1705 u32 attr, int channel, long *temp) 1706 { 1707 struct phy_device *phydev = dev_get_drvdata(dev); 1708 int err; 1709 1710 switch (attr) { 1711 case hwmon_temp_input: 1712 err = m88e1121_get_temp(phydev, temp); 1713 break; 1714 default: 1715 return -EOPNOTSUPP; 1716 } 1717 1718 return err; 1719 } 1720 1721 static umode_t m88e1121_hwmon_is_visible(const void *data, 1722 enum hwmon_sensor_types type, 1723 u32 attr, int channel) 1724 { 1725 if (type != hwmon_temp) 1726 return 0; 1727 1728 switch (attr) { 1729 case hwmon_temp_input: 1730 return 0444; 1731 default: 1732 return 0; 1733 } 1734 } 1735 1736 static u32 m88e1121_hwmon_chip_config[] = { 1737 HWMON_C_REGISTER_TZ, 1738 0 1739 }; 1740 1741 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1742 .type = hwmon_chip, 1743 .config = m88e1121_hwmon_chip_config, 1744 }; 1745 1746 static u32 m88e1121_hwmon_temp_config[] = { 1747 HWMON_T_INPUT, 1748 0 1749 }; 1750 1751 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1752 .type = hwmon_temp, 1753 .config = m88e1121_hwmon_temp_config, 1754 }; 1755 1756 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1757 &m88e1121_hwmon_chip, 1758 &m88e1121_hwmon_temp, 1759 NULL 1760 }; 1761 1762 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1763 .is_visible = m88e1121_hwmon_is_visible, 1764 .read = m88e1121_hwmon_read, 1765 }; 1766 1767 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1768 .ops = &m88e1121_hwmon_hwmon_ops, 1769 .info = m88e1121_hwmon_info, 1770 }; 1771 1772 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1773 { 1774 int ret; 1775 1776 *temp = 0; 1777 1778 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1779 MII_88E1510_TEMP_SENSOR); 1780 if (ret < 0) 1781 return ret; 1782 1783 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1784 1785 return 0; 1786 } 1787 1788 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1789 { 1790 int ret; 1791 1792 *temp = 0; 1793 1794 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1795 MII_88E1121_MISC_TEST); 1796 if (ret < 0) 1797 return ret; 1798 1799 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1800 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1801 /* convert to mC */ 1802 *temp *= 1000; 1803 1804 return 0; 1805 } 1806 1807 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1808 { 1809 temp = temp / 1000; 1810 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1811 1812 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1813 MII_88E1121_MISC_TEST, 1814 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1815 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1816 } 1817 1818 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1819 { 1820 int ret; 1821 1822 *alarm = false; 1823 1824 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1825 MII_88E1121_MISC_TEST); 1826 if (ret < 0) 1827 return ret; 1828 1829 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1830 1831 return 0; 1832 } 1833 1834 static int m88e1510_hwmon_read(struct device *dev, 1835 enum hwmon_sensor_types type, 1836 u32 attr, int channel, long *temp) 1837 { 1838 struct phy_device *phydev = dev_get_drvdata(dev); 1839 int err; 1840 1841 switch (attr) { 1842 case hwmon_temp_input: 1843 err = m88e1510_get_temp(phydev, temp); 1844 break; 1845 case hwmon_temp_crit: 1846 err = m88e1510_get_temp_critical(phydev, temp); 1847 break; 1848 case hwmon_temp_max_alarm: 1849 err = m88e1510_get_temp_alarm(phydev, temp); 1850 break; 1851 default: 1852 return -EOPNOTSUPP; 1853 } 1854 1855 return err; 1856 } 1857 1858 static int m88e1510_hwmon_write(struct device *dev, 1859 enum hwmon_sensor_types type, 1860 u32 attr, int channel, long temp) 1861 { 1862 struct phy_device *phydev = dev_get_drvdata(dev); 1863 int err; 1864 1865 switch (attr) { 1866 case hwmon_temp_crit: 1867 err = m88e1510_set_temp_critical(phydev, temp); 1868 break; 1869 default: 1870 return -EOPNOTSUPP; 1871 } 1872 return err; 1873 } 1874 1875 static umode_t m88e1510_hwmon_is_visible(const void *data, 1876 enum hwmon_sensor_types type, 1877 u32 attr, int channel) 1878 { 1879 if (type != hwmon_temp) 1880 return 0; 1881 1882 switch (attr) { 1883 case hwmon_temp_input: 1884 case hwmon_temp_max_alarm: 1885 return 0444; 1886 case hwmon_temp_crit: 1887 return 0644; 1888 default: 1889 return 0; 1890 } 1891 } 1892 1893 static u32 m88e1510_hwmon_temp_config[] = { 1894 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1895 0 1896 }; 1897 1898 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1899 .type = hwmon_temp, 1900 .config = m88e1510_hwmon_temp_config, 1901 }; 1902 1903 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1904 &m88e1121_hwmon_chip, 1905 &m88e1510_hwmon_temp, 1906 NULL 1907 }; 1908 1909 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1910 .is_visible = m88e1510_hwmon_is_visible, 1911 .read = m88e1510_hwmon_read, 1912 .write = m88e1510_hwmon_write, 1913 }; 1914 1915 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1916 .ops = &m88e1510_hwmon_hwmon_ops, 1917 .info = m88e1510_hwmon_info, 1918 }; 1919 1920 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 1921 { 1922 int sum = 0; 1923 int oldpage; 1924 int ret = 0; 1925 int i; 1926 1927 *temp = 0; 1928 1929 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1930 if (oldpage < 0) 1931 goto error; 1932 1933 /* Enable temperature sensor */ 1934 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1935 if (ret < 0) 1936 goto error; 1937 1938 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1939 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 1940 MII_88E6390_MISC_TEST_SAMPLE_1S; 1941 1942 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1943 if (ret < 0) 1944 goto error; 1945 1946 /* Wait for temperature to stabilize */ 1947 usleep_range(10000, 12000); 1948 1949 /* Reading the temperature sense has an errata. You need to read 1950 * a number of times and take an average. 1951 */ 1952 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 1953 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 1954 if (ret < 0) 1955 goto error; 1956 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 1957 } 1958 1959 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 1960 *temp = (sum - 75) * 1000; 1961 1962 /* Disable temperature sensor */ 1963 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1964 if (ret < 0) 1965 goto error; 1966 1967 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1968 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 1969 1970 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1971 1972 error: 1973 phy_restore_page(phydev, oldpage, ret); 1974 1975 return ret; 1976 } 1977 1978 static int m88e6390_hwmon_read(struct device *dev, 1979 enum hwmon_sensor_types type, 1980 u32 attr, int channel, long *temp) 1981 { 1982 struct phy_device *phydev = dev_get_drvdata(dev); 1983 int err; 1984 1985 switch (attr) { 1986 case hwmon_temp_input: 1987 err = m88e6390_get_temp(phydev, temp); 1988 break; 1989 default: 1990 return -EOPNOTSUPP; 1991 } 1992 1993 return err; 1994 } 1995 1996 static umode_t m88e6390_hwmon_is_visible(const void *data, 1997 enum hwmon_sensor_types type, 1998 u32 attr, int channel) 1999 { 2000 if (type != hwmon_temp) 2001 return 0; 2002 2003 switch (attr) { 2004 case hwmon_temp_input: 2005 return 0444; 2006 default: 2007 return 0; 2008 } 2009 } 2010 2011 static u32 m88e6390_hwmon_temp_config[] = { 2012 HWMON_T_INPUT, 2013 0 2014 }; 2015 2016 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 2017 .type = hwmon_temp, 2018 .config = m88e6390_hwmon_temp_config, 2019 }; 2020 2021 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 2022 &m88e1121_hwmon_chip, 2023 &m88e6390_hwmon_temp, 2024 NULL 2025 }; 2026 2027 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 2028 .is_visible = m88e6390_hwmon_is_visible, 2029 .read = m88e6390_hwmon_read, 2030 }; 2031 2032 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 2033 .ops = &m88e6390_hwmon_hwmon_ops, 2034 .info = m88e6390_hwmon_info, 2035 }; 2036 2037 static int marvell_hwmon_name(struct phy_device *phydev) 2038 { 2039 struct marvell_priv *priv = phydev->priv; 2040 struct device *dev = &phydev->mdio.dev; 2041 const char *devname = dev_name(dev); 2042 size_t len = strlen(devname); 2043 int i, j; 2044 2045 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 2046 if (!priv->hwmon_name) 2047 return -ENOMEM; 2048 2049 for (i = j = 0; i < len && devname[i]; i++) { 2050 if (isalnum(devname[i])) 2051 priv->hwmon_name[j++] = devname[i]; 2052 } 2053 2054 return 0; 2055 } 2056 2057 static int marvell_hwmon_probe(struct phy_device *phydev, 2058 const struct hwmon_chip_info *chip) 2059 { 2060 struct marvell_priv *priv = phydev->priv; 2061 struct device *dev = &phydev->mdio.dev; 2062 int err; 2063 2064 err = marvell_hwmon_name(phydev); 2065 if (err) 2066 return err; 2067 2068 priv->hwmon_dev = devm_hwmon_device_register_with_info( 2069 dev, priv->hwmon_name, phydev, chip, NULL); 2070 2071 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 2072 } 2073 2074 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2075 { 2076 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 2077 } 2078 2079 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2080 { 2081 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 2082 } 2083 2084 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2085 { 2086 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 2087 } 2088 #else 2089 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2090 { 2091 return 0; 2092 } 2093 2094 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2095 { 2096 return 0; 2097 } 2098 2099 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2100 { 2101 return 0; 2102 } 2103 #endif 2104 2105 static int marvell_probe(struct phy_device *phydev) 2106 { 2107 struct marvell_priv *priv; 2108 2109 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 2110 if (!priv) 2111 return -ENOMEM; 2112 2113 phydev->priv = priv; 2114 2115 return 0; 2116 } 2117 2118 static int m88e1121_probe(struct phy_device *phydev) 2119 { 2120 int err; 2121 2122 err = marvell_probe(phydev); 2123 if (err) 2124 return err; 2125 2126 return m88e1121_hwmon_probe(phydev); 2127 } 2128 2129 static int m88e1510_probe(struct phy_device *phydev) 2130 { 2131 int err; 2132 2133 err = marvell_probe(phydev); 2134 if (err) 2135 return err; 2136 2137 return m88e1510_hwmon_probe(phydev); 2138 } 2139 2140 static int m88e6390_probe(struct phy_device *phydev) 2141 { 2142 int err; 2143 2144 err = marvell_probe(phydev); 2145 if (err) 2146 return err; 2147 2148 return m88e6390_hwmon_probe(phydev); 2149 } 2150 2151 static struct phy_driver marvell_drivers[] = { 2152 { 2153 .phy_id = MARVELL_PHY_ID_88E1101, 2154 .phy_id_mask = MARVELL_PHY_ID_MASK, 2155 .name = "Marvell 88E1101", 2156 /* PHY_GBIT_FEATURES */ 2157 .probe = marvell_probe, 2158 .config_init = &marvell_config_init, 2159 .config_aneg = &m88e1101_config_aneg, 2160 .ack_interrupt = &marvell_ack_interrupt, 2161 .config_intr = &marvell_config_intr, 2162 .resume = &genphy_resume, 2163 .suspend = &genphy_suspend, 2164 .read_page = marvell_read_page, 2165 .write_page = marvell_write_page, 2166 .get_sset_count = marvell_get_sset_count, 2167 .get_strings = marvell_get_strings, 2168 .get_stats = marvell_get_stats, 2169 }, 2170 { 2171 .phy_id = MARVELL_PHY_ID_88E1112, 2172 .phy_id_mask = MARVELL_PHY_ID_MASK, 2173 .name = "Marvell 88E1112", 2174 /* PHY_GBIT_FEATURES */ 2175 .probe = marvell_probe, 2176 .config_init = &m88e1111_config_init, 2177 .config_aneg = &marvell_config_aneg, 2178 .ack_interrupt = &marvell_ack_interrupt, 2179 .config_intr = &marvell_config_intr, 2180 .resume = &genphy_resume, 2181 .suspend = &genphy_suspend, 2182 .read_page = marvell_read_page, 2183 .write_page = marvell_write_page, 2184 .get_sset_count = marvell_get_sset_count, 2185 .get_strings = marvell_get_strings, 2186 .get_stats = marvell_get_stats, 2187 .get_tunable = m88e1011_get_tunable, 2188 .set_tunable = m88e1011_set_tunable, 2189 }, 2190 { 2191 .phy_id = MARVELL_PHY_ID_88E1111, 2192 .phy_id_mask = MARVELL_PHY_ID_MASK, 2193 .name = "Marvell 88E1111", 2194 /* PHY_GBIT_FEATURES */ 2195 .probe = marvell_probe, 2196 .config_init = &m88e1111_config_init, 2197 .config_aneg = &marvell_config_aneg, 2198 .read_status = &marvell_read_status, 2199 .ack_interrupt = &marvell_ack_interrupt, 2200 .config_intr = &marvell_config_intr, 2201 .resume = &genphy_resume, 2202 .suspend = &genphy_suspend, 2203 .read_page = marvell_read_page, 2204 .write_page = marvell_write_page, 2205 .get_sset_count = marvell_get_sset_count, 2206 .get_strings = marvell_get_strings, 2207 .get_stats = marvell_get_stats, 2208 .get_tunable = m88e1111_get_tunable, 2209 .set_tunable = m88e1111_set_tunable, 2210 }, 2211 { 2212 .phy_id = MARVELL_PHY_ID_88E1118, 2213 .phy_id_mask = MARVELL_PHY_ID_MASK, 2214 .name = "Marvell 88E1118", 2215 /* PHY_GBIT_FEATURES */ 2216 .probe = marvell_probe, 2217 .config_init = &m88e1118_config_init, 2218 .config_aneg = &m88e1118_config_aneg, 2219 .ack_interrupt = &marvell_ack_interrupt, 2220 .config_intr = &marvell_config_intr, 2221 .resume = &genphy_resume, 2222 .suspend = &genphy_suspend, 2223 .read_page = marvell_read_page, 2224 .write_page = marvell_write_page, 2225 .get_sset_count = marvell_get_sset_count, 2226 .get_strings = marvell_get_strings, 2227 .get_stats = marvell_get_stats, 2228 }, 2229 { 2230 .phy_id = MARVELL_PHY_ID_88E1121R, 2231 .phy_id_mask = MARVELL_PHY_ID_MASK, 2232 .name = "Marvell 88E1121R", 2233 /* PHY_GBIT_FEATURES */ 2234 .probe = &m88e1121_probe, 2235 .config_init = &marvell_config_init, 2236 .config_aneg = &m88e1121_config_aneg, 2237 .read_status = &marvell_read_status, 2238 .ack_interrupt = &marvell_ack_interrupt, 2239 .config_intr = &marvell_config_intr, 2240 .did_interrupt = &m88e1121_did_interrupt, 2241 .resume = &genphy_resume, 2242 .suspend = &genphy_suspend, 2243 .read_page = marvell_read_page, 2244 .write_page = marvell_write_page, 2245 .get_sset_count = marvell_get_sset_count, 2246 .get_strings = marvell_get_strings, 2247 .get_stats = marvell_get_stats, 2248 .get_tunable = m88e1011_get_tunable, 2249 .set_tunable = m88e1011_set_tunable, 2250 }, 2251 { 2252 .phy_id = MARVELL_PHY_ID_88E1318S, 2253 .phy_id_mask = MARVELL_PHY_ID_MASK, 2254 .name = "Marvell 88E1318S", 2255 /* PHY_GBIT_FEATURES */ 2256 .probe = marvell_probe, 2257 .config_init = &m88e1318_config_init, 2258 .config_aneg = &m88e1318_config_aneg, 2259 .read_status = &marvell_read_status, 2260 .ack_interrupt = &marvell_ack_interrupt, 2261 .config_intr = &marvell_config_intr, 2262 .did_interrupt = &m88e1121_did_interrupt, 2263 .get_wol = &m88e1318_get_wol, 2264 .set_wol = &m88e1318_set_wol, 2265 .resume = &genphy_resume, 2266 .suspend = &genphy_suspend, 2267 .read_page = marvell_read_page, 2268 .write_page = marvell_write_page, 2269 .get_sset_count = marvell_get_sset_count, 2270 .get_strings = marvell_get_strings, 2271 .get_stats = marvell_get_stats, 2272 }, 2273 { 2274 .phy_id = MARVELL_PHY_ID_88E1145, 2275 .phy_id_mask = MARVELL_PHY_ID_MASK, 2276 .name = "Marvell 88E1145", 2277 /* PHY_GBIT_FEATURES */ 2278 .probe = marvell_probe, 2279 .config_init = &m88e1145_config_init, 2280 .config_aneg = &m88e1101_config_aneg, 2281 .read_status = &genphy_read_status, 2282 .ack_interrupt = &marvell_ack_interrupt, 2283 .config_intr = &marvell_config_intr, 2284 .resume = &genphy_resume, 2285 .suspend = &genphy_suspend, 2286 .read_page = marvell_read_page, 2287 .write_page = marvell_write_page, 2288 .get_sset_count = marvell_get_sset_count, 2289 .get_strings = marvell_get_strings, 2290 .get_stats = marvell_get_stats, 2291 .get_tunable = m88e1111_get_tunable, 2292 .set_tunable = m88e1111_set_tunable, 2293 }, 2294 { 2295 .phy_id = MARVELL_PHY_ID_88E1149R, 2296 .phy_id_mask = MARVELL_PHY_ID_MASK, 2297 .name = "Marvell 88E1149R", 2298 /* PHY_GBIT_FEATURES */ 2299 .probe = marvell_probe, 2300 .config_init = &m88e1149_config_init, 2301 .config_aneg = &m88e1118_config_aneg, 2302 .ack_interrupt = &marvell_ack_interrupt, 2303 .config_intr = &marvell_config_intr, 2304 .resume = &genphy_resume, 2305 .suspend = &genphy_suspend, 2306 .read_page = marvell_read_page, 2307 .write_page = marvell_write_page, 2308 .get_sset_count = marvell_get_sset_count, 2309 .get_strings = marvell_get_strings, 2310 .get_stats = marvell_get_stats, 2311 }, 2312 { 2313 .phy_id = MARVELL_PHY_ID_88E1240, 2314 .phy_id_mask = MARVELL_PHY_ID_MASK, 2315 .name = "Marvell 88E1240", 2316 /* PHY_GBIT_FEATURES */ 2317 .probe = marvell_probe, 2318 .config_init = &m88e1111_config_init, 2319 .config_aneg = &marvell_config_aneg, 2320 .ack_interrupt = &marvell_ack_interrupt, 2321 .config_intr = &marvell_config_intr, 2322 .resume = &genphy_resume, 2323 .suspend = &genphy_suspend, 2324 .read_page = marvell_read_page, 2325 .write_page = marvell_write_page, 2326 .get_sset_count = marvell_get_sset_count, 2327 .get_strings = marvell_get_strings, 2328 .get_stats = marvell_get_stats, 2329 }, 2330 { 2331 .phy_id = MARVELL_PHY_ID_88E1116R, 2332 .phy_id_mask = MARVELL_PHY_ID_MASK, 2333 .name = "Marvell 88E1116R", 2334 /* PHY_GBIT_FEATURES */ 2335 .probe = marvell_probe, 2336 .config_init = &m88e1116r_config_init, 2337 .ack_interrupt = &marvell_ack_interrupt, 2338 .config_intr = &marvell_config_intr, 2339 .resume = &genphy_resume, 2340 .suspend = &genphy_suspend, 2341 .read_page = marvell_read_page, 2342 .write_page = marvell_write_page, 2343 .get_sset_count = marvell_get_sset_count, 2344 .get_strings = marvell_get_strings, 2345 .get_stats = marvell_get_stats, 2346 .get_tunable = m88e1011_get_tunable, 2347 .set_tunable = m88e1011_set_tunable, 2348 }, 2349 { 2350 .phy_id = MARVELL_PHY_ID_88E1510, 2351 .phy_id_mask = MARVELL_PHY_ID_MASK, 2352 .name = "Marvell 88E1510", 2353 .features = PHY_GBIT_FIBRE_FEATURES, 2354 .probe = &m88e1510_probe, 2355 .config_init = &m88e1510_config_init, 2356 .config_aneg = &m88e1510_config_aneg, 2357 .read_status = &marvell_read_status, 2358 .ack_interrupt = &marvell_ack_interrupt, 2359 .config_intr = &marvell_config_intr, 2360 .did_interrupt = &m88e1121_did_interrupt, 2361 .get_wol = &m88e1318_get_wol, 2362 .set_wol = &m88e1318_set_wol, 2363 .resume = &marvell_resume, 2364 .suspend = &marvell_suspend, 2365 .read_page = marvell_read_page, 2366 .write_page = marvell_write_page, 2367 .get_sset_count = marvell_get_sset_count, 2368 .get_strings = marvell_get_strings, 2369 .get_stats = marvell_get_stats, 2370 .set_loopback = genphy_loopback, 2371 .get_tunable = m88e1011_get_tunable, 2372 .set_tunable = m88e1011_set_tunable, 2373 }, 2374 { 2375 .phy_id = MARVELL_PHY_ID_88E1540, 2376 .phy_id_mask = MARVELL_PHY_ID_MASK, 2377 .name = "Marvell 88E1540", 2378 /* PHY_GBIT_FEATURES */ 2379 .probe = m88e1510_probe, 2380 .config_init = &marvell_config_init, 2381 .config_aneg = &m88e1510_config_aneg, 2382 .read_status = &marvell_read_status, 2383 .ack_interrupt = &marvell_ack_interrupt, 2384 .config_intr = &marvell_config_intr, 2385 .did_interrupt = &m88e1121_did_interrupt, 2386 .resume = &genphy_resume, 2387 .suspend = &genphy_suspend, 2388 .read_page = marvell_read_page, 2389 .write_page = marvell_write_page, 2390 .get_sset_count = marvell_get_sset_count, 2391 .get_strings = marvell_get_strings, 2392 .get_stats = marvell_get_stats, 2393 .get_tunable = m88e1540_get_tunable, 2394 .set_tunable = m88e1540_set_tunable, 2395 }, 2396 { 2397 .phy_id = MARVELL_PHY_ID_88E1545, 2398 .phy_id_mask = MARVELL_PHY_ID_MASK, 2399 .name = "Marvell 88E1545", 2400 .probe = m88e1510_probe, 2401 /* PHY_GBIT_FEATURES */ 2402 .config_init = &marvell_config_init, 2403 .config_aneg = &m88e1510_config_aneg, 2404 .read_status = &marvell_read_status, 2405 .ack_interrupt = &marvell_ack_interrupt, 2406 .config_intr = &marvell_config_intr, 2407 .did_interrupt = &m88e1121_did_interrupt, 2408 .resume = &genphy_resume, 2409 .suspend = &genphy_suspend, 2410 .read_page = marvell_read_page, 2411 .write_page = marvell_write_page, 2412 .get_sset_count = marvell_get_sset_count, 2413 .get_strings = marvell_get_strings, 2414 .get_stats = marvell_get_stats, 2415 .get_tunable = m88e1540_get_tunable, 2416 .set_tunable = m88e1540_set_tunable, 2417 }, 2418 { 2419 .phy_id = MARVELL_PHY_ID_88E3016, 2420 .phy_id_mask = MARVELL_PHY_ID_MASK, 2421 .name = "Marvell 88E3016", 2422 /* PHY_BASIC_FEATURES */ 2423 .probe = marvell_probe, 2424 .config_init = &m88e3016_config_init, 2425 .aneg_done = &marvell_aneg_done, 2426 .read_status = &marvell_read_status, 2427 .ack_interrupt = &marvell_ack_interrupt, 2428 .config_intr = &marvell_config_intr, 2429 .did_interrupt = &m88e1121_did_interrupt, 2430 .resume = &genphy_resume, 2431 .suspend = &genphy_suspend, 2432 .read_page = marvell_read_page, 2433 .write_page = marvell_write_page, 2434 .get_sset_count = marvell_get_sset_count, 2435 .get_strings = marvell_get_strings, 2436 .get_stats = marvell_get_stats, 2437 }, 2438 { 2439 .phy_id = MARVELL_PHY_ID_88E6390, 2440 .phy_id_mask = MARVELL_PHY_ID_MASK, 2441 .name = "Marvell 88E6390", 2442 /* PHY_GBIT_FEATURES */ 2443 .probe = m88e6390_probe, 2444 .config_init = &marvell_config_init, 2445 .config_aneg = &m88e6390_config_aneg, 2446 .read_status = &marvell_read_status, 2447 .ack_interrupt = &marvell_ack_interrupt, 2448 .config_intr = &marvell_config_intr, 2449 .did_interrupt = &m88e1121_did_interrupt, 2450 .resume = &genphy_resume, 2451 .suspend = &genphy_suspend, 2452 .read_page = marvell_read_page, 2453 .write_page = marvell_write_page, 2454 .get_sset_count = marvell_get_sset_count, 2455 .get_strings = marvell_get_strings, 2456 .get_stats = marvell_get_stats, 2457 .get_tunable = m88e1540_get_tunable, 2458 .set_tunable = m88e1540_set_tunable, 2459 }, 2460 }; 2461 2462 module_phy_driver(marvell_drivers); 2463 2464 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2465 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2466 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2467 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2468 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2469 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2470 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2471 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2472 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2473 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2474 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2475 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2476 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2477 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2478 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2479 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2480 { } 2481 }; 2482 2483 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2484