1 /* 2 * drivers/net/phy/marvell.c 3 * 4 * Driver for Marvell PHYs 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 * 10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the 14 * Free Software Foundation; either version 2 of the License, or (at your 15 * option) any later version. 16 * 17 */ 18 #include <linux/kernel.h> 19 #include <linux/string.h> 20 #include <linux/ctype.h> 21 #include <linux/errno.h> 22 #include <linux/unistd.h> 23 #include <linux/hwmon.h> 24 #include <linux/interrupt.h> 25 #include <linux/init.h> 26 #include <linux/delay.h> 27 #include <linux/netdevice.h> 28 #include <linux/etherdevice.h> 29 #include <linux/skbuff.h> 30 #include <linux/spinlock.h> 31 #include <linux/mm.h> 32 #include <linux/module.h> 33 #include <linux/mii.h> 34 #include <linux/ethtool.h> 35 #include <linux/phy.h> 36 #include <linux/marvell_phy.h> 37 #include <linux/of.h> 38 39 #include <linux/io.h> 40 #include <asm/irq.h> 41 #include <linux/uaccess.h> 42 43 #define MII_MARVELL_PHY_PAGE 22 44 #define MII_MARVELL_COPPER_PAGE 0x00 45 #define MII_MARVELL_FIBER_PAGE 0x01 46 #define MII_MARVELL_MSCR_PAGE 0x02 47 #define MII_MARVELL_LED_PAGE 0x03 48 #define MII_MARVELL_MISC_TEST_PAGE 0x06 49 #define MII_MARVELL_WOL_PAGE 0x11 50 51 #define MII_M1011_IEVENT 0x13 52 #define MII_M1011_IEVENT_CLEAR 0x0000 53 54 #define MII_M1011_IMASK 0x12 55 #define MII_M1011_IMASK_INIT 0x6400 56 #define MII_M1011_IMASK_CLEAR 0x0000 57 58 #define MII_M1011_PHY_SCR 0x10 59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12 61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800 62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 65 66 #define MII_M1111_PHY_LED_CONTROL 0x18 67 #define MII_M1111_PHY_LED_DIRECT 0x4100 68 #define MII_M1111_PHY_LED_COMBINE 0x411c 69 #define MII_M1111_PHY_EXT_CR 0x14 70 #define MII_M1111_RGMII_RX_DELAY BIT(7) 71 #define MII_M1111_RGMII_TX_DELAY BIT(1) 72 #define MII_M1111_PHY_EXT_SR 0x1b 73 74 #define MII_M1111_HWCFG_MODE_MASK 0xf 75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 77 #define MII_M1111_HWCFG_MODE_RTBI 0x7 78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 82 83 #define MII_88E1121_PHY_MSCR_REG 21 84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 87 88 #define MII_88E1121_MISC_TEST 0x1a 89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 95 96 #define MII_88E1510_TEMP_SENSOR 0x1b 97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 98 99 #define MII_88E6390_MISC_TEST 0x1b 100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 105 106 #define MII_88E6390_TEMP_SENSOR 0x1c 107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 109 110 #define MII_88E1318S_PHY_MSCR1_REG 16 111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 112 113 /* Copper Specific Interrupt Enable Register */ 114 #define MII_88E1318S_PHY_CSIER 0x12 115 /* WOL Event Interrupt Enable */ 116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 117 118 /* LED Timer Control Register */ 119 #define MII_88E1318S_PHY_LED_TCR 0x12 120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 123 124 /* Magic Packet MAC address registers */ 125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 128 129 #define MII_88E1318S_PHY_WOL_CTRL 0x10 130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 132 133 #define MII_PHY_LED_CTRL 16 134 #define MII_88E1121_PHY_LED_DEF 0x0030 135 #define MII_88E1510_PHY_LED_DEF 0x1177 136 137 #define MII_M1011_PHY_STATUS 0x11 138 #define MII_M1011_PHY_STATUS_1000 0x8000 139 #define MII_M1011_PHY_STATUS_100 0x4000 140 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 141 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 142 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 143 #define MII_M1011_PHY_STATUS_LINK 0x0400 144 145 #define MII_88E3016_PHY_SPEC_CTRL 0x10 146 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 147 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 148 149 #define MII_88E1510_GEN_CTRL_REG_1 0x14 150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 152 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 153 154 #define LPA_FIBER_1000HALF 0x40 155 #define LPA_FIBER_1000FULL 0x20 156 157 #define LPA_PAUSE_FIBER 0x180 158 #define LPA_PAUSE_ASYM_FIBER 0x100 159 160 #define ADVERTISE_FIBER_1000HALF 0x40 161 #define ADVERTISE_FIBER_1000FULL 0x20 162 163 #define ADVERTISE_PAUSE_FIBER 0x180 164 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 165 166 #define REGISTER_LINK_STATUS 0x400 167 #define NB_FIBER_STATS 1 168 169 MODULE_DESCRIPTION("Marvell PHY driver"); 170 MODULE_AUTHOR("Andy Fleming"); 171 MODULE_LICENSE("GPL"); 172 173 struct marvell_hw_stat { 174 const char *string; 175 u8 page; 176 u8 reg; 177 u8 bits; 178 }; 179 180 static struct marvell_hw_stat marvell_hw_stats[] = { 181 { "phy_receive_errors_copper", 0, 21, 16}, 182 { "phy_idle_errors", 0, 10, 8 }, 183 { "phy_receive_errors_fiber", 1, 21, 16}, 184 }; 185 186 struct marvell_priv { 187 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 188 char *hwmon_name; 189 struct device *hwmon_dev; 190 }; 191 192 static int marvell_read_page(struct phy_device *phydev) 193 { 194 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 195 } 196 197 static int marvell_write_page(struct phy_device *phydev, int page) 198 { 199 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 200 } 201 202 static int marvell_set_page(struct phy_device *phydev, int page) 203 { 204 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 205 } 206 207 static int marvell_ack_interrupt(struct phy_device *phydev) 208 { 209 int err; 210 211 /* Clear the interrupts by reading the reg */ 212 err = phy_read(phydev, MII_M1011_IEVENT); 213 214 if (err < 0) 215 return err; 216 217 return 0; 218 } 219 220 static int marvell_config_intr(struct phy_device *phydev) 221 { 222 int err; 223 224 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 225 err = phy_write(phydev, MII_M1011_IMASK, 226 MII_M1011_IMASK_INIT); 227 else 228 err = phy_write(phydev, MII_M1011_IMASK, 229 MII_M1011_IMASK_CLEAR); 230 231 return err; 232 } 233 234 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 235 { 236 int reg; 237 int err; 238 int val; 239 240 /* get the current settings */ 241 reg = phy_read(phydev, MII_M1011_PHY_SCR); 242 if (reg < 0) 243 return reg; 244 245 val = reg; 246 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 247 switch (polarity) { 248 case ETH_TP_MDI: 249 val |= MII_M1011_PHY_SCR_MDI; 250 break; 251 case ETH_TP_MDI_X: 252 val |= MII_M1011_PHY_SCR_MDI_X; 253 break; 254 case ETH_TP_MDI_AUTO: 255 case ETH_TP_MDI_INVALID: 256 default: 257 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 258 break; 259 } 260 261 if (val != reg) { 262 /* Set the new polarity value in the register */ 263 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 264 if (err) 265 return err; 266 } 267 268 return val != reg; 269 } 270 271 static int marvell_set_downshift(struct phy_device *phydev, bool enable, 272 u8 retries) 273 { 274 int reg; 275 276 reg = phy_read(phydev, MII_M1011_PHY_SCR); 277 if (reg < 0) 278 return reg; 279 280 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK; 281 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT); 282 if (enable) 283 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN; 284 285 return phy_write(phydev, MII_M1011_PHY_SCR, reg); 286 } 287 288 static int marvell_config_aneg(struct phy_device *phydev) 289 { 290 int changed = 0; 291 int err; 292 293 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 294 if (err < 0) 295 return err; 296 297 changed = err; 298 299 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 300 MII_M1111_PHY_LED_DIRECT); 301 if (err < 0) 302 return err; 303 304 err = genphy_config_aneg(phydev); 305 if (err < 0) 306 return err; 307 308 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 309 /* A write to speed/duplex bits (that is performed by 310 * genphy_config_aneg() call above) must be followed by 311 * a software reset. Otherwise, the write has no effect. 312 */ 313 err = genphy_soft_reset(phydev); 314 if (err < 0) 315 return err; 316 } 317 318 return 0; 319 } 320 321 static int m88e1101_config_aneg(struct phy_device *phydev) 322 { 323 int err; 324 325 /* This Marvell PHY has an errata which requires 326 * that certain registers get written in order 327 * to restart autonegotiation 328 */ 329 err = genphy_soft_reset(phydev); 330 if (err < 0) 331 return err; 332 333 err = phy_write(phydev, 0x1d, 0x1f); 334 if (err < 0) 335 return err; 336 337 err = phy_write(phydev, 0x1e, 0x200c); 338 if (err < 0) 339 return err; 340 341 err = phy_write(phydev, 0x1d, 0x5); 342 if (err < 0) 343 return err; 344 345 err = phy_write(phydev, 0x1e, 0); 346 if (err < 0) 347 return err; 348 349 err = phy_write(phydev, 0x1e, 0x100); 350 if (err < 0) 351 return err; 352 353 return marvell_config_aneg(phydev); 354 } 355 356 #ifdef CONFIG_OF_MDIO 357 /* Set and/or override some configuration registers based on the 358 * marvell,reg-init property stored in the of_node for the phydev. 359 * 360 * marvell,reg-init = <reg-page reg mask value>,...; 361 * 362 * There may be one or more sets of <reg-page reg mask value>: 363 * 364 * reg-page: which register bank to use. 365 * reg: the register. 366 * mask: if non-zero, ANDed with existing register value. 367 * value: ORed with the masked value and written to the regiser. 368 * 369 */ 370 static int marvell_of_reg_init(struct phy_device *phydev) 371 { 372 const __be32 *paddr; 373 int len, i, saved_page, current_page, ret = 0; 374 375 if (!phydev->mdio.dev.of_node) 376 return 0; 377 378 paddr = of_get_property(phydev->mdio.dev.of_node, 379 "marvell,reg-init", &len); 380 if (!paddr || len < (4 * sizeof(*paddr))) 381 return 0; 382 383 saved_page = phy_save_page(phydev); 384 if (saved_page < 0) 385 goto err; 386 current_page = saved_page; 387 388 len /= sizeof(*paddr); 389 for (i = 0; i < len - 3; i += 4) { 390 u16 page = be32_to_cpup(paddr + i); 391 u16 reg = be32_to_cpup(paddr + i + 1); 392 u16 mask = be32_to_cpup(paddr + i + 2); 393 u16 val_bits = be32_to_cpup(paddr + i + 3); 394 int val; 395 396 if (page != current_page) { 397 current_page = page; 398 ret = marvell_write_page(phydev, page); 399 if (ret < 0) 400 goto err; 401 } 402 403 val = 0; 404 if (mask) { 405 val = __phy_read(phydev, reg); 406 if (val < 0) { 407 ret = val; 408 goto err; 409 } 410 val &= mask; 411 } 412 val |= val_bits; 413 414 ret = __phy_write(phydev, reg, val); 415 if (ret < 0) 416 goto err; 417 } 418 err: 419 return phy_restore_page(phydev, saved_page, ret); 420 } 421 #else 422 static int marvell_of_reg_init(struct phy_device *phydev) 423 { 424 return 0; 425 } 426 #endif /* CONFIG_OF_MDIO */ 427 428 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 429 { 430 int mscr; 431 432 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 433 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 434 MII_88E1121_PHY_MSCR_TX_DELAY; 435 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 436 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 437 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 438 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 439 else 440 mscr = 0; 441 442 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 443 MII_88E1121_PHY_MSCR_REG, 444 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 445 } 446 447 static int m88e1121_config_aneg(struct phy_device *phydev) 448 { 449 int changed = 0; 450 int err = 0; 451 452 if (phy_interface_is_rgmii(phydev)) { 453 err = m88e1121_config_aneg_rgmii_delays(phydev); 454 if (err < 0) 455 return err; 456 } 457 458 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 459 if (err < 0) 460 return err; 461 462 changed = err; 463 464 err = genphy_config_aneg(phydev); 465 if (err < 0) 466 return err; 467 468 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 469 /* A software reset is used to ensure a "commit" of the 470 * changes is done. 471 */ 472 err = genphy_soft_reset(phydev); 473 if (err < 0) 474 return err; 475 } 476 477 return 0; 478 } 479 480 static int m88e1318_config_aneg(struct phy_device *phydev) 481 { 482 int err; 483 484 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 485 MII_88E1318S_PHY_MSCR1_REG, 486 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 487 if (err < 0) 488 return err; 489 490 return m88e1121_config_aneg(phydev); 491 } 492 493 /** 494 * linkmode_adv_to_fiber_adv_t 495 * @advertise: the linkmode advertisement settings 496 * 497 * A small helper function that translates linkmode advertisement 498 * settings to phy autonegotiation advertisements for the MII_ADV 499 * register for fiber link. 500 */ 501 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 502 { 503 u32 result = 0; 504 505 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 506 result |= ADVERTISE_FIBER_1000HALF; 507 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 508 result |= ADVERTISE_FIBER_1000FULL; 509 510 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 511 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 512 result |= LPA_PAUSE_ASYM_FIBER; 513 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 514 result |= (ADVERTISE_PAUSE_FIBER 515 & (~ADVERTISE_PAUSE_ASYM_FIBER)); 516 517 return result; 518 } 519 520 /** 521 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 522 * @phydev: target phy_device struct 523 * 524 * Description: If auto-negotiation is enabled, we configure the 525 * advertising, and then restart auto-negotiation. If it is not 526 * enabled, then we write the BMCR. Adapted for fiber link in 527 * some Marvell's devices. 528 */ 529 static int marvell_config_aneg_fiber(struct phy_device *phydev) 530 { 531 int changed = 0; 532 int err; 533 int adv, oldadv; 534 535 if (phydev->autoneg != AUTONEG_ENABLE) 536 return genphy_setup_forced(phydev); 537 538 /* Only allow advertising what this PHY supports */ 539 linkmode_and(phydev->advertising, phydev->advertising, 540 phydev->supported); 541 542 /* Setup fiber advertisement */ 543 adv = phy_read(phydev, MII_ADVERTISE); 544 if (adv < 0) 545 return adv; 546 547 oldadv = adv; 548 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL 549 | LPA_PAUSE_FIBER); 550 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising); 551 552 if (adv != oldadv) { 553 err = phy_write(phydev, MII_ADVERTISE, adv); 554 if (err < 0) 555 return err; 556 557 changed = 1; 558 } 559 560 if (changed == 0) { 561 /* Advertisement hasn't changed, but maybe aneg was never on to 562 * begin with? Or maybe phy was isolated? 563 */ 564 int ctl = phy_read(phydev, MII_BMCR); 565 566 if (ctl < 0) 567 return ctl; 568 569 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 570 changed = 1; /* do restart aneg */ 571 } 572 573 /* Only restart aneg if we are advertising something different 574 * than we were before. 575 */ 576 if (changed > 0) 577 changed = genphy_restart_aneg(phydev); 578 579 return changed; 580 } 581 582 static int m88e1510_config_aneg(struct phy_device *phydev) 583 { 584 int err; 585 586 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 587 if (err < 0) 588 goto error; 589 590 /* Configure the copper link first */ 591 err = m88e1318_config_aneg(phydev); 592 if (err < 0) 593 goto error; 594 595 /* Do not touch the fiber page if we're in copper->sgmii mode */ 596 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 597 return 0; 598 599 /* Then the fiber link */ 600 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 601 if (err < 0) 602 goto error; 603 604 err = marvell_config_aneg_fiber(phydev); 605 if (err < 0) 606 goto error; 607 608 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 609 610 error: 611 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 612 return err; 613 } 614 615 static void marvell_config_led(struct phy_device *phydev) 616 { 617 u16 def_config; 618 int err; 619 620 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 621 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 622 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 623 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 624 def_config = MII_88E1121_PHY_LED_DEF; 625 break; 626 /* Default PHY LED config: 627 * LED[0] .. 1000Mbps Link 628 * LED[1] .. 100Mbps Link 629 * LED[2] .. Blink, Activity 630 */ 631 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 632 def_config = MII_88E1510_PHY_LED_DEF; 633 break; 634 default: 635 return; 636 } 637 638 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 639 def_config); 640 if (err < 0) 641 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 642 } 643 644 static int marvell_config_init(struct phy_device *phydev) 645 { 646 /* Set defalut LED */ 647 marvell_config_led(phydev); 648 649 /* Set registers from marvell,reg-init DT property */ 650 return marvell_of_reg_init(phydev); 651 } 652 653 static int m88e1116r_config_init(struct phy_device *phydev) 654 { 655 int err; 656 657 err = genphy_soft_reset(phydev); 658 if (err < 0) 659 return err; 660 661 msleep(500); 662 663 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 664 if (err < 0) 665 return err; 666 667 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 668 if (err < 0) 669 return err; 670 671 err = marvell_set_downshift(phydev, true, 8); 672 if (err < 0) 673 return err; 674 675 if (phy_interface_is_rgmii(phydev)) { 676 err = m88e1121_config_aneg_rgmii_delays(phydev); 677 if (err < 0) 678 return err; 679 } 680 681 err = genphy_soft_reset(phydev); 682 if (err < 0) 683 return err; 684 685 return marvell_config_init(phydev); 686 } 687 688 static int m88e3016_config_init(struct phy_device *phydev) 689 { 690 int ret; 691 692 /* Enable Scrambler and Auto-Crossover */ 693 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 694 MII_88E3016_DISABLE_SCRAMBLER, 695 MII_88E3016_AUTO_MDIX_CROSSOVER); 696 if (ret < 0) 697 return ret; 698 699 return marvell_config_init(phydev); 700 } 701 702 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 703 u16 mode, 704 int fibre_copper_auto) 705 { 706 if (fibre_copper_auto) 707 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 708 709 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 710 MII_M1111_HWCFG_MODE_MASK | 711 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 712 MII_M1111_HWCFG_FIBER_COPPER_RES, 713 mode); 714 } 715 716 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 717 { 718 int delay; 719 720 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 721 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 722 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 723 delay = MII_M1111_RGMII_RX_DELAY; 724 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 725 delay = MII_M1111_RGMII_TX_DELAY; 726 } else { 727 delay = 0; 728 } 729 730 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 731 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 732 delay); 733 } 734 735 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 736 { 737 int temp; 738 int err; 739 740 err = m88e1111_config_init_rgmii_delays(phydev); 741 if (err < 0) 742 return err; 743 744 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 745 if (temp < 0) 746 return temp; 747 748 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 749 750 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 751 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 752 else 753 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 754 755 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 756 } 757 758 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 759 { 760 int err; 761 762 err = m88e1111_config_init_hwcfg_mode( 763 phydev, 764 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 765 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 766 if (err < 0) 767 return err; 768 769 /* make sure copper is selected */ 770 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 771 } 772 773 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 774 { 775 int err; 776 777 err = m88e1111_config_init_rgmii_delays(phydev); 778 if (err < 0) 779 return err; 780 781 err = m88e1111_config_init_hwcfg_mode( 782 phydev, 783 MII_M1111_HWCFG_MODE_RTBI, 784 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 785 if (err < 0) 786 return err; 787 788 /* soft reset */ 789 err = genphy_soft_reset(phydev); 790 if (err < 0) 791 return err; 792 793 return m88e1111_config_init_hwcfg_mode( 794 phydev, 795 MII_M1111_HWCFG_MODE_RTBI, 796 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 797 } 798 799 static int m88e1111_config_init(struct phy_device *phydev) 800 { 801 int err; 802 803 if (phy_interface_is_rgmii(phydev)) { 804 err = m88e1111_config_init_rgmii(phydev); 805 if (err < 0) 806 return err; 807 } 808 809 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 810 err = m88e1111_config_init_sgmii(phydev); 811 if (err < 0) 812 return err; 813 } 814 815 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 816 err = m88e1111_config_init_rtbi(phydev); 817 if (err < 0) 818 return err; 819 } 820 821 err = marvell_of_reg_init(phydev); 822 if (err < 0) 823 return err; 824 825 return genphy_soft_reset(phydev); 826 } 827 828 static int m88e1318_config_init(struct phy_device *phydev) 829 { 830 if (phy_interrupt_is_valid(phydev)) { 831 int err = phy_modify_paged( 832 phydev, MII_MARVELL_LED_PAGE, 833 MII_88E1318S_PHY_LED_TCR, 834 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 835 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 836 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 837 if (err < 0) 838 return err; 839 } 840 841 return marvell_config_init(phydev); 842 } 843 844 static int m88e1510_config_init(struct phy_device *phydev) 845 { 846 int err; 847 848 /* SGMII-to-Copper mode initialization */ 849 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 850 851 /* Select page 18 */ 852 err = marvell_set_page(phydev, 18); 853 if (err < 0) 854 return err; 855 856 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 857 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 858 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 859 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 860 if (err < 0) 861 return err; 862 863 /* PHY reset is necessary after changing MODE[2:0] */ 864 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 865 MII_88E1510_GEN_CTRL_REG_1_RESET); 866 if (err < 0) 867 return err; 868 869 /* Reset page selection */ 870 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 871 if (err < 0) 872 return err; 873 874 /* There appears to be a bug in the 88e1512 when used in 875 * SGMII to copper mode, where the AN advertisement register 876 * clears the pause bits each time a negotiation occurs. 877 * This means we can never be truely sure what was advertised, 878 * so disable Pause support. 879 */ 880 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 881 phydev->supported); 882 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, 883 phydev->supported); 884 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 885 phydev->advertising); 886 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, 887 phydev->advertising); 888 } 889 890 return m88e1318_config_init(phydev); 891 } 892 893 static int m88e1118_config_aneg(struct phy_device *phydev) 894 { 895 int err; 896 897 err = genphy_soft_reset(phydev); 898 if (err < 0) 899 return err; 900 901 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 902 if (err < 0) 903 return err; 904 905 err = genphy_config_aneg(phydev); 906 return 0; 907 } 908 909 static int m88e1118_config_init(struct phy_device *phydev) 910 { 911 int err; 912 913 /* Change address */ 914 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 915 if (err < 0) 916 return err; 917 918 /* Enable 1000 Mbit */ 919 err = phy_write(phydev, 0x15, 0x1070); 920 if (err < 0) 921 return err; 922 923 /* Change address */ 924 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 925 if (err < 0) 926 return err; 927 928 /* Adjust LED Control */ 929 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 930 err = phy_write(phydev, 0x10, 0x1100); 931 else 932 err = phy_write(phydev, 0x10, 0x021e); 933 if (err < 0) 934 return err; 935 936 err = marvell_of_reg_init(phydev); 937 if (err < 0) 938 return err; 939 940 /* Reset address */ 941 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 942 if (err < 0) 943 return err; 944 945 return genphy_soft_reset(phydev); 946 } 947 948 static int m88e1149_config_init(struct phy_device *phydev) 949 { 950 int err; 951 952 /* Change address */ 953 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 954 if (err < 0) 955 return err; 956 957 /* Enable 1000 Mbit */ 958 err = phy_write(phydev, 0x15, 0x1048); 959 if (err < 0) 960 return err; 961 962 err = marvell_of_reg_init(phydev); 963 if (err < 0) 964 return err; 965 966 /* Reset address */ 967 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 968 if (err < 0) 969 return err; 970 971 return genphy_soft_reset(phydev); 972 } 973 974 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 975 { 976 int err; 977 978 err = m88e1111_config_init_rgmii_delays(phydev); 979 if (err < 0) 980 return err; 981 982 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 983 err = phy_write(phydev, 0x1d, 0x0012); 984 if (err < 0) 985 return err; 986 987 err = phy_modify(phydev, 0x1e, 0x0fc0, 988 2 << 9 | /* 36 ohm */ 989 2 << 6); /* 39 ohm */ 990 if (err < 0) 991 return err; 992 993 err = phy_write(phydev, 0x1d, 0x3); 994 if (err < 0) 995 return err; 996 997 err = phy_write(phydev, 0x1e, 0x8000); 998 } 999 return err; 1000 } 1001 1002 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1003 { 1004 return m88e1111_config_init_hwcfg_mode( 1005 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1006 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1007 } 1008 1009 static int m88e1145_config_init(struct phy_device *phydev) 1010 { 1011 int err; 1012 1013 /* Take care of errata E0 & E1 */ 1014 err = phy_write(phydev, 0x1d, 0x001b); 1015 if (err < 0) 1016 return err; 1017 1018 err = phy_write(phydev, 0x1e, 0x418f); 1019 if (err < 0) 1020 return err; 1021 1022 err = phy_write(phydev, 0x1d, 0x0016); 1023 if (err < 0) 1024 return err; 1025 1026 err = phy_write(phydev, 0x1e, 0xa2da); 1027 if (err < 0) 1028 return err; 1029 1030 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1031 err = m88e1145_config_init_rgmii(phydev); 1032 if (err < 0) 1033 return err; 1034 } 1035 1036 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1037 err = m88e1145_config_init_sgmii(phydev); 1038 if (err < 0) 1039 return err; 1040 } 1041 1042 err = marvell_of_reg_init(phydev); 1043 if (err < 0) 1044 return err; 1045 1046 return 0; 1047 } 1048 1049 /** 1050 * fiber_lpa_mod_linkmode_lpa_t 1051 * @advertising: the linkmode advertisement settings 1052 * @lpa: value of the MII_LPA register for fiber link 1053 * 1054 * A small helper function that translates MII_LPA bits to linkmode LP 1055 * advertisement settings. Other bits in advertising are left 1056 * unchanged. 1057 */ 1058 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1059 { 1060 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1061 advertising, lpa & LPA_FIBER_1000HALF); 1062 1063 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1064 advertising, lpa & LPA_FIBER_1000FULL); 1065 } 1066 1067 /** 1068 * marvell_update_link - update link status in real time in @phydev 1069 * @phydev: target phy_device struct 1070 * 1071 * Description: Update the value in phydev->link to reflect the 1072 * current link value. 1073 */ 1074 static int marvell_update_link(struct phy_device *phydev, int fiber) 1075 { 1076 int status; 1077 1078 /* Use the generic register for copper link, or specific 1079 * register for fiber case 1080 */ 1081 if (fiber) { 1082 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1083 if (status < 0) 1084 return status; 1085 1086 if ((status & REGISTER_LINK_STATUS) == 0) 1087 phydev->link = 0; 1088 else 1089 phydev->link = 1; 1090 } else { 1091 return genphy_update_link(phydev); 1092 } 1093 1094 return 0; 1095 } 1096 1097 static int marvell_read_status_page_an(struct phy_device *phydev, 1098 int fiber) 1099 { 1100 int status; 1101 int lpa; 1102 int lpagb; 1103 1104 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1105 if (status < 0) 1106 return status; 1107 1108 lpa = phy_read(phydev, MII_LPA); 1109 if (lpa < 0) 1110 return lpa; 1111 1112 lpagb = phy_read(phydev, MII_STAT1000); 1113 if (lpagb < 0) 1114 return lpagb; 1115 1116 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1117 phydev->duplex = DUPLEX_FULL; 1118 else 1119 phydev->duplex = DUPLEX_HALF; 1120 1121 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 1122 phydev->pause = 0; 1123 phydev->asym_pause = 0; 1124 1125 switch (status) { 1126 case MII_M1011_PHY_STATUS_1000: 1127 phydev->speed = SPEED_1000; 1128 break; 1129 1130 case MII_M1011_PHY_STATUS_100: 1131 phydev->speed = SPEED_100; 1132 break; 1133 1134 default: 1135 phydev->speed = SPEED_10; 1136 break; 1137 } 1138 1139 if (!fiber) { 1140 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa); 1141 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb); 1142 1143 if (phydev->duplex == DUPLEX_FULL) { 1144 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 1145 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 1146 } 1147 } else { 1148 /* The fiber link is only 1000M capable */ 1149 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1150 1151 if (phydev->duplex == DUPLEX_FULL) { 1152 if (!(lpa & LPA_PAUSE_FIBER)) { 1153 phydev->pause = 0; 1154 phydev->asym_pause = 0; 1155 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1156 phydev->pause = 1; 1157 phydev->asym_pause = 1; 1158 } else { 1159 phydev->pause = 1; 1160 phydev->asym_pause = 0; 1161 } 1162 } 1163 } 1164 return 0; 1165 } 1166 1167 static int marvell_read_status_page_fixed(struct phy_device *phydev) 1168 { 1169 int bmcr = phy_read(phydev, MII_BMCR); 1170 1171 if (bmcr < 0) 1172 return bmcr; 1173 1174 if (bmcr & BMCR_FULLDPLX) 1175 phydev->duplex = DUPLEX_FULL; 1176 else 1177 phydev->duplex = DUPLEX_HALF; 1178 1179 if (bmcr & BMCR_SPEED1000) 1180 phydev->speed = SPEED_1000; 1181 else if (bmcr & BMCR_SPEED100) 1182 phydev->speed = SPEED_100; 1183 else 1184 phydev->speed = SPEED_10; 1185 1186 phydev->pause = 0; 1187 phydev->asym_pause = 0; 1188 linkmode_zero(phydev->lp_advertising); 1189 1190 return 0; 1191 } 1192 1193 /* marvell_read_status_page 1194 * 1195 * Description: 1196 * Check the link, then figure out the current state 1197 * by comparing what we advertise with what the link partner 1198 * advertises. Start by checking the gigabit possibilities, 1199 * then move on to 10/100. 1200 */ 1201 static int marvell_read_status_page(struct phy_device *phydev, int page) 1202 { 1203 int fiber; 1204 int err; 1205 1206 /* Detect and update the link, but return if there 1207 * was an error 1208 */ 1209 if (page == MII_MARVELL_FIBER_PAGE) 1210 fiber = 1; 1211 else 1212 fiber = 0; 1213 1214 err = marvell_update_link(phydev, fiber); 1215 if (err) 1216 return err; 1217 1218 if (phydev->autoneg == AUTONEG_ENABLE) 1219 err = marvell_read_status_page_an(phydev, fiber); 1220 else 1221 err = marvell_read_status_page_fixed(phydev); 1222 1223 return err; 1224 } 1225 1226 /* marvell_read_status 1227 * 1228 * Some Marvell's phys have two modes: fiber and copper. 1229 * Both need status checked. 1230 * Description: 1231 * First, check the fiber link and status. 1232 * If the fiber link is down, check the copper link and status which 1233 * will be the default value if both link are down. 1234 */ 1235 static int marvell_read_status(struct phy_device *phydev) 1236 { 1237 int err; 1238 1239 /* Check the fiber mode first */ 1240 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1241 phydev->supported) && 1242 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1243 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1244 if (err < 0) 1245 goto error; 1246 1247 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1248 if (err < 0) 1249 goto error; 1250 1251 /* If the fiber link is up, it is the selected and 1252 * used link. In this case, we need to stay in the 1253 * fiber page. Please to be careful about that, avoid 1254 * to restore Copper page in other functions which 1255 * could break the behaviour for some fiber phy like 1256 * 88E1512. 1257 */ 1258 if (phydev->link) 1259 return 0; 1260 1261 /* If fiber link is down, check and save copper mode state */ 1262 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1263 if (err < 0) 1264 goto error; 1265 } 1266 1267 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1268 1269 error: 1270 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1271 return err; 1272 } 1273 1274 /* marvell_suspend 1275 * 1276 * Some Marvell's phys have two modes: fiber and copper. 1277 * Both need to be suspended 1278 */ 1279 static int marvell_suspend(struct phy_device *phydev) 1280 { 1281 int err; 1282 1283 /* Suspend the fiber mode first */ 1284 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1285 phydev->supported)) { 1286 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1287 if (err < 0) 1288 goto error; 1289 1290 /* With the page set, use the generic suspend */ 1291 err = genphy_suspend(phydev); 1292 if (err < 0) 1293 goto error; 1294 1295 /* Then, the copper link */ 1296 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1297 if (err < 0) 1298 goto error; 1299 } 1300 1301 /* With the page set, use the generic suspend */ 1302 return genphy_suspend(phydev); 1303 1304 error: 1305 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1306 return err; 1307 } 1308 1309 /* marvell_resume 1310 * 1311 * Some Marvell's phys have two modes: fiber and copper. 1312 * Both need to be resumed 1313 */ 1314 static int marvell_resume(struct phy_device *phydev) 1315 { 1316 int err; 1317 1318 /* Resume the fiber mode first */ 1319 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1320 phydev->supported)) { 1321 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1322 if (err < 0) 1323 goto error; 1324 1325 /* With the page set, use the generic resume */ 1326 err = genphy_resume(phydev); 1327 if (err < 0) 1328 goto error; 1329 1330 /* Then, the copper link */ 1331 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1332 if (err < 0) 1333 goto error; 1334 } 1335 1336 /* With the page set, use the generic resume */ 1337 return genphy_resume(phydev); 1338 1339 error: 1340 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1341 return err; 1342 } 1343 1344 static int marvell_aneg_done(struct phy_device *phydev) 1345 { 1346 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1347 1348 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1349 } 1350 1351 static int m88e1121_did_interrupt(struct phy_device *phydev) 1352 { 1353 int imask; 1354 1355 imask = phy_read(phydev, MII_M1011_IEVENT); 1356 1357 if (imask & MII_M1011_IMASK_INIT) 1358 return 1; 1359 1360 return 0; 1361 } 1362 1363 static void m88e1318_get_wol(struct phy_device *phydev, 1364 struct ethtool_wolinfo *wol) 1365 { 1366 int oldpage, ret = 0; 1367 1368 wol->supported = WAKE_MAGIC; 1369 wol->wolopts = 0; 1370 1371 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1372 if (oldpage < 0) 1373 goto error; 1374 1375 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1376 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1377 wol->wolopts |= WAKE_MAGIC; 1378 1379 error: 1380 phy_restore_page(phydev, oldpage, ret); 1381 } 1382 1383 static int m88e1318_set_wol(struct phy_device *phydev, 1384 struct ethtool_wolinfo *wol) 1385 { 1386 int err = 0, oldpage; 1387 1388 oldpage = phy_save_page(phydev); 1389 if (oldpage < 0) 1390 goto error; 1391 1392 if (wol->wolopts & WAKE_MAGIC) { 1393 /* Explicitly switch to page 0x00, just to be sure */ 1394 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1395 if (err < 0) 1396 goto error; 1397 1398 /* If WOL event happened once, the LED[2] interrupt pin 1399 * will not be cleared unless we reading the interrupt status 1400 * register. If interrupts are in use, the normal interrupt 1401 * handling will clear the WOL event. Clear the WOL event 1402 * before enabling it if !phy_interrupt_is_valid() 1403 */ 1404 if (!phy_interrupt_is_valid(phydev)) 1405 phy_read(phydev, MII_M1011_IEVENT); 1406 1407 /* Enable the WOL interrupt */ 1408 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1409 MII_88E1318S_PHY_CSIER_WOL_EIE); 1410 if (err < 0) 1411 goto error; 1412 1413 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1414 if (err < 0) 1415 goto error; 1416 1417 /* Setup LED[2] as interrupt pin (active low) */ 1418 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1419 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1420 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1421 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1422 if (err < 0) 1423 goto error; 1424 1425 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1426 if (err < 0) 1427 goto error; 1428 1429 /* Store the device address for the magic packet */ 1430 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1431 ((phydev->attached_dev->dev_addr[5] << 8) | 1432 phydev->attached_dev->dev_addr[4])); 1433 if (err < 0) 1434 goto error; 1435 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1436 ((phydev->attached_dev->dev_addr[3] << 8) | 1437 phydev->attached_dev->dev_addr[2])); 1438 if (err < 0) 1439 goto error; 1440 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1441 ((phydev->attached_dev->dev_addr[1] << 8) | 1442 phydev->attached_dev->dev_addr[0])); 1443 if (err < 0) 1444 goto error; 1445 1446 /* Clear WOL status and enable magic packet matching */ 1447 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1448 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1449 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1450 if (err < 0) 1451 goto error; 1452 } else { 1453 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1454 if (err < 0) 1455 goto error; 1456 1457 /* Clear WOL status and disable magic packet matching */ 1458 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1459 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1460 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1461 if (err < 0) 1462 goto error; 1463 } 1464 1465 error: 1466 return phy_restore_page(phydev, oldpage, err); 1467 } 1468 1469 static int marvell_get_sset_count(struct phy_device *phydev) 1470 { 1471 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1472 phydev->supported)) 1473 return ARRAY_SIZE(marvell_hw_stats); 1474 else 1475 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1476 } 1477 1478 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1479 { 1480 int i; 1481 1482 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) { 1483 strlcpy(data + i * ETH_GSTRING_LEN, 1484 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1485 } 1486 } 1487 1488 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1489 { 1490 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1491 struct marvell_priv *priv = phydev->priv; 1492 int val; 1493 u64 ret; 1494 1495 val = phy_read_paged(phydev, stat.page, stat.reg); 1496 if (val < 0) { 1497 ret = U64_MAX; 1498 } else { 1499 val = val & ((1 << stat.bits) - 1); 1500 priv->stats[i] += val; 1501 ret = priv->stats[i]; 1502 } 1503 1504 return ret; 1505 } 1506 1507 static void marvell_get_stats(struct phy_device *phydev, 1508 struct ethtool_stats *stats, u64 *data) 1509 { 1510 int i; 1511 1512 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) 1513 data[i] = marvell_get_stat(phydev, i); 1514 } 1515 1516 #ifdef CONFIG_HWMON 1517 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1518 { 1519 int oldpage; 1520 int ret = 0; 1521 int val; 1522 1523 *temp = 0; 1524 1525 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1526 if (oldpage < 0) 1527 goto error; 1528 1529 /* Enable temperature sensor */ 1530 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1531 if (ret < 0) 1532 goto error; 1533 1534 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1535 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1536 if (ret < 0) 1537 goto error; 1538 1539 /* Wait for temperature to stabilize */ 1540 usleep_range(10000, 12000); 1541 1542 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1543 if (val < 0) { 1544 ret = val; 1545 goto error; 1546 } 1547 1548 /* Disable temperature sensor */ 1549 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1550 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1551 if (ret < 0) 1552 goto error; 1553 1554 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1555 1556 error: 1557 return phy_restore_page(phydev, oldpage, ret); 1558 } 1559 1560 static int m88e1121_hwmon_read(struct device *dev, 1561 enum hwmon_sensor_types type, 1562 u32 attr, int channel, long *temp) 1563 { 1564 struct phy_device *phydev = dev_get_drvdata(dev); 1565 int err; 1566 1567 switch (attr) { 1568 case hwmon_temp_input: 1569 err = m88e1121_get_temp(phydev, temp); 1570 break; 1571 default: 1572 return -EOPNOTSUPP; 1573 } 1574 1575 return err; 1576 } 1577 1578 static umode_t m88e1121_hwmon_is_visible(const void *data, 1579 enum hwmon_sensor_types type, 1580 u32 attr, int channel) 1581 { 1582 if (type != hwmon_temp) 1583 return 0; 1584 1585 switch (attr) { 1586 case hwmon_temp_input: 1587 return 0444; 1588 default: 1589 return 0; 1590 } 1591 } 1592 1593 static u32 m88e1121_hwmon_chip_config[] = { 1594 HWMON_C_REGISTER_TZ, 1595 0 1596 }; 1597 1598 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1599 .type = hwmon_chip, 1600 .config = m88e1121_hwmon_chip_config, 1601 }; 1602 1603 static u32 m88e1121_hwmon_temp_config[] = { 1604 HWMON_T_INPUT, 1605 0 1606 }; 1607 1608 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1609 .type = hwmon_temp, 1610 .config = m88e1121_hwmon_temp_config, 1611 }; 1612 1613 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1614 &m88e1121_hwmon_chip, 1615 &m88e1121_hwmon_temp, 1616 NULL 1617 }; 1618 1619 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1620 .is_visible = m88e1121_hwmon_is_visible, 1621 .read = m88e1121_hwmon_read, 1622 }; 1623 1624 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1625 .ops = &m88e1121_hwmon_hwmon_ops, 1626 .info = m88e1121_hwmon_info, 1627 }; 1628 1629 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1630 { 1631 int ret; 1632 1633 *temp = 0; 1634 1635 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1636 MII_88E1510_TEMP_SENSOR); 1637 if (ret < 0) 1638 return ret; 1639 1640 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1641 1642 return 0; 1643 } 1644 1645 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1646 { 1647 int ret; 1648 1649 *temp = 0; 1650 1651 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1652 MII_88E1121_MISC_TEST); 1653 if (ret < 0) 1654 return ret; 1655 1656 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1657 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1658 /* convert to mC */ 1659 *temp *= 1000; 1660 1661 return 0; 1662 } 1663 1664 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1665 { 1666 temp = temp / 1000; 1667 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1668 1669 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1670 MII_88E1121_MISC_TEST, 1671 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1672 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1673 } 1674 1675 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1676 { 1677 int ret; 1678 1679 *alarm = false; 1680 1681 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1682 MII_88E1121_MISC_TEST); 1683 if (ret < 0) 1684 return ret; 1685 1686 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1687 1688 return 0; 1689 } 1690 1691 static int m88e1510_hwmon_read(struct device *dev, 1692 enum hwmon_sensor_types type, 1693 u32 attr, int channel, long *temp) 1694 { 1695 struct phy_device *phydev = dev_get_drvdata(dev); 1696 int err; 1697 1698 switch (attr) { 1699 case hwmon_temp_input: 1700 err = m88e1510_get_temp(phydev, temp); 1701 break; 1702 case hwmon_temp_crit: 1703 err = m88e1510_get_temp_critical(phydev, temp); 1704 break; 1705 case hwmon_temp_max_alarm: 1706 err = m88e1510_get_temp_alarm(phydev, temp); 1707 break; 1708 default: 1709 return -EOPNOTSUPP; 1710 } 1711 1712 return err; 1713 } 1714 1715 static int m88e1510_hwmon_write(struct device *dev, 1716 enum hwmon_sensor_types type, 1717 u32 attr, int channel, long temp) 1718 { 1719 struct phy_device *phydev = dev_get_drvdata(dev); 1720 int err; 1721 1722 switch (attr) { 1723 case hwmon_temp_crit: 1724 err = m88e1510_set_temp_critical(phydev, temp); 1725 break; 1726 default: 1727 return -EOPNOTSUPP; 1728 } 1729 return err; 1730 } 1731 1732 static umode_t m88e1510_hwmon_is_visible(const void *data, 1733 enum hwmon_sensor_types type, 1734 u32 attr, int channel) 1735 { 1736 if (type != hwmon_temp) 1737 return 0; 1738 1739 switch (attr) { 1740 case hwmon_temp_input: 1741 case hwmon_temp_max_alarm: 1742 return 0444; 1743 case hwmon_temp_crit: 1744 return 0644; 1745 default: 1746 return 0; 1747 } 1748 } 1749 1750 static u32 m88e1510_hwmon_temp_config[] = { 1751 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1752 0 1753 }; 1754 1755 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1756 .type = hwmon_temp, 1757 .config = m88e1510_hwmon_temp_config, 1758 }; 1759 1760 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1761 &m88e1121_hwmon_chip, 1762 &m88e1510_hwmon_temp, 1763 NULL 1764 }; 1765 1766 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1767 .is_visible = m88e1510_hwmon_is_visible, 1768 .read = m88e1510_hwmon_read, 1769 .write = m88e1510_hwmon_write, 1770 }; 1771 1772 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1773 .ops = &m88e1510_hwmon_hwmon_ops, 1774 .info = m88e1510_hwmon_info, 1775 }; 1776 1777 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 1778 { 1779 int sum = 0; 1780 int oldpage; 1781 int ret = 0; 1782 int i; 1783 1784 *temp = 0; 1785 1786 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1787 if (oldpage < 0) 1788 goto error; 1789 1790 /* Enable temperature sensor */ 1791 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1792 if (ret < 0) 1793 goto error; 1794 1795 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1796 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 1797 MII_88E6390_MISC_TEST_SAMPLE_1S; 1798 1799 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1800 if (ret < 0) 1801 goto error; 1802 1803 /* Wait for temperature to stabilize */ 1804 usleep_range(10000, 12000); 1805 1806 /* Reading the temperature sense has an errata. You need to read 1807 * a number of times and take an average. 1808 */ 1809 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 1810 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 1811 if (ret < 0) 1812 goto error; 1813 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 1814 } 1815 1816 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 1817 *temp = (sum - 75) * 1000; 1818 1819 /* Disable temperature sensor */ 1820 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1821 if (ret < 0) 1822 goto error; 1823 1824 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1825 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 1826 1827 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1828 1829 error: 1830 phy_restore_page(phydev, oldpage, ret); 1831 1832 return ret; 1833 } 1834 1835 static int m88e6390_hwmon_read(struct device *dev, 1836 enum hwmon_sensor_types type, 1837 u32 attr, int channel, long *temp) 1838 { 1839 struct phy_device *phydev = dev_get_drvdata(dev); 1840 int err; 1841 1842 switch (attr) { 1843 case hwmon_temp_input: 1844 err = m88e6390_get_temp(phydev, temp); 1845 break; 1846 default: 1847 return -EOPNOTSUPP; 1848 } 1849 1850 return err; 1851 } 1852 1853 static umode_t m88e6390_hwmon_is_visible(const void *data, 1854 enum hwmon_sensor_types type, 1855 u32 attr, int channel) 1856 { 1857 if (type != hwmon_temp) 1858 return 0; 1859 1860 switch (attr) { 1861 case hwmon_temp_input: 1862 return 0444; 1863 default: 1864 return 0; 1865 } 1866 } 1867 1868 static u32 m88e6390_hwmon_temp_config[] = { 1869 HWMON_T_INPUT, 1870 0 1871 }; 1872 1873 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 1874 .type = hwmon_temp, 1875 .config = m88e6390_hwmon_temp_config, 1876 }; 1877 1878 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 1879 &m88e1121_hwmon_chip, 1880 &m88e6390_hwmon_temp, 1881 NULL 1882 }; 1883 1884 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 1885 .is_visible = m88e6390_hwmon_is_visible, 1886 .read = m88e6390_hwmon_read, 1887 }; 1888 1889 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 1890 .ops = &m88e6390_hwmon_hwmon_ops, 1891 .info = m88e6390_hwmon_info, 1892 }; 1893 1894 static int marvell_hwmon_name(struct phy_device *phydev) 1895 { 1896 struct marvell_priv *priv = phydev->priv; 1897 struct device *dev = &phydev->mdio.dev; 1898 const char *devname = dev_name(dev); 1899 size_t len = strlen(devname); 1900 int i, j; 1901 1902 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 1903 if (!priv->hwmon_name) 1904 return -ENOMEM; 1905 1906 for (i = j = 0; i < len && devname[i]; i++) { 1907 if (isalnum(devname[i])) 1908 priv->hwmon_name[j++] = devname[i]; 1909 } 1910 1911 return 0; 1912 } 1913 1914 static int marvell_hwmon_probe(struct phy_device *phydev, 1915 const struct hwmon_chip_info *chip) 1916 { 1917 struct marvell_priv *priv = phydev->priv; 1918 struct device *dev = &phydev->mdio.dev; 1919 int err; 1920 1921 err = marvell_hwmon_name(phydev); 1922 if (err) 1923 return err; 1924 1925 priv->hwmon_dev = devm_hwmon_device_register_with_info( 1926 dev, priv->hwmon_name, phydev, chip, NULL); 1927 1928 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 1929 } 1930 1931 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1932 { 1933 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 1934 } 1935 1936 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1937 { 1938 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 1939 } 1940 1941 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1942 { 1943 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 1944 } 1945 #else 1946 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1947 { 1948 return 0; 1949 } 1950 1951 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1952 { 1953 return 0; 1954 } 1955 1956 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1957 { 1958 return 0; 1959 } 1960 #endif 1961 1962 static int marvell_probe(struct phy_device *phydev) 1963 { 1964 struct marvell_priv *priv; 1965 1966 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 1967 if (!priv) 1968 return -ENOMEM; 1969 1970 phydev->priv = priv; 1971 1972 return 0; 1973 } 1974 1975 static int m88e1121_probe(struct phy_device *phydev) 1976 { 1977 int err; 1978 1979 err = marvell_probe(phydev); 1980 if (err) 1981 return err; 1982 1983 return m88e1121_hwmon_probe(phydev); 1984 } 1985 1986 static int m88e1510_probe(struct phy_device *phydev) 1987 { 1988 int err; 1989 1990 err = marvell_probe(phydev); 1991 if (err) 1992 return err; 1993 1994 return m88e1510_hwmon_probe(phydev); 1995 } 1996 1997 static int m88e6390_probe(struct phy_device *phydev) 1998 { 1999 int err; 2000 2001 err = marvell_probe(phydev); 2002 if (err) 2003 return err; 2004 2005 return m88e6390_hwmon_probe(phydev); 2006 } 2007 2008 static struct phy_driver marvell_drivers[] = { 2009 { 2010 .phy_id = MARVELL_PHY_ID_88E1101, 2011 .phy_id_mask = MARVELL_PHY_ID_MASK, 2012 .name = "Marvell 88E1101", 2013 .features = PHY_GBIT_FEATURES, 2014 .probe = marvell_probe, 2015 .config_init = &marvell_config_init, 2016 .config_aneg = &m88e1101_config_aneg, 2017 .ack_interrupt = &marvell_ack_interrupt, 2018 .config_intr = &marvell_config_intr, 2019 .resume = &genphy_resume, 2020 .suspend = &genphy_suspend, 2021 .read_page = marvell_read_page, 2022 .write_page = marvell_write_page, 2023 .get_sset_count = marvell_get_sset_count, 2024 .get_strings = marvell_get_strings, 2025 .get_stats = marvell_get_stats, 2026 }, 2027 { 2028 .phy_id = MARVELL_PHY_ID_88E1112, 2029 .phy_id_mask = MARVELL_PHY_ID_MASK, 2030 .name = "Marvell 88E1112", 2031 .features = PHY_GBIT_FEATURES, 2032 .probe = marvell_probe, 2033 .config_init = &m88e1111_config_init, 2034 .config_aneg = &marvell_config_aneg, 2035 .ack_interrupt = &marvell_ack_interrupt, 2036 .config_intr = &marvell_config_intr, 2037 .resume = &genphy_resume, 2038 .suspend = &genphy_suspend, 2039 .read_page = marvell_read_page, 2040 .write_page = marvell_write_page, 2041 .get_sset_count = marvell_get_sset_count, 2042 .get_strings = marvell_get_strings, 2043 .get_stats = marvell_get_stats, 2044 }, 2045 { 2046 .phy_id = MARVELL_PHY_ID_88E1111, 2047 .phy_id_mask = MARVELL_PHY_ID_MASK, 2048 .name = "Marvell 88E1111", 2049 .features = PHY_GBIT_FEATURES, 2050 .probe = marvell_probe, 2051 .config_init = &m88e1111_config_init, 2052 .config_aneg = &marvell_config_aneg, 2053 .read_status = &marvell_read_status, 2054 .ack_interrupt = &marvell_ack_interrupt, 2055 .config_intr = &marvell_config_intr, 2056 .resume = &genphy_resume, 2057 .suspend = &genphy_suspend, 2058 .read_page = marvell_read_page, 2059 .write_page = marvell_write_page, 2060 .get_sset_count = marvell_get_sset_count, 2061 .get_strings = marvell_get_strings, 2062 .get_stats = marvell_get_stats, 2063 }, 2064 { 2065 .phy_id = MARVELL_PHY_ID_88E1118, 2066 .phy_id_mask = MARVELL_PHY_ID_MASK, 2067 .name = "Marvell 88E1118", 2068 .features = PHY_GBIT_FEATURES, 2069 .probe = marvell_probe, 2070 .config_init = &m88e1118_config_init, 2071 .config_aneg = &m88e1118_config_aneg, 2072 .ack_interrupt = &marvell_ack_interrupt, 2073 .config_intr = &marvell_config_intr, 2074 .resume = &genphy_resume, 2075 .suspend = &genphy_suspend, 2076 .read_page = marvell_read_page, 2077 .write_page = marvell_write_page, 2078 .get_sset_count = marvell_get_sset_count, 2079 .get_strings = marvell_get_strings, 2080 .get_stats = marvell_get_stats, 2081 }, 2082 { 2083 .phy_id = MARVELL_PHY_ID_88E1121R, 2084 .phy_id_mask = MARVELL_PHY_ID_MASK, 2085 .name = "Marvell 88E1121R", 2086 .features = PHY_GBIT_FEATURES, 2087 .probe = &m88e1121_probe, 2088 .config_init = &marvell_config_init, 2089 .config_aneg = &m88e1121_config_aneg, 2090 .read_status = &marvell_read_status, 2091 .ack_interrupt = &marvell_ack_interrupt, 2092 .config_intr = &marvell_config_intr, 2093 .did_interrupt = &m88e1121_did_interrupt, 2094 .resume = &genphy_resume, 2095 .suspend = &genphy_suspend, 2096 .read_page = marvell_read_page, 2097 .write_page = marvell_write_page, 2098 .get_sset_count = marvell_get_sset_count, 2099 .get_strings = marvell_get_strings, 2100 .get_stats = marvell_get_stats, 2101 }, 2102 { 2103 .phy_id = MARVELL_PHY_ID_88E1318S, 2104 .phy_id_mask = MARVELL_PHY_ID_MASK, 2105 .name = "Marvell 88E1318S", 2106 .features = PHY_GBIT_FEATURES, 2107 .probe = marvell_probe, 2108 .config_init = &m88e1318_config_init, 2109 .config_aneg = &m88e1318_config_aneg, 2110 .read_status = &marvell_read_status, 2111 .ack_interrupt = &marvell_ack_interrupt, 2112 .config_intr = &marvell_config_intr, 2113 .did_interrupt = &m88e1121_did_interrupt, 2114 .get_wol = &m88e1318_get_wol, 2115 .set_wol = &m88e1318_set_wol, 2116 .resume = &genphy_resume, 2117 .suspend = &genphy_suspend, 2118 .read_page = marvell_read_page, 2119 .write_page = marvell_write_page, 2120 .get_sset_count = marvell_get_sset_count, 2121 .get_strings = marvell_get_strings, 2122 .get_stats = marvell_get_stats, 2123 }, 2124 { 2125 .phy_id = MARVELL_PHY_ID_88E1145, 2126 .phy_id_mask = MARVELL_PHY_ID_MASK, 2127 .name = "Marvell 88E1145", 2128 .features = PHY_GBIT_FEATURES, 2129 .probe = marvell_probe, 2130 .config_init = &m88e1145_config_init, 2131 .config_aneg = &m88e1101_config_aneg, 2132 .read_status = &genphy_read_status, 2133 .ack_interrupt = &marvell_ack_interrupt, 2134 .config_intr = &marvell_config_intr, 2135 .resume = &genphy_resume, 2136 .suspend = &genphy_suspend, 2137 .read_page = marvell_read_page, 2138 .write_page = marvell_write_page, 2139 .get_sset_count = marvell_get_sset_count, 2140 .get_strings = marvell_get_strings, 2141 .get_stats = marvell_get_stats, 2142 }, 2143 { 2144 .phy_id = MARVELL_PHY_ID_88E1149R, 2145 .phy_id_mask = MARVELL_PHY_ID_MASK, 2146 .name = "Marvell 88E1149R", 2147 .features = PHY_GBIT_FEATURES, 2148 .probe = marvell_probe, 2149 .config_init = &m88e1149_config_init, 2150 .config_aneg = &m88e1118_config_aneg, 2151 .ack_interrupt = &marvell_ack_interrupt, 2152 .config_intr = &marvell_config_intr, 2153 .resume = &genphy_resume, 2154 .suspend = &genphy_suspend, 2155 .read_page = marvell_read_page, 2156 .write_page = marvell_write_page, 2157 .get_sset_count = marvell_get_sset_count, 2158 .get_strings = marvell_get_strings, 2159 .get_stats = marvell_get_stats, 2160 }, 2161 { 2162 .phy_id = MARVELL_PHY_ID_88E1240, 2163 .phy_id_mask = MARVELL_PHY_ID_MASK, 2164 .name = "Marvell 88E1240", 2165 .features = PHY_GBIT_FEATURES, 2166 .probe = marvell_probe, 2167 .config_init = &m88e1111_config_init, 2168 .config_aneg = &marvell_config_aneg, 2169 .ack_interrupt = &marvell_ack_interrupt, 2170 .config_intr = &marvell_config_intr, 2171 .resume = &genphy_resume, 2172 .suspend = &genphy_suspend, 2173 .read_page = marvell_read_page, 2174 .write_page = marvell_write_page, 2175 .get_sset_count = marvell_get_sset_count, 2176 .get_strings = marvell_get_strings, 2177 .get_stats = marvell_get_stats, 2178 }, 2179 { 2180 .phy_id = MARVELL_PHY_ID_88E1116R, 2181 .phy_id_mask = MARVELL_PHY_ID_MASK, 2182 .name = "Marvell 88E1116R", 2183 .features = PHY_GBIT_FEATURES, 2184 .probe = marvell_probe, 2185 .config_init = &m88e1116r_config_init, 2186 .ack_interrupt = &marvell_ack_interrupt, 2187 .config_intr = &marvell_config_intr, 2188 .resume = &genphy_resume, 2189 .suspend = &genphy_suspend, 2190 .read_page = marvell_read_page, 2191 .write_page = marvell_write_page, 2192 .get_sset_count = marvell_get_sset_count, 2193 .get_strings = marvell_get_strings, 2194 .get_stats = marvell_get_stats, 2195 }, 2196 { 2197 .phy_id = MARVELL_PHY_ID_88E1510, 2198 .phy_id_mask = MARVELL_PHY_ID_MASK, 2199 .name = "Marvell 88E1510", 2200 .features = PHY_GBIT_FIBRE_FEATURES, 2201 .probe = &m88e1510_probe, 2202 .config_init = &m88e1510_config_init, 2203 .config_aneg = &m88e1510_config_aneg, 2204 .read_status = &marvell_read_status, 2205 .ack_interrupt = &marvell_ack_interrupt, 2206 .config_intr = &marvell_config_intr, 2207 .did_interrupt = &m88e1121_did_interrupt, 2208 .get_wol = &m88e1318_get_wol, 2209 .set_wol = &m88e1318_set_wol, 2210 .resume = &marvell_resume, 2211 .suspend = &marvell_suspend, 2212 .read_page = marvell_read_page, 2213 .write_page = marvell_write_page, 2214 .get_sset_count = marvell_get_sset_count, 2215 .get_strings = marvell_get_strings, 2216 .get_stats = marvell_get_stats, 2217 .set_loopback = genphy_loopback, 2218 }, 2219 { 2220 .phy_id = MARVELL_PHY_ID_88E1540, 2221 .phy_id_mask = MARVELL_PHY_ID_MASK, 2222 .name = "Marvell 88E1540", 2223 .features = PHY_GBIT_FEATURES, 2224 .probe = m88e1510_probe, 2225 .config_init = &marvell_config_init, 2226 .config_aneg = &m88e1510_config_aneg, 2227 .read_status = &marvell_read_status, 2228 .ack_interrupt = &marvell_ack_interrupt, 2229 .config_intr = &marvell_config_intr, 2230 .did_interrupt = &m88e1121_did_interrupt, 2231 .resume = &genphy_resume, 2232 .suspend = &genphy_suspend, 2233 .read_page = marvell_read_page, 2234 .write_page = marvell_write_page, 2235 .get_sset_count = marvell_get_sset_count, 2236 .get_strings = marvell_get_strings, 2237 .get_stats = marvell_get_stats, 2238 }, 2239 { 2240 .phy_id = MARVELL_PHY_ID_88E1545, 2241 .phy_id_mask = MARVELL_PHY_ID_MASK, 2242 .name = "Marvell 88E1545", 2243 .probe = m88e1510_probe, 2244 .features = PHY_GBIT_FEATURES, 2245 .config_init = &marvell_config_init, 2246 .config_aneg = &m88e1510_config_aneg, 2247 .read_status = &marvell_read_status, 2248 .ack_interrupt = &marvell_ack_interrupt, 2249 .config_intr = &marvell_config_intr, 2250 .did_interrupt = &m88e1121_did_interrupt, 2251 .resume = &genphy_resume, 2252 .suspend = &genphy_suspend, 2253 .read_page = marvell_read_page, 2254 .write_page = marvell_write_page, 2255 .get_sset_count = marvell_get_sset_count, 2256 .get_strings = marvell_get_strings, 2257 .get_stats = marvell_get_stats, 2258 }, 2259 { 2260 .phy_id = MARVELL_PHY_ID_88E3016, 2261 .phy_id_mask = MARVELL_PHY_ID_MASK, 2262 .name = "Marvell 88E3016", 2263 .features = PHY_BASIC_FEATURES, 2264 .probe = marvell_probe, 2265 .config_init = &m88e3016_config_init, 2266 .aneg_done = &marvell_aneg_done, 2267 .read_status = &marvell_read_status, 2268 .ack_interrupt = &marvell_ack_interrupt, 2269 .config_intr = &marvell_config_intr, 2270 .did_interrupt = &m88e1121_did_interrupt, 2271 .resume = &genphy_resume, 2272 .suspend = &genphy_suspend, 2273 .read_page = marvell_read_page, 2274 .write_page = marvell_write_page, 2275 .get_sset_count = marvell_get_sset_count, 2276 .get_strings = marvell_get_strings, 2277 .get_stats = marvell_get_stats, 2278 }, 2279 { 2280 .phy_id = MARVELL_PHY_ID_88E6390, 2281 .phy_id_mask = MARVELL_PHY_ID_MASK, 2282 .name = "Marvell 88E6390", 2283 .features = PHY_GBIT_FEATURES, 2284 .probe = m88e6390_probe, 2285 .config_init = &marvell_config_init, 2286 .config_aneg = &m88e1510_config_aneg, 2287 .read_status = &marvell_read_status, 2288 .ack_interrupt = &marvell_ack_interrupt, 2289 .config_intr = &marvell_config_intr, 2290 .did_interrupt = &m88e1121_did_interrupt, 2291 .resume = &genphy_resume, 2292 .suspend = &genphy_suspend, 2293 .read_page = marvell_read_page, 2294 .write_page = marvell_write_page, 2295 .get_sset_count = marvell_get_sset_count, 2296 .get_strings = marvell_get_strings, 2297 .get_stats = marvell_get_stats, 2298 }, 2299 }; 2300 2301 module_phy_driver(marvell_drivers); 2302 2303 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2304 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2305 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2306 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2307 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2308 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2309 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2310 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2311 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2312 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2313 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2314 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2315 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2316 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2317 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2318 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2319 { } 2320 }; 2321 2322 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2323