xref: /openbmc/linux/drivers/net/phy/marvell.c (revision c9933d49)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * drivers/net/phy/marvell.c
4  *
5  * Driver for Marvell PHYs
6  *
7  * Author: Andy Fleming
8  *
9  * Copyright (c) 2004 Freescale Semiconductor, Inc.
10  *
11  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12  */
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
26 #include <linux/mm.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/ethtool_netlink.h>
31 #include <linux/phy.h>
32 #include <linux/marvell_phy.h>
33 #include <linux/bitfield.h>
34 #include <linux/of.h>
35 #include <linux/sfp.h>
36 
37 #include <linux/io.h>
38 #include <asm/irq.h>
39 #include <linux/uaccess.h>
40 
41 #define MII_MARVELL_PHY_PAGE		22
42 #define MII_MARVELL_COPPER_PAGE		0x00
43 #define MII_MARVELL_FIBER_PAGE		0x01
44 #define MII_MARVELL_MSCR_PAGE		0x02
45 #define MII_MARVELL_LED_PAGE		0x03
46 #define MII_MARVELL_VCT5_PAGE		0x05
47 #define MII_MARVELL_MISC_TEST_PAGE	0x06
48 #define MII_MARVELL_VCT7_PAGE		0x07
49 #define MII_MARVELL_WOL_PAGE		0x11
50 #define MII_MARVELL_MODE_PAGE		0x12
51 
52 #define MII_M1011_IEVENT		0x13
53 #define MII_M1011_IEVENT_CLEAR		0x0000
54 
55 #define MII_M1011_IMASK			0x12
56 #define MII_M1011_IMASK_INIT		0x6400
57 #define MII_M1011_IMASK_CLEAR		0x0000
58 
59 #define MII_M1011_PHY_SCR			0x10
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN		BIT(11)
61 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK	GENMASK(14, 12)
62 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX		8
63 #define MII_M1011_PHY_SCR_MDI			(0x0 << 5)
64 #define MII_M1011_PHY_SCR_MDI_X			(0x1 << 5)
65 #define MII_M1011_PHY_SCR_AUTO_CROSS		(0x3 << 5)
66 
67 #define MII_M1011_PHY_SSR			0x11
68 #define MII_M1011_PHY_SSR_DOWNSHIFT		BIT(5)
69 
70 #define MII_M1111_PHY_LED_CONTROL	0x18
71 #define MII_M1111_PHY_LED_DIRECT	0x4100
72 #define MII_M1111_PHY_LED_COMBINE	0x411c
73 #define MII_M1111_PHY_EXT_CR		0x14
74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK	GENMASK(11, 9)
75 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX	8
76 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN	BIT(8)
77 #define MII_M1111_RGMII_RX_DELAY	BIT(7)
78 #define MII_M1111_RGMII_TX_DELAY	BIT(1)
79 #define MII_M1111_PHY_EXT_SR		0x1b
80 
81 #define MII_M1111_HWCFG_MODE_MASK		0xf
82 #define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
83 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
84 #define MII_M1111_HWCFG_MODE_RTBI		0x7
85 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN	0x8
86 #define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
87 #define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
88 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN	0xc
89 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS	BIT(12)
90 #define MII_M1111_HWCFG_FIBER_COPPER_RES	BIT(13)
91 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO	BIT(15)
92 
93 #define MII_88E1121_PHY_MSCR_REG	21
94 #define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
95 #define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
96 #define MII_88E1121_PHY_MSCR_DELAY_MASK	(BIT(5) | BIT(4))
97 
98 #define MII_88E1121_MISC_TEST				0x1a
99 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
100 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
101 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
102 #define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
103 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
104 #define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f
105 
106 #define MII_88E1510_TEMP_SENSOR		0x1b
107 #define MII_88E1510_TEMP_SENSOR_MASK	0xff
108 
109 #define MII_88E1540_COPPER_CTRL3	0x1a
110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK	GENMASK(11, 10)
111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS	0
112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS	1
113 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS	2
114 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS	3
115 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN		BIT(9)
116 
117 #define MII_88E6390_MISC_TEST		0x1b
118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S	(0x0 << 14)
119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE		(0x1 << 14)
120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT	(0x2 << 14)
121 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE		(0x3 << 14)
122 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK			(0x3 << 14)
123 #define MII_88E6393_MISC_TEST_SAMPLES_2048	(0x0 << 11)
124 #define MII_88E6393_MISC_TEST_SAMPLES_4096	(0x1 << 11)
125 #define MII_88E6393_MISC_TEST_SAMPLES_8192	(0x2 << 11)
126 #define MII_88E6393_MISC_TEST_SAMPLES_16384	(0x3 << 11)
127 #define MII_88E6393_MISC_TEST_SAMPLES_MASK	(0x3 << 11)
128 #define MII_88E6393_MISC_TEST_RATE_2_3MS	(0x5 << 8)
129 #define MII_88E6393_MISC_TEST_RATE_6_4MS	(0x6 << 8)
130 #define MII_88E6393_MISC_TEST_RATE_11_9MS	(0x7 << 8)
131 #define MII_88E6393_MISC_TEST_RATE_MASK		(0x7 << 8)
132 
133 #define MII_88E6390_TEMP_SENSOR		0x1c
134 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK	0xff00
135 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT	8
136 #define MII_88E6390_TEMP_SENSOR_MASK		0xff
137 #define MII_88E6390_TEMP_SENSOR_SAMPLES		10
138 
139 #define MII_88E1318S_PHY_MSCR1_REG	16
140 #define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
141 
142 /* Copper Specific Interrupt Enable Register */
143 #define MII_88E1318S_PHY_CSIER				0x12
144 /* WOL Event Interrupt Enable */
145 #define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
146 
147 /* LED Timer Control Register */
148 #define MII_88E1318S_PHY_LED_TCR			0x12
149 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT		BIT(15)
150 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE		BIT(7)
151 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW		BIT(11)
152 
153 /* Magic Packet MAC address registers */
154 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2		0x17
155 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1		0x18
156 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0		0x19
157 
158 #define MII_88E1318S_PHY_WOL_CTRL				0x10
159 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS		BIT(12)
160 #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE		BIT(13)
161 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE	BIT(14)
162 
163 #define MII_PHY_LED_CTRL	        16
164 #define MII_88E1121_PHY_LED_DEF		0x0030
165 #define MII_88E1510_PHY_LED_DEF		0x1177
166 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE	0x1040
167 
168 #define MII_M1011_PHY_STATUS		0x11
169 #define MII_M1011_PHY_STATUS_1000	0x8000
170 #define MII_M1011_PHY_STATUS_100	0x4000
171 #define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
172 #define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
173 #define MII_M1011_PHY_STATUS_RESOLVED	0x0800
174 #define MII_M1011_PHY_STATUS_LINK	0x0400
175 
176 #define MII_88E3016_PHY_SPEC_CTRL	0x10
177 #define MII_88E3016_DISABLE_SCRAMBLER	0x0200
178 #define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
179 
180 #define MII_88E1510_GEN_CTRL_REG_1		0x14
181 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
182 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII	0x0	/* RGMII to copper */
183 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
184 /* RGMII to 1000BASE-X */
185 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X	0x2
186 /* RGMII to 100BASE-FX */
187 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX	0x3
188 /* RGMII to SGMII */
189 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII	0x4
190 #define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */
191 
192 #define MII_88E1510_MSCR_2		0x15
193 
194 #define MII_VCT5_TX_RX_MDI0_COUPLING	0x10
195 #define MII_VCT5_TX_RX_MDI1_COUPLING	0x11
196 #define MII_VCT5_TX_RX_MDI2_COUPLING	0x12
197 #define MII_VCT5_TX_RX_MDI3_COUPLING	0x13
198 #define MII_VCT5_TX_RX_AMPLITUDE_MASK	0x7f00
199 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT	8
200 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION	BIT(15)
201 
202 #define MII_VCT5_CTRL				0x17
203 #define MII_VCT5_CTRL_ENABLE				BIT(15)
204 #define MII_VCT5_CTRL_COMPLETE				BIT(14)
205 #define MII_VCT5_CTRL_TX_SAME_CHANNEL			(0x0 << 11)
206 #define MII_VCT5_CTRL_TX0_CHANNEL			(0x4 << 11)
207 #define MII_VCT5_CTRL_TX1_CHANNEL			(0x5 << 11)
208 #define MII_VCT5_CTRL_TX2_CHANNEL			(0x6 << 11)
209 #define MII_VCT5_CTRL_TX3_CHANNEL			(0x7 << 11)
210 #define MII_VCT5_CTRL_SAMPLES_2				(0x0 << 8)
211 #define MII_VCT5_CTRL_SAMPLES_4				(0x1 << 8)
212 #define MII_VCT5_CTRL_SAMPLES_8				(0x2 << 8)
213 #define MII_VCT5_CTRL_SAMPLES_16			(0x3 << 8)
214 #define MII_VCT5_CTRL_SAMPLES_32			(0x4 << 8)
215 #define MII_VCT5_CTRL_SAMPLES_64			(0x5 << 8)
216 #define MII_VCT5_CTRL_SAMPLES_128			(0x6 << 8)
217 #define MII_VCT5_CTRL_SAMPLES_DEFAULT			(0x6 << 8)
218 #define MII_VCT5_CTRL_SAMPLES_256			(0x7 << 8)
219 #define MII_VCT5_CTRL_SAMPLES_SHIFT			8
220 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK			(0x0 << 6)
221 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK		(0x1 << 6)
222 #define MII_VCT5_CTRL_MODE_OFFSET			(0x2 << 6)
223 #define MII_VCT5_CTRL_SAMPLE_POINT			(0x3 << 6)
224 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT			3
225 
226 #define MII_VCT5_SAMPLE_POINT_DISTANCE		0x18
227 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX	511
228 #define MII_VCT5_TX_PULSE_CTRL			0x1c
229 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN	BIT(12)
230 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS	(0x0 << 10)
231 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS		(0x1 << 10)
232 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS		(0x2 << 10)
233 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS		(0x3 << 10)
234 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT	10
235 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV	(0x0 << 8)
236 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV	(0x1 << 8)
237 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV	(0x2 << 8)
238 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV	(0x3 << 8)
239 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT	8
240 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP			BIT(7)
241 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV		(0x6 << 0)
242 
243 /* For TDR measurements less than 11 meters, a short pulse should be
244  * used.
245  */
246 #define TDR_SHORT_CABLE_LENGTH	11
247 
248 #define MII_VCT7_PAIR_0_DISTANCE	0x10
249 #define MII_VCT7_PAIR_1_DISTANCE	0x11
250 #define MII_VCT7_PAIR_2_DISTANCE	0x12
251 #define MII_VCT7_PAIR_3_DISTANCE	0x13
252 
253 #define MII_VCT7_RESULTS	0x14
254 #define MII_VCT7_RESULTS_PAIR3_MASK	0xf000
255 #define MII_VCT7_RESULTS_PAIR2_MASK	0x0f00
256 #define MII_VCT7_RESULTS_PAIR1_MASK	0x00f0
257 #define MII_VCT7_RESULTS_PAIR0_MASK	0x000f
258 #define MII_VCT7_RESULTS_PAIR3_SHIFT	12
259 #define MII_VCT7_RESULTS_PAIR2_SHIFT	8
260 #define MII_VCT7_RESULTS_PAIR1_SHIFT	4
261 #define MII_VCT7_RESULTS_PAIR0_SHIFT	0
262 #define MII_VCT7_RESULTS_INVALID	0
263 #define MII_VCT7_RESULTS_OK		1
264 #define MII_VCT7_RESULTS_OPEN		2
265 #define MII_VCT7_RESULTS_SAME_SHORT	3
266 #define MII_VCT7_RESULTS_CROSS_SHORT	4
267 #define MII_VCT7_RESULTS_BUSY		9
268 
269 #define MII_VCT7_CTRL		0x15
270 #define MII_VCT7_CTRL_RUN_NOW			BIT(15)
271 #define MII_VCT7_CTRL_RUN_ANEG			BIT(14)
272 #define MII_VCT7_CTRL_DISABLE_CROSS		BIT(13)
273 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK	BIT(12)
274 #define MII_VCT7_CTRL_IN_PROGRESS		BIT(11)
275 #define MII_VCT7_CTRL_METERS			BIT(10)
276 #define MII_VCT7_CTRL_CENTIMETERS		0
277 
278 #define LPA_PAUSE_FIBER		0x180
279 #define LPA_PAUSE_ASYM_FIBER	0x100
280 
281 #define NB_FIBER_STATS	1
282 
283 MODULE_DESCRIPTION("Marvell PHY driver");
284 MODULE_AUTHOR("Andy Fleming");
285 MODULE_LICENSE("GPL");
286 
287 struct marvell_hw_stat {
288 	const char *string;
289 	u8 page;
290 	u8 reg;
291 	u8 bits;
292 };
293 
294 static struct marvell_hw_stat marvell_hw_stats[] = {
295 	{ "phy_receive_errors_copper", 0, 21, 16},
296 	{ "phy_idle_errors", 0, 10, 8 },
297 	{ "phy_receive_errors_fiber", 1, 21, 16},
298 };
299 
300 struct marvell_priv {
301 	u64 stats[ARRAY_SIZE(marvell_hw_stats)];
302 	char *hwmon_name;
303 	struct device *hwmon_dev;
304 	bool cable_test_tdr;
305 	u32 first;
306 	u32 last;
307 	u32 step;
308 	s8 pair;
309 };
310 
311 static int marvell_read_page(struct phy_device *phydev)
312 {
313 	return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
314 }
315 
316 static int marvell_write_page(struct phy_device *phydev, int page)
317 {
318 	return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
319 }
320 
321 static int marvell_set_page(struct phy_device *phydev, int page)
322 {
323 	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
324 }
325 
326 static int marvell_ack_interrupt(struct phy_device *phydev)
327 {
328 	int err;
329 
330 	/* Clear the interrupts by reading the reg */
331 	err = phy_read(phydev, MII_M1011_IEVENT);
332 
333 	if (err < 0)
334 		return err;
335 
336 	return 0;
337 }
338 
339 static int marvell_config_intr(struct phy_device *phydev)
340 {
341 	int err;
342 
343 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
344 		err = marvell_ack_interrupt(phydev);
345 		if (err)
346 			return err;
347 
348 		err = phy_write(phydev, MII_M1011_IMASK,
349 				MII_M1011_IMASK_INIT);
350 	} else {
351 		err = phy_write(phydev, MII_M1011_IMASK,
352 				MII_M1011_IMASK_CLEAR);
353 		if (err)
354 			return err;
355 
356 		err = marvell_ack_interrupt(phydev);
357 	}
358 
359 	return err;
360 }
361 
362 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
363 {
364 	int irq_status;
365 
366 	irq_status = phy_read(phydev, MII_M1011_IEVENT);
367 	if (irq_status < 0) {
368 		phy_error(phydev);
369 		return IRQ_NONE;
370 	}
371 
372 	if (!(irq_status & MII_M1011_IMASK_INIT))
373 		return IRQ_NONE;
374 
375 	phy_trigger_machine(phydev);
376 
377 	return IRQ_HANDLED;
378 }
379 
380 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
381 {
382 	u16 val;
383 
384 	switch (polarity) {
385 	case ETH_TP_MDI:
386 		val = MII_M1011_PHY_SCR_MDI;
387 		break;
388 	case ETH_TP_MDI_X:
389 		val = MII_M1011_PHY_SCR_MDI_X;
390 		break;
391 	case ETH_TP_MDI_AUTO:
392 	case ETH_TP_MDI_INVALID:
393 	default:
394 		val = MII_M1011_PHY_SCR_AUTO_CROSS;
395 		break;
396 	}
397 
398 	return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
399 				  MII_M1011_PHY_SCR_AUTO_CROSS, val);
400 }
401 
402 static int marvell_config_aneg(struct phy_device *phydev)
403 {
404 	int changed = 0;
405 	int err;
406 
407 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
408 	if (err < 0)
409 		return err;
410 
411 	changed = err;
412 
413 	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
414 			MII_M1111_PHY_LED_DIRECT);
415 	if (err < 0)
416 		return err;
417 
418 	err = genphy_config_aneg(phydev);
419 	if (err < 0)
420 		return err;
421 
422 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
423 		/* A write to speed/duplex bits (that is performed by
424 		 * genphy_config_aneg() call above) must be followed by
425 		 * a software reset. Otherwise, the write has no effect.
426 		 */
427 		err = genphy_soft_reset(phydev);
428 		if (err < 0)
429 			return err;
430 	}
431 
432 	return 0;
433 }
434 
435 static int m88e1101_config_aneg(struct phy_device *phydev)
436 {
437 	int err;
438 
439 	/* This Marvell PHY has an errata which requires
440 	 * that certain registers get written in order
441 	 * to restart autonegotiation
442 	 */
443 	err = genphy_soft_reset(phydev);
444 	if (err < 0)
445 		return err;
446 
447 	err = phy_write(phydev, 0x1d, 0x1f);
448 	if (err < 0)
449 		return err;
450 
451 	err = phy_write(phydev, 0x1e, 0x200c);
452 	if (err < 0)
453 		return err;
454 
455 	err = phy_write(phydev, 0x1d, 0x5);
456 	if (err < 0)
457 		return err;
458 
459 	err = phy_write(phydev, 0x1e, 0);
460 	if (err < 0)
461 		return err;
462 
463 	err = phy_write(phydev, 0x1e, 0x100);
464 	if (err < 0)
465 		return err;
466 
467 	return marvell_config_aneg(phydev);
468 }
469 
470 #if IS_ENABLED(CONFIG_OF_MDIO)
471 /* Set and/or override some configuration registers based on the
472  * marvell,reg-init property stored in the of_node for the phydev.
473  *
474  * marvell,reg-init = <reg-page reg mask value>,...;
475  *
476  * There may be one or more sets of <reg-page reg mask value>:
477  *
478  * reg-page: which register bank to use.
479  * reg: the register.
480  * mask: if non-zero, ANDed with existing register value.
481  * value: ORed with the masked value and written to the regiser.
482  *
483  */
484 static int marvell_of_reg_init(struct phy_device *phydev)
485 {
486 	const __be32 *paddr;
487 	int len, i, saved_page, current_page, ret = 0;
488 
489 	if (!phydev->mdio.dev.of_node)
490 		return 0;
491 
492 	paddr = of_get_property(phydev->mdio.dev.of_node,
493 				"marvell,reg-init", &len);
494 	if (!paddr || len < (4 * sizeof(*paddr)))
495 		return 0;
496 
497 	saved_page = phy_save_page(phydev);
498 	if (saved_page < 0)
499 		goto err;
500 	current_page = saved_page;
501 
502 	len /= sizeof(*paddr);
503 	for (i = 0; i < len - 3; i += 4) {
504 		u16 page = be32_to_cpup(paddr + i);
505 		u16 reg = be32_to_cpup(paddr + i + 1);
506 		u16 mask = be32_to_cpup(paddr + i + 2);
507 		u16 val_bits = be32_to_cpup(paddr + i + 3);
508 		int val;
509 
510 		if (page != current_page) {
511 			current_page = page;
512 			ret = marvell_write_page(phydev, page);
513 			if (ret < 0)
514 				goto err;
515 		}
516 
517 		val = 0;
518 		if (mask) {
519 			val = __phy_read(phydev, reg);
520 			if (val < 0) {
521 				ret = val;
522 				goto err;
523 			}
524 			val &= mask;
525 		}
526 		val |= val_bits;
527 
528 		ret = __phy_write(phydev, reg, val);
529 		if (ret < 0)
530 			goto err;
531 	}
532 err:
533 	return phy_restore_page(phydev, saved_page, ret);
534 }
535 #else
536 static int marvell_of_reg_init(struct phy_device *phydev)
537 {
538 	return 0;
539 }
540 #endif /* CONFIG_OF_MDIO */
541 
542 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
543 {
544 	int mscr;
545 
546 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
547 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
548 		       MII_88E1121_PHY_MSCR_TX_DELAY;
549 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
550 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
551 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
552 		mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
553 	else
554 		mscr = 0;
555 
556 	return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
557 					MII_88E1121_PHY_MSCR_REG,
558 					MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
559 }
560 
561 static int m88e1121_config_aneg(struct phy_device *phydev)
562 {
563 	int changed = 0;
564 	int err = 0;
565 
566 	if (phy_interface_is_rgmii(phydev)) {
567 		err = m88e1121_config_aneg_rgmii_delays(phydev);
568 		if (err < 0)
569 			return err;
570 	}
571 
572 	changed = err;
573 
574 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
575 	if (err < 0)
576 		return err;
577 
578 	changed |= err;
579 
580 	err = genphy_config_aneg(phydev);
581 	if (err < 0)
582 		return err;
583 
584 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
585 		/* A software reset is used to ensure a "commit" of the
586 		 * changes is done.
587 		 */
588 		err = genphy_soft_reset(phydev);
589 		if (err < 0)
590 			return err;
591 	}
592 
593 	return 0;
594 }
595 
596 static int m88e1318_config_aneg(struct phy_device *phydev)
597 {
598 	int err;
599 
600 	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
601 			       MII_88E1318S_PHY_MSCR1_REG,
602 			       0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
603 	if (err < 0)
604 		return err;
605 
606 	return m88e1121_config_aneg(phydev);
607 }
608 
609 /**
610  * linkmode_adv_to_fiber_adv_t
611  * @advertise: the linkmode advertisement settings
612  *
613  * A small helper function that translates linkmode advertisement
614  * settings to phy autonegotiation advertisements for the MII_ADV
615  * register for fiber link.
616  */
617 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
618 {
619 	u32 result = 0;
620 
621 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
622 		result |= ADVERTISE_1000XHALF;
623 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
624 		result |= ADVERTISE_1000XFULL;
625 
626 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
627 	    linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
628 		result |= ADVERTISE_1000XPSE_ASYM;
629 	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
630 		result |= ADVERTISE_1000XPAUSE;
631 
632 	return result;
633 }
634 
635 /**
636  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
637  * @phydev: target phy_device struct
638  *
639  * Description: If auto-negotiation is enabled, we configure the
640  *   advertising, and then restart auto-negotiation.  If it is not
641  *   enabled, then we write the BMCR. Adapted for fiber link in
642  *   some Marvell's devices.
643  */
644 static int marvell_config_aneg_fiber(struct phy_device *phydev)
645 {
646 	int changed = 0;
647 	int err;
648 	u16 adv;
649 
650 	if (phydev->autoneg != AUTONEG_ENABLE)
651 		return genphy_setup_forced(phydev);
652 
653 	/* Only allow advertising what this PHY supports */
654 	linkmode_and(phydev->advertising, phydev->advertising,
655 		     phydev->supported);
656 
657 	adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
658 
659 	/* Setup fiber advertisement */
660 	err = phy_modify_changed(phydev, MII_ADVERTISE,
661 				 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
662 				 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
663 				 adv);
664 	if (err < 0)
665 		return err;
666 	if (err > 0)
667 		changed = 1;
668 
669 	return genphy_check_and_restart_aneg(phydev, changed);
670 }
671 
672 static int m88e1111_config_aneg(struct phy_device *phydev)
673 {
674 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
675 	int err;
676 
677 	if (extsr < 0)
678 		return extsr;
679 
680 	/* If not using SGMII or copper 1000BaseX modes, use normal process.
681 	 * Steps below are only required for these modes.
682 	 */
683 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
684 	    (extsr & MII_M1111_HWCFG_MODE_MASK) !=
685 	    MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
686 		return marvell_config_aneg(phydev);
687 
688 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
689 	if (err < 0)
690 		goto error;
691 
692 	/* Configure the copper link first */
693 	err = marvell_config_aneg(phydev);
694 	if (err < 0)
695 		goto error;
696 
697 	/* Then the fiber link */
698 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
699 	if (err < 0)
700 		goto error;
701 
702 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
703 		/* Do not touch the fiber advertisement if we're in copper->sgmii mode.
704 		 * Just ensure that SGMII-side autonegotiation is enabled.
705 		 * If we switched from some other mode to SGMII it may not be.
706 		 */
707 		err = genphy_check_and_restart_aneg(phydev, false);
708 	else
709 		err = marvell_config_aneg_fiber(phydev);
710 	if (err < 0)
711 		goto error;
712 
713 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
714 
715 error:
716 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
717 	return err;
718 }
719 
720 static int m88e1510_config_aneg(struct phy_device *phydev)
721 {
722 	int err;
723 
724 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
725 	if (err < 0)
726 		goto error;
727 
728 	/* Configure the copper link first */
729 	err = m88e1318_config_aneg(phydev);
730 	if (err < 0)
731 		goto error;
732 
733 	/* Do not touch the fiber page if we're in copper->sgmii mode */
734 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
735 		return 0;
736 
737 	/* Then the fiber link */
738 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
739 	if (err < 0)
740 		goto error;
741 
742 	err = marvell_config_aneg_fiber(phydev);
743 	if (err < 0)
744 		goto error;
745 
746 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
747 
748 error:
749 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
750 	return err;
751 }
752 
753 static void marvell_config_led(struct phy_device *phydev)
754 {
755 	u16 def_config;
756 	int err;
757 
758 	switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
759 	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
760 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
761 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
762 		def_config = MII_88E1121_PHY_LED_DEF;
763 		break;
764 	/* Default PHY LED config:
765 	 * LED[0] .. 1000Mbps Link
766 	 * LED[1] .. 100Mbps Link
767 	 * LED[2] .. Blink, Activity
768 	 */
769 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
770 		if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
771 			def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
772 		else
773 			def_config = MII_88E1510_PHY_LED_DEF;
774 		break;
775 	default:
776 		return;
777 	}
778 
779 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
780 			      def_config);
781 	if (err < 0)
782 		phydev_warn(phydev, "Fail to config marvell phy LED.\n");
783 }
784 
785 static int marvell_config_init(struct phy_device *phydev)
786 {
787 	/* Set default LED */
788 	marvell_config_led(phydev);
789 
790 	/* Set registers from marvell,reg-init DT property */
791 	return marvell_of_reg_init(phydev);
792 }
793 
794 static int m88e3016_config_init(struct phy_device *phydev)
795 {
796 	int ret;
797 
798 	/* Enable Scrambler and Auto-Crossover */
799 	ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
800 			 MII_88E3016_DISABLE_SCRAMBLER,
801 			 MII_88E3016_AUTO_MDIX_CROSSOVER);
802 	if (ret < 0)
803 		return ret;
804 
805 	return marvell_config_init(phydev);
806 }
807 
808 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
809 					   u16 mode,
810 					   int fibre_copper_auto)
811 {
812 	if (fibre_copper_auto)
813 		mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
814 
815 	return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
816 			  MII_M1111_HWCFG_MODE_MASK |
817 			  MII_M1111_HWCFG_FIBER_COPPER_AUTO |
818 			  MII_M1111_HWCFG_FIBER_COPPER_RES,
819 			  mode);
820 }
821 
822 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
823 {
824 	int delay;
825 
826 	switch (phydev->interface) {
827 	case PHY_INTERFACE_MODE_RGMII_ID:
828 		delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
829 		break;
830 	case PHY_INTERFACE_MODE_RGMII_RXID:
831 		delay = MII_M1111_RGMII_RX_DELAY;
832 		break;
833 	case PHY_INTERFACE_MODE_RGMII_TXID:
834 		delay = MII_M1111_RGMII_TX_DELAY;
835 		break;
836 	default:
837 		delay = 0;
838 		break;
839 	}
840 
841 	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
842 			  MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
843 			  delay);
844 }
845 
846 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
847 {
848 	int temp;
849 	int err;
850 
851 	err = m88e1111_config_init_rgmii_delays(phydev);
852 	if (err < 0)
853 		return err;
854 
855 	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
856 	if (temp < 0)
857 		return temp;
858 
859 	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
860 
861 	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
862 		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
863 	else
864 		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
865 
866 	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
867 }
868 
869 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
870 {
871 	int err;
872 
873 	err = m88e1111_config_init_hwcfg_mode(
874 		phydev,
875 		MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
876 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
877 	if (err < 0)
878 		return err;
879 
880 	/* make sure copper is selected */
881 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
882 }
883 
884 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
885 {
886 	int err;
887 
888 	err = m88e1111_config_init_rgmii_delays(phydev);
889 	if (err < 0)
890 		return err;
891 
892 	err = m88e1111_config_init_hwcfg_mode(
893 		phydev,
894 		MII_M1111_HWCFG_MODE_RTBI,
895 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
896 	if (err < 0)
897 		return err;
898 
899 	/* soft reset */
900 	err = genphy_soft_reset(phydev);
901 	if (err < 0)
902 		return err;
903 
904 	return m88e1111_config_init_hwcfg_mode(
905 		phydev,
906 		MII_M1111_HWCFG_MODE_RTBI,
907 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
908 }
909 
910 static int m88e1111_config_init_1000basex(struct phy_device *phydev)
911 {
912 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
913 	int err, mode;
914 
915 	if (extsr < 0)
916 		return extsr;
917 
918 	/* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
919 	mode = extsr & MII_M1111_HWCFG_MODE_MASK;
920 	if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
921 		err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
922 				 MII_M1111_HWCFG_MODE_MASK |
923 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
924 				 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
925 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
926 		if (err < 0)
927 			return err;
928 	}
929 	return 0;
930 }
931 
932 static int m88e1111_config_init(struct phy_device *phydev)
933 {
934 	int err;
935 
936 	if (phy_interface_is_rgmii(phydev)) {
937 		err = m88e1111_config_init_rgmii(phydev);
938 		if (err < 0)
939 			return err;
940 	}
941 
942 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
943 		err = m88e1111_config_init_sgmii(phydev);
944 		if (err < 0)
945 			return err;
946 	}
947 
948 	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
949 		err = m88e1111_config_init_rtbi(phydev);
950 		if (err < 0)
951 			return err;
952 	}
953 
954 	if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
955 		err = m88e1111_config_init_1000basex(phydev);
956 		if (err < 0)
957 			return err;
958 	}
959 
960 	err = marvell_of_reg_init(phydev);
961 	if (err < 0)
962 		return err;
963 
964 	err = genphy_soft_reset(phydev);
965 	if (err < 0)
966 		return err;
967 
968 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
969 		/* If the HWCFG_MODE was changed from another mode (such as
970 		 * 1000BaseX) to SGMII, the state of the support bits may have
971 		 * also changed now that the PHY has been reset.
972 		 * Update the PHY abilities accordingly.
973 		 */
974 		err = genphy_read_abilities(phydev);
975 		linkmode_or(phydev->advertising, phydev->advertising,
976 			    phydev->supported);
977 	}
978 	return err;
979 }
980 
981 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
982 {
983 	int val, cnt, enable;
984 
985 	val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
986 	if (val < 0)
987 		return val;
988 
989 	enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
990 	cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
991 
992 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
993 
994 	return 0;
995 }
996 
997 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
998 {
999 	int val, err;
1000 
1001 	if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
1002 		return -E2BIG;
1003 
1004 	if (!cnt) {
1005 		err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
1006 				     MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
1007 	} else {
1008 		val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
1009 		val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
1010 
1011 		err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
1012 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
1013 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
1014 				 val);
1015 	}
1016 
1017 	if (err < 0)
1018 		return err;
1019 
1020 	return genphy_soft_reset(phydev);
1021 }
1022 
1023 static int m88e1111_get_tunable(struct phy_device *phydev,
1024 				struct ethtool_tunable *tuna, void *data)
1025 {
1026 	switch (tuna->id) {
1027 	case ETHTOOL_PHY_DOWNSHIFT:
1028 		return m88e1111_get_downshift(phydev, data);
1029 	default:
1030 		return -EOPNOTSUPP;
1031 	}
1032 }
1033 
1034 static int m88e1111_set_tunable(struct phy_device *phydev,
1035 				struct ethtool_tunable *tuna, const void *data)
1036 {
1037 	switch (tuna->id) {
1038 	case ETHTOOL_PHY_DOWNSHIFT:
1039 		return m88e1111_set_downshift(phydev, *(const u8 *)data);
1040 	default:
1041 		return -EOPNOTSUPP;
1042 	}
1043 }
1044 
1045 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1046 {
1047 	int val, cnt, enable;
1048 
1049 	val = phy_read(phydev, MII_M1011_PHY_SCR);
1050 	if (val < 0)
1051 		return val;
1052 
1053 	enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1054 	cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1055 
1056 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1057 
1058 	return 0;
1059 }
1060 
1061 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1062 {
1063 	int val, err;
1064 
1065 	if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1066 		return -E2BIG;
1067 
1068 	if (!cnt) {
1069 		err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1070 				     MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1071 	} else {
1072 		val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1073 		val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1074 
1075 		err = phy_modify(phydev, MII_M1011_PHY_SCR,
1076 				 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1077 				 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1078 				 val);
1079 	}
1080 
1081 	if (err < 0)
1082 		return err;
1083 
1084 	return genphy_soft_reset(phydev);
1085 }
1086 
1087 static int m88e1011_get_tunable(struct phy_device *phydev,
1088 				struct ethtool_tunable *tuna, void *data)
1089 {
1090 	switch (tuna->id) {
1091 	case ETHTOOL_PHY_DOWNSHIFT:
1092 		return m88e1011_get_downshift(phydev, data);
1093 	default:
1094 		return -EOPNOTSUPP;
1095 	}
1096 }
1097 
1098 static int m88e1011_set_tunable(struct phy_device *phydev,
1099 				struct ethtool_tunable *tuna, const void *data)
1100 {
1101 	switch (tuna->id) {
1102 	case ETHTOOL_PHY_DOWNSHIFT:
1103 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1104 	default:
1105 		return -EOPNOTSUPP;
1106 	}
1107 }
1108 
1109 static int m88e1112_config_init(struct phy_device *phydev)
1110 {
1111 	int err;
1112 
1113 	err = m88e1011_set_downshift(phydev, 3);
1114 	if (err < 0)
1115 		return err;
1116 
1117 	return m88e1111_config_init(phydev);
1118 }
1119 
1120 static int m88e1111gbe_config_init(struct phy_device *phydev)
1121 {
1122 	int err;
1123 
1124 	err = m88e1111_set_downshift(phydev, 3);
1125 	if (err < 0)
1126 		return err;
1127 
1128 	return m88e1111_config_init(phydev);
1129 }
1130 
1131 static int marvell_1011gbe_config_init(struct phy_device *phydev)
1132 {
1133 	int err;
1134 
1135 	err = m88e1011_set_downshift(phydev, 3);
1136 	if (err < 0)
1137 		return err;
1138 
1139 	return marvell_config_init(phydev);
1140 }
1141 static int m88e1116r_config_init(struct phy_device *phydev)
1142 {
1143 	int err;
1144 
1145 	err = genphy_soft_reset(phydev);
1146 	if (err < 0)
1147 		return err;
1148 
1149 	msleep(500);
1150 
1151 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1152 	if (err < 0)
1153 		return err;
1154 
1155 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1156 	if (err < 0)
1157 		return err;
1158 
1159 	err = m88e1011_set_downshift(phydev, 8);
1160 	if (err < 0)
1161 		return err;
1162 
1163 	if (phy_interface_is_rgmii(phydev)) {
1164 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1165 		if (err < 0)
1166 			return err;
1167 	}
1168 
1169 	err = genphy_soft_reset(phydev);
1170 	if (err < 0)
1171 		return err;
1172 
1173 	return marvell_config_init(phydev);
1174 }
1175 
1176 static int m88e1318_config_init(struct phy_device *phydev)
1177 {
1178 	if (phy_interrupt_is_valid(phydev)) {
1179 		int err = phy_modify_paged(
1180 			phydev, MII_MARVELL_LED_PAGE,
1181 			MII_88E1318S_PHY_LED_TCR,
1182 			MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1183 			MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1184 			MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1185 		if (err < 0)
1186 			return err;
1187 	}
1188 
1189 	return marvell_config_init(phydev);
1190 }
1191 
1192 static int m88e1510_config_init(struct phy_device *phydev)
1193 {
1194 	int err;
1195 
1196 	/* SGMII-to-Copper mode initialization */
1197 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1198 		/* Select page 18 */
1199 		err = marvell_set_page(phydev, 18);
1200 		if (err < 0)
1201 			return err;
1202 
1203 		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1204 		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1205 				 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1206 				 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1207 		if (err < 0)
1208 			return err;
1209 
1210 		/* PHY reset is necessary after changing MODE[2:0] */
1211 		err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1212 				   MII_88E1510_GEN_CTRL_REG_1_RESET);
1213 		if (err < 0)
1214 			return err;
1215 
1216 		/* Reset page selection */
1217 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1218 		if (err < 0)
1219 			return err;
1220 	}
1221 	err = m88e1011_set_downshift(phydev, 3);
1222 	if (err < 0)
1223 		return err;
1224 
1225 	return m88e1318_config_init(phydev);
1226 }
1227 
1228 static int m88e1118_config_aneg(struct phy_device *phydev)
1229 {
1230 	int err;
1231 
1232 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1233 	if (err < 0)
1234 		return err;
1235 
1236 	err = genphy_config_aneg(phydev);
1237 	if (err < 0)
1238 		return err;
1239 
1240 	return genphy_soft_reset(phydev);
1241 }
1242 
1243 static int m88e1118_config_init(struct phy_device *phydev)
1244 {
1245 	u16 leds;
1246 	int err;
1247 
1248 	/* Enable 1000 Mbit */
1249 	err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE,
1250 			      MII_88E1121_PHY_MSCR_REG, 0x1070);
1251 	if (err < 0)
1252 		return err;
1253 
1254 	if (phy_interface_is_rgmii(phydev)) {
1255 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1256 		if (err < 0)
1257 			return err;
1258 	}
1259 
1260 	/* Adjust LED Control */
1261 	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1262 		leds = 0x1100;
1263 	else
1264 		leds = 0x021e;
1265 
1266 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds);
1267 	if (err < 0)
1268 		return err;
1269 
1270 	err = marvell_of_reg_init(phydev);
1271 	if (err < 0)
1272 		return err;
1273 
1274 	/* Reset page register */
1275 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1276 	if (err < 0)
1277 		return err;
1278 
1279 	return genphy_soft_reset(phydev);
1280 }
1281 
1282 static int m88e1149_config_init(struct phy_device *phydev)
1283 {
1284 	int err;
1285 
1286 	/* Change address */
1287 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1288 	if (err < 0)
1289 		return err;
1290 
1291 	/* Enable 1000 Mbit */
1292 	err = phy_write(phydev, 0x15, 0x1048);
1293 	if (err < 0)
1294 		return err;
1295 
1296 	err = marvell_of_reg_init(phydev);
1297 	if (err < 0)
1298 		return err;
1299 
1300 	/* Reset address */
1301 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1302 	if (err < 0)
1303 		return err;
1304 
1305 	return genphy_soft_reset(phydev);
1306 }
1307 
1308 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1309 {
1310 	int err;
1311 
1312 	err = m88e1111_config_init_rgmii_delays(phydev);
1313 	if (err < 0)
1314 		return err;
1315 
1316 	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1317 		err = phy_write(phydev, 0x1d, 0x0012);
1318 		if (err < 0)
1319 			return err;
1320 
1321 		err = phy_modify(phydev, 0x1e, 0x0fc0,
1322 				 2 << 9 | /* 36 ohm */
1323 				 2 << 6); /* 39 ohm */
1324 		if (err < 0)
1325 			return err;
1326 
1327 		err = phy_write(phydev, 0x1d, 0x3);
1328 		if (err < 0)
1329 			return err;
1330 
1331 		err = phy_write(phydev, 0x1e, 0x8000);
1332 	}
1333 	return err;
1334 }
1335 
1336 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1337 {
1338 	return m88e1111_config_init_hwcfg_mode(
1339 		phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1340 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1341 }
1342 
1343 static int m88e1145_config_init(struct phy_device *phydev)
1344 {
1345 	int err;
1346 
1347 	/* Take care of errata E0 & E1 */
1348 	err = phy_write(phydev, 0x1d, 0x001b);
1349 	if (err < 0)
1350 		return err;
1351 
1352 	err = phy_write(phydev, 0x1e, 0x418f);
1353 	if (err < 0)
1354 		return err;
1355 
1356 	err = phy_write(phydev, 0x1d, 0x0016);
1357 	if (err < 0)
1358 		return err;
1359 
1360 	err = phy_write(phydev, 0x1e, 0xa2da);
1361 	if (err < 0)
1362 		return err;
1363 
1364 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1365 		err = m88e1145_config_init_rgmii(phydev);
1366 		if (err < 0)
1367 			return err;
1368 	}
1369 
1370 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1371 		err = m88e1145_config_init_sgmii(phydev);
1372 		if (err < 0)
1373 			return err;
1374 	}
1375 	err = m88e1111_set_downshift(phydev, 3);
1376 	if (err < 0)
1377 		return err;
1378 
1379 	err = marvell_of_reg_init(phydev);
1380 	if (err < 0)
1381 		return err;
1382 
1383 	return 0;
1384 }
1385 
1386 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1387 {
1388 	int val;
1389 
1390 	val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1391 	if (val < 0)
1392 		return val;
1393 
1394 	if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1395 		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1396 		return 0;
1397 	}
1398 
1399 	val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1400 
1401 	switch (val) {
1402 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1403 		*msecs = 0;
1404 		break;
1405 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1406 		*msecs = 10;
1407 		break;
1408 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1409 		*msecs = 20;
1410 		break;
1411 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1412 		*msecs = 40;
1413 		break;
1414 	default:
1415 		return -EINVAL;
1416 	}
1417 
1418 	return 0;
1419 }
1420 
1421 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1422 {
1423 	struct ethtool_eee eee;
1424 	int val, ret;
1425 
1426 	if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1427 		return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1428 				      MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1429 
1430 	/* According to the Marvell data sheet EEE must be disabled for
1431 	 * Fast Link Down detection to work properly
1432 	 */
1433 	ret = phy_ethtool_get_eee(phydev, &eee);
1434 	if (!ret && eee.eee_enabled) {
1435 		phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1436 		return -EBUSY;
1437 	}
1438 
1439 	if (*msecs <= 5)
1440 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1441 	else if (*msecs <= 15)
1442 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1443 	else if (*msecs <= 30)
1444 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1445 	else
1446 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1447 
1448 	val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1449 
1450 	ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1451 			 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1452 	if (ret)
1453 		return ret;
1454 
1455 	return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1456 			    MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1457 }
1458 
1459 static int m88e1540_get_tunable(struct phy_device *phydev,
1460 				struct ethtool_tunable *tuna, void *data)
1461 {
1462 	switch (tuna->id) {
1463 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1464 		return m88e1540_get_fld(phydev, data);
1465 	case ETHTOOL_PHY_DOWNSHIFT:
1466 		return m88e1011_get_downshift(phydev, data);
1467 	default:
1468 		return -EOPNOTSUPP;
1469 	}
1470 }
1471 
1472 static int m88e1540_set_tunable(struct phy_device *phydev,
1473 				struct ethtool_tunable *tuna, const void *data)
1474 {
1475 	switch (tuna->id) {
1476 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1477 		return m88e1540_set_fld(phydev, data);
1478 	case ETHTOOL_PHY_DOWNSHIFT:
1479 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1480 	default:
1481 		return -EOPNOTSUPP;
1482 	}
1483 }
1484 
1485 /* The VOD can be out of specification on link up. Poke an
1486  * undocumented register, in an undocumented page, with a magic value
1487  * to fix this.
1488  */
1489 static int m88e6390_errata(struct phy_device *phydev)
1490 {
1491 	int err;
1492 
1493 	err = phy_write(phydev, MII_BMCR,
1494 			BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1495 	if (err)
1496 		return err;
1497 
1498 	usleep_range(300, 400);
1499 
1500 	err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1501 	if (err)
1502 		return err;
1503 
1504 	return genphy_soft_reset(phydev);
1505 }
1506 
1507 static int m88e6390_config_aneg(struct phy_device *phydev)
1508 {
1509 	int err;
1510 
1511 	err = m88e6390_errata(phydev);
1512 	if (err)
1513 		return err;
1514 
1515 	return m88e1510_config_aneg(phydev);
1516 }
1517 
1518 /**
1519  * fiber_lpa_mod_linkmode_lpa_t
1520  * @advertising: the linkmode advertisement settings
1521  * @lpa: value of the MII_LPA register for fiber link
1522  *
1523  * A small helper function that translates MII_LPA bits to linkmode LP
1524  * advertisement settings. Other bits in advertising are left
1525  * unchanged.
1526  */
1527 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1528 {
1529 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1530 			 advertising, lpa & LPA_1000XHALF);
1531 
1532 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1533 			 advertising, lpa & LPA_1000XFULL);
1534 }
1535 
1536 static int marvell_read_status_page_an(struct phy_device *phydev,
1537 				       int fiber, int status)
1538 {
1539 	int lpa;
1540 	int err;
1541 
1542 	if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1543 		phydev->link = 0;
1544 		return 0;
1545 	}
1546 
1547 	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1548 		phydev->duplex = DUPLEX_FULL;
1549 	else
1550 		phydev->duplex = DUPLEX_HALF;
1551 
1552 	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1553 	case MII_M1011_PHY_STATUS_1000:
1554 		phydev->speed = SPEED_1000;
1555 		break;
1556 
1557 	case MII_M1011_PHY_STATUS_100:
1558 		phydev->speed = SPEED_100;
1559 		break;
1560 
1561 	default:
1562 		phydev->speed = SPEED_10;
1563 		break;
1564 	}
1565 
1566 	if (!fiber) {
1567 		err = genphy_read_lpa(phydev);
1568 		if (err < 0)
1569 			return err;
1570 
1571 		phy_resolve_aneg_pause(phydev);
1572 	} else {
1573 		lpa = phy_read(phydev, MII_LPA);
1574 		if (lpa < 0)
1575 			return lpa;
1576 
1577 		/* The fiber link is only 1000M capable */
1578 		fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1579 
1580 		if (phydev->duplex == DUPLEX_FULL) {
1581 			if (!(lpa & LPA_PAUSE_FIBER)) {
1582 				phydev->pause = 0;
1583 				phydev->asym_pause = 0;
1584 			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1585 				phydev->pause = 1;
1586 				phydev->asym_pause = 1;
1587 			} else {
1588 				phydev->pause = 1;
1589 				phydev->asym_pause = 0;
1590 			}
1591 		}
1592 	}
1593 
1594 	return 0;
1595 }
1596 
1597 /* marvell_read_status_page
1598  *
1599  * Description:
1600  *   Check the link, then figure out the current state
1601  *   by comparing what we advertise with what the link partner
1602  *   advertises.  Start by checking the gigabit possibilities,
1603  *   then move on to 10/100.
1604  */
1605 static int marvell_read_status_page(struct phy_device *phydev, int page)
1606 {
1607 	int status;
1608 	int fiber;
1609 	int err;
1610 
1611 	status = phy_read(phydev, MII_M1011_PHY_STATUS);
1612 	if (status < 0)
1613 		return status;
1614 
1615 	/* Use the generic register for copper link status,
1616 	 * and the PHY status register for fiber link status.
1617 	 */
1618 	if (page == MII_MARVELL_FIBER_PAGE) {
1619 		phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1620 	} else {
1621 		err = genphy_update_link(phydev);
1622 		if (err)
1623 			return err;
1624 	}
1625 
1626 	if (page == MII_MARVELL_FIBER_PAGE)
1627 		fiber = 1;
1628 	else
1629 		fiber = 0;
1630 
1631 	linkmode_zero(phydev->lp_advertising);
1632 	phydev->pause = 0;
1633 	phydev->asym_pause = 0;
1634 	phydev->speed = SPEED_UNKNOWN;
1635 	phydev->duplex = DUPLEX_UNKNOWN;
1636 	phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1637 
1638 	if (phydev->autoneg == AUTONEG_ENABLE)
1639 		err = marvell_read_status_page_an(phydev, fiber, status);
1640 	else
1641 		err = genphy_read_status_fixed(phydev);
1642 
1643 	return err;
1644 }
1645 
1646 /* marvell_read_status
1647  *
1648  * Some Marvell's phys have two modes: fiber and copper.
1649  * Both need status checked.
1650  * Description:
1651  *   First, check the fiber link and status.
1652  *   If the fiber link is down, check the copper link and status which
1653  *   will be the default value if both link are down.
1654  */
1655 static int marvell_read_status(struct phy_device *phydev)
1656 {
1657 	int err;
1658 
1659 	/* Check the fiber mode first */
1660 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1661 			      phydev->supported) &&
1662 	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1663 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1664 		if (err < 0)
1665 			goto error;
1666 
1667 		err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1668 		if (err < 0)
1669 			goto error;
1670 
1671 		/* If the fiber link is up, it is the selected and
1672 		 * used link. In this case, we need to stay in the
1673 		 * fiber page. Please to be careful about that, avoid
1674 		 * to restore Copper page in other functions which
1675 		 * could break the behaviour for some fiber phy like
1676 		 * 88E1512.
1677 		 */
1678 		if (phydev->link)
1679 			return 0;
1680 
1681 		/* If fiber link is down, check and save copper mode state */
1682 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1683 		if (err < 0)
1684 			goto error;
1685 	}
1686 
1687 	return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1688 
1689 error:
1690 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1691 	return err;
1692 }
1693 
1694 /* marvell_suspend
1695  *
1696  * Some Marvell's phys have two modes: fiber and copper.
1697  * Both need to be suspended
1698  */
1699 static int marvell_suspend(struct phy_device *phydev)
1700 {
1701 	int err;
1702 
1703 	/* Suspend the fiber mode first */
1704 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1705 			      phydev->supported)) {
1706 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1707 		if (err < 0)
1708 			goto error;
1709 
1710 		/* With the page set, use the generic suspend */
1711 		err = genphy_suspend(phydev);
1712 		if (err < 0)
1713 			goto error;
1714 
1715 		/* Then, the copper link */
1716 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1717 		if (err < 0)
1718 			goto error;
1719 	}
1720 
1721 	/* With the page set, use the generic suspend */
1722 	return genphy_suspend(phydev);
1723 
1724 error:
1725 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1726 	return err;
1727 }
1728 
1729 /* marvell_resume
1730  *
1731  * Some Marvell's phys have two modes: fiber and copper.
1732  * Both need to be resumed
1733  */
1734 static int marvell_resume(struct phy_device *phydev)
1735 {
1736 	int err;
1737 
1738 	/* Resume the fiber mode first */
1739 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1740 			      phydev->supported)) {
1741 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1742 		if (err < 0)
1743 			goto error;
1744 
1745 		/* With the page set, use the generic resume */
1746 		err = genphy_resume(phydev);
1747 		if (err < 0)
1748 			goto error;
1749 
1750 		/* Then, the copper link */
1751 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1752 		if (err < 0)
1753 			goto error;
1754 	}
1755 
1756 	/* With the page set, use the generic resume */
1757 	return genphy_resume(phydev);
1758 
1759 error:
1760 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1761 	return err;
1762 }
1763 
1764 static int marvell_aneg_done(struct phy_device *phydev)
1765 {
1766 	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1767 
1768 	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1769 }
1770 
1771 static void m88e1318_get_wol(struct phy_device *phydev,
1772 			     struct ethtool_wolinfo *wol)
1773 {
1774 	int ret;
1775 
1776 	wol->supported = WAKE_MAGIC | WAKE_PHY;
1777 	wol->wolopts = 0;
1778 
1779 	ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1780 			     MII_88E1318S_PHY_WOL_CTRL);
1781 	if (ret < 0)
1782 		return;
1783 
1784 	if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1785 		wol->wolopts |= WAKE_MAGIC;
1786 
1787 	if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
1788 		wol->wolopts |= WAKE_PHY;
1789 }
1790 
1791 static int m88e1318_set_wol(struct phy_device *phydev,
1792 			    struct ethtool_wolinfo *wol)
1793 {
1794 	int err = 0, oldpage;
1795 
1796 	oldpage = phy_save_page(phydev);
1797 	if (oldpage < 0)
1798 		goto error;
1799 
1800 	if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
1801 		/* Explicitly switch to page 0x00, just to be sure */
1802 		err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1803 		if (err < 0)
1804 			goto error;
1805 
1806 		/* If WOL event happened once, the LED[2] interrupt pin
1807 		 * will not be cleared unless we reading the interrupt status
1808 		 * register. If interrupts are in use, the normal interrupt
1809 		 * handling will clear the WOL event. Clear the WOL event
1810 		 * before enabling it if !phy_interrupt_is_valid()
1811 		 */
1812 		if (!phy_interrupt_is_valid(phydev))
1813 			__phy_read(phydev, MII_M1011_IEVENT);
1814 
1815 		/* Enable the WOL interrupt */
1816 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1817 				     MII_88E1318S_PHY_CSIER_WOL_EIE);
1818 		if (err < 0)
1819 			goto error;
1820 
1821 		err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1822 		if (err < 0)
1823 			goto error;
1824 
1825 		/* Setup LED[2] as interrupt pin (active low) */
1826 		err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1827 				   MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1828 				   MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1829 				   MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1830 		if (err < 0)
1831 			goto error;
1832 	}
1833 
1834 	if (wol->wolopts & WAKE_MAGIC) {
1835 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1836 		if (err < 0)
1837 			goto error;
1838 
1839 		/* Store the device address for the magic packet */
1840 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1841 				((phydev->attached_dev->dev_addr[5] << 8) |
1842 				 phydev->attached_dev->dev_addr[4]));
1843 		if (err < 0)
1844 			goto error;
1845 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1846 				((phydev->attached_dev->dev_addr[3] << 8) |
1847 				 phydev->attached_dev->dev_addr[2]));
1848 		if (err < 0)
1849 			goto error;
1850 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1851 				((phydev->attached_dev->dev_addr[1] << 8) |
1852 				 phydev->attached_dev->dev_addr[0]));
1853 		if (err < 0)
1854 			goto error;
1855 
1856 		/* Clear WOL status and enable magic packet matching */
1857 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1858 				     MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1859 				     MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1860 		if (err < 0)
1861 			goto error;
1862 	} else {
1863 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1864 		if (err < 0)
1865 			goto error;
1866 
1867 		/* Clear WOL status and disable magic packet matching */
1868 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1869 				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1870 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1871 		if (err < 0)
1872 			goto error;
1873 	}
1874 
1875 	if (wol->wolopts & WAKE_PHY) {
1876 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1877 		if (err < 0)
1878 			goto error;
1879 
1880 		/* Clear WOL status and enable link up event */
1881 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1882 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1883 				   MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
1884 		if (err < 0)
1885 			goto error;
1886 	} else {
1887 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1888 		if (err < 0)
1889 			goto error;
1890 
1891 		/* Clear WOL status and disable link up event */
1892 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1893 				   MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
1894 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1895 		if (err < 0)
1896 			goto error;
1897 	}
1898 
1899 error:
1900 	return phy_restore_page(phydev, oldpage, err);
1901 }
1902 
1903 static int marvell_get_sset_count(struct phy_device *phydev)
1904 {
1905 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1906 			      phydev->supported))
1907 		return ARRAY_SIZE(marvell_hw_stats);
1908 	else
1909 		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1910 }
1911 
1912 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1913 {
1914 	int count = marvell_get_sset_count(phydev);
1915 	int i;
1916 
1917 	for (i = 0; i < count; i++) {
1918 		strlcpy(data + i * ETH_GSTRING_LEN,
1919 			marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1920 	}
1921 }
1922 
1923 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1924 {
1925 	struct marvell_hw_stat stat = marvell_hw_stats[i];
1926 	struct marvell_priv *priv = phydev->priv;
1927 	int val;
1928 	u64 ret;
1929 
1930 	val = phy_read_paged(phydev, stat.page, stat.reg);
1931 	if (val < 0) {
1932 		ret = U64_MAX;
1933 	} else {
1934 		val = val & ((1 << stat.bits) - 1);
1935 		priv->stats[i] += val;
1936 		ret = priv->stats[i];
1937 	}
1938 
1939 	return ret;
1940 }
1941 
1942 static void marvell_get_stats(struct phy_device *phydev,
1943 			      struct ethtool_stats *stats, u64 *data)
1944 {
1945 	int count = marvell_get_sset_count(phydev);
1946 	int i;
1947 
1948 	for (i = 0; i < count; i++)
1949 		data[i] = marvell_get_stat(phydev, i);
1950 }
1951 
1952 static int m88e1510_loopback(struct phy_device *phydev, bool enable)
1953 {
1954 	int err;
1955 
1956 	if (enable) {
1957 		u16 bmcr_ctl = 0, mscr2_ctl = 0;
1958 
1959 		if (phydev->speed == SPEED_1000)
1960 			bmcr_ctl = BMCR_SPEED1000;
1961 		else if (phydev->speed == SPEED_100)
1962 			bmcr_ctl = BMCR_SPEED100;
1963 
1964 		if (phydev->duplex == DUPLEX_FULL)
1965 			bmcr_ctl |= BMCR_FULLDPLX;
1966 
1967 		err = phy_write(phydev, MII_BMCR, bmcr_ctl);
1968 		if (err < 0)
1969 			return err;
1970 
1971 		if (phydev->speed == SPEED_1000)
1972 			mscr2_ctl = BMCR_SPEED1000;
1973 		else if (phydev->speed == SPEED_100)
1974 			mscr2_ctl = BMCR_SPEED100;
1975 
1976 		err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
1977 				       MII_88E1510_MSCR_2, BMCR_SPEED1000 |
1978 				       BMCR_SPEED100, mscr2_ctl);
1979 		if (err < 0)
1980 			return err;
1981 
1982 		/* Need soft reset to have speed configuration takes effect */
1983 		err = genphy_soft_reset(phydev);
1984 		if (err < 0)
1985 			return err;
1986 
1987 		/* FIXME: Based on trial and error test, it seem 1G need to have
1988 		 * delay between soft reset and loopback enablement.
1989 		 */
1990 		if (phydev->speed == SPEED_1000)
1991 			msleep(1000);
1992 
1993 		return phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,
1994 				  BMCR_LOOPBACK);
1995 	} else {
1996 		err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);
1997 		if (err < 0)
1998 			return err;
1999 
2000 		return phy_config_aneg(phydev);
2001 	}
2002 }
2003 
2004 static int marvell_vct5_wait_complete(struct phy_device *phydev)
2005 {
2006 	int i;
2007 	int val;
2008 
2009 	for (i = 0; i < 32; i++) {
2010 		val = __phy_read(phydev, MII_VCT5_CTRL);
2011 		if (val < 0)
2012 			return val;
2013 
2014 		if (val & MII_VCT5_CTRL_COMPLETE)
2015 			return 0;
2016 	}
2017 
2018 	phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
2019 	return -ETIMEDOUT;
2020 }
2021 
2022 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
2023 {
2024 	int amplitude;
2025 	int val;
2026 	int reg;
2027 
2028 	reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
2029 	val = __phy_read(phydev, reg);
2030 
2031 	if (val < 0)
2032 		return 0;
2033 
2034 	amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
2035 		MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
2036 
2037 	if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
2038 		amplitude = -amplitude;
2039 
2040 	return 1000 * amplitude / 128;
2041 }
2042 
2043 static u32 marvell_vct5_distance2cm(int distance)
2044 {
2045 	return distance * 805 / 10;
2046 }
2047 
2048 static u32 marvell_vct5_cm2distance(int cm)
2049 {
2050 	return cm * 10 / 805;
2051 }
2052 
2053 static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
2054 					   int distance, int pair)
2055 {
2056 	u16 reg;
2057 	int err;
2058 	int mV;
2059 	int i;
2060 
2061 	err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
2062 			  distance);
2063 	if (err)
2064 		return err;
2065 
2066 	reg = MII_VCT5_CTRL_ENABLE |
2067 		MII_VCT5_CTRL_TX_SAME_CHANNEL |
2068 		MII_VCT5_CTRL_SAMPLES_DEFAULT |
2069 		MII_VCT5_CTRL_SAMPLE_POINT |
2070 		MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
2071 	err = __phy_write(phydev, MII_VCT5_CTRL, reg);
2072 	if (err)
2073 		return err;
2074 
2075 	err = marvell_vct5_wait_complete(phydev);
2076 	if (err)
2077 		return err;
2078 
2079 	for (i = 0; i < 4; i++) {
2080 		if (pair != PHY_PAIR_ALL && i != pair)
2081 			continue;
2082 
2083 		mV = marvell_vct5_amplitude(phydev, i);
2084 		ethnl_cable_test_amplitude(phydev, i, mV);
2085 	}
2086 
2087 	return 0;
2088 }
2089 
2090 static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
2091 {
2092 	struct marvell_priv *priv = phydev->priv;
2093 	int distance;
2094 	u16 width;
2095 	int page;
2096 	int err;
2097 	u16 reg;
2098 
2099 	if (priv->first <= TDR_SHORT_CABLE_LENGTH)
2100 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
2101 	else
2102 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2103 
2104 	reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2105 		MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2106 		MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2107 
2108 	err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2109 			      MII_VCT5_TX_PULSE_CTRL, reg);
2110 	if (err)
2111 		return err;
2112 
2113 	/* Reading the TDR data is very MDIO heavy. We need to optimize
2114 	 * access to keep the time to a minimum. So lock the bus once,
2115 	 * and don't release it until complete. We can then avoid having
2116 	 * to change the page for every access, greatly speeding things
2117 	 * up.
2118 	 */
2119 	page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2120 	if (page < 0)
2121 		goto restore_page;
2122 
2123 	for (distance = priv->first;
2124 	     distance <= priv->last;
2125 	     distance += priv->step) {
2126 		err = marvell_vct5_amplitude_distance(phydev, distance,
2127 						      priv->pair);
2128 		if (err)
2129 			goto restore_page;
2130 
2131 		if (distance > TDR_SHORT_CABLE_LENGTH &&
2132 		    width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2133 			width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2134 			reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2135 				MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2136 				MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2137 			err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2138 			if (err)
2139 				goto restore_page;
2140 		}
2141 	}
2142 
2143 restore_page:
2144 	return phy_restore_page(phydev, page, err);
2145 }
2146 
2147 static int marvell_cable_test_start_common(struct phy_device *phydev)
2148 {
2149 	int bmcr, bmsr, ret;
2150 
2151 	/* If auto-negotiation is enabled, but not complete, the cable
2152 	 * test never completes. So disable auto-neg.
2153 	 */
2154 	bmcr = phy_read(phydev, MII_BMCR);
2155 	if (bmcr < 0)
2156 		return bmcr;
2157 
2158 	bmsr = phy_read(phydev, MII_BMSR);
2159 
2160 	if (bmsr < 0)
2161 		return bmsr;
2162 
2163 	if (bmcr & BMCR_ANENABLE) {
2164 		ret =  phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2165 		if (ret < 0)
2166 			return ret;
2167 		ret = genphy_soft_reset(phydev);
2168 		if (ret < 0)
2169 			return ret;
2170 	}
2171 
2172 	/* If the link is up, allow it some time to go down */
2173 	if (bmsr & BMSR_LSTATUS)
2174 		msleep(1500);
2175 
2176 	return 0;
2177 }
2178 
2179 static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2180 {
2181 	struct marvell_priv *priv = phydev->priv;
2182 	int ret;
2183 
2184 	ret = marvell_cable_test_start_common(phydev);
2185 	if (ret)
2186 		return ret;
2187 
2188 	priv->cable_test_tdr = false;
2189 
2190 	/* Reset the VCT5 API control to defaults, otherwise
2191 	 * VCT7 does not work correctly.
2192 	 */
2193 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2194 			      MII_VCT5_CTRL,
2195 			      MII_VCT5_CTRL_TX_SAME_CHANNEL |
2196 			      MII_VCT5_CTRL_SAMPLES_DEFAULT |
2197 			      MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2198 			      MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2199 	if (ret)
2200 		return ret;
2201 
2202 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2203 			      MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2204 	if (ret)
2205 		return ret;
2206 
2207 	return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2208 			       MII_VCT7_CTRL,
2209 			       MII_VCT7_CTRL_RUN_NOW |
2210 			       MII_VCT7_CTRL_CENTIMETERS);
2211 }
2212 
2213 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2214 					     const struct phy_tdr_config *cfg)
2215 {
2216 	struct marvell_priv *priv = phydev->priv;
2217 	int ret;
2218 
2219 	priv->cable_test_tdr = true;
2220 	priv->first = marvell_vct5_cm2distance(cfg->first);
2221 	priv->last = marvell_vct5_cm2distance(cfg->last);
2222 	priv->step = marvell_vct5_cm2distance(cfg->step);
2223 	priv->pair = cfg->pair;
2224 
2225 	if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2226 		return -EINVAL;
2227 
2228 	if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2229 		return -EINVAL;
2230 
2231 	/* Disable  VCT7 */
2232 	ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2233 			      MII_VCT7_CTRL, 0);
2234 	if (ret)
2235 		return ret;
2236 
2237 	ret = marvell_cable_test_start_common(phydev);
2238 	if (ret)
2239 		return ret;
2240 
2241 	ret = ethnl_cable_test_pulse(phydev, 1000);
2242 	if (ret)
2243 		return ret;
2244 
2245 	return ethnl_cable_test_step(phydev,
2246 				     marvell_vct5_distance2cm(priv->first),
2247 				     marvell_vct5_distance2cm(priv->last),
2248 				     marvell_vct5_distance2cm(priv->step));
2249 }
2250 
2251 static int marvell_vct7_distance_to_length(int distance, bool meter)
2252 {
2253 	if (meter)
2254 		distance *= 100;
2255 
2256 	return distance;
2257 }
2258 
2259 static bool marvell_vct7_distance_valid(int result)
2260 {
2261 	switch (result) {
2262 	case MII_VCT7_RESULTS_OPEN:
2263 	case MII_VCT7_RESULTS_SAME_SHORT:
2264 	case MII_VCT7_RESULTS_CROSS_SHORT:
2265 		return true;
2266 	}
2267 	return false;
2268 }
2269 
2270 static int marvell_vct7_report_length(struct phy_device *phydev,
2271 				      int pair, bool meter)
2272 {
2273 	int length;
2274 	int ret;
2275 
2276 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2277 			     MII_VCT7_PAIR_0_DISTANCE + pair);
2278 	if (ret < 0)
2279 		return ret;
2280 
2281 	length = marvell_vct7_distance_to_length(ret, meter);
2282 
2283 	ethnl_cable_test_fault_length(phydev, pair, length);
2284 
2285 	return 0;
2286 }
2287 
2288 static int marvell_vct7_cable_test_report_trans(int result)
2289 {
2290 	switch (result) {
2291 	case MII_VCT7_RESULTS_OK:
2292 		return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2293 	case MII_VCT7_RESULTS_OPEN:
2294 		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2295 	case MII_VCT7_RESULTS_SAME_SHORT:
2296 		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2297 	case MII_VCT7_RESULTS_CROSS_SHORT:
2298 		return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2299 	default:
2300 		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2301 	}
2302 }
2303 
2304 static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2305 {
2306 	int pair0, pair1, pair2, pair3;
2307 	bool meter;
2308 	int ret;
2309 
2310 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2311 			     MII_VCT7_RESULTS);
2312 	if (ret < 0)
2313 		return ret;
2314 
2315 	pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2316 		MII_VCT7_RESULTS_PAIR3_SHIFT;
2317 	pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2318 		MII_VCT7_RESULTS_PAIR2_SHIFT;
2319 	pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2320 		MII_VCT7_RESULTS_PAIR1_SHIFT;
2321 	pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2322 		MII_VCT7_RESULTS_PAIR0_SHIFT;
2323 
2324 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2325 				marvell_vct7_cable_test_report_trans(pair0));
2326 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2327 				marvell_vct7_cable_test_report_trans(pair1));
2328 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2329 				marvell_vct7_cable_test_report_trans(pair2));
2330 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2331 				marvell_vct7_cable_test_report_trans(pair3));
2332 
2333 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2334 	if (ret < 0)
2335 		return ret;
2336 
2337 	meter = ret & MII_VCT7_CTRL_METERS;
2338 
2339 	if (marvell_vct7_distance_valid(pair0))
2340 		marvell_vct7_report_length(phydev, 0, meter);
2341 	if (marvell_vct7_distance_valid(pair1))
2342 		marvell_vct7_report_length(phydev, 1, meter);
2343 	if (marvell_vct7_distance_valid(pair2))
2344 		marvell_vct7_report_length(phydev, 2, meter);
2345 	if (marvell_vct7_distance_valid(pair3))
2346 		marvell_vct7_report_length(phydev, 3, meter);
2347 
2348 	return 0;
2349 }
2350 
2351 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2352 					      bool *finished)
2353 {
2354 	struct marvell_priv *priv = phydev->priv;
2355 	int ret;
2356 
2357 	if (priv->cable_test_tdr) {
2358 		ret = marvell_vct5_amplitude_graph(phydev);
2359 		*finished = true;
2360 		return ret;
2361 	}
2362 
2363 	*finished = false;
2364 
2365 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2366 			     MII_VCT7_CTRL);
2367 
2368 	if (ret < 0)
2369 		return ret;
2370 
2371 	if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2372 		*finished = true;
2373 
2374 		return marvell_vct7_cable_test_report(phydev);
2375 	}
2376 
2377 	return 0;
2378 }
2379 
2380 #ifdef CONFIG_HWMON
2381 struct marvell_hwmon_ops {
2382 	int (*config)(struct phy_device *phydev);
2383 	int (*get_temp)(struct phy_device *phydev, long *temp);
2384 	int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2385 	int (*set_temp_critical)(struct phy_device *phydev, long temp);
2386 	int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2387 };
2388 
2389 static const struct marvell_hwmon_ops *
2390 to_marvell_hwmon_ops(const struct phy_device *phydev)
2391 {
2392 	return phydev->drv->driver_data;
2393 }
2394 
2395 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2396 {
2397 	int oldpage;
2398 	int ret = 0;
2399 	int val;
2400 
2401 	*temp = 0;
2402 
2403 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2404 	if (oldpage < 0)
2405 		goto error;
2406 
2407 	/* Enable temperature sensor */
2408 	ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2409 	if (ret < 0)
2410 		goto error;
2411 
2412 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2413 			  ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2414 	if (ret < 0)
2415 		goto error;
2416 
2417 	/* Wait for temperature to stabilize */
2418 	usleep_range(10000, 12000);
2419 
2420 	val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2421 	if (val < 0) {
2422 		ret = val;
2423 		goto error;
2424 	}
2425 
2426 	/* Disable temperature sensor */
2427 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2428 			  ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2429 	if (ret < 0)
2430 		goto error;
2431 
2432 	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2433 
2434 error:
2435 	return phy_restore_page(phydev, oldpage, ret);
2436 }
2437 
2438 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2439 {
2440 	int ret;
2441 
2442 	*temp = 0;
2443 
2444 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2445 			     MII_88E1510_TEMP_SENSOR);
2446 	if (ret < 0)
2447 		return ret;
2448 
2449 	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2450 
2451 	return 0;
2452 }
2453 
2454 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2455 {
2456 	int ret;
2457 
2458 	*temp = 0;
2459 
2460 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2461 			     MII_88E1121_MISC_TEST);
2462 	if (ret < 0)
2463 		return ret;
2464 
2465 	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2466 		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2467 	/* convert to mC */
2468 	*temp *= 1000;
2469 
2470 	return 0;
2471 }
2472 
2473 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2474 {
2475 	temp = temp / 1000;
2476 	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2477 
2478 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2479 				MII_88E1121_MISC_TEST,
2480 				MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2481 				temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2482 }
2483 
2484 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2485 {
2486 	int ret;
2487 
2488 	*alarm = false;
2489 
2490 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2491 			     MII_88E1121_MISC_TEST);
2492 	if (ret < 0)
2493 		return ret;
2494 
2495 	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2496 
2497 	return 0;
2498 }
2499 
2500 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2501 {
2502 	int sum = 0;
2503 	int oldpage;
2504 	int ret = 0;
2505 	int i;
2506 
2507 	*temp = 0;
2508 
2509 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2510 	if (oldpage < 0)
2511 		goto error;
2512 
2513 	/* Enable temperature sensor */
2514 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2515 	if (ret < 0)
2516 		goto error;
2517 
2518 	ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2519 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2520 
2521 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2522 	if (ret < 0)
2523 		goto error;
2524 
2525 	/* Wait for temperature to stabilize */
2526 	usleep_range(10000, 12000);
2527 
2528 	/* Reading the temperature sense has an errata. You need to read
2529 	 * a number of times and take an average.
2530 	 */
2531 	for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2532 		ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2533 		if (ret < 0)
2534 			goto error;
2535 		sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2536 	}
2537 
2538 	sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2539 	*temp = (sum  - 75) * 1000;
2540 
2541 	/* Disable temperature sensor */
2542 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2543 	if (ret < 0)
2544 		goto error;
2545 
2546 	ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2547 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2548 
2549 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2550 
2551 error:
2552 	phy_restore_page(phydev, oldpage, ret);
2553 
2554 	return ret;
2555 }
2556 
2557 static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2558 {
2559 	int err;
2560 
2561 	err = m88e1510_get_temp(phydev, temp);
2562 
2563 	/* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2564 	 * T + 75, so we have to subtract another 50
2565 	 */
2566 	*temp -= 50000;
2567 
2568 	return err;
2569 }
2570 
2571 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2572 {
2573 	int ret;
2574 
2575 	*temp = 0;
2576 
2577 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2578 			     MII_88E6390_TEMP_SENSOR);
2579 	if (ret < 0)
2580 		return ret;
2581 
2582 	*temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2583 		  MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2584 
2585 	return 0;
2586 }
2587 
2588 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2589 {
2590 	temp = (temp / 1000) + 75;
2591 
2592 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2593 				MII_88E6390_TEMP_SENSOR,
2594 				MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
2595 				temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
2596 }
2597 
2598 static int m88e6393_hwmon_config(struct phy_device *phydev)
2599 {
2600 	int err;
2601 
2602 	err = m88e6393_set_temp_critical(phydev, 100000);
2603 	if (err)
2604 		return err;
2605 
2606 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2607 				MII_88E6390_MISC_TEST,
2608 				MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
2609 				MII_88E6393_MISC_TEST_SAMPLES_MASK |
2610 				MII_88E6393_MISC_TEST_RATE_MASK,
2611 				MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
2612 				MII_88E6393_MISC_TEST_SAMPLES_2048 |
2613 				MII_88E6393_MISC_TEST_RATE_2_3MS);
2614 }
2615 
2616 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
2617 			      u32 attr, int channel, long *temp)
2618 {
2619 	struct phy_device *phydev = dev_get_drvdata(dev);
2620 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2621 	int err = -EOPNOTSUPP;
2622 
2623 	switch (attr) {
2624 	case hwmon_temp_input:
2625 		if (ops->get_temp)
2626 			err = ops->get_temp(phydev, temp);
2627 		break;
2628 	case hwmon_temp_crit:
2629 		if (ops->get_temp_critical)
2630 			err = ops->get_temp_critical(phydev, temp);
2631 		break;
2632 	case hwmon_temp_max_alarm:
2633 		if (ops->get_temp_alarm)
2634 			err = ops->get_temp_alarm(phydev, temp);
2635 		break;
2636 	}
2637 
2638 	return err;
2639 }
2640 
2641 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
2642 			       u32 attr, int channel, long temp)
2643 {
2644 	struct phy_device *phydev = dev_get_drvdata(dev);
2645 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2646 	int err = -EOPNOTSUPP;
2647 
2648 	switch (attr) {
2649 	case hwmon_temp_crit:
2650 		if (ops->set_temp_critical)
2651 			err = ops->set_temp_critical(phydev, temp);
2652 		break;
2653 	}
2654 
2655 	return err;
2656 }
2657 
2658 static umode_t marvell_hwmon_is_visible(const void *data,
2659 					enum hwmon_sensor_types type,
2660 					u32 attr, int channel)
2661 {
2662 	const struct phy_device *phydev = data;
2663 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2664 
2665 	if (type != hwmon_temp)
2666 		return 0;
2667 
2668 	switch (attr) {
2669 	case hwmon_temp_input:
2670 		return ops->get_temp ? 0444 : 0;
2671 	case hwmon_temp_max_alarm:
2672 		return ops->get_temp_alarm ? 0444 : 0;
2673 	case hwmon_temp_crit:
2674 		return (ops->get_temp_critical ? 0444 : 0) |
2675 		       (ops->set_temp_critical ? 0200 : 0);
2676 	default:
2677 		return 0;
2678 	}
2679 }
2680 
2681 static u32 marvell_hwmon_chip_config[] = {
2682 	HWMON_C_REGISTER_TZ,
2683 	0
2684 };
2685 
2686 static const struct hwmon_channel_info marvell_hwmon_chip = {
2687 	.type = hwmon_chip,
2688 	.config = marvell_hwmon_chip_config,
2689 };
2690 
2691 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
2692  * defined for all PHYs, because the hwmon code checks whether the attributes
2693  * exists via the .is_visible method
2694  */
2695 static u32 marvell_hwmon_temp_config[] = {
2696 	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2697 	0
2698 };
2699 
2700 static const struct hwmon_channel_info marvell_hwmon_temp = {
2701 	.type = hwmon_temp,
2702 	.config = marvell_hwmon_temp_config,
2703 };
2704 
2705 static const struct hwmon_channel_info *marvell_hwmon_info[] = {
2706 	&marvell_hwmon_chip,
2707 	&marvell_hwmon_temp,
2708 	NULL
2709 };
2710 
2711 static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
2712 	.is_visible = marvell_hwmon_is_visible,
2713 	.read = marvell_hwmon_read,
2714 	.write = marvell_hwmon_write,
2715 };
2716 
2717 static const struct hwmon_chip_info marvell_hwmon_chip_info = {
2718 	.ops = &marvell_hwmon_hwmon_ops,
2719 	.info = marvell_hwmon_info,
2720 };
2721 
2722 static int marvell_hwmon_name(struct phy_device *phydev)
2723 {
2724 	struct marvell_priv *priv = phydev->priv;
2725 	struct device *dev = &phydev->mdio.dev;
2726 	const char *devname = dev_name(dev);
2727 	size_t len = strlen(devname);
2728 	int i, j;
2729 
2730 	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2731 	if (!priv->hwmon_name)
2732 		return -ENOMEM;
2733 
2734 	for (i = j = 0; i < len && devname[i]; i++) {
2735 		if (isalnum(devname[i]))
2736 			priv->hwmon_name[j++] = devname[i];
2737 	}
2738 
2739 	return 0;
2740 }
2741 
2742 static int marvell_hwmon_probe(struct phy_device *phydev)
2743 {
2744 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2745 	struct marvell_priv *priv = phydev->priv;
2746 	struct device *dev = &phydev->mdio.dev;
2747 	int err;
2748 
2749 	if (!ops)
2750 		return 0;
2751 
2752 	err = marvell_hwmon_name(phydev);
2753 	if (err)
2754 		return err;
2755 
2756 	priv->hwmon_dev = devm_hwmon_device_register_with_info(
2757 		dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
2758 	if (IS_ERR(priv->hwmon_dev))
2759 		return PTR_ERR(priv->hwmon_dev);
2760 
2761 	if (ops->config)
2762 		err = ops->config(phydev);
2763 
2764 	return err;
2765 }
2766 
2767 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
2768 	.get_temp = m88e1121_get_temp,
2769 };
2770 
2771 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
2772 	.get_temp = m88e1510_get_temp,
2773 	.get_temp_critical = m88e1510_get_temp_critical,
2774 	.set_temp_critical = m88e1510_set_temp_critical,
2775 	.get_temp_alarm = m88e1510_get_temp_alarm,
2776 };
2777 
2778 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
2779 	.get_temp = m88e6390_get_temp,
2780 };
2781 
2782 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
2783 	.config = m88e6393_hwmon_config,
2784 	.get_temp = m88e6393_get_temp,
2785 	.get_temp_critical = m88e6393_get_temp_critical,
2786 	.set_temp_critical = m88e6393_set_temp_critical,
2787 	.get_temp_alarm = m88e1510_get_temp_alarm,
2788 };
2789 
2790 #define DEF_MARVELL_HWMON_OPS(s) (&(s))
2791 
2792 #else
2793 
2794 #define DEF_MARVELL_HWMON_OPS(s) NULL
2795 
2796 static int marvell_hwmon_probe(struct phy_device *phydev)
2797 {
2798 	return 0;
2799 }
2800 #endif
2801 
2802 static int marvell_probe(struct phy_device *phydev)
2803 {
2804 	struct marvell_priv *priv;
2805 
2806 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2807 	if (!priv)
2808 		return -ENOMEM;
2809 
2810 	phydev->priv = priv;
2811 
2812 	return marvell_hwmon_probe(phydev);
2813 }
2814 
2815 static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
2816 {
2817 	struct phy_device *phydev = upstream;
2818 	phy_interface_t interface;
2819 	struct device *dev;
2820 	int oldpage;
2821 	int ret = 0;
2822 	u16 mode;
2823 
2824 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
2825 
2826 	dev = &phydev->mdio.dev;
2827 
2828 	sfp_parse_support(phydev->sfp_bus, id, supported);
2829 	interface = sfp_select_interface(phydev->sfp_bus, supported);
2830 
2831 	dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
2832 
2833 	switch (interface) {
2834 	case PHY_INTERFACE_MODE_1000BASEX:
2835 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
2836 
2837 		break;
2838 	case PHY_INTERFACE_MODE_100BASEX:
2839 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
2840 
2841 		break;
2842 	case PHY_INTERFACE_MODE_SGMII:
2843 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
2844 
2845 		break;
2846 	default:
2847 		dev_err(dev, "Incompatible SFP module inserted\n");
2848 
2849 		return -EINVAL;
2850 	}
2851 
2852 	oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
2853 	if (oldpage < 0)
2854 		goto error;
2855 
2856 	ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
2857 			   MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
2858 	if (ret < 0)
2859 		goto error;
2860 
2861 	ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
2862 			     MII_88E1510_GEN_CTRL_REG_1_RESET);
2863 
2864 error:
2865 	return phy_restore_page(phydev, oldpage, ret);
2866 }
2867 
2868 static void m88e1510_sfp_remove(void *upstream)
2869 {
2870 	struct phy_device *phydev = upstream;
2871 	int oldpage;
2872 	int ret = 0;
2873 
2874 	oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
2875 	if (oldpage < 0)
2876 		goto error;
2877 
2878 	ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
2879 			   MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
2880 			   MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
2881 	if (ret < 0)
2882 		goto error;
2883 
2884 	ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
2885 			     MII_88E1510_GEN_CTRL_REG_1_RESET);
2886 
2887 error:
2888 	phy_restore_page(phydev, oldpage, ret);
2889 }
2890 
2891 static const struct sfp_upstream_ops m88e1510_sfp_ops = {
2892 	.module_insert = m88e1510_sfp_insert,
2893 	.module_remove = m88e1510_sfp_remove,
2894 	.attach = phy_sfp_attach,
2895 	.detach = phy_sfp_detach,
2896 };
2897 
2898 static int m88e1510_probe(struct phy_device *phydev)
2899 {
2900 	int err;
2901 
2902 	err = marvell_probe(phydev);
2903 	if (err)
2904 		return err;
2905 
2906 	return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
2907 }
2908 
2909 static struct phy_driver marvell_drivers[] = {
2910 	{
2911 		.phy_id = MARVELL_PHY_ID_88E1101,
2912 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2913 		.name = "Marvell 88E1101",
2914 		/* PHY_GBIT_FEATURES */
2915 		.probe = marvell_probe,
2916 		.config_init = marvell_config_init,
2917 		.config_aneg = m88e1101_config_aneg,
2918 		.config_intr = marvell_config_intr,
2919 		.handle_interrupt = marvell_handle_interrupt,
2920 		.resume = genphy_resume,
2921 		.suspend = genphy_suspend,
2922 		.read_page = marvell_read_page,
2923 		.write_page = marvell_write_page,
2924 		.get_sset_count = marvell_get_sset_count,
2925 		.get_strings = marvell_get_strings,
2926 		.get_stats = marvell_get_stats,
2927 	},
2928 	{
2929 		.phy_id = MARVELL_PHY_ID_88E1112,
2930 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2931 		.name = "Marvell 88E1112",
2932 		/* PHY_GBIT_FEATURES */
2933 		.probe = marvell_probe,
2934 		.config_init = m88e1112_config_init,
2935 		.config_aneg = marvell_config_aneg,
2936 		.config_intr = marvell_config_intr,
2937 		.handle_interrupt = marvell_handle_interrupt,
2938 		.resume = genphy_resume,
2939 		.suspend = genphy_suspend,
2940 		.read_page = marvell_read_page,
2941 		.write_page = marvell_write_page,
2942 		.get_sset_count = marvell_get_sset_count,
2943 		.get_strings = marvell_get_strings,
2944 		.get_stats = marvell_get_stats,
2945 		.get_tunable = m88e1011_get_tunable,
2946 		.set_tunable = m88e1011_set_tunable,
2947 	},
2948 	{
2949 		.phy_id = MARVELL_PHY_ID_88E1111,
2950 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2951 		.name = "Marvell 88E1111",
2952 		/* PHY_GBIT_FEATURES */
2953 		.probe = marvell_probe,
2954 		.config_init = m88e1111gbe_config_init,
2955 		.config_aneg = m88e1111_config_aneg,
2956 		.read_status = marvell_read_status,
2957 		.config_intr = marvell_config_intr,
2958 		.handle_interrupt = marvell_handle_interrupt,
2959 		.resume = genphy_resume,
2960 		.suspend = genphy_suspend,
2961 		.read_page = marvell_read_page,
2962 		.write_page = marvell_write_page,
2963 		.get_sset_count = marvell_get_sset_count,
2964 		.get_strings = marvell_get_strings,
2965 		.get_stats = marvell_get_stats,
2966 		.get_tunable = m88e1111_get_tunable,
2967 		.set_tunable = m88e1111_set_tunable,
2968 	},
2969 	{
2970 		.phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
2971 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2972 		.name = "Marvell 88E1111 (Finisar)",
2973 		/* PHY_GBIT_FEATURES */
2974 		.probe = marvell_probe,
2975 		.config_init = m88e1111gbe_config_init,
2976 		.config_aneg = m88e1111_config_aneg,
2977 		.read_status = marvell_read_status,
2978 		.config_intr = marvell_config_intr,
2979 		.handle_interrupt = marvell_handle_interrupt,
2980 		.resume = genphy_resume,
2981 		.suspend = genphy_suspend,
2982 		.read_page = marvell_read_page,
2983 		.write_page = marvell_write_page,
2984 		.get_sset_count = marvell_get_sset_count,
2985 		.get_strings = marvell_get_strings,
2986 		.get_stats = marvell_get_stats,
2987 		.get_tunable = m88e1111_get_tunable,
2988 		.set_tunable = m88e1111_set_tunable,
2989 	},
2990 	{
2991 		.phy_id = MARVELL_PHY_ID_88E1118,
2992 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2993 		.name = "Marvell 88E1118",
2994 		/* PHY_GBIT_FEATURES */
2995 		.probe = marvell_probe,
2996 		.config_init = m88e1118_config_init,
2997 		.config_aneg = m88e1118_config_aneg,
2998 		.config_intr = marvell_config_intr,
2999 		.handle_interrupt = marvell_handle_interrupt,
3000 		.resume = genphy_resume,
3001 		.suspend = genphy_suspend,
3002 		.read_page = marvell_read_page,
3003 		.write_page = marvell_write_page,
3004 		.get_sset_count = marvell_get_sset_count,
3005 		.get_strings = marvell_get_strings,
3006 		.get_stats = marvell_get_stats,
3007 	},
3008 	{
3009 		.phy_id = MARVELL_PHY_ID_88E1121R,
3010 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3011 		.name = "Marvell 88E1121R",
3012 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
3013 		/* PHY_GBIT_FEATURES */
3014 		.probe = marvell_probe,
3015 		.config_init = marvell_1011gbe_config_init,
3016 		.config_aneg = m88e1121_config_aneg,
3017 		.read_status = marvell_read_status,
3018 		.config_intr = marvell_config_intr,
3019 		.handle_interrupt = marvell_handle_interrupt,
3020 		.resume = genphy_resume,
3021 		.suspend = genphy_suspend,
3022 		.read_page = marvell_read_page,
3023 		.write_page = marvell_write_page,
3024 		.get_sset_count = marvell_get_sset_count,
3025 		.get_strings = marvell_get_strings,
3026 		.get_stats = marvell_get_stats,
3027 		.get_tunable = m88e1011_get_tunable,
3028 		.set_tunable = m88e1011_set_tunable,
3029 	},
3030 	{
3031 		.phy_id = MARVELL_PHY_ID_88E1318S,
3032 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3033 		.name = "Marvell 88E1318S",
3034 		/* PHY_GBIT_FEATURES */
3035 		.probe = marvell_probe,
3036 		.config_init = m88e1318_config_init,
3037 		.config_aneg = m88e1318_config_aneg,
3038 		.read_status = marvell_read_status,
3039 		.config_intr = marvell_config_intr,
3040 		.handle_interrupt = marvell_handle_interrupt,
3041 		.get_wol = m88e1318_get_wol,
3042 		.set_wol = m88e1318_set_wol,
3043 		.resume = genphy_resume,
3044 		.suspend = genphy_suspend,
3045 		.read_page = marvell_read_page,
3046 		.write_page = marvell_write_page,
3047 		.get_sset_count = marvell_get_sset_count,
3048 		.get_strings = marvell_get_strings,
3049 		.get_stats = marvell_get_stats,
3050 	},
3051 	{
3052 		.phy_id = MARVELL_PHY_ID_88E1145,
3053 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3054 		.name = "Marvell 88E1145",
3055 		/* PHY_GBIT_FEATURES */
3056 		.probe = marvell_probe,
3057 		.config_init = m88e1145_config_init,
3058 		.config_aneg = m88e1101_config_aneg,
3059 		.config_intr = marvell_config_intr,
3060 		.handle_interrupt = marvell_handle_interrupt,
3061 		.resume = genphy_resume,
3062 		.suspend = genphy_suspend,
3063 		.read_page = marvell_read_page,
3064 		.write_page = marvell_write_page,
3065 		.get_sset_count = marvell_get_sset_count,
3066 		.get_strings = marvell_get_strings,
3067 		.get_stats = marvell_get_stats,
3068 		.get_tunable = m88e1111_get_tunable,
3069 		.set_tunable = m88e1111_set_tunable,
3070 	},
3071 	{
3072 		.phy_id = MARVELL_PHY_ID_88E1149R,
3073 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3074 		.name = "Marvell 88E1149R",
3075 		/* PHY_GBIT_FEATURES */
3076 		.probe = marvell_probe,
3077 		.config_init = m88e1149_config_init,
3078 		.config_aneg = m88e1118_config_aneg,
3079 		.config_intr = marvell_config_intr,
3080 		.handle_interrupt = marvell_handle_interrupt,
3081 		.resume = genphy_resume,
3082 		.suspend = genphy_suspend,
3083 		.read_page = marvell_read_page,
3084 		.write_page = marvell_write_page,
3085 		.get_sset_count = marvell_get_sset_count,
3086 		.get_strings = marvell_get_strings,
3087 		.get_stats = marvell_get_stats,
3088 	},
3089 	{
3090 		.phy_id = MARVELL_PHY_ID_88E1240,
3091 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3092 		.name = "Marvell 88E1240",
3093 		/* PHY_GBIT_FEATURES */
3094 		.probe = marvell_probe,
3095 		.config_init = m88e1112_config_init,
3096 		.config_aneg = marvell_config_aneg,
3097 		.config_intr = marvell_config_intr,
3098 		.handle_interrupt = marvell_handle_interrupt,
3099 		.resume = genphy_resume,
3100 		.suspend = genphy_suspend,
3101 		.read_page = marvell_read_page,
3102 		.write_page = marvell_write_page,
3103 		.get_sset_count = marvell_get_sset_count,
3104 		.get_strings = marvell_get_strings,
3105 		.get_stats = marvell_get_stats,
3106 		.get_tunable = m88e1011_get_tunable,
3107 		.set_tunable = m88e1011_set_tunable,
3108 	},
3109 	{
3110 		.phy_id = MARVELL_PHY_ID_88E1116R,
3111 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3112 		.name = "Marvell 88E1116R",
3113 		/* PHY_GBIT_FEATURES */
3114 		.probe = marvell_probe,
3115 		.config_init = m88e1116r_config_init,
3116 		.config_intr = marvell_config_intr,
3117 		.handle_interrupt = marvell_handle_interrupt,
3118 		.resume = genphy_resume,
3119 		.suspend = genphy_suspend,
3120 		.read_page = marvell_read_page,
3121 		.write_page = marvell_write_page,
3122 		.get_sset_count = marvell_get_sset_count,
3123 		.get_strings = marvell_get_strings,
3124 		.get_stats = marvell_get_stats,
3125 		.get_tunable = m88e1011_get_tunable,
3126 		.set_tunable = m88e1011_set_tunable,
3127 	},
3128 	{
3129 		.phy_id = MARVELL_PHY_ID_88E1510,
3130 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3131 		.name = "Marvell 88E1510",
3132 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3133 		.features = PHY_GBIT_FIBRE_FEATURES,
3134 		.flags = PHY_POLL_CABLE_TEST,
3135 		.probe = m88e1510_probe,
3136 		.config_init = m88e1510_config_init,
3137 		.config_aneg = m88e1510_config_aneg,
3138 		.read_status = marvell_read_status,
3139 		.config_intr = marvell_config_intr,
3140 		.handle_interrupt = marvell_handle_interrupt,
3141 		.get_wol = m88e1318_get_wol,
3142 		.set_wol = m88e1318_set_wol,
3143 		.resume = marvell_resume,
3144 		.suspend = marvell_suspend,
3145 		.read_page = marvell_read_page,
3146 		.write_page = marvell_write_page,
3147 		.get_sset_count = marvell_get_sset_count,
3148 		.get_strings = marvell_get_strings,
3149 		.get_stats = marvell_get_stats,
3150 		.set_loopback = m88e1510_loopback,
3151 		.get_tunable = m88e1011_get_tunable,
3152 		.set_tunable = m88e1011_set_tunable,
3153 		.cable_test_start = marvell_vct7_cable_test_start,
3154 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3155 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3156 	},
3157 	{
3158 		.phy_id = MARVELL_PHY_ID_88E1540,
3159 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3160 		.name = "Marvell 88E1540",
3161 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3162 		/* PHY_GBIT_FEATURES */
3163 		.flags = PHY_POLL_CABLE_TEST,
3164 		.probe = marvell_probe,
3165 		.config_init = marvell_1011gbe_config_init,
3166 		.config_aneg = m88e1510_config_aneg,
3167 		.read_status = marvell_read_status,
3168 		.config_intr = marvell_config_intr,
3169 		.handle_interrupt = marvell_handle_interrupt,
3170 		.resume = genphy_resume,
3171 		.suspend = genphy_suspend,
3172 		.read_page = marvell_read_page,
3173 		.write_page = marvell_write_page,
3174 		.get_sset_count = marvell_get_sset_count,
3175 		.get_strings = marvell_get_strings,
3176 		.get_stats = marvell_get_stats,
3177 		.get_tunable = m88e1540_get_tunable,
3178 		.set_tunable = m88e1540_set_tunable,
3179 		.cable_test_start = marvell_vct7_cable_test_start,
3180 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3181 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3182 	},
3183 	{
3184 		.phy_id = MARVELL_PHY_ID_88E1545,
3185 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3186 		.name = "Marvell 88E1545",
3187 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3188 		.probe = marvell_probe,
3189 		/* PHY_GBIT_FEATURES */
3190 		.flags = PHY_POLL_CABLE_TEST,
3191 		.config_init = marvell_1011gbe_config_init,
3192 		.config_aneg = m88e1510_config_aneg,
3193 		.read_status = marvell_read_status,
3194 		.config_intr = marvell_config_intr,
3195 		.handle_interrupt = marvell_handle_interrupt,
3196 		.resume = genphy_resume,
3197 		.suspend = genphy_suspend,
3198 		.read_page = marvell_read_page,
3199 		.write_page = marvell_write_page,
3200 		.get_sset_count = marvell_get_sset_count,
3201 		.get_strings = marvell_get_strings,
3202 		.get_stats = marvell_get_stats,
3203 		.get_tunable = m88e1540_get_tunable,
3204 		.set_tunable = m88e1540_set_tunable,
3205 		.cable_test_start = marvell_vct7_cable_test_start,
3206 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3207 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3208 	},
3209 	{
3210 		.phy_id = MARVELL_PHY_ID_88E3016,
3211 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3212 		.name = "Marvell 88E3016",
3213 		/* PHY_BASIC_FEATURES */
3214 		.probe = marvell_probe,
3215 		.config_init = m88e3016_config_init,
3216 		.aneg_done = marvell_aneg_done,
3217 		.read_status = marvell_read_status,
3218 		.config_intr = marvell_config_intr,
3219 		.handle_interrupt = marvell_handle_interrupt,
3220 		.resume = genphy_resume,
3221 		.suspend = genphy_suspend,
3222 		.read_page = marvell_read_page,
3223 		.write_page = marvell_write_page,
3224 		.get_sset_count = marvell_get_sset_count,
3225 		.get_strings = marvell_get_strings,
3226 		.get_stats = marvell_get_stats,
3227 	},
3228 	{
3229 		.phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
3230 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3231 		.name = "Marvell 88E6341 Family",
3232 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3233 		/* PHY_GBIT_FEATURES */
3234 		.flags = PHY_POLL_CABLE_TEST,
3235 		.probe = marvell_probe,
3236 		.config_init = marvell_1011gbe_config_init,
3237 		.config_aneg = m88e6390_config_aneg,
3238 		.read_status = marvell_read_status,
3239 		.config_intr = marvell_config_intr,
3240 		.handle_interrupt = marvell_handle_interrupt,
3241 		.resume = genphy_resume,
3242 		.suspend = genphy_suspend,
3243 		.read_page = marvell_read_page,
3244 		.write_page = marvell_write_page,
3245 		.get_sset_count = marvell_get_sset_count,
3246 		.get_strings = marvell_get_strings,
3247 		.get_stats = marvell_get_stats,
3248 		.get_tunable = m88e1540_get_tunable,
3249 		.set_tunable = m88e1540_set_tunable,
3250 		.cable_test_start = marvell_vct7_cable_test_start,
3251 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3252 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3253 	},
3254 	{
3255 		.phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
3256 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3257 		.name = "Marvell 88E6390 Family",
3258 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
3259 		/* PHY_GBIT_FEATURES */
3260 		.flags = PHY_POLL_CABLE_TEST,
3261 		.probe = marvell_probe,
3262 		.config_init = marvell_1011gbe_config_init,
3263 		.config_aneg = m88e6390_config_aneg,
3264 		.read_status = marvell_read_status,
3265 		.config_intr = marvell_config_intr,
3266 		.handle_interrupt = marvell_handle_interrupt,
3267 		.resume = genphy_resume,
3268 		.suspend = genphy_suspend,
3269 		.read_page = marvell_read_page,
3270 		.write_page = marvell_write_page,
3271 		.get_sset_count = marvell_get_sset_count,
3272 		.get_strings = marvell_get_strings,
3273 		.get_stats = marvell_get_stats,
3274 		.get_tunable = m88e1540_get_tunable,
3275 		.set_tunable = m88e1540_set_tunable,
3276 		.cable_test_start = marvell_vct7_cable_test_start,
3277 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3278 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3279 	},
3280 	{
3281 		.phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
3282 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3283 		.name = "Marvell 88E6393 Family",
3284 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
3285 		/* PHY_GBIT_FEATURES */
3286 		.flags = PHY_POLL_CABLE_TEST,
3287 		.probe = marvell_probe,
3288 		.config_init = marvell_1011gbe_config_init,
3289 		.config_aneg = m88e1510_config_aneg,
3290 		.read_status = marvell_read_status,
3291 		.config_intr = marvell_config_intr,
3292 		.handle_interrupt = marvell_handle_interrupt,
3293 		.resume = genphy_resume,
3294 		.suspend = genphy_suspend,
3295 		.read_page = marvell_read_page,
3296 		.write_page = marvell_write_page,
3297 		.get_sset_count = marvell_get_sset_count,
3298 		.get_strings = marvell_get_strings,
3299 		.get_stats = marvell_get_stats,
3300 		.get_tunable = m88e1540_get_tunable,
3301 		.set_tunable = m88e1540_set_tunable,
3302 		.cable_test_start = marvell_vct7_cable_test_start,
3303 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3304 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3305 	},
3306 	{
3307 		.phy_id = MARVELL_PHY_ID_88E1340S,
3308 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3309 		.name = "Marvell 88E1340S",
3310 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3311 		.probe = marvell_probe,
3312 		/* PHY_GBIT_FEATURES */
3313 		.config_init = marvell_1011gbe_config_init,
3314 		.config_aneg = m88e1510_config_aneg,
3315 		.read_status = marvell_read_status,
3316 		.config_intr = marvell_config_intr,
3317 		.handle_interrupt = marvell_handle_interrupt,
3318 		.resume = genphy_resume,
3319 		.suspend = genphy_suspend,
3320 		.read_page = marvell_read_page,
3321 		.write_page = marvell_write_page,
3322 		.get_sset_count = marvell_get_sset_count,
3323 		.get_strings = marvell_get_strings,
3324 		.get_stats = marvell_get_stats,
3325 		.get_tunable = m88e1540_get_tunable,
3326 		.set_tunable = m88e1540_set_tunable,
3327 	},
3328 	{
3329 		.phy_id = MARVELL_PHY_ID_88E1548P,
3330 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3331 		.name = "Marvell 88E1548P",
3332 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3333 		.probe = marvell_probe,
3334 		.features = PHY_GBIT_FIBRE_FEATURES,
3335 		.config_init = marvell_1011gbe_config_init,
3336 		.config_aneg = m88e1510_config_aneg,
3337 		.read_status = marvell_read_status,
3338 		.config_intr = marvell_config_intr,
3339 		.handle_interrupt = marvell_handle_interrupt,
3340 		.resume = genphy_resume,
3341 		.suspend = genphy_suspend,
3342 		.read_page = marvell_read_page,
3343 		.write_page = marvell_write_page,
3344 		.get_sset_count = marvell_get_sset_count,
3345 		.get_strings = marvell_get_strings,
3346 		.get_stats = marvell_get_stats,
3347 		.get_tunable = m88e1540_get_tunable,
3348 		.set_tunable = m88e1540_set_tunable,
3349 	},
3350 };
3351 
3352 module_phy_driver(marvell_drivers);
3353 
3354 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
3355 	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
3356 	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
3357 	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
3358 	{ MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
3359 	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
3360 	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3361 	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3362 	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3363 	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3364 	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3365 	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3366 	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3367 	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3368 	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3369 	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3370 	{ MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
3371 	{ MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
3372 	{ MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
3373 	{ MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3374 	{ MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3375 	{ }
3376 };
3377 
3378 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
3379