1 /* 2 * drivers/net/phy/marvell.c 3 * 4 * Driver for Marvell PHYs 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 * 10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the 14 * Free Software Foundation; either version 2 of the License, or (at your 15 * option) any later version. 16 * 17 */ 18 #include <linux/kernel.h> 19 #include <linux/string.h> 20 #include <linux/ctype.h> 21 #include <linux/errno.h> 22 #include <linux/unistd.h> 23 #include <linux/hwmon.h> 24 #include <linux/interrupt.h> 25 #include <linux/init.h> 26 #include <linux/delay.h> 27 #include <linux/netdevice.h> 28 #include <linux/etherdevice.h> 29 #include <linux/skbuff.h> 30 #include <linux/spinlock.h> 31 #include <linux/mm.h> 32 #include <linux/module.h> 33 #include <linux/mii.h> 34 #include <linux/ethtool.h> 35 #include <linux/phy.h> 36 #include <linux/marvell_phy.h> 37 #include <linux/of.h> 38 39 #include <linux/io.h> 40 #include <asm/irq.h> 41 #include <linux/uaccess.h> 42 43 #define MII_MARVELL_PHY_PAGE 22 44 #define MII_MARVELL_COPPER_PAGE 0x00 45 #define MII_MARVELL_FIBER_PAGE 0x01 46 #define MII_MARVELL_MSCR_PAGE 0x02 47 #define MII_MARVELL_LED_PAGE 0x03 48 #define MII_MARVELL_MISC_TEST_PAGE 0x06 49 #define MII_MARVELL_WOL_PAGE 0x11 50 51 #define MII_M1011_IEVENT 0x13 52 #define MII_M1011_IEVENT_CLEAR 0x0000 53 54 #define MII_M1011_IMASK 0x12 55 #define MII_M1011_IMASK_INIT 0x6400 56 #define MII_M1011_IMASK_CLEAR 0x0000 57 58 #define MII_M1011_PHY_SCR 0x10 59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12 61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800 62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 65 66 #define MII_M1111_PHY_LED_CONTROL 0x18 67 #define MII_M1111_PHY_LED_DIRECT 0x4100 68 #define MII_M1111_PHY_LED_COMBINE 0x411c 69 #define MII_M1111_PHY_EXT_CR 0x14 70 #define MII_M1111_RGMII_RX_DELAY BIT(7) 71 #define MII_M1111_RGMII_TX_DELAY BIT(1) 72 #define MII_M1111_PHY_EXT_SR 0x1b 73 74 #define MII_M1111_HWCFG_MODE_MASK 0xf 75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 77 #define MII_M1111_HWCFG_MODE_RTBI 0x7 78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 82 83 #define MII_88E1121_PHY_MSCR_REG 21 84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 87 88 #define MII_88E1121_MISC_TEST 0x1a 89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 95 96 #define MII_88E1510_TEMP_SENSOR 0x1b 97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 98 99 #define MII_88E6390_MISC_TEST 0x1b 100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 105 106 #define MII_88E6390_TEMP_SENSOR 0x1c 107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 109 110 #define MII_88E1318S_PHY_MSCR1_REG 16 111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 112 113 /* Copper Specific Interrupt Enable Register */ 114 #define MII_88E1318S_PHY_CSIER 0x12 115 /* WOL Event Interrupt Enable */ 116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 117 118 /* LED Timer Control Register */ 119 #define MII_88E1318S_PHY_LED_TCR 0x12 120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 123 124 /* Magic Packet MAC address registers */ 125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 128 129 #define MII_88E1318S_PHY_WOL_CTRL 0x10 130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 132 133 #define MII_PHY_LED_CTRL 16 134 #define MII_88E1121_PHY_LED_DEF 0x0030 135 #define MII_88E1510_PHY_LED_DEF 0x1177 136 137 #define MII_M1011_PHY_STATUS 0x11 138 #define MII_M1011_PHY_STATUS_1000 0x8000 139 #define MII_M1011_PHY_STATUS_100 0x4000 140 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 141 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 142 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 143 #define MII_M1011_PHY_STATUS_LINK 0x0400 144 145 #define MII_88E3016_PHY_SPEC_CTRL 0x10 146 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 147 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 148 149 #define MII_88E1510_GEN_CTRL_REG_1 0x14 150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 152 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 153 154 #define LPA_FIBER_1000HALF 0x40 155 #define LPA_FIBER_1000FULL 0x20 156 157 #define LPA_PAUSE_FIBER 0x180 158 #define LPA_PAUSE_ASYM_FIBER 0x100 159 160 #define ADVERTISE_FIBER_1000HALF 0x40 161 #define ADVERTISE_FIBER_1000FULL 0x20 162 163 #define ADVERTISE_PAUSE_FIBER 0x180 164 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 165 166 #define REGISTER_LINK_STATUS 0x400 167 #define NB_FIBER_STATS 1 168 169 MODULE_DESCRIPTION("Marvell PHY driver"); 170 MODULE_AUTHOR("Andy Fleming"); 171 MODULE_LICENSE("GPL"); 172 173 struct marvell_hw_stat { 174 const char *string; 175 u8 page; 176 u8 reg; 177 u8 bits; 178 }; 179 180 static struct marvell_hw_stat marvell_hw_stats[] = { 181 { "phy_receive_errors_copper", 0, 21, 16}, 182 { "phy_idle_errors", 0, 10, 8 }, 183 { "phy_receive_errors_fiber", 1, 21, 16}, 184 }; 185 186 struct marvell_priv { 187 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 188 char *hwmon_name; 189 struct device *hwmon_dev; 190 }; 191 192 static int marvell_read_page(struct phy_device *phydev) 193 { 194 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 195 } 196 197 static int marvell_write_page(struct phy_device *phydev, int page) 198 { 199 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 200 } 201 202 static int marvell_set_page(struct phy_device *phydev, int page) 203 { 204 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 205 } 206 207 static int marvell_ack_interrupt(struct phy_device *phydev) 208 { 209 int err; 210 211 /* Clear the interrupts by reading the reg */ 212 err = phy_read(phydev, MII_M1011_IEVENT); 213 214 if (err < 0) 215 return err; 216 217 return 0; 218 } 219 220 static int marvell_config_intr(struct phy_device *phydev) 221 { 222 int err; 223 224 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 225 err = phy_write(phydev, MII_M1011_IMASK, 226 MII_M1011_IMASK_INIT); 227 else 228 err = phy_write(phydev, MII_M1011_IMASK, 229 MII_M1011_IMASK_CLEAR); 230 231 return err; 232 } 233 234 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 235 { 236 int reg; 237 int err; 238 int val; 239 240 /* get the current settings */ 241 reg = phy_read(phydev, MII_M1011_PHY_SCR); 242 if (reg < 0) 243 return reg; 244 245 val = reg; 246 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 247 switch (polarity) { 248 case ETH_TP_MDI: 249 val |= MII_M1011_PHY_SCR_MDI; 250 break; 251 case ETH_TP_MDI_X: 252 val |= MII_M1011_PHY_SCR_MDI_X; 253 break; 254 case ETH_TP_MDI_AUTO: 255 case ETH_TP_MDI_INVALID: 256 default: 257 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 258 break; 259 } 260 261 if (val != reg) { 262 /* Set the new polarity value in the register */ 263 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 264 if (err) 265 return err; 266 } 267 268 return val != reg; 269 } 270 271 static int marvell_set_downshift(struct phy_device *phydev, bool enable, 272 u8 retries) 273 { 274 int reg; 275 276 reg = phy_read(phydev, MII_M1011_PHY_SCR); 277 if (reg < 0) 278 return reg; 279 280 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK; 281 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT); 282 if (enable) 283 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN; 284 285 return phy_write(phydev, MII_M1011_PHY_SCR, reg); 286 } 287 288 static int marvell_config_aneg(struct phy_device *phydev) 289 { 290 int changed = 0; 291 int err; 292 293 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 294 if (err < 0) 295 return err; 296 297 changed = err; 298 299 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 300 MII_M1111_PHY_LED_DIRECT); 301 if (err < 0) 302 return err; 303 304 err = genphy_config_aneg(phydev); 305 if (err < 0) 306 return err; 307 308 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 309 /* A write to speed/duplex bits (that is performed by 310 * genphy_config_aneg() call above) must be followed by 311 * a software reset. Otherwise, the write has no effect. 312 */ 313 err = genphy_soft_reset(phydev); 314 if (err < 0) 315 return err; 316 } 317 318 return 0; 319 } 320 321 static int m88e1101_config_aneg(struct phy_device *phydev) 322 { 323 int err; 324 325 /* This Marvell PHY has an errata which requires 326 * that certain registers get written in order 327 * to restart autonegotiation 328 */ 329 err = genphy_soft_reset(phydev); 330 if (err < 0) 331 return err; 332 333 err = phy_write(phydev, 0x1d, 0x1f); 334 if (err < 0) 335 return err; 336 337 err = phy_write(phydev, 0x1e, 0x200c); 338 if (err < 0) 339 return err; 340 341 err = phy_write(phydev, 0x1d, 0x5); 342 if (err < 0) 343 return err; 344 345 err = phy_write(phydev, 0x1e, 0); 346 if (err < 0) 347 return err; 348 349 err = phy_write(phydev, 0x1e, 0x100); 350 if (err < 0) 351 return err; 352 353 return marvell_config_aneg(phydev); 354 } 355 356 #ifdef CONFIG_OF_MDIO 357 /* Set and/or override some configuration registers based on the 358 * marvell,reg-init property stored in the of_node for the phydev. 359 * 360 * marvell,reg-init = <reg-page reg mask value>,...; 361 * 362 * There may be one or more sets of <reg-page reg mask value>: 363 * 364 * reg-page: which register bank to use. 365 * reg: the register. 366 * mask: if non-zero, ANDed with existing register value. 367 * value: ORed with the masked value and written to the regiser. 368 * 369 */ 370 static int marvell_of_reg_init(struct phy_device *phydev) 371 { 372 const __be32 *paddr; 373 int len, i, saved_page, current_page, ret = 0; 374 375 if (!phydev->mdio.dev.of_node) 376 return 0; 377 378 paddr = of_get_property(phydev->mdio.dev.of_node, 379 "marvell,reg-init", &len); 380 if (!paddr || len < (4 * sizeof(*paddr))) 381 return 0; 382 383 saved_page = phy_save_page(phydev); 384 if (saved_page < 0) 385 goto err; 386 current_page = saved_page; 387 388 len /= sizeof(*paddr); 389 for (i = 0; i < len - 3; i += 4) { 390 u16 page = be32_to_cpup(paddr + i); 391 u16 reg = be32_to_cpup(paddr + i + 1); 392 u16 mask = be32_to_cpup(paddr + i + 2); 393 u16 val_bits = be32_to_cpup(paddr + i + 3); 394 int val; 395 396 if (page != current_page) { 397 current_page = page; 398 ret = marvell_write_page(phydev, page); 399 if (ret < 0) 400 goto err; 401 } 402 403 val = 0; 404 if (mask) { 405 val = __phy_read(phydev, reg); 406 if (val < 0) { 407 ret = val; 408 goto err; 409 } 410 val &= mask; 411 } 412 val |= val_bits; 413 414 ret = __phy_write(phydev, reg, val); 415 if (ret < 0) 416 goto err; 417 } 418 err: 419 return phy_restore_page(phydev, saved_page, ret); 420 } 421 #else 422 static int marvell_of_reg_init(struct phy_device *phydev) 423 { 424 return 0; 425 } 426 #endif /* CONFIG_OF_MDIO */ 427 428 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 429 { 430 int mscr; 431 432 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 433 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 434 MII_88E1121_PHY_MSCR_TX_DELAY; 435 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 436 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 437 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 438 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 439 else 440 mscr = 0; 441 442 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 443 MII_88E1121_PHY_MSCR_REG, 444 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 445 } 446 447 static int m88e1121_config_aneg(struct phy_device *phydev) 448 { 449 int changed = 0; 450 int err = 0; 451 452 if (phy_interface_is_rgmii(phydev)) { 453 err = m88e1121_config_aneg_rgmii_delays(phydev); 454 if (err < 0) 455 return err; 456 } 457 458 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 459 if (err < 0) 460 return err; 461 462 changed = err; 463 464 err = genphy_config_aneg(phydev); 465 if (err < 0) 466 return err; 467 468 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 469 /* A software reset is used to ensure a "commit" of the 470 * changes is done. 471 */ 472 err = genphy_soft_reset(phydev); 473 if (err < 0) 474 return err; 475 } 476 477 return 0; 478 } 479 480 static int m88e1318_config_aneg(struct phy_device *phydev) 481 { 482 int err; 483 484 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 485 MII_88E1318S_PHY_MSCR1_REG, 486 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 487 if (err < 0) 488 return err; 489 490 return m88e1121_config_aneg(phydev); 491 } 492 493 /** 494 * linkmode_adv_to_fiber_adv_t 495 * @advertise: the linkmode advertisement settings 496 * 497 * A small helper function that translates linkmode advertisement 498 * settings to phy autonegotiation advertisements for the MII_ADV 499 * register for fiber link. 500 */ 501 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 502 { 503 u32 result = 0; 504 505 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 506 result |= ADVERTISE_FIBER_1000HALF; 507 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 508 result |= ADVERTISE_FIBER_1000FULL; 509 510 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 511 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 512 result |= LPA_PAUSE_ASYM_FIBER; 513 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 514 result |= (ADVERTISE_PAUSE_FIBER 515 & (~ADVERTISE_PAUSE_ASYM_FIBER)); 516 517 return result; 518 } 519 520 /** 521 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 522 * @phydev: target phy_device struct 523 * 524 * Description: If auto-negotiation is enabled, we configure the 525 * advertising, and then restart auto-negotiation. If it is not 526 * enabled, then we write the BMCR. Adapted for fiber link in 527 * some Marvell's devices. 528 */ 529 static int marvell_config_aneg_fiber(struct phy_device *phydev) 530 { 531 int changed = 0; 532 int err; 533 int adv, oldadv; 534 535 if (phydev->autoneg != AUTONEG_ENABLE) 536 return genphy_setup_forced(phydev); 537 538 /* Only allow advertising what this PHY supports */ 539 linkmode_and(phydev->advertising, phydev->advertising, 540 phydev->supported); 541 542 /* Setup fiber advertisement */ 543 adv = phy_read(phydev, MII_ADVERTISE); 544 if (adv < 0) 545 return adv; 546 547 oldadv = adv; 548 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL 549 | LPA_PAUSE_FIBER); 550 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising); 551 552 if (adv != oldadv) { 553 err = phy_write(phydev, MII_ADVERTISE, adv); 554 if (err < 0) 555 return err; 556 557 changed = 1; 558 } 559 560 if (changed == 0) { 561 /* Advertisement hasn't changed, but maybe aneg was never on to 562 * begin with? Or maybe phy was isolated? 563 */ 564 int ctl = phy_read(phydev, MII_BMCR); 565 566 if (ctl < 0) 567 return ctl; 568 569 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 570 changed = 1; /* do restart aneg */ 571 } 572 573 /* Only restart aneg if we are advertising something different 574 * than we were before. 575 */ 576 if (changed > 0) 577 changed = genphy_restart_aneg(phydev); 578 579 return changed; 580 } 581 582 static int m88e1510_config_aneg(struct phy_device *phydev) 583 { 584 int err; 585 586 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 587 if (err < 0) 588 goto error; 589 590 /* Configure the copper link first */ 591 err = m88e1318_config_aneg(phydev); 592 if (err < 0) 593 goto error; 594 595 /* Do not touch the fiber page if we're in copper->sgmii mode */ 596 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 597 return 0; 598 599 /* Then the fiber link */ 600 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 601 if (err < 0) 602 goto error; 603 604 err = marvell_config_aneg_fiber(phydev); 605 if (err < 0) 606 goto error; 607 608 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 609 610 error: 611 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 612 return err; 613 } 614 615 static void marvell_config_led(struct phy_device *phydev) 616 { 617 u16 def_config; 618 int err; 619 620 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 621 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 622 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 623 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 624 def_config = MII_88E1121_PHY_LED_DEF; 625 break; 626 /* Default PHY LED config: 627 * LED[0] .. 1000Mbps Link 628 * LED[1] .. 100Mbps Link 629 * LED[2] .. Blink, Activity 630 */ 631 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 632 def_config = MII_88E1510_PHY_LED_DEF; 633 break; 634 default: 635 return; 636 } 637 638 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 639 def_config); 640 if (err < 0) 641 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 642 } 643 644 static int marvell_config_init(struct phy_device *phydev) 645 { 646 /* Set defalut LED */ 647 marvell_config_led(phydev); 648 649 /* Set registers from marvell,reg-init DT property */ 650 return marvell_of_reg_init(phydev); 651 } 652 653 static int m88e1116r_config_init(struct phy_device *phydev) 654 { 655 int err; 656 657 err = genphy_soft_reset(phydev); 658 if (err < 0) 659 return err; 660 661 msleep(500); 662 663 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 664 if (err < 0) 665 return err; 666 667 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 668 if (err < 0) 669 return err; 670 671 err = marvell_set_downshift(phydev, true, 8); 672 if (err < 0) 673 return err; 674 675 if (phy_interface_is_rgmii(phydev)) { 676 err = m88e1121_config_aneg_rgmii_delays(phydev); 677 if (err < 0) 678 return err; 679 } 680 681 err = genphy_soft_reset(phydev); 682 if (err < 0) 683 return err; 684 685 return marvell_config_init(phydev); 686 } 687 688 static int m88e3016_config_init(struct phy_device *phydev) 689 { 690 int ret; 691 692 /* Enable Scrambler and Auto-Crossover */ 693 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 694 MII_88E3016_DISABLE_SCRAMBLER, 695 MII_88E3016_AUTO_MDIX_CROSSOVER); 696 if (ret < 0) 697 return ret; 698 699 return marvell_config_init(phydev); 700 } 701 702 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 703 u16 mode, 704 int fibre_copper_auto) 705 { 706 if (fibre_copper_auto) 707 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 708 709 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 710 MII_M1111_HWCFG_MODE_MASK | 711 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 712 MII_M1111_HWCFG_FIBER_COPPER_RES, 713 mode); 714 } 715 716 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 717 { 718 int delay; 719 720 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 721 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 722 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 723 delay = MII_M1111_RGMII_RX_DELAY; 724 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 725 delay = MII_M1111_RGMII_TX_DELAY; 726 } else { 727 delay = 0; 728 } 729 730 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 731 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 732 delay); 733 } 734 735 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 736 { 737 int temp; 738 int err; 739 740 err = m88e1111_config_init_rgmii_delays(phydev); 741 if (err < 0) 742 return err; 743 744 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 745 if (temp < 0) 746 return temp; 747 748 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 749 750 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 751 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 752 else 753 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 754 755 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 756 } 757 758 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 759 { 760 int err; 761 762 err = m88e1111_config_init_hwcfg_mode( 763 phydev, 764 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 765 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 766 if (err < 0) 767 return err; 768 769 /* make sure copper is selected */ 770 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 771 } 772 773 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 774 { 775 int err; 776 777 err = m88e1111_config_init_rgmii_delays(phydev); 778 if (err < 0) 779 return err; 780 781 err = m88e1111_config_init_hwcfg_mode( 782 phydev, 783 MII_M1111_HWCFG_MODE_RTBI, 784 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 785 if (err < 0) 786 return err; 787 788 /* soft reset */ 789 err = genphy_soft_reset(phydev); 790 if (err < 0) 791 return err; 792 793 return m88e1111_config_init_hwcfg_mode( 794 phydev, 795 MII_M1111_HWCFG_MODE_RTBI, 796 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 797 } 798 799 static int m88e1111_config_init(struct phy_device *phydev) 800 { 801 int err; 802 803 if (phy_interface_is_rgmii(phydev)) { 804 err = m88e1111_config_init_rgmii(phydev); 805 if (err < 0) 806 return err; 807 } 808 809 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 810 err = m88e1111_config_init_sgmii(phydev); 811 if (err < 0) 812 return err; 813 } 814 815 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 816 err = m88e1111_config_init_rtbi(phydev); 817 if (err < 0) 818 return err; 819 } 820 821 err = marvell_of_reg_init(phydev); 822 if (err < 0) 823 return err; 824 825 return genphy_soft_reset(phydev); 826 } 827 828 static int m88e1318_config_init(struct phy_device *phydev) 829 { 830 if (phy_interrupt_is_valid(phydev)) { 831 int err = phy_modify_paged( 832 phydev, MII_MARVELL_LED_PAGE, 833 MII_88E1318S_PHY_LED_TCR, 834 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 835 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 836 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 837 if (err < 0) 838 return err; 839 } 840 841 return marvell_config_init(phydev); 842 } 843 844 static int m88e1510_config_init(struct phy_device *phydev) 845 { 846 int err; 847 848 /* SGMII-to-Copper mode initialization */ 849 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 850 /* Select page 18 */ 851 err = marvell_set_page(phydev, 18); 852 if (err < 0) 853 return err; 854 855 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 856 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 857 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 858 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 859 if (err < 0) 860 return err; 861 862 /* PHY reset is necessary after changing MODE[2:0] */ 863 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 864 MII_88E1510_GEN_CTRL_REG_1_RESET); 865 if (err < 0) 866 return err; 867 868 /* Reset page selection */ 869 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 870 if (err < 0) 871 return err; 872 } 873 874 return m88e1318_config_init(phydev); 875 } 876 877 static int m88e1118_config_aneg(struct phy_device *phydev) 878 { 879 int err; 880 881 err = genphy_soft_reset(phydev); 882 if (err < 0) 883 return err; 884 885 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 886 if (err < 0) 887 return err; 888 889 err = genphy_config_aneg(phydev); 890 return 0; 891 } 892 893 static int m88e1118_config_init(struct phy_device *phydev) 894 { 895 int err; 896 897 /* Change address */ 898 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 899 if (err < 0) 900 return err; 901 902 /* Enable 1000 Mbit */ 903 err = phy_write(phydev, 0x15, 0x1070); 904 if (err < 0) 905 return err; 906 907 /* Change address */ 908 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 909 if (err < 0) 910 return err; 911 912 /* Adjust LED Control */ 913 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 914 err = phy_write(phydev, 0x10, 0x1100); 915 else 916 err = phy_write(phydev, 0x10, 0x021e); 917 if (err < 0) 918 return err; 919 920 err = marvell_of_reg_init(phydev); 921 if (err < 0) 922 return err; 923 924 /* Reset address */ 925 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 926 if (err < 0) 927 return err; 928 929 return genphy_soft_reset(phydev); 930 } 931 932 static int m88e1149_config_init(struct phy_device *phydev) 933 { 934 int err; 935 936 /* Change address */ 937 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 938 if (err < 0) 939 return err; 940 941 /* Enable 1000 Mbit */ 942 err = phy_write(phydev, 0x15, 0x1048); 943 if (err < 0) 944 return err; 945 946 err = marvell_of_reg_init(phydev); 947 if (err < 0) 948 return err; 949 950 /* Reset address */ 951 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 952 if (err < 0) 953 return err; 954 955 return genphy_soft_reset(phydev); 956 } 957 958 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 959 { 960 int err; 961 962 err = m88e1111_config_init_rgmii_delays(phydev); 963 if (err < 0) 964 return err; 965 966 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 967 err = phy_write(phydev, 0x1d, 0x0012); 968 if (err < 0) 969 return err; 970 971 err = phy_modify(phydev, 0x1e, 0x0fc0, 972 2 << 9 | /* 36 ohm */ 973 2 << 6); /* 39 ohm */ 974 if (err < 0) 975 return err; 976 977 err = phy_write(phydev, 0x1d, 0x3); 978 if (err < 0) 979 return err; 980 981 err = phy_write(phydev, 0x1e, 0x8000); 982 } 983 return err; 984 } 985 986 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 987 { 988 return m88e1111_config_init_hwcfg_mode( 989 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 990 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 991 } 992 993 static int m88e1145_config_init(struct phy_device *phydev) 994 { 995 int err; 996 997 /* Take care of errata E0 & E1 */ 998 err = phy_write(phydev, 0x1d, 0x001b); 999 if (err < 0) 1000 return err; 1001 1002 err = phy_write(phydev, 0x1e, 0x418f); 1003 if (err < 0) 1004 return err; 1005 1006 err = phy_write(phydev, 0x1d, 0x0016); 1007 if (err < 0) 1008 return err; 1009 1010 err = phy_write(phydev, 0x1e, 0xa2da); 1011 if (err < 0) 1012 return err; 1013 1014 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1015 err = m88e1145_config_init_rgmii(phydev); 1016 if (err < 0) 1017 return err; 1018 } 1019 1020 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1021 err = m88e1145_config_init_sgmii(phydev); 1022 if (err < 0) 1023 return err; 1024 } 1025 1026 err = marvell_of_reg_init(phydev); 1027 if (err < 0) 1028 return err; 1029 1030 return 0; 1031 } 1032 1033 /* The VOD can be out of specification on link up. Poke an 1034 * undocumented register, in an undocumented page, with a magic value 1035 * to fix this. 1036 */ 1037 static int m88e6390_errata(struct phy_device *phydev) 1038 { 1039 int err; 1040 1041 err = phy_write(phydev, MII_BMCR, 1042 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1043 if (err) 1044 return err; 1045 1046 usleep_range(300, 400); 1047 1048 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1049 if (err) 1050 return err; 1051 1052 return genphy_soft_reset(phydev); 1053 } 1054 1055 static int m88e6390_config_aneg(struct phy_device *phydev) 1056 { 1057 int err; 1058 1059 err = m88e6390_errata(phydev); 1060 if (err) 1061 return err; 1062 1063 return m88e1510_config_aneg(phydev); 1064 } 1065 1066 /** 1067 * fiber_lpa_mod_linkmode_lpa_t 1068 * @advertising: the linkmode advertisement settings 1069 * @lpa: value of the MII_LPA register for fiber link 1070 * 1071 * A small helper function that translates MII_LPA bits to linkmode LP 1072 * advertisement settings. Other bits in advertising are left 1073 * unchanged. 1074 */ 1075 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1076 { 1077 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1078 advertising, lpa & LPA_FIBER_1000HALF); 1079 1080 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1081 advertising, lpa & LPA_FIBER_1000FULL); 1082 } 1083 1084 /** 1085 * marvell_update_link - update link status in real time in @phydev 1086 * @phydev: target phy_device struct 1087 * 1088 * Description: Update the value in phydev->link to reflect the 1089 * current link value. 1090 */ 1091 static int marvell_update_link(struct phy_device *phydev, int fiber) 1092 { 1093 int status; 1094 1095 /* Use the generic register for copper link, or specific 1096 * register for fiber case 1097 */ 1098 if (fiber) { 1099 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1100 if (status < 0) 1101 return status; 1102 1103 if ((status & REGISTER_LINK_STATUS) == 0) 1104 phydev->link = 0; 1105 else 1106 phydev->link = 1; 1107 } else { 1108 return genphy_update_link(phydev); 1109 } 1110 1111 return 0; 1112 } 1113 1114 static int marvell_read_status_page_an(struct phy_device *phydev, 1115 int fiber) 1116 { 1117 int status; 1118 int lpa; 1119 int lpagb; 1120 1121 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1122 if (status < 0) 1123 return status; 1124 1125 lpa = phy_read(phydev, MII_LPA); 1126 if (lpa < 0) 1127 return lpa; 1128 1129 lpagb = phy_read(phydev, MII_STAT1000); 1130 if (lpagb < 0) 1131 return lpagb; 1132 1133 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1134 phydev->duplex = DUPLEX_FULL; 1135 else 1136 phydev->duplex = DUPLEX_HALF; 1137 1138 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 1139 phydev->pause = 0; 1140 phydev->asym_pause = 0; 1141 1142 switch (status) { 1143 case MII_M1011_PHY_STATUS_1000: 1144 phydev->speed = SPEED_1000; 1145 break; 1146 1147 case MII_M1011_PHY_STATUS_100: 1148 phydev->speed = SPEED_100; 1149 break; 1150 1151 default: 1152 phydev->speed = SPEED_10; 1153 break; 1154 } 1155 1156 if (!fiber) { 1157 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa); 1158 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb); 1159 1160 if (phydev->duplex == DUPLEX_FULL) { 1161 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 1162 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 1163 } 1164 } else { 1165 /* The fiber link is only 1000M capable */ 1166 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1167 1168 if (phydev->duplex == DUPLEX_FULL) { 1169 if (!(lpa & LPA_PAUSE_FIBER)) { 1170 phydev->pause = 0; 1171 phydev->asym_pause = 0; 1172 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1173 phydev->pause = 1; 1174 phydev->asym_pause = 1; 1175 } else { 1176 phydev->pause = 1; 1177 phydev->asym_pause = 0; 1178 } 1179 } 1180 } 1181 return 0; 1182 } 1183 1184 static int marvell_read_status_page_fixed(struct phy_device *phydev) 1185 { 1186 int bmcr = phy_read(phydev, MII_BMCR); 1187 1188 if (bmcr < 0) 1189 return bmcr; 1190 1191 if (bmcr & BMCR_FULLDPLX) 1192 phydev->duplex = DUPLEX_FULL; 1193 else 1194 phydev->duplex = DUPLEX_HALF; 1195 1196 if (bmcr & BMCR_SPEED1000) 1197 phydev->speed = SPEED_1000; 1198 else if (bmcr & BMCR_SPEED100) 1199 phydev->speed = SPEED_100; 1200 else 1201 phydev->speed = SPEED_10; 1202 1203 phydev->pause = 0; 1204 phydev->asym_pause = 0; 1205 linkmode_zero(phydev->lp_advertising); 1206 1207 return 0; 1208 } 1209 1210 /* marvell_read_status_page 1211 * 1212 * Description: 1213 * Check the link, then figure out the current state 1214 * by comparing what we advertise with what the link partner 1215 * advertises. Start by checking the gigabit possibilities, 1216 * then move on to 10/100. 1217 */ 1218 static int marvell_read_status_page(struct phy_device *phydev, int page) 1219 { 1220 int fiber; 1221 int err; 1222 1223 /* Detect and update the link, but return if there 1224 * was an error 1225 */ 1226 if (page == MII_MARVELL_FIBER_PAGE) 1227 fiber = 1; 1228 else 1229 fiber = 0; 1230 1231 err = marvell_update_link(phydev, fiber); 1232 if (err) 1233 return err; 1234 1235 if (phydev->autoneg == AUTONEG_ENABLE) 1236 err = marvell_read_status_page_an(phydev, fiber); 1237 else 1238 err = marvell_read_status_page_fixed(phydev); 1239 1240 return err; 1241 } 1242 1243 /* marvell_read_status 1244 * 1245 * Some Marvell's phys have two modes: fiber and copper. 1246 * Both need status checked. 1247 * Description: 1248 * First, check the fiber link and status. 1249 * If the fiber link is down, check the copper link and status which 1250 * will be the default value if both link are down. 1251 */ 1252 static int marvell_read_status(struct phy_device *phydev) 1253 { 1254 int err; 1255 1256 /* Check the fiber mode first */ 1257 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1258 phydev->supported) && 1259 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1260 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1261 if (err < 0) 1262 goto error; 1263 1264 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1265 if (err < 0) 1266 goto error; 1267 1268 /* If the fiber link is up, it is the selected and 1269 * used link. In this case, we need to stay in the 1270 * fiber page. Please to be careful about that, avoid 1271 * to restore Copper page in other functions which 1272 * could break the behaviour for some fiber phy like 1273 * 88E1512. 1274 */ 1275 if (phydev->link) 1276 return 0; 1277 1278 /* If fiber link is down, check and save copper mode state */ 1279 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1280 if (err < 0) 1281 goto error; 1282 } 1283 1284 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1285 1286 error: 1287 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1288 return err; 1289 } 1290 1291 /* marvell_suspend 1292 * 1293 * Some Marvell's phys have two modes: fiber and copper. 1294 * Both need to be suspended 1295 */ 1296 static int marvell_suspend(struct phy_device *phydev) 1297 { 1298 int err; 1299 1300 /* Suspend the fiber mode first */ 1301 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1302 phydev->supported)) { 1303 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1304 if (err < 0) 1305 goto error; 1306 1307 /* With the page set, use the generic suspend */ 1308 err = genphy_suspend(phydev); 1309 if (err < 0) 1310 goto error; 1311 1312 /* Then, the copper link */ 1313 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1314 if (err < 0) 1315 goto error; 1316 } 1317 1318 /* With the page set, use the generic suspend */ 1319 return genphy_suspend(phydev); 1320 1321 error: 1322 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1323 return err; 1324 } 1325 1326 /* marvell_resume 1327 * 1328 * Some Marvell's phys have two modes: fiber and copper. 1329 * Both need to be resumed 1330 */ 1331 static int marvell_resume(struct phy_device *phydev) 1332 { 1333 int err; 1334 1335 /* Resume the fiber mode first */ 1336 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1337 phydev->supported)) { 1338 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1339 if (err < 0) 1340 goto error; 1341 1342 /* With the page set, use the generic resume */ 1343 err = genphy_resume(phydev); 1344 if (err < 0) 1345 goto error; 1346 1347 /* Then, the copper link */ 1348 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1349 if (err < 0) 1350 goto error; 1351 } 1352 1353 /* With the page set, use the generic resume */ 1354 return genphy_resume(phydev); 1355 1356 error: 1357 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1358 return err; 1359 } 1360 1361 static int marvell_aneg_done(struct phy_device *phydev) 1362 { 1363 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1364 1365 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1366 } 1367 1368 static int m88e1121_did_interrupt(struct phy_device *phydev) 1369 { 1370 int imask; 1371 1372 imask = phy_read(phydev, MII_M1011_IEVENT); 1373 1374 if (imask & MII_M1011_IMASK_INIT) 1375 return 1; 1376 1377 return 0; 1378 } 1379 1380 static void m88e1318_get_wol(struct phy_device *phydev, 1381 struct ethtool_wolinfo *wol) 1382 { 1383 int oldpage, ret = 0; 1384 1385 wol->supported = WAKE_MAGIC; 1386 wol->wolopts = 0; 1387 1388 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1389 if (oldpage < 0) 1390 goto error; 1391 1392 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1393 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1394 wol->wolopts |= WAKE_MAGIC; 1395 1396 error: 1397 phy_restore_page(phydev, oldpage, ret); 1398 } 1399 1400 static int m88e1318_set_wol(struct phy_device *phydev, 1401 struct ethtool_wolinfo *wol) 1402 { 1403 int err = 0, oldpage; 1404 1405 oldpage = phy_save_page(phydev); 1406 if (oldpage < 0) 1407 goto error; 1408 1409 if (wol->wolopts & WAKE_MAGIC) { 1410 /* Explicitly switch to page 0x00, just to be sure */ 1411 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1412 if (err < 0) 1413 goto error; 1414 1415 /* If WOL event happened once, the LED[2] interrupt pin 1416 * will not be cleared unless we reading the interrupt status 1417 * register. If interrupts are in use, the normal interrupt 1418 * handling will clear the WOL event. Clear the WOL event 1419 * before enabling it if !phy_interrupt_is_valid() 1420 */ 1421 if (!phy_interrupt_is_valid(phydev)) 1422 __phy_read(phydev, MII_M1011_IEVENT); 1423 1424 /* Enable the WOL interrupt */ 1425 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1426 MII_88E1318S_PHY_CSIER_WOL_EIE); 1427 if (err < 0) 1428 goto error; 1429 1430 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1431 if (err < 0) 1432 goto error; 1433 1434 /* Setup LED[2] as interrupt pin (active low) */ 1435 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1436 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1437 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1438 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1439 if (err < 0) 1440 goto error; 1441 1442 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1443 if (err < 0) 1444 goto error; 1445 1446 /* Store the device address for the magic packet */ 1447 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1448 ((phydev->attached_dev->dev_addr[5] << 8) | 1449 phydev->attached_dev->dev_addr[4])); 1450 if (err < 0) 1451 goto error; 1452 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1453 ((phydev->attached_dev->dev_addr[3] << 8) | 1454 phydev->attached_dev->dev_addr[2])); 1455 if (err < 0) 1456 goto error; 1457 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1458 ((phydev->attached_dev->dev_addr[1] << 8) | 1459 phydev->attached_dev->dev_addr[0])); 1460 if (err < 0) 1461 goto error; 1462 1463 /* Clear WOL status and enable magic packet matching */ 1464 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1465 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1466 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1467 if (err < 0) 1468 goto error; 1469 } else { 1470 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1471 if (err < 0) 1472 goto error; 1473 1474 /* Clear WOL status and disable magic packet matching */ 1475 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1476 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1477 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1478 if (err < 0) 1479 goto error; 1480 } 1481 1482 error: 1483 return phy_restore_page(phydev, oldpage, err); 1484 } 1485 1486 static int marvell_get_sset_count(struct phy_device *phydev) 1487 { 1488 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1489 phydev->supported)) 1490 return ARRAY_SIZE(marvell_hw_stats); 1491 else 1492 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1493 } 1494 1495 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1496 { 1497 int i; 1498 1499 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) { 1500 strlcpy(data + i * ETH_GSTRING_LEN, 1501 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1502 } 1503 } 1504 1505 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1506 { 1507 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1508 struct marvell_priv *priv = phydev->priv; 1509 int val; 1510 u64 ret; 1511 1512 val = phy_read_paged(phydev, stat.page, stat.reg); 1513 if (val < 0) { 1514 ret = U64_MAX; 1515 } else { 1516 val = val & ((1 << stat.bits) - 1); 1517 priv->stats[i] += val; 1518 ret = priv->stats[i]; 1519 } 1520 1521 return ret; 1522 } 1523 1524 static void marvell_get_stats(struct phy_device *phydev, 1525 struct ethtool_stats *stats, u64 *data) 1526 { 1527 int i; 1528 1529 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) 1530 data[i] = marvell_get_stat(phydev, i); 1531 } 1532 1533 #ifdef CONFIG_HWMON 1534 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1535 { 1536 int oldpage; 1537 int ret = 0; 1538 int val; 1539 1540 *temp = 0; 1541 1542 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1543 if (oldpage < 0) 1544 goto error; 1545 1546 /* Enable temperature sensor */ 1547 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1548 if (ret < 0) 1549 goto error; 1550 1551 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1552 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1553 if (ret < 0) 1554 goto error; 1555 1556 /* Wait for temperature to stabilize */ 1557 usleep_range(10000, 12000); 1558 1559 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1560 if (val < 0) { 1561 ret = val; 1562 goto error; 1563 } 1564 1565 /* Disable temperature sensor */ 1566 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1567 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1568 if (ret < 0) 1569 goto error; 1570 1571 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1572 1573 error: 1574 return phy_restore_page(phydev, oldpage, ret); 1575 } 1576 1577 static int m88e1121_hwmon_read(struct device *dev, 1578 enum hwmon_sensor_types type, 1579 u32 attr, int channel, long *temp) 1580 { 1581 struct phy_device *phydev = dev_get_drvdata(dev); 1582 int err; 1583 1584 switch (attr) { 1585 case hwmon_temp_input: 1586 err = m88e1121_get_temp(phydev, temp); 1587 break; 1588 default: 1589 return -EOPNOTSUPP; 1590 } 1591 1592 return err; 1593 } 1594 1595 static umode_t m88e1121_hwmon_is_visible(const void *data, 1596 enum hwmon_sensor_types type, 1597 u32 attr, int channel) 1598 { 1599 if (type != hwmon_temp) 1600 return 0; 1601 1602 switch (attr) { 1603 case hwmon_temp_input: 1604 return 0444; 1605 default: 1606 return 0; 1607 } 1608 } 1609 1610 static u32 m88e1121_hwmon_chip_config[] = { 1611 HWMON_C_REGISTER_TZ, 1612 0 1613 }; 1614 1615 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1616 .type = hwmon_chip, 1617 .config = m88e1121_hwmon_chip_config, 1618 }; 1619 1620 static u32 m88e1121_hwmon_temp_config[] = { 1621 HWMON_T_INPUT, 1622 0 1623 }; 1624 1625 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1626 .type = hwmon_temp, 1627 .config = m88e1121_hwmon_temp_config, 1628 }; 1629 1630 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1631 &m88e1121_hwmon_chip, 1632 &m88e1121_hwmon_temp, 1633 NULL 1634 }; 1635 1636 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1637 .is_visible = m88e1121_hwmon_is_visible, 1638 .read = m88e1121_hwmon_read, 1639 }; 1640 1641 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1642 .ops = &m88e1121_hwmon_hwmon_ops, 1643 .info = m88e1121_hwmon_info, 1644 }; 1645 1646 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1647 { 1648 int ret; 1649 1650 *temp = 0; 1651 1652 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1653 MII_88E1510_TEMP_SENSOR); 1654 if (ret < 0) 1655 return ret; 1656 1657 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1658 1659 return 0; 1660 } 1661 1662 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1663 { 1664 int ret; 1665 1666 *temp = 0; 1667 1668 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1669 MII_88E1121_MISC_TEST); 1670 if (ret < 0) 1671 return ret; 1672 1673 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1674 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1675 /* convert to mC */ 1676 *temp *= 1000; 1677 1678 return 0; 1679 } 1680 1681 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1682 { 1683 temp = temp / 1000; 1684 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1685 1686 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1687 MII_88E1121_MISC_TEST, 1688 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1689 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1690 } 1691 1692 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1693 { 1694 int ret; 1695 1696 *alarm = false; 1697 1698 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1699 MII_88E1121_MISC_TEST); 1700 if (ret < 0) 1701 return ret; 1702 1703 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1704 1705 return 0; 1706 } 1707 1708 static int m88e1510_hwmon_read(struct device *dev, 1709 enum hwmon_sensor_types type, 1710 u32 attr, int channel, long *temp) 1711 { 1712 struct phy_device *phydev = dev_get_drvdata(dev); 1713 int err; 1714 1715 switch (attr) { 1716 case hwmon_temp_input: 1717 err = m88e1510_get_temp(phydev, temp); 1718 break; 1719 case hwmon_temp_crit: 1720 err = m88e1510_get_temp_critical(phydev, temp); 1721 break; 1722 case hwmon_temp_max_alarm: 1723 err = m88e1510_get_temp_alarm(phydev, temp); 1724 break; 1725 default: 1726 return -EOPNOTSUPP; 1727 } 1728 1729 return err; 1730 } 1731 1732 static int m88e1510_hwmon_write(struct device *dev, 1733 enum hwmon_sensor_types type, 1734 u32 attr, int channel, long temp) 1735 { 1736 struct phy_device *phydev = dev_get_drvdata(dev); 1737 int err; 1738 1739 switch (attr) { 1740 case hwmon_temp_crit: 1741 err = m88e1510_set_temp_critical(phydev, temp); 1742 break; 1743 default: 1744 return -EOPNOTSUPP; 1745 } 1746 return err; 1747 } 1748 1749 static umode_t m88e1510_hwmon_is_visible(const void *data, 1750 enum hwmon_sensor_types type, 1751 u32 attr, int channel) 1752 { 1753 if (type != hwmon_temp) 1754 return 0; 1755 1756 switch (attr) { 1757 case hwmon_temp_input: 1758 case hwmon_temp_max_alarm: 1759 return 0444; 1760 case hwmon_temp_crit: 1761 return 0644; 1762 default: 1763 return 0; 1764 } 1765 } 1766 1767 static u32 m88e1510_hwmon_temp_config[] = { 1768 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1769 0 1770 }; 1771 1772 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1773 .type = hwmon_temp, 1774 .config = m88e1510_hwmon_temp_config, 1775 }; 1776 1777 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1778 &m88e1121_hwmon_chip, 1779 &m88e1510_hwmon_temp, 1780 NULL 1781 }; 1782 1783 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1784 .is_visible = m88e1510_hwmon_is_visible, 1785 .read = m88e1510_hwmon_read, 1786 .write = m88e1510_hwmon_write, 1787 }; 1788 1789 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1790 .ops = &m88e1510_hwmon_hwmon_ops, 1791 .info = m88e1510_hwmon_info, 1792 }; 1793 1794 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 1795 { 1796 int sum = 0; 1797 int oldpage; 1798 int ret = 0; 1799 int i; 1800 1801 *temp = 0; 1802 1803 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1804 if (oldpage < 0) 1805 goto error; 1806 1807 /* Enable temperature sensor */ 1808 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1809 if (ret < 0) 1810 goto error; 1811 1812 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1813 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 1814 MII_88E6390_MISC_TEST_SAMPLE_1S; 1815 1816 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1817 if (ret < 0) 1818 goto error; 1819 1820 /* Wait for temperature to stabilize */ 1821 usleep_range(10000, 12000); 1822 1823 /* Reading the temperature sense has an errata. You need to read 1824 * a number of times and take an average. 1825 */ 1826 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 1827 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 1828 if (ret < 0) 1829 goto error; 1830 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 1831 } 1832 1833 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 1834 *temp = (sum - 75) * 1000; 1835 1836 /* Disable temperature sensor */ 1837 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1838 if (ret < 0) 1839 goto error; 1840 1841 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1842 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 1843 1844 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1845 1846 error: 1847 phy_restore_page(phydev, oldpage, ret); 1848 1849 return ret; 1850 } 1851 1852 static int m88e6390_hwmon_read(struct device *dev, 1853 enum hwmon_sensor_types type, 1854 u32 attr, int channel, long *temp) 1855 { 1856 struct phy_device *phydev = dev_get_drvdata(dev); 1857 int err; 1858 1859 switch (attr) { 1860 case hwmon_temp_input: 1861 err = m88e6390_get_temp(phydev, temp); 1862 break; 1863 default: 1864 return -EOPNOTSUPP; 1865 } 1866 1867 return err; 1868 } 1869 1870 static umode_t m88e6390_hwmon_is_visible(const void *data, 1871 enum hwmon_sensor_types type, 1872 u32 attr, int channel) 1873 { 1874 if (type != hwmon_temp) 1875 return 0; 1876 1877 switch (attr) { 1878 case hwmon_temp_input: 1879 return 0444; 1880 default: 1881 return 0; 1882 } 1883 } 1884 1885 static u32 m88e6390_hwmon_temp_config[] = { 1886 HWMON_T_INPUT, 1887 0 1888 }; 1889 1890 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 1891 .type = hwmon_temp, 1892 .config = m88e6390_hwmon_temp_config, 1893 }; 1894 1895 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 1896 &m88e1121_hwmon_chip, 1897 &m88e6390_hwmon_temp, 1898 NULL 1899 }; 1900 1901 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 1902 .is_visible = m88e6390_hwmon_is_visible, 1903 .read = m88e6390_hwmon_read, 1904 }; 1905 1906 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 1907 .ops = &m88e6390_hwmon_hwmon_ops, 1908 .info = m88e6390_hwmon_info, 1909 }; 1910 1911 static int marvell_hwmon_name(struct phy_device *phydev) 1912 { 1913 struct marvell_priv *priv = phydev->priv; 1914 struct device *dev = &phydev->mdio.dev; 1915 const char *devname = dev_name(dev); 1916 size_t len = strlen(devname); 1917 int i, j; 1918 1919 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 1920 if (!priv->hwmon_name) 1921 return -ENOMEM; 1922 1923 for (i = j = 0; i < len && devname[i]; i++) { 1924 if (isalnum(devname[i])) 1925 priv->hwmon_name[j++] = devname[i]; 1926 } 1927 1928 return 0; 1929 } 1930 1931 static int marvell_hwmon_probe(struct phy_device *phydev, 1932 const struct hwmon_chip_info *chip) 1933 { 1934 struct marvell_priv *priv = phydev->priv; 1935 struct device *dev = &phydev->mdio.dev; 1936 int err; 1937 1938 err = marvell_hwmon_name(phydev); 1939 if (err) 1940 return err; 1941 1942 priv->hwmon_dev = devm_hwmon_device_register_with_info( 1943 dev, priv->hwmon_name, phydev, chip, NULL); 1944 1945 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 1946 } 1947 1948 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1949 { 1950 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 1951 } 1952 1953 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1954 { 1955 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 1956 } 1957 1958 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1959 { 1960 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 1961 } 1962 #else 1963 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1964 { 1965 return 0; 1966 } 1967 1968 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1969 { 1970 return 0; 1971 } 1972 1973 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1974 { 1975 return 0; 1976 } 1977 #endif 1978 1979 static int marvell_probe(struct phy_device *phydev) 1980 { 1981 struct marvell_priv *priv; 1982 1983 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 1984 if (!priv) 1985 return -ENOMEM; 1986 1987 phydev->priv = priv; 1988 1989 return 0; 1990 } 1991 1992 static int m88e1121_probe(struct phy_device *phydev) 1993 { 1994 int err; 1995 1996 err = marvell_probe(phydev); 1997 if (err) 1998 return err; 1999 2000 return m88e1121_hwmon_probe(phydev); 2001 } 2002 2003 static int m88e1510_probe(struct phy_device *phydev) 2004 { 2005 int err; 2006 2007 err = marvell_probe(phydev); 2008 if (err) 2009 return err; 2010 2011 return m88e1510_hwmon_probe(phydev); 2012 } 2013 2014 static int m88e6390_probe(struct phy_device *phydev) 2015 { 2016 int err; 2017 2018 err = marvell_probe(phydev); 2019 if (err) 2020 return err; 2021 2022 return m88e6390_hwmon_probe(phydev); 2023 } 2024 2025 static struct phy_driver marvell_drivers[] = { 2026 { 2027 .phy_id = MARVELL_PHY_ID_88E1101, 2028 .phy_id_mask = MARVELL_PHY_ID_MASK, 2029 .name = "Marvell 88E1101", 2030 .features = PHY_GBIT_FEATURES, 2031 .probe = marvell_probe, 2032 .config_init = &marvell_config_init, 2033 .config_aneg = &m88e1101_config_aneg, 2034 .ack_interrupt = &marvell_ack_interrupt, 2035 .config_intr = &marvell_config_intr, 2036 .resume = &genphy_resume, 2037 .suspend = &genphy_suspend, 2038 .read_page = marvell_read_page, 2039 .write_page = marvell_write_page, 2040 .get_sset_count = marvell_get_sset_count, 2041 .get_strings = marvell_get_strings, 2042 .get_stats = marvell_get_stats, 2043 }, 2044 { 2045 .phy_id = MARVELL_PHY_ID_88E1112, 2046 .phy_id_mask = MARVELL_PHY_ID_MASK, 2047 .name = "Marvell 88E1112", 2048 .features = PHY_GBIT_FEATURES, 2049 .probe = marvell_probe, 2050 .config_init = &m88e1111_config_init, 2051 .config_aneg = &marvell_config_aneg, 2052 .ack_interrupt = &marvell_ack_interrupt, 2053 .config_intr = &marvell_config_intr, 2054 .resume = &genphy_resume, 2055 .suspend = &genphy_suspend, 2056 .read_page = marvell_read_page, 2057 .write_page = marvell_write_page, 2058 .get_sset_count = marvell_get_sset_count, 2059 .get_strings = marvell_get_strings, 2060 .get_stats = marvell_get_stats, 2061 }, 2062 { 2063 .phy_id = MARVELL_PHY_ID_88E1111, 2064 .phy_id_mask = MARVELL_PHY_ID_MASK, 2065 .name = "Marvell 88E1111", 2066 .features = PHY_GBIT_FEATURES, 2067 .probe = marvell_probe, 2068 .config_init = &m88e1111_config_init, 2069 .config_aneg = &marvell_config_aneg, 2070 .read_status = &marvell_read_status, 2071 .ack_interrupt = &marvell_ack_interrupt, 2072 .config_intr = &marvell_config_intr, 2073 .resume = &genphy_resume, 2074 .suspend = &genphy_suspend, 2075 .read_page = marvell_read_page, 2076 .write_page = marvell_write_page, 2077 .get_sset_count = marvell_get_sset_count, 2078 .get_strings = marvell_get_strings, 2079 .get_stats = marvell_get_stats, 2080 }, 2081 { 2082 .phy_id = MARVELL_PHY_ID_88E1118, 2083 .phy_id_mask = MARVELL_PHY_ID_MASK, 2084 .name = "Marvell 88E1118", 2085 .features = PHY_GBIT_FEATURES, 2086 .probe = marvell_probe, 2087 .config_init = &m88e1118_config_init, 2088 .config_aneg = &m88e1118_config_aneg, 2089 .ack_interrupt = &marvell_ack_interrupt, 2090 .config_intr = &marvell_config_intr, 2091 .resume = &genphy_resume, 2092 .suspend = &genphy_suspend, 2093 .read_page = marvell_read_page, 2094 .write_page = marvell_write_page, 2095 .get_sset_count = marvell_get_sset_count, 2096 .get_strings = marvell_get_strings, 2097 .get_stats = marvell_get_stats, 2098 }, 2099 { 2100 .phy_id = MARVELL_PHY_ID_88E1121R, 2101 .phy_id_mask = MARVELL_PHY_ID_MASK, 2102 .name = "Marvell 88E1121R", 2103 .features = PHY_GBIT_FEATURES, 2104 .probe = &m88e1121_probe, 2105 .config_init = &marvell_config_init, 2106 .config_aneg = &m88e1121_config_aneg, 2107 .read_status = &marvell_read_status, 2108 .ack_interrupt = &marvell_ack_interrupt, 2109 .config_intr = &marvell_config_intr, 2110 .did_interrupt = &m88e1121_did_interrupt, 2111 .resume = &genphy_resume, 2112 .suspend = &genphy_suspend, 2113 .read_page = marvell_read_page, 2114 .write_page = marvell_write_page, 2115 .get_sset_count = marvell_get_sset_count, 2116 .get_strings = marvell_get_strings, 2117 .get_stats = marvell_get_stats, 2118 }, 2119 { 2120 .phy_id = MARVELL_PHY_ID_88E1318S, 2121 .phy_id_mask = MARVELL_PHY_ID_MASK, 2122 .name = "Marvell 88E1318S", 2123 .features = PHY_GBIT_FEATURES, 2124 .probe = marvell_probe, 2125 .config_init = &m88e1318_config_init, 2126 .config_aneg = &m88e1318_config_aneg, 2127 .read_status = &marvell_read_status, 2128 .ack_interrupt = &marvell_ack_interrupt, 2129 .config_intr = &marvell_config_intr, 2130 .did_interrupt = &m88e1121_did_interrupt, 2131 .get_wol = &m88e1318_get_wol, 2132 .set_wol = &m88e1318_set_wol, 2133 .resume = &genphy_resume, 2134 .suspend = &genphy_suspend, 2135 .read_page = marvell_read_page, 2136 .write_page = marvell_write_page, 2137 .get_sset_count = marvell_get_sset_count, 2138 .get_strings = marvell_get_strings, 2139 .get_stats = marvell_get_stats, 2140 }, 2141 { 2142 .phy_id = MARVELL_PHY_ID_88E1145, 2143 .phy_id_mask = MARVELL_PHY_ID_MASK, 2144 .name = "Marvell 88E1145", 2145 .features = PHY_GBIT_FEATURES, 2146 .probe = marvell_probe, 2147 .config_init = &m88e1145_config_init, 2148 .config_aneg = &m88e1101_config_aneg, 2149 .read_status = &genphy_read_status, 2150 .ack_interrupt = &marvell_ack_interrupt, 2151 .config_intr = &marvell_config_intr, 2152 .resume = &genphy_resume, 2153 .suspend = &genphy_suspend, 2154 .read_page = marvell_read_page, 2155 .write_page = marvell_write_page, 2156 .get_sset_count = marvell_get_sset_count, 2157 .get_strings = marvell_get_strings, 2158 .get_stats = marvell_get_stats, 2159 }, 2160 { 2161 .phy_id = MARVELL_PHY_ID_88E1149R, 2162 .phy_id_mask = MARVELL_PHY_ID_MASK, 2163 .name = "Marvell 88E1149R", 2164 .features = PHY_GBIT_FEATURES, 2165 .probe = marvell_probe, 2166 .config_init = &m88e1149_config_init, 2167 .config_aneg = &m88e1118_config_aneg, 2168 .ack_interrupt = &marvell_ack_interrupt, 2169 .config_intr = &marvell_config_intr, 2170 .resume = &genphy_resume, 2171 .suspend = &genphy_suspend, 2172 .read_page = marvell_read_page, 2173 .write_page = marvell_write_page, 2174 .get_sset_count = marvell_get_sset_count, 2175 .get_strings = marvell_get_strings, 2176 .get_stats = marvell_get_stats, 2177 }, 2178 { 2179 .phy_id = MARVELL_PHY_ID_88E1240, 2180 .phy_id_mask = MARVELL_PHY_ID_MASK, 2181 .name = "Marvell 88E1240", 2182 .features = PHY_GBIT_FEATURES, 2183 .probe = marvell_probe, 2184 .config_init = &m88e1111_config_init, 2185 .config_aneg = &marvell_config_aneg, 2186 .ack_interrupt = &marvell_ack_interrupt, 2187 .config_intr = &marvell_config_intr, 2188 .resume = &genphy_resume, 2189 .suspend = &genphy_suspend, 2190 .read_page = marvell_read_page, 2191 .write_page = marvell_write_page, 2192 .get_sset_count = marvell_get_sset_count, 2193 .get_strings = marvell_get_strings, 2194 .get_stats = marvell_get_stats, 2195 }, 2196 { 2197 .phy_id = MARVELL_PHY_ID_88E1116R, 2198 .phy_id_mask = MARVELL_PHY_ID_MASK, 2199 .name = "Marvell 88E1116R", 2200 .features = PHY_GBIT_FEATURES, 2201 .probe = marvell_probe, 2202 .config_init = &m88e1116r_config_init, 2203 .ack_interrupt = &marvell_ack_interrupt, 2204 .config_intr = &marvell_config_intr, 2205 .resume = &genphy_resume, 2206 .suspend = &genphy_suspend, 2207 .read_page = marvell_read_page, 2208 .write_page = marvell_write_page, 2209 .get_sset_count = marvell_get_sset_count, 2210 .get_strings = marvell_get_strings, 2211 .get_stats = marvell_get_stats, 2212 }, 2213 { 2214 .phy_id = MARVELL_PHY_ID_88E1510, 2215 .phy_id_mask = MARVELL_PHY_ID_MASK, 2216 .name = "Marvell 88E1510", 2217 .features = PHY_GBIT_FIBRE_FEATURES, 2218 .probe = &m88e1510_probe, 2219 .config_init = &m88e1510_config_init, 2220 .config_aneg = &m88e1510_config_aneg, 2221 .read_status = &marvell_read_status, 2222 .ack_interrupt = &marvell_ack_interrupt, 2223 .config_intr = &marvell_config_intr, 2224 .did_interrupt = &m88e1121_did_interrupt, 2225 .get_wol = &m88e1318_get_wol, 2226 .set_wol = &m88e1318_set_wol, 2227 .resume = &marvell_resume, 2228 .suspend = &marvell_suspend, 2229 .read_page = marvell_read_page, 2230 .write_page = marvell_write_page, 2231 .get_sset_count = marvell_get_sset_count, 2232 .get_strings = marvell_get_strings, 2233 .get_stats = marvell_get_stats, 2234 .set_loopback = genphy_loopback, 2235 }, 2236 { 2237 .phy_id = MARVELL_PHY_ID_88E1540, 2238 .phy_id_mask = MARVELL_PHY_ID_MASK, 2239 .name = "Marvell 88E1540", 2240 .features = PHY_GBIT_FEATURES, 2241 .probe = m88e1510_probe, 2242 .config_init = &marvell_config_init, 2243 .config_aneg = &m88e1510_config_aneg, 2244 .read_status = &marvell_read_status, 2245 .ack_interrupt = &marvell_ack_interrupt, 2246 .config_intr = &marvell_config_intr, 2247 .did_interrupt = &m88e1121_did_interrupt, 2248 .resume = &genphy_resume, 2249 .suspend = &genphy_suspend, 2250 .read_page = marvell_read_page, 2251 .write_page = marvell_write_page, 2252 .get_sset_count = marvell_get_sset_count, 2253 .get_strings = marvell_get_strings, 2254 .get_stats = marvell_get_stats, 2255 }, 2256 { 2257 .phy_id = MARVELL_PHY_ID_88E1545, 2258 .phy_id_mask = MARVELL_PHY_ID_MASK, 2259 .name = "Marvell 88E1545", 2260 .probe = m88e1510_probe, 2261 .features = PHY_GBIT_FEATURES, 2262 .config_init = &marvell_config_init, 2263 .config_aneg = &m88e1510_config_aneg, 2264 .read_status = &marvell_read_status, 2265 .ack_interrupt = &marvell_ack_interrupt, 2266 .config_intr = &marvell_config_intr, 2267 .did_interrupt = &m88e1121_did_interrupt, 2268 .resume = &genphy_resume, 2269 .suspend = &genphy_suspend, 2270 .read_page = marvell_read_page, 2271 .write_page = marvell_write_page, 2272 .get_sset_count = marvell_get_sset_count, 2273 .get_strings = marvell_get_strings, 2274 .get_stats = marvell_get_stats, 2275 }, 2276 { 2277 .phy_id = MARVELL_PHY_ID_88E3016, 2278 .phy_id_mask = MARVELL_PHY_ID_MASK, 2279 .name = "Marvell 88E3016", 2280 .features = PHY_BASIC_FEATURES, 2281 .probe = marvell_probe, 2282 .config_init = &m88e3016_config_init, 2283 .aneg_done = &marvell_aneg_done, 2284 .read_status = &marvell_read_status, 2285 .ack_interrupt = &marvell_ack_interrupt, 2286 .config_intr = &marvell_config_intr, 2287 .did_interrupt = &m88e1121_did_interrupt, 2288 .resume = &genphy_resume, 2289 .suspend = &genphy_suspend, 2290 .read_page = marvell_read_page, 2291 .write_page = marvell_write_page, 2292 .get_sset_count = marvell_get_sset_count, 2293 .get_strings = marvell_get_strings, 2294 .get_stats = marvell_get_stats, 2295 }, 2296 { 2297 .phy_id = MARVELL_PHY_ID_88E6390, 2298 .phy_id_mask = MARVELL_PHY_ID_MASK, 2299 .name = "Marvell 88E6390", 2300 .features = PHY_GBIT_FEATURES, 2301 .probe = m88e6390_probe, 2302 .config_init = &marvell_config_init, 2303 .config_aneg = &m88e6390_config_aneg, 2304 .read_status = &marvell_read_status, 2305 .ack_interrupt = &marvell_ack_interrupt, 2306 .config_intr = &marvell_config_intr, 2307 .did_interrupt = &m88e1121_did_interrupt, 2308 .resume = &genphy_resume, 2309 .suspend = &genphy_suspend, 2310 .read_page = marvell_read_page, 2311 .write_page = marvell_write_page, 2312 .get_sset_count = marvell_get_sset_count, 2313 .get_strings = marvell_get_strings, 2314 .get_stats = marvell_get_stats, 2315 }, 2316 }; 2317 2318 module_phy_driver(marvell_drivers); 2319 2320 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2321 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2322 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2323 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2324 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2325 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2326 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2327 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2328 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2329 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2330 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2331 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2332 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2333 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2334 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2335 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2336 { } 2337 }; 2338 2339 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2340