1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13 #include <linux/kernel.h> 14 #include <linux/string.h> 15 #include <linux/ctype.h> 16 #include <linux/errno.h> 17 #include <linux/unistd.h> 18 #include <linux/hwmon.h> 19 #include <linux/interrupt.h> 20 #include <linux/init.h> 21 #include <linux/delay.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/skbuff.h> 25 #include <linux/spinlock.h> 26 #include <linux/mm.h> 27 #include <linux/module.h> 28 #include <linux/mii.h> 29 #include <linux/ethtool.h> 30 #include <linux/phy.h> 31 #include <linux/marvell_phy.h> 32 #include <linux/of.h> 33 34 #include <linux/io.h> 35 #include <asm/irq.h> 36 #include <linux/uaccess.h> 37 38 #define MII_MARVELL_PHY_PAGE 22 39 #define MII_MARVELL_COPPER_PAGE 0x00 40 #define MII_MARVELL_FIBER_PAGE 0x01 41 #define MII_MARVELL_MSCR_PAGE 0x02 42 #define MII_MARVELL_LED_PAGE 0x03 43 #define MII_MARVELL_MISC_TEST_PAGE 0x06 44 #define MII_MARVELL_WOL_PAGE 0x11 45 46 #define MII_M1011_IEVENT 0x13 47 #define MII_M1011_IEVENT_CLEAR 0x0000 48 49 #define MII_M1011_IMASK 0x12 50 #define MII_M1011_IMASK_INIT 0x6400 51 #define MII_M1011_IMASK_CLEAR 0x0000 52 53 #define MII_M1011_PHY_SCR 0x10 54 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 55 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12 56 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800 57 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 58 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 59 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 60 61 #define MII_M1111_PHY_LED_CONTROL 0x18 62 #define MII_M1111_PHY_LED_DIRECT 0x4100 63 #define MII_M1111_PHY_LED_COMBINE 0x411c 64 #define MII_M1111_PHY_EXT_CR 0x14 65 #define MII_M1111_RGMII_RX_DELAY BIT(7) 66 #define MII_M1111_RGMII_TX_DELAY BIT(1) 67 #define MII_M1111_PHY_EXT_SR 0x1b 68 69 #define MII_M1111_HWCFG_MODE_MASK 0xf 70 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 71 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 72 #define MII_M1111_HWCFG_MODE_RTBI 0x7 73 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 74 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 75 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 76 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 77 78 #define MII_88E1121_PHY_MSCR_REG 21 79 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 80 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 81 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 82 83 #define MII_88E1121_MISC_TEST 0x1a 84 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 85 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 86 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 87 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 88 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 89 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 90 91 #define MII_88E1510_TEMP_SENSOR 0x1b 92 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 93 94 #define MII_88E6390_MISC_TEST 0x1b 95 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 96 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 97 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 98 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 99 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 100 101 #define MII_88E6390_TEMP_SENSOR 0x1c 102 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 103 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 104 105 #define MII_88E1318S_PHY_MSCR1_REG 16 106 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 107 108 /* Copper Specific Interrupt Enable Register */ 109 #define MII_88E1318S_PHY_CSIER 0x12 110 /* WOL Event Interrupt Enable */ 111 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 112 113 /* LED Timer Control Register */ 114 #define MII_88E1318S_PHY_LED_TCR 0x12 115 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 116 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 117 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 118 119 /* Magic Packet MAC address registers */ 120 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 121 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 122 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 123 124 #define MII_88E1318S_PHY_WOL_CTRL 0x10 125 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 126 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 127 128 #define MII_PHY_LED_CTRL 16 129 #define MII_88E1121_PHY_LED_DEF 0x0030 130 #define MII_88E1510_PHY_LED_DEF 0x1177 131 132 #define MII_M1011_PHY_STATUS 0x11 133 #define MII_M1011_PHY_STATUS_1000 0x8000 134 #define MII_M1011_PHY_STATUS_100 0x4000 135 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 136 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 137 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 138 #define MII_M1011_PHY_STATUS_LINK 0x0400 139 140 #define MII_88E3016_PHY_SPEC_CTRL 0x10 141 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 142 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 143 144 #define MII_88E1510_GEN_CTRL_REG_1 0x14 145 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 146 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 147 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 148 149 #define LPA_FIBER_1000HALF 0x40 150 #define LPA_FIBER_1000FULL 0x20 151 152 #define LPA_PAUSE_FIBER 0x180 153 #define LPA_PAUSE_ASYM_FIBER 0x100 154 155 #define ADVERTISE_FIBER_1000HALF 0x40 156 #define ADVERTISE_FIBER_1000FULL 0x20 157 158 #define ADVERTISE_PAUSE_FIBER 0x180 159 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 160 161 #define REGISTER_LINK_STATUS 0x400 162 #define NB_FIBER_STATS 1 163 164 MODULE_DESCRIPTION("Marvell PHY driver"); 165 MODULE_AUTHOR("Andy Fleming"); 166 MODULE_LICENSE("GPL"); 167 168 struct marvell_hw_stat { 169 const char *string; 170 u8 page; 171 u8 reg; 172 u8 bits; 173 }; 174 175 static struct marvell_hw_stat marvell_hw_stats[] = { 176 { "phy_receive_errors_copper", 0, 21, 16}, 177 { "phy_idle_errors", 0, 10, 8 }, 178 { "phy_receive_errors_fiber", 1, 21, 16}, 179 }; 180 181 struct marvell_priv { 182 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 183 char *hwmon_name; 184 struct device *hwmon_dev; 185 }; 186 187 static int marvell_read_page(struct phy_device *phydev) 188 { 189 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 190 } 191 192 static int marvell_write_page(struct phy_device *phydev, int page) 193 { 194 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 195 } 196 197 static int marvell_set_page(struct phy_device *phydev, int page) 198 { 199 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 200 } 201 202 static int marvell_ack_interrupt(struct phy_device *phydev) 203 { 204 int err; 205 206 /* Clear the interrupts by reading the reg */ 207 err = phy_read(phydev, MII_M1011_IEVENT); 208 209 if (err < 0) 210 return err; 211 212 return 0; 213 } 214 215 static int marvell_config_intr(struct phy_device *phydev) 216 { 217 int err; 218 219 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 220 err = phy_write(phydev, MII_M1011_IMASK, 221 MII_M1011_IMASK_INIT); 222 else 223 err = phy_write(phydev, MII_M1011_IMASK, 224 MII_M1011_IMASK_CLEAR); 225 226 return err; 227 } 228 229 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 230 { 231 int reg; 232 int err; 233 int val; 234 235 /* get the current settings */ 236 reg = phy_read(phydev, MII_M1011_PHY_SCR); 237 if (reg < 0) 238 return reg; 239 240 val = reg; 241 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 242 switch (polarity) { 243 case ETH_TP_MDI: 244 val |= MII_M1011_PHY_SCR_MDI; 245 break; 246 case ETH_TP_MDI_X: 247 val |= MII_M1011_PHY_SCR_MDI_X; 248 break; 249 case ETH_TP_MDI_AUTO: 250 case ETH_TP_MDI_INVALID: 251 default: 252 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 253 break; 254 } 255 256 if (val != reg) { 257 /* Set the new polarity value in the register */ 258 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 259 if (err) 260 return err; 261 } 262 263 return val != reg; 264 } 265 266 static int marvell_set_downshift(struct phy_device *phydev, bool enable, 267 u8 retries) 268 { 269 int reg; 270 271 reg = phy_read(phydev, MII_M1011_PHY_SCR); 272 if (reg < 0) 273 return reg; 274 275 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK; 276 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT); 277 if (enable) 278 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN; 279 280 return phy_write(phydev, MII_M1011_PHY_SCR, reg); 281 } 282 283 static int marvell_config_aneg(struct phy_device *phydev) 284 { 285 int changed = 0; 286 int err; 287 288 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 289 if (err < 0) 290 return err; 291 292 changed = err; 293 294 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 295 MII_M1111_PHY_LED_DIRECT); 296 if (err < 0) 297 return err; 298 299 err = genphy_config_aneg(phydev); 300 if (err < 0) 301 return err; 302 303 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 304 /* A write to speed/duplex bits (that is performed by 305 * genphy_config_aneg() call above) must be followed by 306 * a software reset. Otherwise, the write has no effect. 307 */ 308 err = genphy_soft_reset(phydev); 309 if (err < 0) 310 return err; 311 } 312 313 return 0; 314 } 315 316 static int m88e1101_config_aneg(struct phy_device *phydev) 317 { 318 int err; 319 320 /* This Marvell PHY has an errata which requires 321 * that certain registers get written in order 322 * to restart autonegotiation 323 */ 324 err = genphy_soft_reset(phydev); 325 if (err < 0) 326 return err; 327 328 err = phy_write(phydev, 0x1d, 0x1f); 329 if (err < 0) 330 return err; 331 332 err = phy_write(phydev, 0x1e, 0x200c); 333 if (err < 0) 334 return err; 335 336 err = phy_write(phydev, 0x1d, 0x5); 337 if (err < 0) 338 return err; 339 340 err = phy_write(phydev, 0x1e, 0); 341 if (err < 0) 342 return err; 343 344 err = phy_write(phydev, 0x1e, 0x100); 345 if (err < 0) 346 return err; 347 348 return marvell_config_aneg(phydev); 349 } 350 351 #ifdef CONFIG_OF_MDIO 352 /* Set and/or override some configuration registers based on the 353 * marvell,reg-init property stored in the of_node for the phydev. 354 * 355 * marvell,reg-init = <reg-page reg mask value>,...; 356 * 357 * There may be one or more sets of <reg-page reg mask value>: 358 * 359 * reg-page: which register bank to use. 360 * reg: the register. 361 * mask: if non-zero, ANDed with existing register value. 362 * value: ORed with the masked value and written to the regiser. 363 * 364 */ 365 static int marvell_of_reg_init(struct phy_device *phydev) 366 { 367 const __be32 *paddr; 368 int len, i, saved_page, current_page, ret = 0; 369 370 if (!phydev->mdio.dev.of_node) 371 return 0; 372 373 paddr = of_get_property(phydev->mdio.dev.of_node, 374 "marvell,reg-init", &len); 375 if (!paddr || len < (4 * sizeof(*paddr))) 376 return 0; 377 378 saved_page = phy_save_page(phydev); 379 if (saved_page < 0) 380 goto err; 381 current_page = saved_page; 382 383 len /= sizeof(*paddr); 384 for (i = 0; i < len - 3; i += 4) { 385 u16 page = be32_to_cpup(paddr + i); 386 u16 reg = be32_to_cpup(paddr + i + 1); 387 u16 mask = be32_to_cpup(paddr + i + 2); 388 u16 val_bits = be32_to_cpup(paddr + i + 3); 389 int val; 390 391 if (page != current_page) { 392 current_page = page; 393 ret = marvell_write_page(phydev, page); 394 if (ret < 0) 395 goto err; 396 } 397 398 val = 0; 399 if (mask) { 400 val = __phy_read(phydev, reg); 401 if (val < 0) { 402 ret = val; 403 goto err; 404 } 405 val &= mask; 406 } 407 val |= val_bits; 408 409 ret = __phy_write(phydev, reg, val); 410 if (ret < 0) 411 goto err; 412 } 413 err: 414 return phy_restore_page(phydev, saved_page, ret); 415 } 416 #else 417 static int marvell_of_reg_init(struct phy_device *phydev) 418 { 419 return 0; 420 } 421 #endif /* CONFIG_OF_MDIO */ 422 423 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 424 { 425 int mscr; 426 427 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 428 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 429 MII_88E1121_PHY_MSCR_TX_DELAY; 430 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 431 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 432 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 433 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 434 else 435 mscr = 0; 436 437 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 438 MII_88E1121_PHY_MSCR_REG, 439 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 440 } 441 442 static int m88e1121_config_aneg(struct phy_device *phydev) 443 { 444 int changed = 0; 445 int err = 0; 446 447 if (phy_interface_is_rgmii(phydev)) { 448 err = m88e1121_config_aneg_rgmii_delays(phydev); 449 if (err < 0) 450 return err; 451 } 452 453 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 454 if (err < 0) 455 return err; 456 457 changed = err; 458 459 err = genphy_config_aneg(phydev); 460 if (err < 0) 461 return err; 462 463 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 464 /* A software reset is used to ensure a "commit" of the 465 * changes is done. 466 */ 467 err = genphy_soft_reset(phydev); 468 if (err < 0) 469 return err; 470 } 471 472 return 0; 473 } 474 475 static int m88e1318_config_aneg(struct phy_device *phydev) 476 { 477 int err; 478 479 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 480 MII_88E1318S_PHY_MSCR1_REG, 481 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 482 if (err < 0) 483 return err; 484 485 return m88e1121_config_aneg(phydev); 486 } 487 488 /** 489 * linkmode_adv_to_fiber_adv_t 490 * @advertise: the linkmode advertisement settings 491 * 492 * A small helper function that translates linkmode advertisement 493 * settings to phy autonegotiation advertisements for the MII_ADV 494 * register for fiber link. 495 */ 496 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 497 { 498 u32 result = 0; 499 500 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 501 result |= ADVERTISE_FIBER_1000HALF; 502 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 503 result |= ADVERTISE_FIBER_1000FULL; 504 505 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 506 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 507 result |= LPA_PAUSE_ASYM_FIBER; 508 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 509 result |= (ADVERTISE_PAUSE_FIBER 510 & (~ADVERTISE_PAUSE_ASYM_FIBER)); 511 512 return result; 513 } 514 515 /** 516 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 517 * @phydev: target phy_device struct 518 * 519 * Description: If auto-negotiation is enabled, we configure the 520 * advertising, and then restart auto-negotiation. If it is not 521 * enabled, then we write the BMCR. Adapted for fiber link in 522 * some Marvell's devices. 523 */ 524 static int marvell_config_aneg_fiber(struct phy_device *phydev) 525 { 526 int changed = 0; 527 int err; 528 int adv, oldadv; 529 530 if (phydev->autoneg != AUTONEG_ENABLE) 531 return genphy_setup_forced(phydev); 532 533 /* Only allow advertising what this PHY supports */ 534 linkmode_and(phydev->advertising, phydev->advertising, 535 phydev->supported); 536 537 /* Setup fiber advertisement */ 538 adv = phy_read(phydev, MII_ADVERTISE); 539 if (adv < 0) 540 return adv; 541 542 oldadv = adv; 543 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL 544 | LPA_PAUSE_FIBER); 545 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising); 546 547 if (adv != oldadv) { 548 err = phy_write(phydev, MII_ADVERTISE, adv); 549 if (err < 0) 550 return err; 551 552 changed = 1; 553 } 554 555 if (changed == 0) { 556 /* Advertisement hasn't changed, but maybe aneg was never on to 557 * begin with? Or maybe phy was isolated? 558 */ 559 int ctl = phy_read(phydev, MII_BMCR); 560 561 if (ctl < 0) 562 return ctl; 563 564 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 565 changed = 1; /* do restart aneg */ 566 } 567 568 /* Only restart aneg if we are advertising something different 569 * than we were before. 570 */ 571 if (changed > 0) 572 changed = genphy_restart_aneg(phydev); 573 574 return changed; 575 } 576 577 static int m88e1510_config_aneg(struct phy_device *phydev) 578 { 579 int err; 580 581 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 582 if (err < 0) 583 goto error; 584 585 /* Configure the copper link first */ 586 err = m88e1318_config_aneg(phydev); 587 if (err < 0) 588 goto error; 589 590 /* Do not touch the fiber page if we're in copper->sgmii mode */ 591 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 592 return 0; 593 594 /* Then the fiber link */ 595 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 596 if (err < 0) 597 goto error; 598 599 err = marvell_config_aneg_fiber(phydev); 600 if (err < 0) 601 goto error; 602 603 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 604 605 error: 606 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 607 return err; 608 } 609 610 static void marvell_config_led(struct phy_device *phydev) 611 { 612 u16 def_config; 613 int err; 614 615 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 616 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 617 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 618 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 619 def_config = MII_88E1121_PHY_LED_DEF; 620 break; 621 /* Default PHY LED config: 622 * LED[0] .. 1000Mbps Link 623 * LED[1] .. 100Mbps Link 624 * LED[2] .. Blink, Activity 625 */ 626 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 627 def_config = MII_88E1510_PHY_LED_DEF; 628 break; 629 default: 630 return; 631 } 632 633 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 634 def_config); 635 if (err < 0) 636 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 637 } 638 639 static int marvell_config_init(struct phy_device *phydev) 640 { 641 /* Set defalut LED */ 642 marvell_config_led(phydev); 643 644 /* Set registers from marvell,reg-init DT property */ 645 return marvell_of_reg_init(phydev); 646 } 647 648 static int m88e1116r_config_init(struct phy_device *phydev) 649 { 650 int err; 651 652 err = genphy_soft_reset(phydev); 653 if (err < 0) 654 return err; 655 656 msleep(500); 657 658 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 659 if (err < 0) 660 return err; 661 662 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 663 if (err < 0) 664 return err; 665 666 err = marvell_set_downshift(phydev, true, 8); 667 if (err < 0) 668 return err; 669 670 if (phy_interface_is_rgmii(phydev)) { 671 err = m88e1121_config_aneg_rgmii_delays(phydev); 672 if (err < 0) 673 return err; 674 } 675 676 err = genphy_soft_reset(phydev); 677 if (err < 0) 678 return err; 679 680 return marvell_config_init(phydev); 681 } 682 683 static int m88e3016_config_init(struct phy_device *phydev) 684 { 685 int ret; 686 687 /* Enable Scrambler and Auto-Crossover */ 688 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 689 MII_88E3016_DISABLE_SCRAMBLER, 690 MII_88E3016_AUTO_MDIX_CROSSOVER); 691 if (ret < 0) 692 return ret; 693 694 return marvell_config_init(phydev); 695 } 696 697 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 698 u16 mode, 699 int fibre_copper_auto) 700 { 701 if (fibre_copper_auto) 702 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 703 704 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 705 MII_M1111_HWCFG_MODE_MASK | 706 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 707 MII_M1111_HWCFG_FIBER_COPPER_RES, 708 mode); 709 } 710 711 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 712 { 713 int delay; 714 715 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 716 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 717 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 718 delay = MII_M1111_RGMII_RX_DELAY; 719 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 720 delay = MII_M1111_RGMII_TX_DELAY; 721 } else { 722 delay = 0; 723 } 724 725 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 726 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 727 delay); 728 } 729 730 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 731 { 732 int temp; 733 int err; 734 735 err = m88e1111_config_init_rgmii_delays(phydev); 736 if (err < 0) 737 return err; 738 739 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 740 if (temp < 0) 741 return temp; 742 743 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 744 745 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 746 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 747 else 748 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 749 750 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 751 } 752 753 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 754 { 755 int err; 756 757 err = m88e1111_config_init_hwcfg_mode( 758 phydev, 759 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 760 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 761 if (err < 0) 762 return err; 763 764 /* make sure copper is selected */ 765 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 766 } 767 768 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 769 { 770 int err; 771 772 err = m88e1111_config_init_rgmii_delays(phydev); 773 if (err < 0) 774 return err; 775 776 err = m88e1111_config_init_hwcfg_mode( 777 phydev, 778 MII_M1111_HWCFG_MODE_RTBI, 779 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 780 if (err < 0) 781 return err; 782 783 /* soft reset */ 784 err = genphy_soft_reset(phydev); 785 if (err < 0) 786 return err; 787 788 return m88e1111_config_init_hwcfg_mode( 789 phydev, 790 MII_M1111_HWCFG_MODE_RTBI, 791 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 792 } 793 794 static int m88e1111_config_init(struct phy_device *phydev) 795 { 796 int err; 797 798 if (phy_interface_is_rgmii(phydev)) { 799 err = m88e1111_config_init_rgmii(phydev); 800 if (err < 0) 801 return err; 802 } 803 804 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 805 err = m88e1111_config_init_sgmii(phydev); 806 if (err < 0) 807 return err; 808 } 809 810 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 811 err = m88e1111_config_init_rtbi(phydev); 812 if (err < 0) 813 return err; 814 } 815 816 err = marvell_of_reg_init(phydev); 817 if (err < 0) 818 return err; 819 820 return genphy_soft_reset(phydev); 821 } 822 823 static int m88e1318_config_init(struct phy_device *phydev) 824 { 825 if (phy_interrupt_is_valid(phydev)) { 826 int err = phy_modify_paged( 827 phydev, MII_MARVELL_LED_PAGE, 828 MII_88E1318S_PHY_LED_TCR, 829 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 830 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 831 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 832 if (err < 0) 833 return err; 834 } 835 836 return marvell_config_init(phydev); 837 } 838 839 static int m88e1510_config_init(struct phy_device *phydev) 840 { 841 int err; 842 843 /* SGMII-to-Copper mode initialization */ 844 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 845 /* Select page 18 */ 846 err = marvell_set_page(phydev, 18); 847 if (err < 0) 848 return err; 849 850 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 851 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 852 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 853 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 854 if (err < 0) 855 return err; 856 857 /* PHY reset is necessary after changing MODE[2:0] */ 858 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 859 MII_88E1510_GEN_CTRL_REG_1_RESET); 860 if (err < 0) 861 return err; 862 863 /* Reset page selection */ 864 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 865 if (err < 0) 866 return err; 867 } 868 869 return m88e1318_config_init(phydev); 870 } 871 872 static int m88e1118_config_aneg(struct phy_device *phydev) 873 { 874 int err; 875 876 err = genphy_soft_reset(phydev); 877 if (err < 0) 878 return err; 879 880 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 881 if (err < 0) 882 return err; 883 884 err = genphy_config_aneg(phydev); 885 return 0; 886 } 887 888 static int m88e1118_config_init(struct phy_device *phydev) 889 { 890 int err; 891 892 /* Change address */ 893 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 894 if (err < 0) 895 return err; 896 897 /* Enable 1000 Mbit */ 898 err = phy_write(phydev, 0x15, 0x1070); 899 if (err < 0) 900 return err; 901 902 /* Change address */ 903 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 904 if (err < 0) 905 return err; 906 907 /* Adjust LED Control */ 908 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 909 err = phy_write(phydev, 0x10, 0x1100); 910 else 911 err = phy_write(phydev, 0x10, 0x021e); 912 if (err < 0) 913 return err; 914 915 err = marvell_of_reg_init(phydev); 916 if (err < 0) 917 return err; 918 919 /* Reset address */ 920 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 921 if (err < 0) 922 return err; 923 924 return genphy_soft_reset(phydev); 925 } 926 927 static int m88e1149_config_init(struct phy_device *phydev) 928 { 929 int err; 930 931 /* Change address */ 932 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 933 if (err < 0) 934 return err; 935 936 /* Enable 1000 Mbit */ 937 err = phy_write(phydev, 0x15, 0x1048); 938 if (err < 0) 939 return err; 940 941 err = marvell_of_reg_init(phydev); 942 if (err < 0) 943 return err; 944 945 /* Reset address */ 946 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 947 if (err < 0) 948 return err; 949 950 return genphy_soft_reset(phydev); 951 } 952 953 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 954 { 955 int err; 956 957 err = m88e1111_config_init_rgmii_delays(phydev); 958 if (err < 0) 959 return err; 960 961 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 962 err = phy_write(phydev, 0x1d, 0x0012); 963 if (err < 0) 964 return err; 965 966 err = phy_modify(phydev, 0x1e, 0x0fc0, 967 2 << 9 | /* 36 ohm */ 968 2 << 6); /* 39 ohm */ 969 if (err < 0) 970 return err; 971 972 err = phy_write(phydev, 0x1d, 0x3); 973 if (err < 0) 974 return err; 975 976 err = phy_write(phydev, 0x1e, 0x8000); 977 } 978 return err; 979 } 980 981 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 982 { 983 return m88e1111_config_init_hwcfg_mode( 984 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 985 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 986 } 987 988 static int m88e1145_config_init(struct phy_device *phydev) 989 { 990 int err; 991 992 /* Take care of errata E0 & E1 */ 993 err = phy_write(phydev, 0x1d, 0x001b); 994 if (err < 0) 995 return err; 996 997 err = phy_write(phydev, 0x1e, 0x418f); 998 if (err < 0) 999 return err; 1000 1001 err = phy_write(phydev, 0x1d, 0x0016); 1002 if (err < 0) 1003 return err; 1004 1005 err = phy_write(phydev, 0x1e, 0xa2da); 1006 if (err < 0) 1007 return err; 1008 1009 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1010 err = m88e1145_config_init_rgmii(phydev); 1011 if (err < 0) 1012 return err; 1013 } 1014 1015 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1016 err = m88e1145_config_init_sgmii(phydev); 1017 if (err < 0) 1018 return err; 1019 } 1020 1021 err = marvell_of_reg_init(phydev); 1022 if (err < 0) 1023 return err; 1024 1025 return 0; 1026 } 1027 1028 /* The VOD can be out of specification on link up. Poke an 1029 * undocumented register, in an undocumented page, with a magic value 1030 * to fix this. 1031 */ 1032 static int m88e6390_errata(struct phy_device *phydev) 1033 { 1034 int err; 1035 1036 err = phy_write(phydev, MII_BMCR, 1037 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1038 if (err) 1039 return err; 1040 1041 usleep_range(300, 400); 1042 1043 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1044 if (err) 1045 return err; 1046 1047 return genphy_soft_reset(phydev); 1048 } 1049 1050 static int m88e6390_config_aneg(struct phy_device *phydev) 1051 { 1052 int err; 1053 1054 err = m88e6390_errata(phydev); 1055 if (err) 1056 return err; 1057 1058 return m88e1510_config_aneg(phydev); 1059 } 1060 1061 /** 1062 * fiber_lpa_mod_linkmode_lpa_t 1063 * @advertising: the linkmode advertisement settings 1064 * @lpa: value of the MII_LPA register for fiber link 1065 * 1066 * A small helper function that translates MII_LPA bits to linkmode LP 1067 * advertisement settings. Other bits in advertising are left 1068 * unchanged. 1069 */ 1070 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1071 { 1072 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1073 advertising, lpa & LPA_FIBER_1000HALF); 1074 1075 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1076 advertising, lpa & LPA_FIBER_1000FULL); 1077 } 1078 1079 /** 1080 * marvell_update_link - update link status in real time in @phydev 1081 * @phydev: target phy_device struct 1082 * 1083 * Description: Update the value in phydev->link to reflect the 1084 * current link value. 1085 */ 1086 static int marvell_update_link(struct phy_device *phydev, int fiber) 1087 { 1088 int status; 1089 1090 /* Use the generic register for copper link, or specific 1091 * register for fiber case 1092 */ 1093 if (fiber) { 1094 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1095 if (status < 0) 1096 return status; 1097 1098 if ((status & REGISTER_LINK_STATUS) == 0) 1099 phydev->link = 0; 1100 else 1101 phydev->link = 1; 1102 } else { 1103 return genphy_update_link(phydev); 1104 } 1105 1106 return 0; 1107 } 1108 1109 static int marvell_read_status_page_an(struct phy_device *phydev, 1110 int fiber) 1111 { 1112 int status; 1113 int lpa; 1114 int lpagb; 1115 1116 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1117 if (status < 0) 1118 return status; 1119 1120 lpa = phy_read(phydev, MII_LPA); 1121 if (lpa < 0) 1122 return lpa; 1123 1124 lpagb = phy_read(phydev, MII_STAT1000); 1125 if (lpagb < 0) 1126 return lpagb; 1127 1128 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1129 phydev->duplex = DUPLEX_FULL; 1130 else 1131 phydev->duplex = DUPLEX_HALF; 1132 1133 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 1134 phydev->pause = 0; 1135 phydev->asym_pause = 0; 1136 1137 switch (status) { 1138 case MII_M1011_PHY_STATUS_1000: 1139 phydev->speed = SPEED_1000; 1140 break; 1141 1142 case MII_M1011_PHY_STATUS_100: 1143 phydev->speed = SPEED_100; 1144 break; 1145 1146 default: 1147 phydev->speed = SPEED_10; 1148 break; 1149 } 1150 1151 if (!fiber) { 1152 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa); 1153 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb); 1154 1155 if (phydev->duplex == DUPLEX_FULL) { 1156 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 1157 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 1158 } 1159 } else { 1160 /* The fiber link is only 1000M capable */ 1161 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1162 1163 if (phydev->duplex == DUPLEX_FULL) { 1164 if (!(lpa & LPA_PAUSE_FIBER)) { 1165 phydev->pause = 0; 1166 phydev->asym_pause = 0; 1167 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1168 phydev->pause = 1; 1169 phydev->asym_pause = 1; 1170 } else { 1171 phydev->pause = 1; 1172 phydev->asym_pause = 0; 1173 } 1174 } 1175 } 1176 return 0; 1177 } 1178 1179 static int marvell_read_status_page_fixed(struct phy_device *phydev) 1180 { 1181 int bmcr = phy_read(phydev, MII_BMCR); 1182 1183 if (bmcr < 0) 1184 return bmcr; 1185 1186 if (bmcr & BMCR_FULLDPLX) 1187 phydev->duplex = DUPLEX_FULL; 1188 else 1189 phydev->duplex = DUPLEX_HALF; 1190 1191 if (bmcr & BMCR_SPEED1000) 1192 phydev->speed = SPEED_1000; 1193 else if (bmcr & BMCR_SPEED100) 1194 phydev->speed = SPEED_100; 1195 else 1196 phydev->speed = SPEED_10; 1197 1198 phydev->pause = 0; 1199 phydev->asym_pause = 0; 1200 linkmode_zero(phydev->lp_advertising); 1201 1202 return 0; 1203 } 1204 1205 /* marvell_read_status_page 1206 * 1207 * Description: 1208 * Check the link, then figure out the current state 1209 * by comparing what we advertise with what the link partner 1210 * advertises. Start by checking the gigabit possibilities, 1211 * then move on to 10/100. 1212 */ 1213 static int marvell_read_status_page(struct phy_device *phydev, int page) 1214 { 1215 int fiber; 1216 int err; 1217 1218 /* Detect and update the link, but return if there 1219 * was an error 1220 */ 1221 if (page == MII_MARVELL_FIBER_PAGE) 1222 fiber = 1; 1223 else 1224 fiber = 0; 1225 1226 err = marvell_update_link(phydev, fiber); 1227 if (err) 1228 return err; 1229 1230 if (phydev->autoneg == AUTONEG_ENABLE) 1231 err = marvell_read_status_page_an(phydev, fiber); 1232 else 1233 err = marvell_read_status_page_fixed(phydev); 1234 1235 return err; 1236 } 1237 1238 /* marvell_read_status 1239 * 1240 * Some Marvell's phys have two modes: fiber and copper. 1241 * Both need status checked. 1242 * Description: 1243 * First, check the fiber link and status. 1244 * If the fiber link is down, check the copper link and status which 1245 * will be the default value if both link are down. 1246 */ 1247 static int marvell_read_status(struct phy_device *phydev) 1248 { 1249 int err; 1250 1251 /* Check the fiber mode first */ 1252 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1253 phydev->supported) && 1254 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1255 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1256 if (err < 0) 1257 goto error; 1258 1259 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1260 if (err < 0) 1261 goto error; 1262 1263 /* If the fiber link is up, it is the selected and 1264 * used link. In this case, we need to stay in the 1265 * fiber page. Please to be careful about that, avoid 1266 * to restore Copper page in other functions which 1267 * could break the behaviour for some fiber phy like 1268 * 88E1512. 1269 */ 1270 if (phydev->link) 1271 return 0; 1272 1273 /* If fiber link is down, check and save copper mode state */ 1274 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1275 if (err < 0) 1276 goto error; 1277 } 1278 1279 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1280 1281 error: 1282 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1283 return err; 1284 } 1285 1286 /* marvell_suspend 1287 * 1288 * Some Marvell's phys have two modes: fiber and copper. 1289 * Both need to be suspended 1290 */ 1291 static int marvell_suspend(struct phy_device *phydev) 1292 { 1293 int err; 1294 1295 /* Suspend the fiber mode first */ 1296 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1297 phydev->supported)) { 1298 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1299 if (err < 0) 1300 goto error; 1301 1302 /* With the page set, use the generic suspend */ 1303 err = genphy_suspend(phydev); 1304 if (err < 0) 1305 goto error; 1306 1307 /* Then, the copper link */ 1308 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1309 if (err < 0) 1310 goto error; 1311 } 1312 1313 /* With the page set, use the generic suspend */ 1314 return genphy_suspend(phydev); 1315 1316 error: 1317 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1318 return err; 1319 } 1320 1321 /* marvell_resume 1322 * 1323 * Some Marvell's phys have two modes: fiber and copper. 1324 * Both need to be resumed 1325 */ 1326 static int marvell_resume(struct phy_device *phydev) 1327 { 1328 int err; 1329 1330 /* Resume the fiber mode first */ 1331 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1332 phydev->supported)) { 1333 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1334 if (err < 0) 1335 goto error; 1336 1337 /* With the page set, use the generic resume */ 1338 err = genphy_resume(phydev); 1339 if (err < 0) 1340 goto error; 1341 1342 /* Then, the copper link */ 1343 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1344 if (err < 0) 1345 goto error; 1346 } 1347 1348 /* With the page set, use the generic resume */ 1349 return genphy_resume(phydev); 1350 1351 error: 1352 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1353 return err; 1354 } 1355 1356 static int marvell_aneg_done(struct phy_device *phydev) 1357 { 1358 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1359 1360 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1361 } 1362 1363 static int m88e1121_did_interrupt(struct phy_device *phydev) 1364 { 1365 int imask; 1366 1367 imask = phy_read(phydev, MII_M1011_IEVENT); 1368 1369 if (imask & MII_M1011_IMASK_INIT) 1370 return 1; 1371 1372 return 0; 1373 } 1374 1375 static void m88e1318_get_wol(struct phy_device *phydev, 1376 struct ethtool_wolinfo *wol) 1377 { 1378 int oldpage, ret = 0; 1379 1380 wol->supported = WAKE_MAGIC; 1381 wol->wolopts = 0; 1382 1383 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1384 if (oldpage < 0) 1385 goto error; 1386 1387 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1388 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1389 wol->wolopts |= WAKE_MAGIC; 1390 1391 error: 1392 phy_restore_page(phydev, oldpage, ret); 1393 } 1394 1395 static int m88e1318_set_wol(struct phy_device *phydev, 1396 struct ethtool_wolinfo *wol) 1397 { 1398 int err = 0, oldpage; 1399 1400 oldpage = phy_save_page(phydev); 1401 if (oldpage < 0) 1402 goto error; 1403 1404 if (wol->wolopts & WAKE_MAGIC) { 1405 /* Explicitly switch to page 0x00, just to be sure */ 1406 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1407 if (err < 0) 1408 goto error; 1409 1410 /* If WOL event happened once, the LED[2] interrupt pin 1411 * will not be cleared unless we reading the interrupt status 1412 * register. If interrupts are in use, the normal interrupt 1413 * handling will clear the WOL event. Clear the WOL event 1414 * before enabling it if !phy_interrupt_is_valid() 1415 */ 1416 if (!phy_interrupt_is_valid(phydev)) 1417 __phy_read(phydev, MII_M1011_IEVENT); 1418 1419 /* Enable the WOL interrupt */ 1420 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1421 MII_88E1318S_PHY_CSIER_WOL_EIE); 1422 if (err < 0) 1423 goto error; 1424 1425 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1426 if (err < 0) 1427 goto error; 1428 1429 /* Setup LED[2] as interrupt pin (active low) */ 1430 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1431 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1432 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1433 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1434 if (err < 0) 1435 goto error; 1436 1437 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1438 if (err < 0) 1439 goto error; 1440 1441 /* Store the device address for the magic packet */ 1442 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1443 ((phydev->attached_dev->dev_addr[5] << 8) | 1444 phydev->attached_dev->dev_addr[4])); 1445 if (err < 0) 1446 goto error; 1447 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1448 ((phydev->attached_dev->dev_addr[3] << 8) | 1449 phydev->attached_dev->dev_addr[2])); 1450 if (err < 0) 1451 goto error; 1452 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1453 ((phydev->attached_dev->dev_addr[1] << 8) | 1454 phydev->attached_dev->dev_addr[0])); 1455 if (err < 0) 1456 goto error; 1457 1458 /* Clear WOL status and enable magic packet matching */ 1459 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1460 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1461 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1462 if (err < 0) 1463 goto error; 1464 } else { 1465 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1466 if (err < 0) 1467 goto error; 1468 1469 /* Clear WOL status and disable magic packet matching */ 1470 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1471 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1472 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1473 if (err < 0) 1474 goto error; 1475 } 1476 1477 error: 1478 return phy_restore_page(phydev, oldpage, err); 1479 } 1480 1481 static int marvell_get_sset_count(struct phy_device *phydev) 1482 { 1483 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1484 phydev->supported)) 1485 return ARRAY_SIZE(marvell_hw_stats); 1486 else 1487 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1488 } 1489 1490 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1491 { 1492 int i; 1493 1494 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) { 1495 strlcpy(data + i * ETH_GSTRING_LEN, 1496 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1497 } 1498 } 1499 1500 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1501 { 1502 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1503 struct marvell_priv *priv = phydev->priv; 1504 int val; 1505 u64 ret; 1506 1507 val = phy_read_paged(phydev, stat.page, stat.reg); 1508 if (val < 0) { 1509 ret = U64_MAX; 1510 } else { 1511 val = val & ((1 << stat.bits) - 1); 1512 priv->stats[i] += val; 1513 ret = priv->stats[i]; 1514 } 1515 1516 return ret; 1517 } 1518 1519 static void marvell_get_stats(struct phy_device *phydev, 1520 struct ethtool_stats *stats, u64 *data) 1521 { 1522 int i; 1523 1524 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) 1525 data[i] = marvell_get_stat(phydev, i); 1526 } 1527 1528 #ifdef CONFIG_HWMON 1529 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1530 { 1531 int oldpage; 1532 int ret = 0; 1533 int val; 1534 1535 *temp = 0; 1536 1537 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1538 if (oldpage < 0) 1539 goto error; 1540 1541 /* Enable temperature sensor */ 1542 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1543 if (ret < 0) 1544 goto error; 1545 1546 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1547 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1548 if (ret < 0) 1549 goto error; 1550 1551 /* Wait for temperature to stabilize */ 1552 usleep_range(10000, 12000); 1553 1554 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1555 if (val < 0) { 1556 ret = val; 1557 goto error; 1558 } 1559 1560 /* Disable temperature sensor */ 1561 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1562 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1563 if (ret < 0) 1564 goto error; 1565 1566 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1567 1568 error: 1569 return phy_restore_page(phydev, oldpage, ret); 1570 } 1571 1572 static int m88e1121_hwmon_read(struct device *dev, 1573 enum hwmon_sensor_types type, 1574 u32 attr, int channel, long *temp) 1575 { 1576 struct phy_device *phydev = dev_get_drvdata(dev); 1577 int err; 1578 1579 switch (attr) { 1580 case hwmon_temp_input: 1581 err = m88e1121_get_temp(phydev, temp); 1582 break; 1583 default: 1584 return -EOPNOTSUPP; 1585 } 1586 1587 return err; 1588 } 1589 1590 static umode_t m88e1121_hwmon_is_visible(const void *data, 1591 enum hwmon_sensor_types type, 1592 u32 attr, int channel) 1593 { 1594 if (type != hwmon_temp) 1595 return 0; 1596 1597 switch (attr) { 1598 case hwmon_temp_input: 1599 return 0444; 1600 default: 1601 return 0; 1602 } 1603 } 1604 1605 static u32 m88e1121_hwmon_chip_config[] = { 1606 HWMON_C_REGISTER_TZ, 1607 0 1608 }; 1609 1610 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1611 .type = hwmon_chip, 1612 .config = m88e1121_hwmon_chip_config, 1613 }; 1614 1615 static u32 m88e1121_hwmon_temp_config[] = { 1616 HWMON_T_INPUT, 1617 0 1618 }; 1619 1620 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1621 .type = hwmon_temp, 1622 .config = m88e1121_hwmon_temp_config, 1623 }; 1624 1625 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1626 &m88e1121_hwmon_chip, 1627 &m88e1121_hwmon_temp, 1628 NULL 1629 }; 1630 1631 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1632 .is_visible = m88e1121_hwmon_is_visible, 1633 .read = m88e1121_hwmon_read, 1634 }; 1635 1636 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1637 .ops = &m88e1121_hwmon_hwmon_ops, 1638 .info = m88e1121_hwmon_info, 1639 }; 1640 1641 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1642 { 1643 int ret; 1644 1645 *temp = 0; 1646 1647 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1648 MII_88E1510_TEMP_SENSOR); 1649 if (ret < 0) 1650 return ret; 1651 1652 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1653 1654 return 0; 1655 } 1656 1657 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1658 { 1659 int ret; 1660 1661 *temp = 0; 1662 1663 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1664 MII_88E1121_MISC_TEST); 1665 if (ret < 0) 1666 return ret; 1667 1668 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1669 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1670 /* convert to mC */ 1671 *temp *= 1000; 1672 1673 return 0; 1674 } 1675 1676 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1677 { 1678 temp = temp / 1000; 1679 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1680 1681 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1682 MII_88E1121_MISC_TEST, 1683 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1684 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1685 } 1686 1687 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1688 { 1689 int ret; 1690 1691 *alarm = false; 1692 1693 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1694 MII_88E1121_MISC_TEST); 1695 if (ret < 0) 1696 return ret; 1697 1698 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1699 1700 return 0; 1701 } 1702 1703 static int m88e1510_hwmon_read(struct device *dev, 1704 enum hwmon_sensor_types type, 1705 u32 attr, int channel, long *temp) 1706 { 1707 struct phy_device *phydev = dev_get_drvdata(dev); 1708 int err; 1709 1710 switch (attr) { 1711 case hwmon_temp_input: 1712 err = m88e1510_get_temp(phydev, temp); 1713 break; 1714 case hwmon_temp_crit: 1715 err = m88e1510_get_temp_critical(phydev, temp); 1716 break; 1717 case hwmon_temp_max_alarm: 1718 err = m88e1510_get_temp_alarm(phydev, temp); 1719 break; 1720 default: 1721 return -EOPNOTSUPP; 1722 } 1723 1724 return err; 1725 } 1726 1727 static int m88e1510_hwmon_write(struct device *dev, 1728 enum hwmon_sensor_types type, 1729 u32 attr, int channel, long temp) 1730 { 1731 struct phy_device *phydev = dev_get_drvdata(dev); 1732 int err; 1733 1734 switch (attr) { 1735 case hwmon_temp_crit: 1736 err = m88e1510_set_temp_critical(phydev, temp); 1737 break; 1738 default: 1739 return -EOPNOTSUPP; 1740 } 1741 return err; 1742 } 1743 1744 static umode_t m88e1510_hwmon_is_visible(const void *data, 1745 enum hwmon_sensor_types type, 1746 u32 attr, int channel) 1747 { 1748 if (type != hwmon_temp) 1749 return 0; 1750 1751 switch (attr) { 1752 case hwmon_temp_input: 1753 case hwmon_temp_max_alarm: 1754 return 0444; 1755 case hwmon_temp_crit: 1756 return 0644; 1757 default: 1758 return 0; 1759 } 1760 } 1761 1762 static u32 m88e1510_hwmon_temp_config[] = { 1763 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1764 0 1765 }; 1766 1767 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1768 .type = hwmon_temp, 1769 .config = m88e1510_hwmon_temp_config, 1770 }; 1771 1772 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1773 &m88e1121_hwmon_chip, 1774 &m88e1510_hwmon_temp, 1775 NULL 1776 }; 1777 1778 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1779 .is_visible = m88e1510_hwmon_is_visible, 1780 .read = m88e1510_hwmon_read, 1781 .write = m88e1510_hwmon_write, 1782 }; 1783 1784 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1785 .ops = &m88e1510_hwmon_hwmon_ops, 1786 .info = m88e1510_hwmon_info, 1787 }; 1788 1789 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 1790 { 1791 int sum = 0; 1792 int oldpage; 1793 int ret = 0; 1794 int i; 1795 1796 *temp = 0; 1797 1798 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1799 if (oldpage < 0) 1800 goto error; 1801 1802 /* Enable temperature sensor */ 1803 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1804 if (ret < 0) 1805 goto error; 1806 1807 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1808 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 1809 MII_88E6390_MISC_TEST_SAMPLE_1S; 1810 1811 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1812 if (ret < 0) 1813 goto error; 1814 1815 /* Wait for temperature to stabilize */ 1816 usleep_range(10000, 12000); 1817 1818 /* Reading the temperature sense has an errata. You need to read 1819 * a number of times and take an average. 1820 */ 1821 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 1822 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 1823 if (ret < 0) 1824 goto error; 1825 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 1826 } 1827 1828 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 1829 *temp = (sum - 75) * 1000; 1830 1831 /* Disable temperature sensor */ 1832 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1833 if (ret < 0) 1834 goto error; 1835 1836 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1837 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 1838 1839 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1840 1841 error: 1842 phy_restore_page(phydev, oldpage, ret); 1843 1844 return ret; 1845 } 1846 1847 static int m88e6390_hwmon_read(struct device *dev, 1848 enum hwmon_sensor_types type, 1849 u32 attr, int channel, long *temp) 1850 { 1851 struct phy_device *phydev = dev_get_drvdata(dev); 1852 int err; 1853 1854 switch (attr) { 1855 case hwmon_temp_input: 1856 err = m88e6390_get_temp(phydev, temp); 1857 break; 1858 default: 1859 return -EOPNOTSUPP; 1860 } 1861 1862 return err; 1863 } 1864 1865 static umode_t m88e6390_hwmon_is_visible(const void *data, 1866 enum hwmon_sensor_types type, 1867 u32 attr, int channel) 1868 { 1869 if (type != hwmon_temp) 1870 return 0; 1871 1872 switch (attr) { 1873 case hwmon_temp_input: 1874 return 0444; 1875 default: 1876 return 0; 1877 } 1878 } 1879 1880 static u32 m88e6390_hwmon_temp_config[] = { 1881 HWMON_T_INPUT, 1882 0 1883 }; 1884 1885 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 1886 .type = hwmon_temp, 1887 .config = m88e6390_hwmon_temp_config, 1888 }; 1889 1890 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 1891 &m88e1121_hwmon_chip, 1892 &m88e6390_hwmon_temp, 1893 NULL 1894 }; 1895 1896 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 1897 .is_visible = m88e6390_hwmon_is_visible, 1898 .read = m88e6390_hwmon_read, 1899 }; 1900 1901 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 1902 .ops = &m88e6390_hwmon_hwmon_ops, 1903 .info = m88e6390_hwmon_info, 1904 }; 1905 1906 static int marvell_hwmon_name(struct phy_device *phydev) 1907 { 1908 struct marvell_priv *priv = phydev->priv; 1909 struct device *dev = &phydev->mdio.dev; 1910 const char *devname = dev_name(dev); 1911 size_t len = strlen(devname); 1912 int i, j; 1913 1914 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 1915 if (!priv->hwmon_name) 1916 return -ENOMEM; 1917 1918 for (i = j = 0; i < len && devname[i]; i++) { 1919 if (isalnum(devname[i])) 1920 priv->hwmon_name[j++] = devname[i]; 1921 } 1922 1923 return 0; 1924 } 1925 1926 static int marvell_hwmon_probe(struct phy_device *phydev, 1927 const struct hwmon_chip_info *chip) 1928 { 1929 struct marvell_priv *priv = phydev->priv; 1930 struct device *dev = &phydev->mdio.dev; 1931 int err; 1932 1933 err = marvell_hwmon_name(phydev); 1934 if (err) 1935 return err; 1936 1937 priv->hwmon_dev = devm_hwmon_device_register_with_info( 1938 dev, priv->hwmon_name, phydev, chip, NULL); 1939 1940 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 1941 } 1942 1943 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1944 { 1945 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 1946 } 1947 1948 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1949 { 1950 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 1951 } 1952 1953 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1954 { 1955 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 1956 } 1957 #else 1958 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1959 { 1960 return 0; 1961 } 1962 1963 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1964 { 1965 return 0; 1966 } 1967 1968 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1969 { 1970 return 0; 1971 } 1972 #endif 1973 1974 static int marvell_probe(struct phy_device *phydev) 1975 { 1976 struct marvell_priv *priv; 1977 1978 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 1979 if (!priv) 1980 return -ENOMEM; 1981 1982 phydev->priv = priv; 1983 1984 return 0; 1985 } 1986 1987 static int m88e1121_probe(struct phy_device *phydev) 1988 { 1989 int err; 1990 1991 err = marvell_probe(phydev); 1992 if (err) 1993 return err; 1994 1995 return m88e1121_hwmon_probe(phydev); 1996 } 1997 1998 static int m88e1510_probe(struct phy_device *phydev) 1999 { 2000 int err; 2001 2002 err = marvell_probe(phydev); 2003 if (err) 2004 return err; 2005 2006 return m88e1510_hwmon_probe(phydev); 2007 } 2008 2009 static int m88e6390_probe(struct phy_device *phydev) 2010 { 2011 int err; 2012 2013 err = marvell_probe(phydev); 2014 if (err) 2015 return err; 2016 2017 return m88e6390_hwmon_probe(phydev); 2018 } 2019 2020 static struct phy_driver marvell_drivers[] = { 2021 { 2022 .phy_id = MARVELL_PHY_ID_88E1101, 2023 .phy_id_mask = MARVELL_PHY_ID_MASK, 2024 .name = "Marvell 88E1101", 2025 .features = PHY_GBIT_FEATURES, 2026 .probe = marvell_probe, 2027 .config_init = &marvell_config_init, 2028 .config_aneg = &m88e1101_config_aneg, 2029 .ack_interrupt = &marvell_ack_interrupt, 2030 .config_intr = &marvell_config_intr, 2031 .resume = &genphy_resume, 2032 .suspend = &genphy_suspend, 2033 .read_page = marvell_read_page, 2034 .write_page = marvell_write_page, 2035 .get_sset_count = marvell_get_sset_count, 2036 .get_strings = marvell_get_strings, 2037 .get_stats = marvell_get_stats, 2038 }, 2039 { 2040 .phy_id = MARVELL_PHY_ID_88E1112, 2041 .phy_id_mask = MARVELL_PHY_ID_MASK, 2042 .name = "Marvell 88E1112", 2043 .features = PHY_GBIT_FEATURES, 2044 .probe = marvell_probe, 2045 .config_init = &m88e1111_config_init, 2046 .config_aneg = &marvell_config_aneg, 2047 .ack_interrupt = &marvell_ack_interrupt, 2048 .config_intr = &marvell_config_intr, 2049 .resume = &genphy_resume, 2050 .suspend = &genphy_suspend, 2051 .read_page = marvell_read_page, 2052 .write_page = marvell_write_page, 2053 .get_sset_count = marvell_get_sset_count, 2054 .get_strings = marvell_get_strings, 2055 .get_stats = marvell_get_stats, 2056 }, 2057 { 2058 .phy_id = MARVELL_PHY_ID_88E1111, 2059 .phy_id_mask = MARVELL_PHY_ID_MASK, 2060 .name = "Marvell 88E1111", 2061 .features = PHY_GBIT_FEATURES, 2062 .probe = marvell_probe, 2063 .config_init = &m88e1111_config_init, 2064 .config_aneg = &marvell_config_aneg, 2065 .read_status = &marvell_read_status, 2066 .ack_interrupt = &marvell_ack_interrupt, 2067 .config_intr = &marvell_config_intr, 2068 .resume = &genphy_resume, 2069 .suspend = &genphy_suspend, 2070 .read_page = marvell_read_page, 2071 .write_page = marvell_write_page, 2072 .get_sset_count = marvell_get_sset_count, 2073 .get_strings = marvell_get_strings, 2074 .get_stats = marvell_get_stats, 2075 }, 2076 { 2077 .phy_id = MARVELL_PHY_ID_88E1118, 2078 .phy_id_mask = MARVELL_PHY_ID_MASK, 2079 .name = "Marvell 88E1118", 2080 .features = PHY_GBIT_FEATURES, 2081 .probe = marvell_probe, 2082 .config_init = &m88e1118_config_init, 2083 .config_aneg = &m88e1118_config_aneg, 2084 .ack_interrupt = &marvell_ack_interrupt, 2085 .config_intr = &marvell_config_intr, 2086 .resume = &genphy_resume, 2087 .suspend = &genphy_suspend, 2088 .read_page = marvell_read_page, 2089 .write_page = marvell_write_page, 2090 .get_sset_count = marvell_get_sset_count, 2091 .get_strings = marvell_get_strings, 2092 .get_stats = marvell_get_stats, 2093 }, 2094 { 2095 .phy_id = MARVELL_PHY_ID_88E1121R, 2096 .phy_id_mask = MARVELL_PHY_ID_MASK, 2097 .name = "Marvell 88E1121R", 2098 .features = PHY_GBIT_FEATURES, 2099 .probe = &m88e1121_probe, 2100 .config_init = &marvell_config_init, 2101 .config_aneg = &m88e1121_config_aneg, 2102 .read_status = &marvell_read_status, 2103 .ack_interrupt = &marvell_ack_interrupt, 2104 .config_intr = &marvell_config_intr, 2105 .did_interrupt = &m88e1121_did_interrupt, 2106 .resume = &genphy_resume, 2107 .suspend = &genphy_suspend, 2108 .read_page = marvell_read_page, 2109 .write_page = marvell_write_page, 2110 .get_sset_count = marvell_get_sset_count, 2111 .get_strings = marvell_get_strings, 2112 .get_stats = marvell_get_stats, 2113 }, 2114 { 2115 .phy_id = MARVELL_PHY_ID_88E1318S, 2116 .phy_id_mask = MARVELL_PHY_ID_MASK, 2117 .name = "Marvell 88E1318S", 2118 .features = PHY_GBIT_FEATURES, 2119 .probe = marvell_probe, 2120 .config_init = &m88e1318_config_init, 2121 .config_aneg = &m88e1318_config_aneg, 2122 .read_status = &marvell_read_status, 2123 .ack_interrupt = &marvell_ack_interrupt, 2124 .config_intr = &marvell_config_intr, 2125 .did_interrupt = &m88e1121_did_interrupt, 2126 .get_wol = &m88e1318_get_wol, 2127 .set_wol = &m88e1318_set_wol, 2128 .resume = &genphy_resume, 2129 .suspend = &genphy_suspend, 2130 .read_page = marvell_read_page, 2131 .write_page = marvell_write_page, 2132 .get_sset_count = marvell_get_sset_count, 2133 .get_strings = marvell_get_strings, 2134 .get_stats = marvell_get_stats, 2135 }, 2136 { 2137 .phy_id = MARVELL_PHY_ID_88E1145, 2138 .phy_id_mask = MARVELL_PHY_ID_MASK, 2139 .name = "Marvell 88E1145", 2140 .features = PHY_GBIT_FEATURES, 2141 .probe = marvell_probe, 2142 .config_init = &m88e1145_config_init, 2143 .config_aneg = &m88e1101_config_aneg, 2144 .read_status = &genphy_read_status, 2145 .ack_interrupt = &marvell_ack_interrupt, 2146 .config_intr = &marvell_config_intr, 2147 .resume = &genphy_resume, 2148 .suspend = &genphy_suspend, 2149 .read_page = marvell_read_page, 2150 .write_page = marvell_write_page, 2151 .get_sset_count = marvell_get_sset_count, 2152 .get_strings = marvell_get_strings, 2153 .get_stats = marvell_get_stats, 2154 }, 2155 { 2156 .phy_id = MARVELL_PHY_ID_88E1149R, 2157 .phy_id_mask = MARVELL_PHY_ID_MASK, 2158 .name = "Marvell 88E1149R", 2159 .features = PHY_GBIT_FEATURES, 2160 .probe = marvell_probe, 2161 .config_init = &m88e1149_config_init, 2162 .config_aneg = &m88e1118_config_aneg, 2163 .ack_interrupt = &marvell_ack_interrupt, 2164 .config_intr = &marvell_config_intr, 2165 .resume = &genphy_resume, 2166 .suspend = &genphy_suspend, 2167 .read_page = marvell_read_page, 2168 .write_page = marvell_write_page, 2169 .get_sset_count = marvell_get_sset_count, 2170 .get_strings = marvell_get_strings, 2171 .get_stats = marvell_get_stats, 2172 }, 2173 { 2174 .phy_id = MARVELL_PHY_ID_88E1240, 2175 .phy_id_mask = MARVELL_PHY_ID_MASK, 2176 .name = "Marvell 88E1240", 2177 .features = PHY_GBIT_FEATURES, 2178 .probe = marvell_probe, 2179 .config_init = &m88e1111_config_init, 2180 .config_aneg = &marvell_config_aneg, 2181 .ack_interrupt = &marvell_ack_interrupt, 2182 .config_intr = &marvell_config_intr, 2183 .resume = &genphy_resume, 2184 .suspend = &genphy_suspend, 2185 .read_page = marvell_read_page, 2186 .write_page = marvell_write_page, 2187 .get_sset_count = marvell_get_sset_count, 2188 .get_strings = marvell_get_strings, 2189 .get_stats = marvell_get_stats, 2190 }, 2191 { 2192 .phy_id = MARVELL_PHY_ID_88E1116R, 2193 .phy_id_mask = MARVELL_PHY_ID_MASK, 2194 .name = "Marvell 88E1116R", 2195 .features = PHY_GBIT_FEATURES, 2196 .probe = marvell_probe, 2197 .config_init = &m88e1116r_config_init, 2198 .ack_interrupt = &marvell_ack_interrupt, 2199 .config_intr = &marvell_config_intr, 2200 .resume = &genphy_resume, 2201 .suspend = &genphy_suspend, 2202 .read_page = marvell_read_page, 2203 .write_page = marvell_write_page, 2204 .get_sset_count = marvell_get_sset_count, 2205 .get_strings = marvell_get_strings, 2206 .get_stats = marvell_get_stats, 2207 }, 2208 { 2209 .phy_id = MARVELL_PHY_ID_88E1510, 2210 .phy_id_mask = MARVELL_PHY_ID_MASK, 2211 .name = "Marvell 88E1510", 2212 .features = PHY_GBIT_FIBRE_FEATURES, 2213 .probe = &m88e1510_probe, 2214 .config_init = &m88e1510_config_init, 2215 .config_aneg = &m88e1510_config_aneg, 2216 .read_status = &marvell_read_status, 2217 .ack_interrupt = &marvell_ack_interrupt, 2218 .config_intr = &marvell_config_intr, 2219 .did_interrupt = &m88e1121_did_interrupt, 2220 .get_wol = &m88e1318_get_wol, 2221 .set_wol = &m88e1318_set_wol, 2222 .resume = &marvell_resume, 2223 .suspend = &marvell_suspend, 2224 .read_page = marvell_read_page, 2225 .write_page = marvell_write_page, 2226 .get_sset_count = marvell_get_sset_count, 2227 .get_strings = marvell_get_strings, 2228 .get_stats = marvell_get_stats, 2229 .set_loopback = genphy_loopback, 2230 }, 2231 { 2232 .phy_id = MARVELL_PHY_ID_88E1540, 2233 .phy_id_mask = MARVELL_PHY_ID_MASK, 2234 .name = "Marvell 88E1540", 2235 .features = PHY_GBIT_FEATURES, 2236 .probe = m88e1510_probe, 2237 .config_init = &marvell_config_init, 2238 .config_aneg = &m88e1510_config_aneg, 2239 .read_status = &marvell_read_status, 2240 .ack_interrupt = &marvell_ack_interrupt, 2241 .config_intr = &marvell_config_intr, 2242 .did_interrupt = &m88e1121_did_interrupt, 2243 .resume = &genphy_resume, 2244 .suspend = &genphy_suspend, 2245 .read_page = marvell_read_page, 2246 .write_page = marvell_write_page, 2247 .get_sset_count = marvell_get_sset_count, 2248 .get_strings = marvell_get_strings, 2249 .get_stats = marvell_get_stats, 2250 }, 2251 { 2252 .phy_id = MARVELL_PHY_ID_88E1545, 2253 .phy_id_mask = MARVELL_PHY_ID_MASK, 2254 .name = "Marvell 88E1545", 2255 .probe = m88e1510_probe, 2256 .features = PHY_GBIT_FEATURES, 2257 .config_init = &marvell_config_init, 2258 .config_aneg = &m88e1510_config_aneg, 2259 .read_status = &marvell_read_status, 2260 .ack_interrupt = &marvell_ack_interrupt, 2261 .config_intr = &marvell_config_intr, 2262 .did_interrupt = &m88e1121_did_interrupt, 2263 .resume = &genphy_resume, 2264 .suspend = &genphy_suspend, 2265 .read_page = marvell_read_page, 2266 .write_page = marvell_write_page, 2267 .get_sset_count = marvell_get_sset_count, 2268 .get_strings = marvell_get_strings, 2269 .get_stats = marvell_get_stats, 2270 }, 2271 { 2272 .phy_id = MARVELL_PHY_ID_88E3016, 2273 .phy_id_mask = MARVELL_PHY_ID_MASK, 2274 .name = "Marvell 88E3016", 2275 .features = PHY_BASIC_FEATURES, 2276 .probe = marvell_probe, 2277 .config_init = &m88e3016_config_init, 2278 .aneg_done = &marvell_aneg_done, 2279 .read_status = &marvell_read_status, 2280 .ack_interrupt = &marvell_ack_interrupt, 2281 .config_intr = &marvell_config_intr, 2282 .did_interrupt = &m88e1121_did_interrupt, 2283 .resume = &genphy_resume, 2284 .suspend = &genphy_suspend, 2285 .read_page = marvell_read_page, 2286 .write_page = marvell_write_page, 2287 .get_sset_count = marvell_get_sset_count, 2288 .get_strings = marvell_get_strings, 2289 .get_stats = marvell_get_stats, 2290 }, 2291 { 2292 .phy_id = MARVELL_PHY_ID_88E6390, 2293 .phy_id_mask = MARVELL_PHY_ID_MASK, 2294 .name = "Marvell 88E6390", 2295 .features = PHY_GBIT_FEATURES, 2296 .probe = m88e6390_probe, 2297 .config_init = &marvell_config_init, 2298 .config_aneg = &m88e6390_config_aneg, 2299 .read_status = &marvell_read_status, 2300 .ack_interrupt = &marvell_ack_interrupt, 2301 .config_intr = &marvell_config_intr, 2302 .did_interrupt = &m88e1121_did_interrupt, 2303 .resume = &genphy_resume, 2304 .suspend = &genphy_suspend, 2305 .read_page = marvell_read_page, 2306 .write_page = marvell_write_page, 2307 .get_sset_count = marvell_get_sset_count, 2308 .get_strings = marvell_get_strings, 2309 .get_stats = marvell_get_stats, 2310 }, 2311 }; 2312 2313 module_phy_driver(marvell_drivers); 2314 2315 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2316 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2317 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2318 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2319 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2320 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2321 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2322 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2323 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2324 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2325 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2326 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2327 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2328 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2329 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2330 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2331 { } 2332 }; 2333 2334 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2335