1 /* 2 * drivers/net/phy/marvell.c 3 * 4 * Driver for Marvell PHYs 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 * 10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the 14 * Free Software Foundation; either version 2 of the License, or (at your 15 * option) any later version. 16 * 17 */ 18 #include <linux/kernel.h> 19 #include <linux/string.h> 20 #include <linux/ctype.h> 21 #include <linux/errno.h> 22 #include <linux/unistd.h> 23 #include <linux/hwmon.h> 24 #include <linux/interrupt.h> 25 #include <linux/init.h> 26 #include <linux/delay.h> 27 #include <linux/netdevice.h> 28 #include <linux/etherdevice.h> 29 #include <linux/skbuff.h> 30 #include <linux/spinlock.h> 31 #include <linux/mm.h> 32 #include <linux/module.h> 33 #include <linux/mii.h> 34 #include <linux/ethtool.h> 35 #include <linux/phy.h> 36 #include <linux/marvell_phy.h> 37 #include <linux/of.h> 38 39 #include <linux/io.h> 40 #include <asm/irq.h> 41 #include <linux/uaccess.h> 42 43 #define MII_MARVELL_PHY_PAGE 22 44 #define MII_MARVELL_COPPER_PAGE 0x00 45 #define MII_MARVELL_FIBER_PAGE 0x01 46 #define MII_MARVELL_MSCR_PAGE 0x02 47 #define MII_MARVELL_LED_PAGE 0x03 48 #define MII_MARVELL_MISC_TEST_PAGE 0x06 49 #define MII_MARVELL_WOL_PAGE 0x11 50 51 #define MII_M1011_IEVENT 0x13 52 #define MII_M1011_IEVENT_CLEAR 0x0000 53 54 #define MII_M1011_IMASK 0x12 55 #define MII_M1011_IMASK_INIT 0x6400 56 #define MII_M1011_IMASK_CLEAR 0x0000 57 58 #define MII_M1011_PHY_SCR 0x10 59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12 61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800 62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 65 66 #define MII_M1111_PHY_LED_CONTROL 0x18 67 #define MII_M1111_PHY_LED_DIRECT 0x4100 68 #define MII_M1111_PHY_LED_COMBINE 0x411c 69 #define MII_M1111_PHY_EXT_CR 0x14 70 #define MII_M1111_RGMII_RX_DELAY BIT(7) 71 #define MII_M1111_RGMII_TX_DELAY BIT(1) 72 #define MII_M1111_PHY_EXT_SR 0x1b 73 74 #define MII_M1111_HWCFG_MODE_MASK 0xf 75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 77 #define MII_M1111_HWCFG_MODE_RTBI 0x7 78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 82 83 #define MII_88E1121_PHY_MSCR_REG 21 84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(BIT(5) | BIT(4))) 87 88 #define MII_88E1121_MISC_TEST 0x1a 89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 95 96 #define MII_88E1510_TEMP_SENSOR 0x1b 97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 98 99 #define MII_88E1318S_PHY_MSCR1_REG 16 100 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 101 102 /* Copper Specific Interrupt Enable Register */ 103 #define MII_88E1318S_PHY_CSIER 0x12 104 /* WOL Event Interrupt Enable */ 105 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 106 107 /* LED Timer Control Register */ 108 #define MII_88E1318S_PHY_LED_TCR 0x12 109 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 110 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 111 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 112 113 /* Magic Packet MAC address registers */ 114 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 115 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 116 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 117 118 #define MII_88E1318S_PHY_WOL_CTRL 0x10 119 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 120 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 121 122 #define MII_88E1121_PHY_LED_CTRL 16 123 #define MII_88E1121_PHY_LED_DEF 0x0030 124 125 #define MII_M1011_PHY_STATUS 0x11 126 #define MII_M1011_PHY_STATUS_1000 0x8000 127 #define MII_M1011_PHY_STATUS_100 0x4000 128 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 129 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 130 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 131 #define MII_M1011_PHY_STATUS_LINK 0x0400 132 133 #define MII_88E3016_PHY_SPEC_CTRL 0x10 134 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 135 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 136 137 #define MII_88E1510_GEN_CTRL_REG_1 0x14 138 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 139 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 140 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 141 142 #define LPA_FIBER_1000HALF 0x40 143 #define LPA_FIBER_1000FULL 0x20 144 145 #define LPA_PAUSE_FIBER 0x180 146 #define LPA_PAUSE_ASYM_FIBER 0x100 147 148 #define ADVERTISE_FIBER_1000HALF 0x40 149 #define ADVERTISE_FIBER_1000FULL 0x20 150 151 #define ADVERTISE_PAUSE_FIBER 0x180 152 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 153 154 #define REGISTER_LINK_STATUS 0x400 155 #define NB_FIBER_STATS 1 156 157 MODULE_DESCRIPTION("Marvell PHY driver"); 158 MODULE_AUTHOR("Andy Fleming"); 159 MODULE_LICENSE("GPL"); 160 161 struct marvell_hw_stat { 162 const char *string; 163 u8 page; 164 u8 reg; 165 u8 bits; 166 }; 167 168 static struct marvell_hw_stat marvell_hw_stats[] = { 169 { "phy_receive_errors_copper", 0, 21, 16}, 170 { "phy_idle_errors", 0, 10, 8 }, 171 { "phy_receive_errors_fiber", 1, 21, 16}, 172 }; 173 174 struct marvell_priv { 175 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 176 char *hwmon_name; 177 struct device *hwmon_dev; 178 }; 179 180 static int marvell_get_page(struct phy_device *phydev) 181 { 182 return phy_read(phydev, MII_MARVELL_PHY_PAGE); 183 } 184 185 static int marvell_set_page(struct phy_device *phydev, int page) 186 { 187 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 188 } 189 190 static int marvell_get_set_page(struct phy_device *phydev, int page) 191 { 192 int oldpage = marvell_get_page(phydev); 193 194 if (oldpage < 0) 195 return oldpage; 196 197 if (page != oldpage) 198 return marvell_set_page(phydev, page); 199 200 return 0; 201 } 202 203 static int marvell_ack_interrupt(struct phy_device *phydev) 204 { 205 int err; 206 207 /* Clear the interrupts by reading the reg */ 208 err = phy_read(phydev, MII_M1011_IEVENT); 209 210 if (err < 0) 211 return err; 212 213 return 0; 214 } 215 216 static int marvell_config_intr(struct phy_device *phydev) 217 { 218 int err; 219 220 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 221 err = phy_write(phydev, MII_M1011_IMASK, 222 MII_M1011_IMASK_INIT); 223 else 224 err = phy_write(phydev, MII_M1011_IMASK, 225 MII_M1011_IMASK_CLEAR); 226 227 return err; 228 } 229 230 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 231 { 232 int reg; 233 int err; 234 int val; 235 236 /* get the current settings */ 237 reg = phy_read(phydev, MII_M1011_PHY_SCR); 238 if (reg < 0) 239 return reg; 240 241 val = reg; 242 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 243 switch (polarity) { 244 case ETH_TP_MDI: 245 val |= MII_M1011_PHY_SCR_MDI; 246 break; 247 case ETH_TP_MDI_X: 248 val |= MII_M1011_PHY_SCR_MDI_X; 249 break; 250 case ETH_TP_MDI_AUTO: 251 case ETH_TP_MDI_INVALID: 252 default: 253 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 254 break; 255 } 256 257 if (val != reg) { 258 /* Set the new polarity value in the register */ 259 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 260 if (err) 261 return err; 262 } 263 264 return 0; 265 } 266 267 static int marvell_set_downshift(struct phy_device *phydev, bool enable, 268 u8 retries) 269 { 270 int reg; 271 272 reg = phy_read(phydev, MII_M1011_PHY_SCR); 273 if (reg < 0) 274 return reg; 275 276 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK; 277 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT); 278 if (enable) 279 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN; 280 281 return phy_write(phydev, MII_M1011_PHY_SCR, reg); 282 } 283 284 static int marvell_config_aneg(struct phy_device *phydev) 285 { 286 int err; 287 288 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 289 if (err < 0) 290 return err; 291 292 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 293 MII_M1111_PHY_LED_DIRECT); 294 if (err < 0) 295 return err; 296 297 err = genphy_config_aneg(phydev); 298 if (err < 0) 299 return err; 300 301 if (phydev->autoneg != AUTONEG_ENABLE) { 302 /* A write to speed/duplex bits (that is performed by 303 * genphy_config_aneg() call above) must be followed by 304 * a software reset. Otherwise, the write has no effect. 305 */ 306 err = genphy_soft_reset(phydev); 307 if (err < 0) 308 return err; 309 } 310 311 return 0; 312 } 313 314 static int m88e1101_config_aneg(struct phy_device *phydev) 315 { 316 int err; 317 318 /* This Marvell PHY has an errata which requires 319 * that certain registers get written in order 320 * to restart autonegotiation 321 */ 322 err = genphy_soft_reset(phydev); 323 if (err < 0) 324 return err; 325 326 err = phy_write(phydev, 0x1d, 0x1f); 327 if (err < 0) 328 return err; 329 330 err = phy_write(phydev, 0x1e, 0x200c); 331 if (err < 0) 332 return err; 333 334 err = phy_write(phydev, 0x1d, 0x5); 335 if (err < 0) 336 return err; 337 338 err = phy_write(phydev, 0x1e, 0); 339 if (err < 0) 340 return err; 341 342 err = phy_write(phydev, 0x1e, 0x100); 343 if (err < 0) 344 return err; 345 346 return marvell_config_aneg(phydev); 347 } 348 349 static int m88e1111_config_aneg(struct phy_device *phydev) 350 { 351 int err; 352 353 /* The Marvell PHY has an errata which requires 354 * that certain registers get written in order 355 * to restart autonegotiation 356 */ 357 err = genphy_soft_reset(phydev); 358 359 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 360 if (err < 0) 361 return err; 362 363 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 364 MII_M1111_PHY_LED_DIRECT); 365 if (err < 0) 366 return err; 367 368 err = genphy_config_aneg(phydev); 369 if (err < 0) 370 return err; 371 372 if (phydev->autoneg != AUTONEG_ENABLE) { 373 /* A write to speed/duplex bits (that is performed by 374 * genphy_config_aneg() call above) must be followed by 375 * a software reset. Otherwise, the write has no effect. 376 */ 377 err = genphy_soft_reset(phydev); 378 if (err < 0) 379 return err; 380 } 381 382 return 0; 383 } 384 385 #ifdef CONFIG_OF_MDIO 386 /* Set and/or override some configuration registers based on the 387 * marvell,reg-init property stored in the of_node for the phydev. 388 * 389 * marvell,reg-init = <reg-page reg mask value>,...; 390 * 391 * There may be one or more sets of <reg-page reg mask value>: 392 * 393 * reg-page: which register bank to use. 394 * reg: the register. 395 * mask: if non-zero, ANDed with existing register value. 396 * value: ORed with the masked value and written to the regiser. 397 * 398 */ 399 static int marvell_of_reg_init(struct phy_device *phydev) 400 { 401 const __be32 *paddr; 402 int len, i, saved_page, current_page, ret; 403 404 if (!phydev->mdio.dev.of_node) 405 return 0; 406 407 paddr = of_get_property(phydev->mdio.dev.of_node, 408 "marvell,reg-init", &len); 409 if (!paddr || len < (4 * sizeof(*paddr))) 410 return 0; 411 412 saved_page = marvell_get_page(phydev); 413 if (saved_page < 0) 414 return saved_page; 415 current_page = saved_page; 416 417 ret = 0; 418 len /= sizeof(*paddr); 419 for (i = 0; i < len - 3; i += 4) { 420 u16 page = be32_to_cpup(paddr + i); 421 u16 reg = be32_to_cpup(paddr + i + 1); 422 u16 mask = be32_to_cpup(paddr + i + 2); 423 u16 val_bits = be32_to_cpup(paddr + i + 3); 424 int val; 425 426 if (page != current_page) { 427 current_page = page; 428 ret = marvell_set_page(phydev, page); 429 if (ret < 0) 430 goto err; 431 } 432 433 val = 0; 434 if (mask) { 435 val = phy_read(phydev, reg); 436 if (val < 0) { 437 ret = val; 438 goto err; 439 } 440 val &= mask; 441 } 442 val |= val_bits; 443 444 ret = phy_write(phydev, reg, val); 445 if (ret < 0) 446 goto err; 447 } 448 err: 449 if (current_page != saved_page) { 450 i = marvell_set_page(phydev, saved_page); 451 if (ret == 0) 452 ret = i; 453 } 454 return ret; 455 } 456 #else 457 static int marvell_of_reg_init(struct phy_device *phydev) 458 { 459 return 0; 460 } 461 #endif /* CONFIG_OF_MDIO */ 462 463 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 464 { 465 int err, oldpage, mscr; 466 467 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE); 468 if (oldpage < 0) 469 return oldpage; 470 471 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG); 472 if (mscr < 0) { 473 err = mscr; 474 goto out; 475 } 476 477 mscr &= MII_88E1121_PHY_MSCR_DELAY_MASK; 478 479 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 480 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY | 481 MII_88E1121_PHY_MSCR_TX_DELAY); 482 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 483 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY; 484 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 485 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY; 486 487 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr); 488 489 out: 490 marvell_set_page(phydev, oldpage); 491 492 return err; 493 } 494 495 static int m88e1121_config_aneg(struct phy_device *phydev) 496 { 497 int err = 0; 498 499 if (phy_interface_is_rgmii(phydev)) { 500 err = m88e1121_config_aneg_rgmii_delays(phydev); 501 if (err) 502 return err; 503 } 504 505 err = genphy_soft_reset(phydev); 506 if (err < 0) 507 return err; 508 509 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 510 if (err < 0) 511 return err; 512 513 return genphy_config_aneg(phydev); 514 } 515 516 static int m88e1318_config_aneg(struct phy_device *phydev) 517 { 518 int err, oldpage, mscr; 519 520 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE); 521 if (oldpage < 0) 522 return oldpage; 523 524 mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG); 525 mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD; 526 527 err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr); 528 if (err < 0) 529 return err; 530 531 err = marvell_set_page(phydev, oldpage); 532 if (err < 0) 533 return err; 534 535 return m88e1121_config_aneg(phydev); 536 } 537 538 /** 539 * ethtool_adv_to_fiber_adv_t 540 * @ethadv: the ethtool advertisement settings 541 * 542 * A small helper function that translates ethtool advertisement 543 * settings to phy autonegotiation advertisements for the 544 * MII_ADV register for fiber link. 545 */ 546 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv) 547 { 548 u32 result = 0; 549 550 if (ethadv & ADVERTISED_1000baseT_Half) 551 result |= ADVERTISE_FIBER_1000HALF; 552 if (ethadv & ADVERTISED_1000baseT_Full) 553 result |= ADVERTISE_FIBER_1000FULL; 554 555 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP)) 556 result |= LPA_PAUSE_ASYM_FIBER; 557 else if (ethadv & ADVERTISE_PAUSE_CAP) 558 result |= (ADVERTISE_PAUSE_FIBER 559 & (~ADVERTISE_PAUSE_ASYM_FIBER)); 560 561 return result; 562 } 563 564 /** 565 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 566 * @phydev: target phy_device struct 567 * 568 * Description: If auto-negotiation is enabled, we configure the 569 * advertising, and then restart auto-negotiation. If it is not 570 * enabled, then we write the BMCR. Adapted for fiber link in 571 * some Marvell's devices. 572 */ 573 static int marvell_config_aneg_fiber(struct phy_device *phydev) 574 { 575 int changed = 0; 576 int err; 577 int adv, oldadv; 578 u32 advertise; 579 580 if (phydev->autoneg != AUTONEG_ENABLE) 581 return genphy_setup_forced(phydev); 582 583 /* Only allow advertising what this PHY supports */ 584 phydev->advertising &= phydev->supported; 585 advertise = phydev->advertising; 586 587 /* Setup fiber advertisement */ 588 adv = phy_read(phydev, MII_ADVERTISE); 589 if (adv < 0) 590 return adv; 591 592 oldadv = adv; 593 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL 594 | LPA_PAUSE_FIBER); 595 adv |= ethtool_adv_to_fiber_adv_t(advertise); 596 597 if (adv != oldadv) { 598 err = phy_write(phydev, MII_ADVERTISE, adv); 599 if (err < 0) 600 return err; 601 602 changed = 1; 603 } 604 605 if (changed == 0) { 606 /* Advertisement hasn't changed, but maybe aneg was never on to 607 * begin with? Or maybe phy was isolated? 608 */ 609 int ctl = phy_read(phydev, MII_BMCR); 610 611 if (ctl < 0) 612 return ctl; 613 614 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 615 changed = 1; /* do restart aneg */ 616 } 617 618 /* Only restart aneg if we are advertising something different 619 * than we were before. 620 */ 621 if (changed > 0) 622 changed = genphy_restart_aneg(phydev); 623 624 return changed; 625 } 626 627 static int m88e1510_config_aneg(struct phy_device *phydev) 628 { 629 int err; 630 631 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 632 if (err < 0) 633 goto error; 634 635 /* Configure the copper link first */ 636 err = m88e1318_config_aneg(phydev); 637 if (err < 0) 638 goto error; 639 640 /* Then the fiber link */ 641 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 642 if (err < 0) 643 goto error; 644 645 err = marvell_config_aneg_fiber(phydev); 646 if (err < 0) 647 goto error; 648 649 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 650 651 error: 652 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 653 return err; 654 } 655 656 static int marvell_config_init(struct phy_device *phydev) 657 { 658 /* Set registers from marvell,reg-init DT property */ 659 return marvell_of_reg_init(phydev); 660 } 661 662 static int m88e1116r_config_init(struct phy_device *phydev) 663 { 664 int err; 665 666 err = genphy_soft_reset(phydev); 667 if (err < 0) 668 return err; 669 670 mdelay(500); 671 672 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 673 if (err < 0) 674 return err; 675 676 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 677 if (err < 0) 678 return err; 679 680 err = marvell_set_downshift(phydev, true, 8); 681 if (err < 0) 682 return err; 683 684 if (phy_interface_is_rgmii(phydev)) { 685 err = m88e1121_config_aneg_rgmii_delays(phydev); 686 if (err < 0) 687 return err; 688 } 689 690 err = genphy_soft_reset(phydev); 691 if (err < 0) 692 return err; 693 694 return marvell_config_init(phydev); 695 } 696 697 static int m88e3016_config_init(struct phy_device *phydev) 698 { 699 int reg; 700 701 /* Enable Scrambler and Auto-Crossover */ 702 reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL); 703 if (reg < 0) 704 return reg; 705 706 reg &= ~MII_88E3016_DISABLE_SCRAMBLER; 707 reg |= MII_88E3016_AUTO_MDIX_CROSSOVER; 708 709 reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg); 710 if (reg < 0) 711 return reg; 712 713 return marvell_config_init(phydev); 714 } 715 716 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 717 u16 mode, 718 int fibre_copper_auto) 719 { 720 int temp; 721 722 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 723 if (temp < 0) 724 return temp; 725 726 temp &= ~(MII_M1111_HWCFG_MODE_MASK | 727 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 728 MII_M1111_HWCFG_FIBER_COPPER_RES); 729 temp |= mode; 730 731 if (fibre_copper_auto) 732 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 733 734 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 735 } 736 737 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 738 { 739 int temp; 740 741 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR); 742 if (temp < 0) 743 return temp; 744 745 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 746 temp |= (MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY); 747 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 748 temp &= ~MII_M1111_RGMII_TX_DELAY; 749 temp |= MII_M1111_RGMII_RX_DELAY; 750 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 751 temp &= ~MII_M1111_RGMII_RX_DELAY; 752 temp |= MII_M1111_RGMII_TX_DELAY; 753 } 754 755 return phy_write(phydev, MII_M1111_PHY_EXT_CR, temp); 756 } 757 758 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 759 { 760 int temp; 761 int err; 762 763 err = m88e1111_config_init_rgmii_delays(phydev); 764 if (err < 0) 765 return err; 766 767 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 768 if (temp < 0) 769 return temp; 770 771 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 772 773 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 774 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 775 else 776 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 777 778 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 779 } 780 781 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 782 { 783 int err; 784 785 err = m88e1111_config_init_hwcfg_mode( 786 phydev, 787 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 788 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 789 if (err < 0) 790 return err; 791 792 /* make sure copper is selected */ 793 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 794 } 795 796 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 797 { 798 int err; 799 800 err = m88e1111_config_init_rgmii_delays(phydev); 801 if (err) 802 return err; 803 804 err = m88e1111_config_init_hwcfg_mode( 805 phydev, 806 MII_M1111_HWCFG_MODE_RTBI, 807 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 808 if (err < 0) 809 return err; 810 811 /* soft reset */ 812 err = genphy_soft_reset(phydev); 813 if (err < 0) 814 return err; 815 816 return m88e1111_config_init_hwcfg_mode( 817 phydev, 818 MII_M1111_HWCFG_MODE_RTBI, 819 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 820 } 821 822 static int m88e1111_config_init(struct phy_device *phydev) 823 { 824 int err; 825 826 if (phy_interface_is_rgmii(phydev)) { 827 err = m88e1111_config_init_rgmii(phydev); 828 if (err) 829 return err; 830 } 831 832 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 833 err = m88e1111_config_init_sgmii(phydev); 834 if (err < 0) 835 return err; 836 } 837 838 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 839 err = m88e1111_config_init_rtbi(phydev); 840 if (err < 0) 841 return err; 842 } 843 844 err = marvell_of_reg_init(phydev); 845 if (err < 0) 846 return err; 847 848 return genphy_soft_reset(phydev); 849 } 850 851 static int m88e1121_config_init(struct phy_device *phydev) 852 { 853 int err, oldpage; 854 855 oldpage = marvell_get_set_page(phydev, MII_MARVELL_LED_PAGE); 856 if (oldpage < 0) 857 return oldpage; 858 859 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 860 err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL, 861 MII_88E1121_PHY_LED_DEF); 862 if (err < 0) 863 return err; 864 865 marvell_set_page(phydev, oldpage); 866 867 /* Set marvell,reg-init configuration from device tree */ 868 return marvell_config_init(phydev); 869 } 870 871 static int m88e1510_config_init(struct phy_device *phydev) 872 { 873 int err; 874 int temp; 875 876 /* SGMII-to-Copper mode initialization */ 877 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 878 /* Select page 18 */ 879 err = marvell_set_page(phydev, 18); 880 if (err < 0) 881 return err; 882 883 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 884 temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1); 885 temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK; 886 temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII; 887 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp); 888 if (err < 0) 889 return err; 890 891 /* PHY reset is necessary after changing MODE[2:0] */ 892 temp |= MII_88E1510_GEN_CTRL_REG_1_RESET; 893 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp); 894 if (err < 0) 895 return err; 896 897 /* Reset page selection */ 898 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 899 if (err < 0) 900 return err; 901 } 902 903 return m88e1121_config_init(phydev); 904 } 905 906 static int m88e1118_config_aneg(struct phy_device *phydev) 907 { 908 int err; 909 910 err = genphy_soft_reset(phydev); 911 if (err < 0) 912 return err; 913 914 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 915 if (err < 0) 916 return err; 917 918 err = genphy_config_aneg(phydev); 919 return 0; 920 } 921 922 static int m88e1118_config_init(struct phy_device *phydev) 923 { 924 int err; 925 926 /* Change address */ 927 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 928 if (err < 0) 929 return err; 930 931 /* Enable 1000 Mbit */ 932 err = phy_write(phydev, 0x15, 0x1070); 933 if (err < 0) 934 return err; 935 936 /* Change address */ 937 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 938 if (err < 0) 939 return err; 940 941 /* Adjust LED Control */ 942 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 943 err = phy_write(phydev, 0x10, 0x1100); 944 else 945 err = phy_write(phydev, 0x10, 0x021e); 946 if (err < 0) 947 return err; 948 949 err = marvell_of_reg_init(phydev); 950 if (err < 0) 951 return err; 952 953 /* Reset address */ 954 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 955 if (err < 0) 956 return err; 957 958 return genphy_soft_reset(phydev); 959 } 960 961 static int m88e1149_config_init(struct phy_device *phydev) 962 { 963 int err; 964 965 /* Change address */ 966 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 967 if (err < 0) 968 return err; 969 970 /* Enable 1000 Mbit */ 971 err = phy_write(phydev, 0x15, 0x1048); 972 if (err < 0) 973 return err; 974 975 err = marvell_of_reg_init(phydev); 976 if (err < 0) 977 return err; 978 979 /* Reset address */ 980 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 981 if (err < 0) 982 return err; 983 984 return genphy_soft_reset(phydev); 985 } 986 987 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 988 { 989 int temp; 990 int err; 991 992 err = m88e1111_config_init_rgmii_delays(phydev); 993 if (err < 0) 994 return err; 995 996 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 997 err = phy_write(phydev, 0x1d, 0x0012); 998 if (err < 0) 999 return err; 1000 1001 temp = phy_read(phydev, 0x1e); 1002 if (temp < 0) 1003 return temp; 1004 1005 temp &= 0xf03f; 1006 temp |= 2 << 9; /* 36 ohm */ 1007 temp |= 2 << 6; /* 39 ohm */ 1008 1009 err = phy_write(phydev, 0x1e, temp); 1010 if (err < 0) 1011 return err; 1012 1013 err = phy_write(phydev, 0x1d, 0x3); 1014 if (err < 0) 1015 return err; 1016 1017 err = phy_write(phydev, 0x1e, 0x8000); 1018 } 1019 return err; 1020 } 1021 1022 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1023 { 1024 return m88e1111_config_init_hwcfg_mode( 1025 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1026 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1027 } 1028 1029 static int m88e1145_config_init(struct phy_device *phydev) 1030 { 1031 int err; 1032 1033 /* Take care of errata E0 & E1 */ 1034 err = phy_write(phydev, 0x1d, 0x001b); 1035 if (err < 0) 1036 return err; 1037 1038 err = phy_write(phydev, 0x1e, 0x418f); 1039 if (err < 0) 1040 return err; 1041 1042 err = phy_write(phydev, 0x1d, 0x0016); 1043 if (err < 0) 1044 return err; 1045 1046 err = phy_write(phydev, 0x1e, 0xa2da); 1047 if (err < 0) 1048 return err; 1049 1050 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1051 err = m88e1145_config_init_rgmii(phydev); 1052 if (err < 0) 1053 return err; 1054 } 1055 1056 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1057 err = m88e1145_config_init_sgmii(phydev); 1058 if (err < 0) 1059 return err; 1060 } 1061 1062 err = marvell_of_reg_init(phydev); 1063 if (err < 0) 1064 return err; 1065 1066 return 0; 1067 } 1068 1069 /** 1070 * fiber_lpa_to_ethtool_lpa_t 1071 * @lpa: value of the MII_LPA register for fiber link 1072 * 1073 * A small helper function that translates MII_LPA 1074 * bits to ethtool LP advertisement settings. 1075 */ 1076 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa) 1077 { 1078 u32 result = 0; 1079 1080 if (lpa & LPA_FIBER_1000HALF) 1081 result |= ADVERTISED_1000baseT_Half; 1082 if (lpa & LPA_FIBER_1000FULL) 1083 result |= ADVERTISED_1000baseT_Full; 1084 1085 return result; 1086 } 1087 1088 /** 1089 * marvell_update_link - update link status in real time in @phydev 1090 * @phydev: target phy_device struct 1091 * 1092 * Description: Update the value in phydev->link to reflect the 1093 * current link value. 1094 */ 1095 static int marvell_update_link(struct phy_device *phydev, int fiber) 1096 { 1097 int status; 1098 1099 /* Use the generic register for copper link, or specific 1100 * register for fiber case 1101 */ 1102 if (fiber) { 1103 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1104 if (status < 0) 1105 return status; 1106 1107 if ((status & REGISTER_LINK_STATUS) == 0) 1108 phydev->link = 0; 1109 else 1110 phydev->link = 1; 1111 } else { 1112 return genphy_update_link(phydev); 1113 } 1114 1115 return 0; 1116 } 1117 1118 static int marvell_read_status_page_an(struct phy_device *phydev, 1119 int fiber) 1120 { 1121 int status; 1122 int lpa; 1123 int lpagb; 1124 1125 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1126 if (status < 0) 1127 return status; 1128 1129 lpa = phy_read(phydev, MII_LPA); 1130 if (lpa < 0) 1131 return lpa; 1132 1133 lpagb = phy_read(phydev, MII_STAT1000); 1134 if (lpagb < 0) 1135 return lpagb; 1136 1137 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1138 phydev->duplex = DUPLEX_FULL; 1139 else 1140 phydev->duplex = DUPLEX_HALF; 1141 1142 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 1143 phydev->pause = 0; 1144 phydev->asym_pause = 0; 1145 1146 switch (status) { 1147 case MII_M1011_PHY_STATUS_1000: 1148 phydev->speed = SPEED_1000; 1149 break; 1150 1151 case MII_M1011_PHY_STATUS_100: 1152 phydev->speed = SPEED_100; 1153 break; 1154 1155 default: 1156 phydev->speed = SPEED_10; 1157 break; 1158 } 1159 1160 if (!fiber) { 1161 phydev->lp_advertising = 1162 mii_stat1000_to_ethtool_lpa_t(lpagb) | 1163 mii_lpa_to_ethtool_lpa_t(lpa); 1164 1165 if (phydev->duplex == DUPLEX_FULL) { 1166 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 1167 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 1168 } 1169 } else { 1170 /* The fiber link is only 1000M capable */ 1171 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa); 1172 1173 if (phydev->duplex == DUPLEX_FULL) { 1174 if (!(lpa & LPA_PAUSE_FIBER)) { 1175 phydev->pause = 0; 1176 phydev->asym_pause = 0; 1177 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1178 phydev->pause = 1; 1179 phydev->asym_pause = 1; 1180 } else { 1181 phydev->pause = 1; 1182 phydev->asym_pause = 0; 1183 } 1184 } 1185 } 1186 return 0; 1187 } 1188 1189 static int marvell_read_status_page_fixed(struct phy_device *phydev) 1190 { 1191 int bmcr = phy_read(phydev, MII_BMCR); 1192 1193 if (bmcr < 0) 1194 return bmcr; 1195 1196 if (bmcr & BMCR_FULLDPLX) 1197 phydev->duplex = DUPLEX_FULL; 1198 else 1199 phydev->duplex = DUPLEX_HALF; 1200 1201 if (bmcr & BMCR_SPEED1000) 1202 phydev->speed = SPEED_1000; 1203 else if (bmcr & BMCR_SPEED100) 1204 phydev->speed = SPEED_100; 1205 else 1206 phydev->speed = SPEED_10; 1207 1208 phydev->pause = 0; 1209 phydev->asym_pause = 0; 1210 phydev->lp_advertising = 0; 1211 1212 return 0; 1213 } 1214 1215 /* marvell_read_status_page 1216 * 1217 * Description: 1218 * Check the link, then figure out the current state 1219 * by comparing what we advertise with what the link partner 1220 * advertises. Start by checking the gigabit possibilities, 1221 * then move on to 10/100. 1222 */ 1223 static int marvell_read_status_page(struct phy_device *phydev, int page) 1224 { 1225 int fiber; 1226 int err; 1227 1228 /* Detect and update the link, but return if there 1229 * was an error 1230 */ 1231 if (page == MII_MARVELL_FIBER_PAGE) 1232 fiber = 1; 1233 else 1234 fiber = 0; 1235 1236 err = marvell_update_link(phydev, fiber); 1237 if (err) 1238 return err; 1239 1240 if (phydev->autoneg == AUTONEG_ENABLE) 1241 err = marvell_read_status_page_an(phydev, fiber); 1242 else 1243 err = marvell_read_status_page_fixed(phydev); 1244 1245 return err; 1246 } 1247 1248 /* marvell_read_status 1249 * 1250 * Some Marvell's phys have two modes: fiber and copper. 1251 * Both need status checked. 1252 * Description: 1253 * First, check the fiber link and status. 1254 * If the fiber link is down, check the copper link and status which 1255 * will be the default value if both link are down. 1256 */ 1257 static int marvell_read_status(struct phy_device *phydev) 1258 { 1259 int err; 1260 1261 /* Check the fiber mode first */ 1262 if (phydev->supported & SUPPORTED_FIBRE && 1263 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1264 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1265 if (err < 0) 1266 goto error; 1267 1268 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1269 if (err < 0) 1270 goto error; 1271 1272 /* If the fiber link is up, it is the selected and 1273 * used link. In this case, we need to stay in the 1274 * fiber page. Please to be careful about that, avoid 1275 * to restore Copper page in other functions which 1276 * could break the behaviour for some fiber phy like 1277 * 88E1512. 1278 */ 1279 if (phydev->link) 1280 return 0; 1281 1282 /* If fiber link is down, check and save copper mode state */ 1283 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1284 if (err < 0) 1285 goto error; 1286 } 1287 1288 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1289 1290 error: 1291 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1292 return err; 1293 } 1294 1295 /* marvell_suspend 1296 * 1297 * Some Marvell's phys have two modes: fiber and copper. 1298 * Both need to be suspended 1299 */ 1300 static int marvell_suspend(struct phy_device *phydev) 1301 { 1302 int err; 1303 1304 /* Suspend the fiber mode first */ 1305 if (!(phydev->supported & SUPPORTED_FIBRE)) { 1306 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1307 if (err < 0) 1308 goto error; 1309 1310 /* With the page set, use the generic suspend */ 1311 err = genphy_suspend(phydev); 1312 if (err < 0) 1313 goto error; 1314 1315 /* Then, the copper link */ 1316 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1317 if (err < 0) 1318 goto error; 1319 } 1320 1321 /* With the page set, use the generic suspend */ 1322 return genphy_suspend(phydev); 1323 1324 error: 1325 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1326 return err; 1327 } 1328 1329 /* marvell_resume 1330 * 1331 * Some Marvell's phys have two modes: fiber and copper. 1332 * Both need to be resumed 1333 */ 1334 static int marvell_resume(struct phy_device *phydev) 1335 { 1336 int err; 1337 1338 /* Resume the fiber mode first */ 1339 if (!(phydev->supported & SUPPORTED_FIBRE)) { 1340 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1341 if (err < 0) 1342 goto error; 1343 1344 /* With the page set, use the generic resume */ 1345 err = genphy_resume(phydev); 1346 if (err < 0) 1347 goto error; 1348 1349 /* Then, the copper link */ 1350 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1351 if (err < 0) 1352 goto error; 1353 } 1354 1355 /* With the page set, use the generic resume */ 1356 return genphy_resume(phydev); 1357 1358 error: 1359 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1360 return err; 1361 } 1362 1363 static int marvell_aneg_done(struct phy_device *phydev) 1364 { 1365 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1366 1367 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1368 } 1369 1370 static int m88e1121_did_interrupt(struct phy_device *phydev) 1371 { 1372 int imask; 1373 1374 imask = phy_read(phydev, MII_M1011_IEVENT); 1375 1376 if (imask & MII_M1011_IMASK_INIT) 1377 return 1; 1378 1379 return 0; 1380 } 1381 1382 static void m88e1318_get_wol(struct phy_device *phydev, 1383 struct ethtool_wolinfo *wol) 1384 { 1385 wol->supported = WAKE_MAGIC; 1386 wol->wolopts = 0; 1387 1388 if (marvell_set_page(phydev, MII_MARVELL_WOL_PAGE) < 0) 1389 return; 1390 1391 if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) & 1392 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1393 wol->wolopts |= WAKE_MAGIC; 1394 1395 if (marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE) < 0) 1396 return; 1397 } 1398 1399 static int m88e1318_set_wol(struct phy_device *phydev, 1400 struct ethtool_wolinfo *wol) 1401 { 1402 int err, oldpage, temp; 1403 1404 oldpage = marvell_get_page(phydev); 1405 1406 if (wol->wolopts & WAKE_MAGIC) { 1407 /* Explicitly switch to page 0x00, just to be sure */ 1408 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1409 if (err < 0) 1410 return err; 1411 1412 /* Enable the WOL interrupt */ 1413 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER); 1414 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE; 1415 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp); 1416 if (err < 0) 1417 return err; 1418 1419 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 1420 if (err < 0) 1421 return err; 1422 1423 /* Setup LED[2] as interrupt pin (active low) */ 1424 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR); 1425 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT; 1426 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE; 1427 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW; 1428 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp); 1429 if (err < 0) 1430 return err; 1431 1432 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE); 1433 if (err < 0) 1434 return err; 1435 1436 /* Store the device address for the magic packet */ 1437 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1438 ((phydev->attached_dev->dev_addr[5] << 8) | 1439 phydev->attached_dev->dev_addr[4])); 1440 if (err < 0) 1441 return err; 1442 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1443 ((phydev->attached_dev->dev_addr[3] << 8) | 1444 phydev->attached_dev->dev_addr[2])); 1445 if (err < 0) 1446 return err; 1447 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1448 ((phydev->attached_dev->dev_addr[1] << 8) | 1449 phydev->attached_dev->dev_addr[0])); 1450 if (err < 0) 1451 return err; 1452 1453 /* Clear WOL status and enable magic packet matching */ 1454 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1455 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS; 1456 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE; 1457 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp); 1458 if (err < 0) 1459 return err; 1460 } else { 1461 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE); 1462 if (err < 0) 1463 return err; 1464 1465 /* Clear WOL status and disable magic packet matching */ 1466 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1467 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS; 1468 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE; 1469 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp); 1470 if (err < 0) 1471 return err; 1472 } 1473 1474 err = marvell_set_page(phydev, oldpage); 1475 if (err < 0) 1476 return err; 1477 1478 return 0; 1479 } 1480 1481 static int marvell_get_sset_count(struct phy_device *phydev) 1482 { 1483 if (phydev->supported & SUPPORTED_FIBRE) 1484 return ARRAY_SIZE(marvell_hw_stats); 1485 else 1486 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1487 } 1488 1489 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1490 { 1491 int i; 1492 1493 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) { 1494 memcpy(data + i * ETH_GSTRING_LEN, 1495 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1496 } 1497 } 1498 1499 #ifndef UINT64_MAX 1500 #define UINT64_MAX (u64)(~((u64)0)) 1501 #endif 1502 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1503 { 1504 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1505 struct marvell_priv *priv = phydev->priv; 1506 int oldpage, val; 1507 u64 ret; 1508 1509 oldpage = marvell_get_set_page(phydev, stat.page); 1510 if (oldpage < 0) 1511 return UINT64_MAX; 1512 1513 val = phy_read(phydev, stat.reg); 1514 if (val < 0) { 1515 ret = UINT64_MAX; 1516 } else { 1517 val = val & ((1 << stat.bits) - 1); 1518 priv->stats[i] += val; 1519 ret = priv->stats[i]; 1520 } 1521 1522 marvell_set_page(phydev, oldpage); 1523 1524 return ret; 1525 } 1526 1527 static void marvell_get_stats(struct phy_device *phydev, 1528 struct ethtool_stats *stats, u64 *data) 1529 { 1530 int i; 1531 1532 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) 1533 data[i] = marvell_get_stat(phydev, i); 1534 } 1535 1536 #ifdef CONFIG_HWMON 1537 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1538 { 1539 int oldpage; 1540 int ret; 1541 int val; 1542 1543 *temp = 0; 1544 1545 mutex_lock(&phydev->lock); 1546 1547 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1548 if (oldpage < 0) { 1549 mutex_unlock(&phydev->lock); 1550 return oldpage; 1551 } 1552 1553 /* Enable temperature sensor */ 1554 ret = phy_read(phydev, MII_88E1121_MISC_TEST); 1555 if (ret < 0) 1556 goto error; 1557 1558 ret = phy_write(phydev, MII_88E1121_MISC_TEST, 1559 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1560 if (ret < 0) 1561 goto error; 1562 1563 /* Wait for temperature to stabilize */ 1564 usleep_range(10000, 12000); 1565 1566 val = phy_read(phydev, MII_88E1121_MISC_TEST); 1567 if (val < 0) { 1568 ret = val; 1569 goto error; 1570 } 1571 1572 /* Disable temperature sensor */ 1573 ret = phy_write(phydev, MII_88E1121_MISC_TEST, 1574 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1575 if (ret < 0) 1576 goto error; 1577 1578 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1579 1580 error: 1581 marvell_set_page(phydev, oldpage); 1582 mutex_unlock(&phydev->lock); 1583 1584 return ret; 1585 } 1586 1587 static int m88e1121_hwmon_read(struct device *dev, 1588 enum hwmon_sensor_types type, 1589 u32 attr, int channel, long *temp) 1590 { 1591 struct phy_device *phydev = dev_get_drvdata(dev); 1592 int err; 1593 1594 switch (attr) { 1595 case hwmon_temp_input: 1596 err = m88e1121_get_temp(phydev, temp); 1597 break; 1598 default: 1599 return -EOPNOTSUPP; 1600 } 1601 1602 return err; 1603 } 1604 1605 static umode_t m88e1121_hwmon_is_visible(const void *data, 1606 enum hwmon_sensor_types type, 1607 u32 attr, int channel) 1608 { 1609 if (type != hwmon_temp) 1610 return 0; 1611 1612 switch (attr) { 1613 case hwmon_temp_input: 1614 return 0444; 1615 default: 1616 return 0; 1617 } 1618 } 1619 1620 static u32 m88e1121_hwmon_chip_config[] = { 1621 HWMON_C_REGISTER_TZ, 1622 0 1623 }; 1624 1625 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1626 .type = hwmon_chip, 1627 .config = m88e1121_hwmon_chip_config, 1628 }; 1629 1630 static u32 m88e1121_hwmon_temp_config[] = { 1631 HWMON_T_INPUT, 1632 0 1633 }; 1634 1635 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1636 .type = hwmon_temp, 1637 .config = m88e1121_hwmon_temp_config, 1638 }; 1639 1640 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1641 &m88e1121_hwmon_chip, 1642 &m88e1121_hwmon_temp, 1643 NULL 1644 }; 1645 1646 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1647 .is_visible = m88e1121_hwmon_is_visible, 1648 .read = m88e1121_hwmon_read, 1649 }; 1650 1651 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1652 .ops = &m88e1121_hwmon_hwmon_ops, 1653 .info = m88e1121_hwmon_info, 1654 }; 1655 1656 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1657 { 1658 int oldpage; 1659 int ret; 1660 1661 *temp = 0; 1662 1663 mutex_lock(&phydev->lock); 1664 1665 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1666 if (oldpage < 0) { 1667 mutex_unlock(&phydev->lock); 1668 return oldpage; 1669 } 1670 1671 ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR); 1672 if (ret < 0) 1673 goto error; 1674 1675 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1676 1677 error: 1678 marvell_set_page(phydev, oldpage); 1679 mutex_unlock(&phydev->lock); 1680 1681 return ret; 1682 } 1683 1684 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1685 { 1686 int oldpage; 1687 int ret; 1688 1689 *temp = 0; 1690 1691 mutex_lock(&phydev->lock); 1692 1693 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1694 if (oldpage < 0) { 1695 mutex_unlock(&phydev->lock); 1696 return oldpage; 1697 } 1698 1699 ret = phy_read(phydev, MII_88E1121_MISC_TEST); 1700 if (ret < 0) 1701 goto error; 1702 1703 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1704 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1705 /* convert to mC */ 1706 *temp *= 1000; 1707 1708 error: 1709 marvell_set_page(phydev, oldpage); 1710 mutex_unlock(&phydev->lock); 1711 1712 return ret; 1713 } 1714 1715 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1716 { 1717 int oldpage; 1718 int ret; 1719 1720 mutex_lock(&phydev->lock); 1721 1722 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1723 if (oldpage < 0) { 1724 mutex_unlock(&phydev->lock); 1725 return oldpage; 1726 } 1727 1728 ret = phy_read(phydev, MII_88E1121_MISC_TEST); 1729 if (ret < 0) 1730 goto error; 1731 1732 temp = temp / 1000; 1733 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1734 ret = phy_write(phydev, MII_88E1121_MISC_TEST, 1735 (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) | 1736 (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT)); 1737 1738 error: 1739 marvell_set_page(phydev, oldpage); 1740 mutex_unlock(&phydev->lock); 1741 1742 return ret; 1743 } 1744 1745 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1746 { 1747 int oldpage; 1748 int ret; 1749 1750 *alarm = false; 1751 1752 mutex_lock(&phydev->lock); 1753 1754 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1755 if (oldpage < 0) { 1756 mutex_unlock(&phydev->lock); 1757 return oldpage; 1758 } 1759 1760 ret = phy_read(phydev, MII_88E1121_MISC_TEST); 1761 if (ret < 0) 1762 goto error; 1763 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1764 1765 error: 1766 marvell_set_page(phydev, oldpage); 1767 mutex_unlock(&phydev->lock); 1768 1769 return ret; 1770 } 1771 1772 static int m88e1510_hwmon_read(struct device *dev, 1773 enum hwmon_sensor_types type, 1774 u32 attr, int channel, long *temp) 1775 { 1776 struct phy_device *phydev = dev_get_drvdata(dev); 1777 int err; 1778 1779 switch (attr) { 1780 case hwmon_temp_input: 1781 err = m88e1510_get_temp(phydev, temp); 1782 break; 1783 case hwmon_temp_crit: 1784 err = m88e1510_get_temp_critical(phydev, temp); 1785 break; 1786 case hwmon_temp_max_alarm: 1787 err = m88e1510_get_temp_alarm(phydev, temp); 1788 break; 1789 default: 1790 return -EOPNOTSUPP; 1791 } 1792 1793 return err; 1794 } 1795 1796 static int m88e1510_hwmon_write(struct device *dev, 1797 enum hwmon_sensor_types type, 1798 u32 attr, int channel, long temp) 1799 { 1800 struct phy_device *phydev = dev_get_drvdata(dev); 1801 int err; 1802 1803 switch (attr) { 1804 case hwmon_temp_crit: 1805 err = m88e1510_set_temp_critical(phydev, temp); 1806 break; 1807 default: 1808 return -EOPNOTSUPP; 1809 } 1810 return err; 1811 } 1812 1813 static umode_t m88e1510_hwmon_is_visible(const void *data, 1814 enum hwmon_sensor_types type, 1815 u32 attr, int channel) 1816 { 1817 if (type != hwmon_temp) 1818 return 0; 1819 1820 switch (attr) { 1821 case hwmon_temp_input: 1822 case hwmon_temp_max_alarm: 1823 return 0444; 1824 case hwmon_temp_crit: 1825 return 0644; 1826 default: 1827 return 0; 1828 } 1829 } 1830 1831 static u32 m88e1510_hwmon_temp_config[] = { 1832 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1833 0 1834 }; 1835 1836 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1837 .type = hwmon_temp, 1838 .config = m88e1510_hwmon_temp_config, 1839 }; 1840 1841 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1842 &m88e1121_hwmon_chip, 1843 &m88e1510_hwmon_temp, 1844 NULL 1845 }; 1846 1847 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1848 .is_visible = m88e1510_hwmon_is_visible, 1849 .read = m88e1510_hwmon_read, 1850 .write = m88e1510_hwmon_write, 1851 }; 1852 1853 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1854 .ops = &m88e1510_hwmon_hwmon_ops, 1855 .info = m88e1510_hwmon_info, 1856 }; 1857 1858 static int marvell_hwmon_name(struct phy_device *phydev) 1859 { 1860 struct marvell_priv *priv = phydev->priv; 1861 struct device *dev = &phydev->mdio.dev; 1862 const char *devname = dev_name(dev); 1863 size_t len = strlen(devname); 1864 int i, j; 1865 1866 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 1867 if (!priv->hwmon_name) 1868 return -ENOMEM; 1869 1870 for (i = j = 0; i < len && devname[i]; i++) { 1871 if (isalnum(devname[i])) 1872 priv->hwmon_name[j++] = devname[i]; 1873 } 1874 1875 return 0; 1876 } 1877 1878 static int marvell_hwmon_probe(struct phy_device *phydev, 1879 const struct hwmon_chip_info *chip) 1880 { 1881 struct marvell_priv *priv = phydev->priv; 1882 struct device *dev = &phydev->mdio.dev; 1883 int err; 1884 1885 err = marvell_hwmon_name(phydev); 1886 if (err) 1887 return err; 1888 1889 priv->hwmon_dev = devm_hwmon_device_register_with_info( 1890 dev, priv->hwmon_name, phydev, chip, NULL); 1891 1892 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 1893 } 1894 1895 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1896 { 1897 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 1898 } 1899 1900 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1901 { 1902 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 1903 } 1904 #else 1905 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1906 { 1907 return 0; 1908 } 1909 1910 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1911 { 1912 return 0; 1913 } 1914 #endif 1915 1916 static int marvell_probe(struct phy_device *phydev) 1917 { 1918 struct marvell_priv *priv; 1919 1920 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 1921 if (!priv) 1922 return -ENOMEM; 1923 1924 phydev->priv = priv; 1925 1926 return 0; 1927 } 1928 1929 static int m88e1121_probe(struct phy_device *phydev) 1930 { 1931 int err; 1932 1933 err = marvell_probe(phydev); 1934 if (err) 1935 return err; 1936 1937 return m88e1121_hwmon_probe(phydev); 1938 } 1939 1940 static int m88e1510_probe(struct phy_device *phydev) 1941 { 1942 int err; 1943 1944 err = marvell_probe(phydev); 1945 if (err) 1946 return err; 1947 1948 return m88e1510_hwmon_probe(phydev); 1949 } 1950 1951 static struct phy_driver marvell_drivers[] = { 1952 { 1953 .phy_id = MARVELL_PHY_ID_88E1101, 1954 .phy_id_mask = MARVELL_PHY_ID_MASK, 1955 .name = "Marvell 88E1101", 1956 .features = PHY_GBIT_FEATURES, 1957 .flags = PHY_HAS_INTERRUPT, 1958 .probe = marvell_probe, 1959 .config_init = &marvell_config_init, 1960 .config_aneg = &m88e1101_config_aneg, 1961 .read_status = &genphy_read_status, 1962 .ack_interrupt = &marvell_ack_interrupt, 1963 .config_intr = &marvell_config_intr, 1964 .resume = &genphy_resume, 1965 .suspend = &genphy_suspend, 1966 .get_sset_count = marvell_get_sset_count, 1967 .get_strings = marvell_get_strings, 1968 .get_stats = marvell_get_stats, 1969 }, 1970 { 1971 .phy_id = MARVELL_PHY_ID_88E1112, 1972 .phy_id_mask = MARVELL_PHY_ID_MASK, 1973 .name = "Marvell 88E1112", 1974 .features = PHY_GBIT_FEATURES, 1975 .flags = PHY_HAS_INTERRUPT, 1976 .probe = marvell_probe, 1977 .config_init = &m88e1111_config_init, 1978 .config_aneg = &marvell_config_aneg, 1979 .read_status = &genphy_read_status, 1980 .ack_interrupt = &marvell_ack_interrupt, 1981 .config_intr = &marvell_config_intr, 1982 .resume = &genphy_resume, 1983 .suspend = &genphy_suspend, 1984 .get_sset_count = marvell_get_sset_count, 1985 .get_strings = marvell_get_strings, 1986 .get_stats = marvell_get_stats, 1987 }, 1988 { 1989 .phy_id = MARVELL_PHY_ID_88E1111, 1990 .phy_id_mask = MARVELL_PHY_ID_MASK, 1991 .name = "Marvell 88E1111", 1992 .features = PHY_GBIT_FEATURES, 1993 .flags = PHY_HAS_INTERRUPT, 1994 .probe = marvell_probe, 1995 .config_init = &m88e1111_config_init, 1996 .config_aneg = &m88e1111_config_aneg, 1997 .read_status = &marvell_read_status, 1998 .ack_interrupt = &marvell_ack_interrupt, 1999 .config_intr = &marvell_config_intr, 2000 .resume = &genphy_resume, 2001 .suspend = &genphy_suspend, 2002 .get_sset_count = marvell_get_sset_count, 2003 .get_strings = marvell_get_strings, 2004 .get_stats = marvell_get_stats, 2005 }, 2006 { 2007 .phy_id = MARVELL_PHY_ID_88E1118, 2008 .phy_id_mask = MARVELL_PHY_ID_MASK, 2009 .name = "Marvell 88E1118", 2010 .features = PHY_GBIT_FEATURES, 2011 .flags = PHY_HAS_INTERRUPT, 2012 .probe = marvell_probe, 2013 .config_init = &m88e1118_config_init, 2014 .config_aneg = &m88e1118_config_aneg, 2015 .read_status = &genphy_read_status, 2016 .ack_interrupt = &marvell_ack_interrupt, 2017 .config_intr = &marvell_config_intr, 2018 .resume = &genphy_resume, 2019 .suspend = &genphy_suspend, 2020 .get_sset_count = marvell_get_sset_count, 2021 .get_strings = marvell_get_strings, 2022 .get_stats = marvell_get_stats, 2023 }, 2024 { 2025 .phy_id = MARVELL_PHY_ID_88E1121R, 2026 .phy_id_mask = MARVELL_PHY_ID_MASK, 2027 .name = "Marvell 88E1121R", 2028 .features = PHY_GBIT_FEATURES, 2029 .flags = PHY_HAS_INTERRUPT, 2030 .probe = &m88e1121_probe, 2031 .config_init = &m88e1121_config_init, 2032 .config_aneg = &m88e1121_config_aneg, 2033 .read_status = &marvell_read_status, 2034 .ack_interrupt = &marvell_ack_interrupt, 2035 .config_intr = &marvell_config_intr, 2036 .did_interrupt = &m88e1121_did_interrupt, 2037 .resume = &genphy_resume, 2038 .suspend = &genphy_suspend, 2039 .get_sset_count = marvell_get_sset_count, 2040 .get_strings = marvell_get_strings, 2041 .get_stats = marvell_get_stats, 2042 }, 2043 { 2044 .phy_id = MARVELL_PHY_ID_88E1318S, 2045 .phy_id_mask = MARVELL_PHY_ID_MASK, 2046 .name = "Marvell 88E1318S", 2047 .features = PHY_GBIT_FEATURES, 2048 .flags = PHY_HAS_INTERRUPT, 2049 .probe = marvell_probe, 2050 .config_init = &m88e1121_config_init, 2051 .config_aneg = &m88e1318_config_aneg, 2052 .read_status = &marvell_read_status, 2053 .ack_interrupt = &marvell_ack_interrupt, 2054 .config_intr = &marvell_config_intr, 2055 .did_interrupt = &m88e1121_did_interrupt, 2056 .get_wol = &m88e1318_get_wol, 2057 .set_wol = &m88e1318_set_wol, 2058 .resume = &genphy_resume, 2059 .suspend = &genphy_suspend, 2060 .get_sset_count = marvell_get_sset_count, 2061 .get_strings = marvell_get_strings, 2062 .get_stats = marvell_get_stats, 2063 }, 2064 { 2065 .phy_id = MARVELL_PHY_ID_88E1145, 2066 .phy_id_mask = MARVELL_PHY_ID_MASK, 2067 .name = "Marvell 88E1145", 2068 .features = PHY_GBIT_FEATURES, 2069 .flags = PHY_HAS_INTERRUPT, 2070 .probe = marvell_probe, 2071 .config_init = &m88e1145_config_init, 2072 .config_aneg = &marvell_config_aneg, 2073 .read_status = &genphy_read_status, 2074 .ack_interrupt = &marvell_ack_interrupt, 2075 .config_intr = &marvell_config_intr, 2076 .resume = &genphy_resume, 2077 .suspend = &genphy_suspend, 2078 .get_sset_count = marvell_get_sset_count, 2079 .get_strings = marvell_get_strings, 2080 .get_stats = marvell_get_stats, 2081 }, 2082 { 2083 .phy_id = MARVELL_PHY_ID_88E1149R, 2084 .phy_id_mask = MARVELL_PHY_ID_MASK, 2085 .name = "Marvell 88E1149R", 2086 .features = PHY_GBIT_FEATURES, 2087 .flags = PHY_HAS_INTERRUPT, 2088 .probe = marvell_probe, 2089 .config_init = &m88e1149_config_init, 2090 .config_aneg = &m88e1118_config_aneg, 2091 .read_status = &genphy_read_status, 2092 .ack_interrupt = &marvell_ack_interrupt, 2093 .config_intr = &marvell_config_intr, 2094 .resume = &genphy_resume, 2095 .suspend = &genphy_suspend, 2096 .get_sset_count = marvell_get_sset_count, 2097 .get_strings = marvell_get_strings, 2098 .get_stats = marvell_get_stats, 2099 }, 2100 { 2101 .phy_id = MARVELL_PHY_ID_88E1240, 2102 .phy_id_mask = MARVELL_PHY_ID_MASK, 2103 .name = "Marvell 88E1240", 2104 .features = PHY_GBIT_FEATURES, 2105 .flags = PHY_HAS_INTERRUPT, 2106 .probe = marvell_probe, 2107 .config_init = &m88e1111_config_init, 2108 .config_aneg = &marvell_config_aneg, 2109 .read_status = &genphy_read_status, 2110 .ack_interrupt = &marvell_ack_interrupt, 2111 .config_intr = &marvell_config_intr, 2112 .resume = &genphy_resume, 2113 .suspend = &genphy_suspend, 2114 .get_sset_count = marvell_get_sset_count, 2115 .get_strings = marvell_get_strings, 2116 .get_stats = marvell_get_stats, 2117 }, 2118 { 2119 .phy_id = MARVELL_PHY_ID_88E1116R, 2120 .phy_id_mask = MARVELL_PHY_ID_MASK, 2121 .name = "Marvell 88E1116R", 2122 .features = PHY_GBIT_FEATURES, 2123 .flags = PHY_HAS_INTERRUPT, 2124 .probe = marvell_probe, 2125 .config_init = &m88e1116r_config_init, 2126 .config_aneg = &genphy_config_aneg, 2127 .read_status = &genphy_read_status, 2128 .ack_interrupt = &marvell_ack_interrupt, 2129 .config_intr = &marvell_config_intr, 2130 .resume = &genphy_resume, 2131 .suspend = &genphy_suspend, 2132 .get_sset_count = marvell_get_sset_count, 2133 .get_strings = marvell_get_strings, 2134 .get_stats = marvell_get_stats, 2135 }, 2136 { 2137 .phy_id = MARVELL_PHY_ID_88E1510, 2138 .phy_id_mask = MARVELL_PHY_ID_MASK, 2139 .name = "Marvell 88E1510", 2140 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE, 2141 .flags = PHY_HAS_INTERRUPT, 2142 .probe = &m88e1510_probe, 2143 .config_init = &m88e1510_config_init, 2144 .config_aneg = &m88e1510_config_aneg, 2145 .read_status = &marvell_read_status, 2146 .ack_interrupt = &marvell_ack_interrupt, 2147 .config_intr = &marvell_config_intr, 2148 .did_interrupt = &m88e1121_did_interrupt, 2149 .get_wol = &m88e1318_get_wol, 2150 .set_wol = &m88e1318_set_wol, 2151 .resume = &marvell_resume, 2152 .suspend = &marvell_suspend, 2153 .get_sset_count = marvell_get_sset_count, 2154 .get_strings = marvell_get_strings, 2155 .get_stats = marvell_get_stats, 2156 .set_loopback = genphy_loopback, 2157 }, 2158 { 2159 .phy_id = MARVELL_PHY_ID_88E1540, 2160 .phy_id_mask = MARVELL_PHY_ID_MASK, 2161 .name = "Marvell 88E1540", 2162 .features = PHY_GBIT_FEATURES, 2163 .flags = PHY_HAS_INTERRUPT, 2164 .probe = m88e1510_probe, 2165 .config_init = &marvell_config_init, 2166 .config_aneg = &m88e1510_config_aneg, 2167 .read_status = &marvell_read_status, 2168 .ack_interrupt = &marvell_ack_interrupt, 2169 .config_intr = &marvell_config_intr, 2170 .did_interrupt = &m88e1121_did_interrupt, 2171 .resume = &genphy_resume, 2172 .suspend = &genphy_suspend, 2173 .get_sset_count = marvell_get_sset_count, 2174 .get_strings = marvell_get_strings, 2175 .get_stats = marvell_get_stats, 2176 }, 2177 { 2178 .phy_id = MARVELL_PHY_ID_88E1545, 2179 .phy_id_mask = MARVELL_PHY_ID_MASK, 2180 .name = "Marvell 88E1545", 2181 .probe = m88e1510_probe, 2182 .features = PHY_GBIT_FEATURES, 2183 .flags = PHY_HAS_INTERRUPT, 2184 .config_init = &marvell_config_init, 2185 .config_aneg = &m88e1510_config_aneg, 2186 .read_status = &marvell_read_status, 2187 .ack_interrupt = &marvell_ack_interrupt, 2188 .config_intr = &marvell_config_intr, 2189 .did_interrupt = &m88e1121_did_interrupt, 2190 .resume = &genphy_resume, 2191 .suspend = &genphy_suspend, 2192 .get_sset_count = marvell_get_sset_count, 2193 .get_strings = marvell_get_strings, 2194 .get_stats = marvell_get_stats, 2195 }, 2196 { 2197 .phy_id = MARVELL_PHY_ID_88E3016, 2198 .phy_id_mask = MARVELL_PHY_ID_MASK, 2199 .name = "Marvell 88E3016", 2200 .features = PHY_BASIC_FEATURES, 2201 .flags = PHY_HAS_INTERRUPT, 2202 .probe = marvell_probe, 2203 .config_aneg = &genphy_config_aneg, 2204 .config_init = &m88e3016_config_init, 2205 .aneg_done = &marvell_aneg_done, 2206 .read_status = &marvell_read_status, 2207 .ack_interrupt = &marvell_ack_interrupt, 2208 .config_intr = &marvell_config_intr, 2209 .did_interrupt = &m88e1121_did_interrupt, 2210 .resume = &genphy_resume, 2211 .suspend = &genphy_suspend, 2212 .get_sset_count = marvell_get_sset_count, 2213 .get_strings = marvell_get_strings, 2214 .get_stats = marvell_get_stats, 2215 }, 2216 { 2217 .phy_id = MARVELL_PHY_ID_88E6390, 2218 .phy_id_mask = MARVELL_PHY_ID_MASK, 2219 .name = "Marvell 88E6390", 2220 .features = PHY_GBIT_FEATURES, 2221 .flags = PHY_HAS_INTERRUPT, 2222 .probe = m88e1510_probe, 2223 .config_init = &marvell_config_init, 2224 .config_aneg = &m88e1510_config_aneg, 2225 .read_status = &marvell_read_status, 2226 .ack_interrupt = &marvell_ack_interrupt, 2227 .config_intr = &marvell_config_intr, 2228 .did_interrupt = &m88e1121_did_interrupt, 2229 .resume = &genphy_resume, 2230 .suspend = &genphy_suspend, 2231 .get_sset_count = marvell_get_sset_count, 2232 .get_strings = marvell_get_strings, 2233 .get_stats = marvell_get_stats, 2234 }, 2235 }; 2236 2237 module_phy_driver(marvell_drivers); 2238 2239 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2240 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2241 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2242 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2243 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2244 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2245 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2246 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2247 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2248 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2249 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2250 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2251 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2252 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2253 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2254 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2255 { } 2256 }; 2257 2258 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2259