1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13 #include <linux/kernel.h> 14 #include <linux/string.h> 15 #include <linux/ctype.h> 16 #include <linux/errno.h> 17 #include <linux/unistd.h> 18 #include <linux/hwmon.h> 19 #include <linux/interrupt.h> 20 #include <linux/init.h> 21 #include <linux/delay.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/skbuff.h> 25 #include <linux/spinlock.h> 26 #include <linux/mm.h> 27 #include <linux/module.h> 28 #include <linux/mii.h> 29 #include <linux/ethtool.h> 30 #include <linux/phy.h> 31 #include <linux/marvell_phy.h> 32 #include <linux/of.h> 33 34 #include <linux/io.h> 35 #include <asm/irq.h> 36 #include <linux/uaccess.h> 37 38 #define MII_MARVELL_PHY_PAGE 22 39 #define MII_MARVELL_COPPER_PAGE 0x00 40 #define MII_MARVELL_FIBER_PAGE 0x01 41 #define MII_MARVELL_MSCR_PAGE 0x02 42 #define MII_MARVELL_LED_PAGE 0x03 43 #define MII_MARVELL_MISC_TEST_PAGE 0x06 44 #define MII_MARVELL_WOL_PAGE 0x11 45 46 #define MII_M1011_IEVENT 0x13 47 #define MII_M1011_IEVENT_CLEAR 0x0000 48 49 #define MII_M1011_IMASK 0x12 50 #define MII_M1011_IMASK_INIT 0x6400 51 #define MII_M1011_IMASK_CLEAR 0x0000 52 53 #define MII_M1011_PHY_SCR 0x10 54 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 55 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12 56 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800 57 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 58 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 59 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 60 61 #define MII_M1111_PHY_LED_CONTROL 0x18 62 #define MII_M1111_PHY_LED_DIRECT 0x4100 63 #define MII_M1111_PHY_LED_COMBINE 0x411c 64 #define MII_M1111_PHY_EXT_CR 0x14 65 #define MII_M1111_RGMII_RX_DELAY BIT(7) 66 #define MII_M1111_RGMII_TX_DELAY BIT(1) 67 #define MII_M1111_PHY_EXT_SR 0x1b 68 69 #define MII_M1111_HWCFG_MODE_MASK 0xf 70 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 71 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 72 #define MII_M1111_HWCFG_MODE_RTBI 0x7 73 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 74 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 75 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 76 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 77 78 #define MII_88E1121_PHY_MSCR_REG 21 79 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 80 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 81 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 82 83 #define MII_88E1121_MISC_TEST 0x1a 84 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 85 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 86 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 87 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 88 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 89 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 90 91 #define MII_88E1510_TEMP_SENSOR 0x1b 92 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 93 94 #define MII_88E6390_MISC_TEST 0x1b 95 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 96 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 97 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 98 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 99 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 100 101 #define MII_88E6390_TEMP_SENSOR 0x1c 102 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 103 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 104 105 #define MII_88E1318S_PHY_MSCR1_REG 16 106 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 107 108 /* Copper Specific Interrupt Enable Register */ 109 #define MII_88E1318S_PHY_CSIER 0x12 110 /* WOL Event Interrupt Enable */ 111 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 112 113 /* LED Timer Control Register */ 114 #define MII_88E1318S_PHY_LED_TCR 0x12 115 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 116 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 117 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 118 119 /* Magic Packet MAC address registers */ 120 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 121 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 122 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 123 124 #define MII_88E1318S_PHY_WOL_CTRL 0x10 125 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 126 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 127 128 #define MII_PHY_LED_CTRL 16 129 #define MII_88E1121_PHY_LED_DEF 0x0030 130 #define MII_88E1510_PHY_LED_DEF 0x1177 131 132 #define MII_M1011_PHY_STATUS 0x11 133 #define MII_M1011_PHY_STATUS_1000 0x8000 134 #define MII_M1011_PHY_STATUS_100 0x4000 135 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 136 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 137 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 138 #define MII_M1011_PHY_STATUS_LINK 0x0400 139 140 #define MII_88E3016_PHY_SPEC_CTRL 0x10 141 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 142 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 143 144 #define MII_88E1510_GEN_CTRL_REG_1 0x14 145 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 146 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 147 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 148 149 #define LPA_FIBER_1000HALF 0x40 150 #define LPA_FIBER_1000FULL 0x20 151 152 #define LPA_PAUSE_FIBER 0x180 153 #define LPA_PAUSE_ASYM_FIBER 0x100 154 155 #define ADVERTISE_FIBER_1000HALF 0x40 156 #define ADVERTISE_FIBER_1000FULL 0x20 157 158 #define ADVERTISE_PAUSE_FIBER 0x180 159 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 160 161 #define REGISTER_LINK_STATUS 0x400 162 #define NB_FIBER_STATS 1 163 164 MODULE_DESCRIPTION("Marvell PHY driver"); 165 MODULE_AUTHOR("Andy Fleming"); 166 MODULE_LICENSE("GPL"); 167 168 struct marvell_hw_stat { 169 const char *string; 170 u8 page; 171 u8 reg; 172 u8 bits; 173 }; 174 175 static struct marvell_hw_stat marvell_hw_stats[] = { 176 { "phy_receive_errors_copper", 0, 21, 16}, 177 { "phy_idle_errors", 0, 10, 8 }, 178 { "phy_receive_errors_fiber", 1, 21, 16}, 179 }; 180 181 struct marvell_priv { 182 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 183 char *hwmon_name; 184 struct device *hwmon_dev; 185 }; 186 187 static int marvell_read_page(struct phy_device *phydev) 188 { 189 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 190 } 191 192 static int marvell_write_page(struct phy_device *phydev, int page) 193 { 194 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 195 } 196 197 static int marvell_set_page(struct phy_device *phydev, int page) 198 { 199 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 200 } 201 202 static int marvell_ack_interrupt(struct phy_device *phydev) 203 { 204 int err; 205 206 /* Clear the interrupts by reading the reg */ 207 err = phy_read(phydev, MII_M1011_IEVENT); 208 209 if (err < 0) 210 return err; 211 212 return 0; 213 } 214 215 static int marvell_config_intr(struct phy_device *phydev) 216 { 217 int err; 218 219 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 220 err = phy_write(phydev, MII_M1011_IMASK, 221 MII_M1011_IMASK_INIT); 222 else 223 err = phy_write(phydev, MII_M1011_IMASK, 224 MII_M1011_IMASK_CLEAR); 225 226 return err; 227 } 228 229 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 230 { 231 int reg; 232 int err; 233 int val; 234 235 /* get the current settings */ 236 reg = phy_read(phydev, MII_M1011_PHY_SCR); 237 if (reg < 0) 238 return reg; 239 240 val = reg; 241 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 242 switch (polarity) { 243 case ETH_TP_MDI: 244 val |= MII_M1011_PHY_SCR_MDI; 245 break; 246 case ETH_TP_MDI_X: 247 val |= MII_M1011_PHY_SCR_MDI_X; 248 break; 249 case ETH_TP_MDI_AUTO: 250 case ETH_TP_MDI_INVALID: 251 default: 252 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 253 break; 254 } 255 256 if (val != reg) { 257 /* Set the new polarity value in the register */ 258 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 259 if (err) 260 return err; 261 } 262 263 return val != reg; 264 } 265 266 static int marvell_set_downshift(struct phy_device *phydev, bool enable, 267 u8 retries) 268 { 269 int reg; 270 271 reg = phy_read(phydev, MII_M1011_PHY_SCR); 272 if (reg < 0) 273 return reg; 274 275 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK; 276 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT); 277 if (enable) 278 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN; 279 280 return phy_write(phydev, MII_M1011_PHY_SCR, reg); 281 } 282 283 static int marvell_config_aneg(struct phy_device *phydev) 284 { 285 int changed = 0; 286 int err; 287 288 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 289 if (err < 0) 290 return err; 291 292 changed = err; 293 294 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 295 MII_M1111_PHY_LED_DIRECT); 296 if (err < 0) 297 return err; 298 299 err = genphy_config_aneg(phydev); 300 if (err < 0) 301 return err; 302 303 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 304 /* A write to speed/duplex bits (that is performed by 305 * genphy_config_aneg() call above) must be followed by 306 * a software reset. Otherwise, the write has no effect. 307 */ 308 err = genphy_soft_reset(phydev); 309 if (err < 0) 310 return err; 311 } 312 313 return 0; 314 } 315 316 static int m88e1101_config_aneg(struct phy_device *phydev) 317 { 318 int err; 319 320 /* This Marvell PHY has an errata which requires 321 * that certain registers get written in order 322 * to restart autonegotiation 323 */ 324 err = genphy_soft_reset(phydev); 325 if (err < 0) 326 return err; 327 328 err = phy_write(phydev, 0x1d, 0x1f); 329 if (err < 0) 330 return err; 331 332 err = phy_write(phydev, 0x1e, 0x200c); 333 if (err < 0) 334 return err; 335 336 err = phy_write(phydev, 0x1d, 0x5); 337 if (err < 0) 338 return err; 339 340 err = phy_write(phydev, 0x1e, 0); 341 if (err < 0) 342 return err; 343 344 err = phy_write(phydev, 0x1e, 0x100); 345 if (err < 0) 346 return err; 347 348 return marvell_config_aneg(phydev); 349 } 350 351 #ifdef CONFIG_OF_MDIO 352 /* Set and/or override some configuration registers based on the 353 * marvell,reg-init property stored in the of_node for the phydev. 354 * 355 * marvell,reg-init = <reg-page reg mask value>,...; 356 * 357 * There may be one or more sets of <reg-page reg mask value>: 358 * 359 * reg-page: which register bank to use. 360 * reg: the register. 361 * mask: if non-zero, ANDed with existing register value. 362 * value: ORed with the masked value and written to the regiser. 363 * 364 */ 365 static int marvell_of_reg_init(struct phy_device *phydev) 366 { 367 const __be32 *paddr; 368 int len, i, saved_page, current_page, ret = 0; 369 370 if (!phydev->mdio.dev.of_node) 371 return 0; 372 373 paddr = of_get_property(phydev->mdio.dev.of_node, 374 "marvell,reg-init", &len); 375 if (!paddr || len < (4 * sizeof(*paddr))) 376 return 0; 377 378 saved_page = phy_save_page(phydev); 379 if (saved_page < 0) 380 goto err; 381 current_page = saved_page; 382 383 len /= sizeof(*paddr); 384 for (i = 0; i < len - 3; i += 4) { 385 u16 page = be32_to_cpup(paddr + i); 386 u16 reg = be32_to_cpup(paddr + i + 1); 387 u16 mask = be32_to_cpup(paddr + i + 2); 388 u16 val_bits = be32_to_cpup(paddr + i + 3); 389 int val; 390 391 if (page != current_page) { 392 current_page = page; 393 ret = marvell_write_page(phydev, page); 394 if (ret < 0) 395 goto err; 396 } 397 398 val = 0; 399 if (mask) { 400 val = __phy_read(phydev, reg); 401 if (val < 0) { 402 ret = val; 403 goto err; 404 } 405 val &= mask; 406 } 407 val |= val_bits; 408 409 ret = __phy_write(phydev, reg, val); 410 if (ret < 0) 411 goto err; 412 } 413 err: 414 return phy_restore_page(phydev, saved_page, ret); 415 } 416 #else 417 static int marvell_of_reg_init(struct phy_device *phydev) 418 { 419 return 0; 420 } 421 #endif /* CONFIG_OF_MDIO */ 422 423 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 424 { 425 int mscr; 426 427 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 428 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 429 MII_88E1121_PHY_MSCR_TX_DELAY; 430 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 431 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 432 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 433 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 434 else 435 mscr = 0; 436 437 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 438 MII_88E1121_PHY_MSCR_REG, 439 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 440 } 441 442 static int m88e1121_config_aneg(struct phy_device *phydev) 443 { 444 int changed = 0; 445 int err = 0; 446 447 if (phy_interface_is_rgmii(phydev)) { 448 err = m88e1121_config_aneg_rgmii_delays(phydev); 449 if (err < 0) 450 return err; 451 } 452 453 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 454 if (err < 0) 455 return err; 456 457 changed = err; 458 459 err = genphy_config_aneg(phydev); 460 if (err < 0) 461 return err; 462 463 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 464 /* A software reset is used to ensure a "commit" of the 465 * changes is done. 466 */ 467 err = genphy_soft_reset(phydev); 468 if (err < 0) 469 return err; 470 } 471 472 return 0; 473 } 474 475 static int m88e1318_config_aneg(struct phy_device *phydev) 476 { 477 int err; 478 479 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 480 MII_88E1318S_PHY_MSCR1_REG, 481 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 482 if (err < 0) 483 return err; 484 485 return m88e1121_config_aneg(phydev); 486 } 487 488 /** 489 * linkmode_adv_to_fiber_adv_t 490 * @advertise: the linkmode advertisement settings 491 * 492 * A small helper function that translates linkmode advertisement 493 * settings to phy autonegotiation advertisements for the MII_ADV 494 * register for fiber link. 495 */ 496 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 497 { 498 u32 result = 0; 499 500 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 501 result |= ADVERTISE_FIBER_1000HALF; 502 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 503 result |= ADVERTISE_FIBER_1000FULL; 504 505 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 506 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 507 result |= LPA_PAUSE_ASYM_FIBER; 508 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 509 result |= (ADVERTISE_PAUSE_FIBER 510 & (~ADVERTISE_PAUSE_ASYM_FIBER)); 511 512 return result; 513 } 514 515 /** 516 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 517 * @phydev: target phy_device struct 518 * 519 * Description: If auto-negotiation is enabled, we configure the 520 * advertising, and then restart auto-negotiation. If it is not 521 * enabled, then we write the BMCR. Adapted for fiber link in 522 * some Marvell's devices. 523 */ 524 static int marvell_config_aneg_fiber(struct phy_device *phydev) 525 { 526 int changed = 0; 527 int err; 528 int adv, oldadv; 529 530 if (phydev->autoneg != AUTONEG_ENABLE) 531 return genphy_setup_forced(phydev); 532 533 /* Only allow advertising what this PHY supports */ 534 linkmode_and(phydev->advertising, phydev->advertising, 535 phydev->supported); 536 537 /* Setup fiber advertisement */ 538 adv = phy_read(phydev, MII_ADVERTISE); 539 if (adv < 0) 540 return adv; 541 542 oldadv = adv; 543 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL 544 | LPA_PAUSE_FIBER); 545 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising); 546 547 if (adv != oldadv) { 548 err = phy_write(phydev, MII_ADVERTISE, adv); 549 if (err < 0) 550 return err; 551 552 changed = 1; 553 } 554 555 if (changed == 0) { 556 /* Advertisement hasn't changed, but maybe aneg was never on to 557 * begin with? Or maybe phy was isolated? 558 */ 559 int ctl = phy_read(phydev, MII_BMCR); 560 561 if (ctl < 0) 562 return ctl; 563 564 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 565 changed = 1; /* do restart aneg */ 566 } 567 568 /* Only restart aneg if we are advertising something different 569 * than we were before. 570 */ 571 if (changed > 0) 572 changed = genphy_restart_aneg(phydev); 573 574 return changed; 575 } 576 577 static int m88e1510_config_aneg(struct phy_device *phydev) 578 { 579 int err; 580 581 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 582 if (err < 0) 583 goto error; 584 585 /* Configure the copper link first */ 586 err = m88e1318_config_aneg(phydev); 587 if (err < 0) 588 goto error; 589 590 /* Do not touch the fiber page if we're in copper->sgmii mode */ 591 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 592 return 0; 593 594 /* Then the fiber link */ 595 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 596 if (err < 0) 597 goto error; 598 599 err = marvell_config_aneg_fiber(phydev); 600 if (err < 0) 601 goto error; 602 603 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 604 605 error: 606 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 607 return err; 608 } 609 610 static void marvell_config_led(struct phy_device *phydev) 611 { 612 u16 def_config; 613 int err; 614 615 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 616 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 617 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 618 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 619 def_config = MII_88E1121_PHY_LED_DEF; 620 break; 621 /* Default PHY LED config: 622 * LED[0] .. 1000Mbps Link 623 * LED[1] .. 100Mbps Link 624 * LED[2] .. Blink, Activity 625 */ 626 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 627 def_config = MII_88E1510_PHY_LED_DEF; 628 break; 629 default: 630 return; 631 } 632 633 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 634 def_config); 635 if (err < 0) 636 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 637 } 638 639 static int marvell_config_init(struct phy_device *phydev) 640 { 641 /* Set defalut LED */ 642 marvell_config_led(phydev); 643 644 /* Set registers from marvell,reg-init DT property */ 645 return marvell_of_reg_init(phydev); 646 } 647 648 static int m88e1116r_config_init(struct phy_device *phydev) 649 { 650 int err; 651 652 err = genphy_soft_reset(phydev); 653 if (err < 0) 654 return err; 655 656 msleep(500); 657 658 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 659 if (err < 0) 660 return err; 661 662 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 663 if (err < 0) 664 return err; 665 666 err = marvell_set_downshift(phydev, true, 8); 667 if (err < 0) 668 return err; 669 670 if (phy_interface_is_rgmii(phydev)) { 671 err = m88e1121_config_aneg_rgmii_delays(phydev); 672 if (err < 0) 673 return err; 674 } 675 676 err = genphy_soft_reset(phydev); 677 if (err < 0) 678 return err; 679 680 return marvell_config_init(phydev); 681 } 682 683 static int m88e3016_config_init(struct phy_device *phydev) 684 { 685 int ret; 686 687 /* Enable Scrambler and Auto-Crossover */ 688 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 689 MII_88E3016_DISABLE_SCRAMBLER, 690 MII_88E3016_AUTO_MDIX_CROSSOVER); 691 if (ret < 0) 692 return ret; 693 694 return marvell_config_init(phydev); 695 } 696 697 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 698 u16 mode, 699 int fibre_copper_auto) 700 { 701 if (fibre_copper_auto) 702 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 703 704 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 705 MII_M1111_HWCFG_MODE_MASK | 706 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 707 MII_M1111_HWCFG_FIBER_COPPER_RES, 708 mode); 709 } 710 711 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 712 { 713 int delay; 714 715 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 716 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 717 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 718 delay = MII_M1111_RGMII_RX_DELAY; 719 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 720 delay = MII_M1111_RGMII_TX_DELAY; 721 } else { 722 delay = 0; 723 } 724 725 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 726 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 727 delay); 728 } 729 730 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 731 { 732 int temp; 733 int err; 734 735 err = m88e1111_config_init_rgmii_delays(phydev); 736 if (err < 0) 737 return err; 738 739 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 740 if (temp < 0) 741 return temp; 742 743 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 744 745 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 746 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 747 else 748 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 749 750 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 751 } 752 753 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 754 { 755 int err; 756 757 err = m88e1111_config_init_hwcfg_mode( 758 phydev, 759 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 760 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 761 if (err < 0) 762 return err; 763 764 /* make sure copper is selected */ 765 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 766 } 767 768 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 769 { 770 int err; 771 772 err = m88e1111_config_init_rgmii_delays(phydev); 773 if (err < 0) 774 return err; 775 776 err = m88e1111_config_init_hwcfg_mode( 777 phydev, 778 MII_M1111_HWCFG_MODE_RTBI, 779 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 780 if (err < 0) 781 return err; 782 783 /* soft reset */ 784 err = genphy_soft_reset(phydev); 785 if (err < 0) 786 return err; 787 788 return m88e1111_config_init_hwcfg_mode( 789 phydev, 790 MII_M1111_HWCFG_MODE_RTBI, 791 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 792 } 793 794 static int m88e1111_config_init(struct phy_device *phydev) 795 { 796 int err; 797 798 if (phy_interface_is_rgmii(phydev)) { 799 err = m88e1111_config_init_rgmii(phydev); 800 if (err < 0) 801 return err; 802 } 803 804 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 805 err = m88e1111_config_init_sgmii(phydev); 806 if (err < 0) 807 return err; 808 } 809 810 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 811 err = m88e1111_config_init_rtbi(phydev); 812 if (err < 0) 813 return err; 814 } 815 816 err = marvell_of_reg_init(phydev); 817 if (err < 0) 818 return err; 819 820 return genphy_soft_reset(phydev); 821 } 822 823 static int m88e1318_config_init(struct phy_device *phydev) 824 { 825 if (phy_interrupt_is_valid(phydev)) { 826 int err = phy_modify_paged( 827 phydev, MII_MARVELL_LED_PAGE, 828 MII_88E1318S_PHY_LED_TCR, 829 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 830 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 831 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 832 if (err < 0) 833 return err; 834 } 835 836 return marvell_config_init(phydev); 837 } 838 839 static int m88e1510_config_init(struct phy_device *phydev) 840 { 841 int err; 842 843 /* SGMII-to-Copper mode initialization */ 844 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 845 846 /* Select page 18 */ 847 err = marvell_set_page(phydev, 18); 848 if (err < 0) 849 return err; 850 851 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 852 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 853 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 854 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 855 if (err < 0) 856 return err; 857 858 /* PHY reset is necessary after changing MODE[2:0] */ 859 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 860 MII_88E1510_GEN_CTRL_REG_1_RESET); 861 if (err < 0) 862 return err; 863 864 /* Reset page selection */ 865 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 866 if (err < 0) 867 return err; 868 869 /* There appears to be a bug in the 88e1512 when used in 870 * SGMII to copper mode, where the AN advertisement register 871 * clears the pause bits each time a negotiation occurs. 872 * This means we can never be truely sure what was advertised, 873 * so disable Pause support. 874 */ 875 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 876 phydev->supported); 877 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, 878 phydev->supported); 879 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 880 phydev->advertising); 881 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, 882 phydev->advertising); 883 } 884 885 return m88e1318_config_init(phydev); 886 } 887 888 static int m88e1118_config_aneg(struct phy_device *phydev) 889 { 890 int err; 891 892 err = genphy_soft_reset(phydev); 893 if (err < 0) 894 return err; 895 896 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 897 if (err < 0) 898 return err; 899 900 err = genphy_config_aneg(phydev); 901 return 0; 902 } 903 904 static int m88e1118_config_init(struct phy_device *phydev) 905 { 906 int err; 907 908 /* Change address */ 909 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 910 if (err < 0) 911 return err; 912 913 /* Enable 1000 Mbit */ 914 err = phy_write(phydev, 0x15, 0x1070); 915 if (err < 0) 916 return err; 917 918 /* Change address */ 919 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 920 if (err < 0) 921 return err; 922 923 /* Adjust LED Control */ 924 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 925 err = phy_write(phydev, 0x10, 0x1100); 926 else 927 err = phy_write(phydev, 0x10, 0x021e); 928 if (err < 0) 929 return err; 930 931 err = marvell_of_reg_init(phydev); 932 if (err < 0) 933 return err; 934 935 /* Reset address */ 936 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 937 if (err < 0) 938 return err; 939 940 return genphy_soft_reset(phydev); 941 } 942 943 static int m88e1149_config_init(struct phy_device *phydev) 944 { 945 int err; 946 947 /* Change address */ 948 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 949 if (err < 0) 950 return err; 951 952 /* Enable 1000 Mbit */ 953 err = phy_write(phydev, 0x15, 0x1048); 954 if (err < 0) 955 return err; 956 957 err = marvell_of_reg_init(phydev); 958 if (err < 0) 959 return err; 960 961 /* Reset address */ 962 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 963 if (err < 0) 964 return err; 965 966 return genphy_soft_reset(phydev); 967 } 968 969 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 970 { 971 int err; 972 973 err = m88e1111_config_init_rgmii_delays(phydev); 974 if (err < 0) 975 return err; 976 977 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 978 err = phy_write(phydev, 0x1d, 0x0012); 979 if (err < 0) 980 return err; 981 982 err = phy_modify(phydev, 0x1e, 0x0fc0, 983 2 << 9 | /* 36 ohm */ 984 2 << 6); /* 39 ohm */ 985 if (err < 0) 986 return err; 987 988 err = phy_write(phydev, 0x1d, 0x3); 989 if (err < 0) 990 return err; 991 992 err = phy_write(phydev, 0x1e, 0x8000); 993 } 994 return err; 995 } 996 997 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 998 { 999 return m88e1111_config_init_hwcfg_mode( 1000 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1001 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1002 } 1003 1004 static int m88e1145_config_init(struct phy_device *phydev) 1005 { 1006 int err; 1007 1008 /* Take care of errata E0 & E1 */ 1009 err = phy_write(phydev, 0x1d, 0x001b); 1010 if (err < 0) 1011 return err; 1012 1013 err = phy_write(phydev, 0x1e, 0x418f); 1014 if (err < 0) 1015 return err; 1016 1017 err = phy_write(phydev, 0x1d, 0x0016); 1018 if (err < 0) 1019 return err; 1020 1021 err = phy_write(phydev, 0x1e, 0xa2da); 1022 if (err < 0) 1023 return err; 1024 1025 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1026 err = m88e1145_config_init_rgmii(phydev); 1027 if (err < 0) 1028 return err; 1029 } 1030 1031 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1032 err = m88e1145_config_init_sgmii(phydev); 1033 if (err < 0) 1034 return err; 1035 } 1036 1037 err = marvell_of_reg_init(phydev); 1038 if (err < 0) 1039 return err; 1040 1041 return 0; 1042 } 1043 1044 /* The VOD can be out of specification on link up. Poke an 1045 * undocumented register, in an undocumented page, with a magic value 1046 * to fix this. 1047 */ 1048 static int m88e6390_errata(struct phy_device *phydev) 1049 { 1050 int err; 1051 1052 err = phy_write(phydev, MII_BMCR, 1053 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1054 if (err) 1055 return err; 1056 1057 usleep_range(300, 400); 1058 1059 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1060 if (err) 1061 return err; 1062 1063 return genphy_soft_reset(phydev); 1064 } 1065 1066 static int m88e6390_config_aneg(struct phy_device *phydev) 1067 { 1068 int err; 1069 1070 err = m88e6390_errata(phydev); 1071 if (err) 1072 return err; 1073 1074 return m88e1510_config_aneg(phydev); 1075 } 1076 1077 /** 1078 * fiber_lpa_mod_linkmode_lpa_t 1079 * @advertising: the linkmode advertisement settings 1080 * @lpa: value of the MII_LPA register for fiber link 1081 * 1082 * A small helper function that translates MII_LPA bits to linkmode LP 1083 * advertisement settings. Other bits in advertising are left 1084 * unchanged. 1085 */ 1086 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1087 { 1088 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1089 advertising, lpa & LPA_FIBER_1000HALF); 1090 1091 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1092 advertising, lpa & LPA_FIBER_1000FULL); 1093 } 1094 1095 /** 1096 * marvell_update_link - update link status in real time in @phydev 1097 * @phydev: target phy_device struct 1098 * 1099 * Description: Update the value in phydev->link to reflect the 1100 * current link value. 1101 */ 1102 static int marvell_update_link(struct phy_device *phydev, int fiber) 1103 { 1104 int status; 1105 1106 /* Use the generic register for copper link, or specific 1107 * register for fiber case 1108 */ 1109 if (fiber) { 1110 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1111 if (status < 0) 1112 return status; 1113 1114 if ((status & REGISTER_LINK_STATUS) == 0) 1115 phydev->link = 0; 1116 else 1117 phydev->link = 1; 1118 } else { 1119 return genphy_update_link(phydev); 1120 } 1121 1122 return 0; 1123 } 1124 1125 static int marvell_read_status_page_an(struct phy_device *phydev, 1126 int fiber) 1127 { 1128 int status; 1129 int lpa; 1130 int lpagb; 1131 1132 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1133 if (status < 0) 1134 return status; 1135 1136 lpa = phy_read(phydev, MII_LPA); 1137 if (lpa < 0) 1138 return lpa; 1139 1140 lpagb = phy_read(phydev, MII_STAT1000); 1141 if (lpagb < 0) 1142 return lpagb; 1143 1144 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1145 phydev->duplex = DUPLEX_FULL; 1146 else 1147 phydev->duplex = DUPLEX_HALF; 1148 1149 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 1150 phydev->pause = 0; 1151 phydev->asym_pause = 0; 1152 1153 switch (status) { 1154 case MII_M1011_PHY_STATUS_1000: 1155 phydev->speed = SPEED_1000; 1156 break; 1157 1158 case MII_M1011_PHY_STATUS_100: 1159 phydev->speed = SPEED_100; 1160 break; 1161 1162 default: 1163 phydev->speed = SPEED_10; 1164 break; 1165 } 1166 1167 if (!fiber) { 1168 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa); 1169 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb); 1170 1171 if (phydev->duplex == DUPLEX_FULL) { 1172 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 1173 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 1174 } 1175 } else { 1176 /* The fiber link is only 1000M capable */ 1177 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1178 1179 if (phydev->duplex == DUPLEX_FULL) { 1180 if (!(lpa & LPA_PAUSE_FIBER)) { 1181 phydev->pause = 0; 1182 phydev->asym_pause = 0; 1183 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1184 phydev->pause = 1; 1185 phydev->asym_pause = 1; 1186 } else { 1187 phydev->pause = 1; 1188 phydev->asym_pause = 0; 1189 } 1190 } 1191 } 1192 return 0; 1193 } 1194 1195 static int marvell_read_status_page_fixed(struct phy_device *phydev) 1196 { 1197 int bmcr = phy_read(phydev, MII_BMCR); 1198 1199 if (bmcr < 0) 1200 return bmcr; 1201 1202 if (bmcr & BMCR_FULLDPLX) 1203 phydev->duplex = DUPLEX_FULL; 1204 else 1205 phydev->duplex = DUPLEX_HALF; 1206 1207 if (bmcr & BMCR_SPEED1000) 1208 phydev->speed = SPEED_1000; 1209 else if (bmcr & BMCR_SPEED100) 1210 phydev->speed = SPEED_100; 1211 else 1212 phydev->speed = SPEED_10; 1213 1214 phydev->pause = 0; 1215 phydev->asym_pause = 0; 1216 linkmode_zero(phydev->lp_advertising); 1217 1218 return 0; 1219 } 1220 1221 /* marvell_read_status_page 1222 * 1223 * Description: 1224 * Check the link, then figure out the current state 1225 * by comparing what we advertise with what the link partner 1226 * advertises. Start by checking the gigabit possibilities, 1227 * then move on to 10/100. 1228 */ 1229 static int marvell_read_status_page(struct phy_device *phydev, int page) 1230 { 1231 int fiber; 1232 int err; 1233 1234 /* Detect and update the link, but return if there 1235 * was an error 1236 */ 1237 if (page == MII_MARVELL_FIBER_PAGE) 1238 fiber = 1; 1239 else 1240 fiber = 0; 1241 1242 err = marvell_update_link(phydev, fiber); 1243 if (err) 1244 return err; 1245 1246 if (phydev->autoneg == AUTONEG_ENABLE) 1247 err = marvell_read_status_page_an(phydev, fiber); 1248 else 1249 err = marvell_read_status_page_fixed(phydev); 1250 1251 return err; 1252 } 1253 1254 /* marvell_read_status 1255 * 1256 * Some Marvell's phys have two modes: fiber and copper. 1257 * Both need status checked. 1258 * Description: 1259 * First, check the fiber link and status. 1260 * If the fiber link is down, check the copper link and status which 1261 * will be the default value if both link are down. 1262 */ 1263 static int marvell_read_status(struct phy_device *phydev) 1264 { 1265 int err; 1266 1267 /* Check the fiber mode first */ 1268 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1269 phydev->supported) && 1270 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1271 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1272 if (err < 0) 1273 goto error; 1274 1275 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1276 if (err < 0) 1277 goto error; 1278 1279 /* If the fiber link is up, it is the selected and 1280 * used link. In this case, we need to stay in the 1281 * fiber page. Please to be careful about that, avoid 1282 * to restore Copper page in other functions which 1283 * could break the behaviour for some fiber phy like 1284 * 88E1512. 1285 */ 1286 if (phydev->link) 1287 return 0; 1288 1289 /* If fiber link is down, check and save copper mode state */ 1290 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1291 if (err < 0) 1292 goto error; 1293 } 1294 1295 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1296 1297 error: 1298 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1299 return err; 1300 } 1301 1302 /* marvell_suspend 1303 * 1304 * Some Marvell's phys have two modes: fiber and copper. 1305 * Both need to be suspended 1306 */ 1307 static int marvell_suspend(struct phy_device *phydev) 1308 { 1309 int err; 1310 1311 /* Suspend the fiber mode first */ 1312 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1313 phydev->supported)) { 1314 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1315 if (err < 0) 1316 goto error; 1317 1318 /* With the page set, use the generic suspend */ 1319 err = genphy_suspend(phydev); 1320 if (err < 0) 1321 goto error; 1322 1323 /* Then, the copper link */ 1324 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1325 if (err < 0) 1326 goto error; 1327 } 1328 1329 /* With the page set, use the generic suspend */ 1330 return genphy_suspend(phydev); 1331 1332 error: 1333 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1334 return err; 1335 } 1336 1337 /* marvell_resume 1338 * 1339 * Some Marvell's phys have two modes: fiber and copper. 1340 * Both need to be resumed 1341 */ 1342 static int marvell_resume(struct phy_device *phydev) 1343 { 1344 int err; 1345 1346 /* Resume the fiber mode first */ 1347 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1348 phydev->supported)) { 1349 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1350 if (err < 0) 1351 goto error; 1352 1353 /* With the page set, use the generic resume */ 1354 err = genphy_resume(phydev); 1355 if (err < 0) 1356 goto error; 1357 1358 /* Then, the copper link */ 1359 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1360 if (err < 0) 1361 goto error; 1362 } 1363 1364 /* With the page set, use the generic resume */ 1365 return genphy_resume(phydev); 1366 1367 error: 1368 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1369 return err; 1370 } 1371 1372 static int marvell_aneg_done(struct phy_device *phydev) 1373 { 1374 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1375 1376 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1377 } 1378 1379 static int m88e1121_did_interrupt(struct phy_device *phydev) 1380 { 1381 int imask; 1382 1383 imask = phy_read(phydev, MII_M1011_IEVENT); 1384 1385 if (imask & MII_M1011_IMASK_INIT) 1386 return 1; 1387 1388 return 0; 1389 } 1390 1391 static void m88e1318_get_wol(struct phy_device *phydev, 1392 struct ethtool_wolinfo *wol) 1393 { 1394 int oldpage, ret = 0; 1395 1396 wol->supported = WAKE_MAGIC; 1397 wol->wolopts = 0; 1398 1399 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1400 if (oldpage < 0) 1401 goto error; 1402 1403 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1404 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1405 wol->wolopts |= WAKE_MAGIC; 1406 1407 error: 1408 phy_restore_page(phydev, oldpage, ret); 1409 } 1410 1411 static int m88e1318_set_wol(struct phy_device *phydev, 1412 struct ethtool_wolinfo *wol) 1413 { 1414 int err = 0, oldpage; 1415 1416 oldpage = phy_save_page(phydev); 1417 if (oldpage < 0) 1418 goto error; 1419 1420 if (wol->wolopts & WAKE_MAGIC) { 1421 /* Explicitly switch to page 0x00, just to be sure */ 1422 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1423 if (err < 0) 1424 goto error; 1425 1426 /* If WOL event happened once, the LED[2] interrupt pin 1427 * will not be cleared unless we reading the interrupt status 1428 * register. If interrupts are in use, the normal interrupt 1429 * handling will clear the WOL event. Clear the WOL event 1430 * before enabling it if !phy_interrupt_is_valid() 1431 */ 1432 if (!phy_interrupt_is_valid(phydev)) 1433 __phy_read(phydev, MII_M1011_IEVENT); 1434 1435 /* Enable the WOL interrupt */ 1436 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1437 MII_88E1318S_PHY_CSIER_WOL_EIE); 1438 if (err < 0) 1439 goto error; 1440 1441 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1442 if (err < 0) 1443 goto error; 1444 1445 /* Setup LED[2] as interrupt pin (active low) */ 1446 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1447 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1448 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1449 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1450 if (err < 0) 1451 goto error; 1452 1453 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1454 if (err < 0) 1455 goto error; 1456 1457 /* Store the device address for the magic packet */ 1458 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1459 ((phydev->attached_dev->dev_addr[5] << 8) | 1460 phydev->attached_dev->dev_addr[4])); 1461 if (err < 0) 1462 goto error; 1463 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1464 ((phydev->attached_dev->dev_addr[3] << 8) | 1465 phydev->attached_dev->dev_addr[2])); 1466 if (err < 0) 1467 goto error; 1468 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1469 ((phydev->attached_dev->dev_addr[1] << 8) | 1470 phydev->attached_dev->dev_addr[0])); 1471 if (err < 0) 1472 goto error; 1473 1474 /* Clear WOL status and enable magic packet matching */ 1475 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1476 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1477 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1478 if (err < 0) 1479 goto error; 1480 } else { 1481 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1482 if (err < 0) 1483 goto error; 1484 1485 /* Clear WOL status and disable magic packet matching */ 1486 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1487 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1488 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1489 if (err < 0) 1490 goto error; 1491 } 1492 1493 error: 1494 return phy_restore_page(phydev, oldpage, err); 1495 } 1496 1497 static int marvell_get_sset_count(struct phy_device *phydev) 1498 { 1499 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1500 phydev->supported)) 1501 return ARRAY_SIZE(marvell_hw_stats); 1502 else 1503 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1504 } 1505 1506 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1507 { 1508 int i; 1509 1510 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) { 1511 strlcpy(data + i * ETH_GSTRING_LEN, 1512 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1513 } 1514 } 1515 1516 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1517 { 1518 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1519 struct marvell_priv *priv = phydev->priv; 1520 int val; 1521 u64 ret; 1522 1523 val = phy_read_paged(phydev, stat.page, stat.reg); 1524 if (val < 0) { 1525 ret = U64_MAX; 1526 } else { 1527 val = val & ((1 << stat.bits) - 1); 1528 priv->stats[i] += val; 1529 ret = priv->stats[i]; 1530 } 1531 1532 return ret; 1533 } 1534 1535 static void marvell_get_stats(struct phy_device *phydev, 1536 struct ethtool_stats *stats, u64 *data) 1537 { 1538 int i; 1539 1540 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) 1541 data[i] = marvell_get_stat(phydev, i); 1542 } 1543 1544 #ifdef CONFIG_HWMON 1545 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1546 { 1547 int oldpage; 1548 int ret = 0; 1549 int val; 1550 1551 *temp = 0; 1552 1553 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1554 if (oldpage < 0) 1555 goto error; 1556 1557 /* Enable temperature sensor */ 1558 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1559 if (ret < 0) 1560 goto error; 1561 1562 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1563 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1564 if (ret < 0) 1565 goto error; 1566 1567 /* Wait for temperature to stabilize */ 1568 usleep_range(10000, 12000); 1569 1570 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1571 if (val < 0) { 1572 ret = val; 1573 goto error; 1574 } 1575 1576 /* Disable temperature sensor */ 1577 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1578 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1579 if (ret < 0) 1580 goto error; 1581 1582 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1583 1584 error: 1585 return phy_restore_page(phydev, oldpage, ret); 1586 } 1587 1588 static int m88e1121_hwmon_read(struct device *dev, 1589 enum hwmon_sensor_types type, 1590 u32 attr, int channel, long *temp) 1591 { 1592 struct phy_device *phydev = dev_get_drvdata(dev); 1593 int err; 1594 1595 switch (attr) { 1596 case hwmon_temp_input: 1597 err = m88e1121_get_temp(phydev, temp); 1598 break; 1599 default: 1600 return -EOPNOTSUPP; 1601 } 1602 1603 return err; 1604 } 1605 1606 static umode_t m88e1121_hwmon_is_visible(const void *data, 1607 enum hwmon_sensor_types type, 1608 u32 attr, int channel) 1609 { 1610 if (type != hwmon_temp) 1611 return 0; 1612 1613 switch (attr) { 1614 case hwmon_temp_input: 1615 return 0444; 1616 default: 1617 return 0; 1618 } 1619 } 1620 1621 static u32 m88e1121_hwmon_chip_config[] = { 1622 HWMON_C_REGISTER_TZ, 1623 0 1624 }; 1625 1626 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1627 .type = hwmon_chip, 1628 .config = m88e1121_hwmon_chip_config, 1629 }; 1630 1631 static u32 m88e1121_hwmon_temp_config[] = { 1632 HWMON_T_INPUT, 1633 0 1634 }; 1635 1636 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1637 .type = hwmon_temp, 1638 .config = m88e1121_hwmon_temp_config, 1639 }; 1640 1641 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1642 &m88e1121_hwmon_chip, 1643 &m88e1121_hwmon_temp, 1644 NULL 1645 }; 1646 1647 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1648 .is_visible = m88e1121_hwmon_is_visible, 1649 .read = m88e1121_hwmon_read, 1650 }; 1651 1652 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1653 .ops = &m88e1121_hwmon_hwmon_ops, 1654 .info = m88e1121_hwmon_info, 1655 }; 1656 1657 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1658 { 1659 int ret; 1660 1661 *temp = 0; 1662 1663 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1664 MII_88E1510_TEMP_SENSOR); 1665 if (ret < 0) 1666 return ret; 1667 1668 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1669 1670 return 0; 1671 } 1672 1673 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1674 { 1675 int ret; 1676 1677 *temp = 0; 1678 1679 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1680 MII_88E1121_MISC_TEST); 1681 if (ret < 0) 1682 return ret; 1683 1684 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1685 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1686 /* convert to mC */ 1687 *temp *= 1000; 1688 1689 return 0; 1690 } 1691 1692 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1693 { 1694 temp = temp / 1000; 1695 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1696 1697 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1698 MII_88E1121_MISC_TEST, 1699 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1700 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1701 } 1702 1703 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1704 { 1705 int ret; 1706 1707 *alarm = false; 1708 1709 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1710 MII_88E1121_MISC_TEST); 1711 if (ret < 0) 1712 return ret; 1713 1714 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1715 1716 return 0; 1717 } 1718 1719 static int m88e1510_hwmon_read(struct device *dev, 1720 enum hwmon_sensor_types type, 1721 u32 attr, int channel, long *temp) 1722 { 1723 struct phy_device *phydev = dev_get_drvdata(dev); 1724 int err; 1725 1726 switch (attr) { 1727 case hwmon_temp_input: 1728 err = m88e1510_get_temp(phydev, temp); 1729 break; 1730 case hwmon_temp_crit: 1731 err = m88e1510_get_temp_critical(phydev, temp); 1732 break; 1733 case hwmon_temp_max_alarm: 1734 err = m88e1510_get_temp_alarm(phydev, temp); 1735 break; 1736 default: 1737 return -EOPNOTSUPP; 1738 } 1739 1740 return err; 1741 } 1742 1743 static int m88e1510_hwmon_write(struct device *dev, 1744 enum hwmon_sensor_types type, 1745 u32 attr, int channel, long temp) 1746 { 1747 struct phy_device *phydev = dev_get_drvdata(dev); 1748 int err; 1749 1750 switch (attr) { 1751 case hwmon_temp_crit: 1752 err = m88e1510_set_temp_critical(phydev, temp); 1753 break; 1754 default: 1755 return -EOPNOTSUPP; 1756 } 1757 return err; 1758 } 1759 1760 static umode_t m88e1510_hwmon_is_visible(const void *data, 1761 enum hwmon_sensor_types type, 1762 u32 attr, int channel) 1763 { 1764 if (type != hwmon_temp) 1765 return 0; 1766 1767 switch (attr) { 1768 case hwmon_temp_input: 1769 case hwmon_temp_max_alarm: 1770 return 0444; 1771 case hwmon_temp_crit: 1772 return 0644; 1773 default: 1774 return 0; 1775 } 1776 } 1777 1778 static u32 m88e1510_hwmon_temp_config[] = { 1779 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1780 0 1781 }; 1782 1783 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1784 .type = hwmon_temp, 1785 .config = m88e1510_hwmon_temp_config, 1786 }; 1787 1788 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1789 &m88e1121_hwmon_chip, 1790 &m88e1510_hwmon_temp, 1791 NULL 1792 }; 1793 1794 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1795 .is_visible = m88e1510_hwmon_is_visible, 1796 .read = m88e1510_hwmon_read, 1797 .write = m88e1510_hwmon_write, 1798 }; 1799 1800 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1801 .ops = &m88e1510_hwmon_hwmon_ops, 1802 .info = m88e1510_hwmon_info, 1803 }; 1804 1805 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 1806 { 1807 int sum = 0; 1808 int oldpage; 1809 int ret = 0; 1810 int i; 1811 1812 *temp = 0; 1813 1814 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1815 if (oldpage < 0) 1816 goto error; 1817 1818 /* Enable temperature sensor */ 1819 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1820 if (ret < 0) 1821 goto error; 1822 1823 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1824 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 1825 MII_88E6390_MISC_TEST_SAMPLE_1S; 1826 1827 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1828 if (ret < 0) 1829 goto error; 1830 1831 /* Wait for temperature to stabilize */ 1832 usleep_range(10000, 12000); 1833 1834 /* Reading the temperature sense has an errata. You need to read 1835 * a number of times and take an average. 1836 */ 1837 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 1838 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 1839 if (ret < 0) 1840 goto error; 1841 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 1842 } 1843 1844 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 1845 *temp = (sum - 75) * 1000; 1846 1847 /* Disable temperature sensor */ 1848 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1849 if (ret < 0) 1850 goto error; 1851 1852 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1853 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 1854 1855 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1856 1857 error: 1858 phy_restore_page(phydev, oldpage, ret); 1859 1860 return ret; 1861 } 1862 1863 static int m88e6390_hwmon_read(struct device *dev, 1864 enum hwmon_sensor_types type, 1865 u32 attr, int channel, long *temp) 1866 { 1867 struct phy_device *phydev = dev_get_drvdata(dev); 1868 int err; 1869 1870 switch (attr) { 1871 case hwmon_temp_input: 1872 err = m88e6390_get_temp(phydev, temp); 1873 break; 1874 default: 1875 return -EOPNOTSUPP; 1876 } 1877 1878 return err; 1879 } 1880 1881 static umode_t m88e6390_hwmon_is_visible(const void *data, 1882 enum hwmon_sensor_types type, 1883 u32 attr, int channel) 1884 { 1885 if (type != hwmon_temp) 1886 return 0; 1887 1888 switch (attr) { 1889 case hwmon_temp_input: 1890 return 0444; 1891 default: 1892 return 0; 1893 } 1894 } 1895 1896 static u32 m88e6390_hwmon_temp_config[] = { 1897 HWMON_T_INPUT, 1898 0 1899 }; 1900 1901 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 1902 .type = hwmon_temp, 1903 .config = m88e6390_hwmon_temp_config, 1904 }; 1905 1906 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 1907 &m88e1121_hwmon_chip, 1908 &m88e6390_hwmon_temp, 1909 NULL 1910 }; 1911 1912 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 1913 .is_visible = m88e6390_hwmon_is_visible, 1914 .read = m88e6390_hwmon_read, 1915 }; 1916 1917 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 1918 .ops = &m88e6390_hwmon_hwmon_ops, 1919 .info = m88e6390_hwmon_info, 1920 }; 1921 1922 static int marvell_hwmon_name(struct phy_device *phydev) 1923 { 1924 struct marvell_priv *priv = phydev->priv; 1925 struct device *dev = &phydev->mdio.dev; 1926 const char *devname = dev_name(dev); 1927 size_t len = strlen(devname); 1928 int i, j; 1929 1930 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 1931 if (!priv->hwmon_name) 1932 return -ENOMEM; 1933 1934 for (i = j = 0; i < len && devname[i]; i++) { 1935 if (isalnum(devname[i])) 1936 priv->hwmon_name[j++] = devname[i]; 1937 } 1938 1939 return 0; 1940 } 1941 1942 static int marvell_hwmon_probe(struct phy_device *phydev, 1943 const struct hwmon_chip_info *chip) 1944 { 1945 struct marvell_priv *priv = phydev->priv; 1946 struct device *dev = &phydev->mdio.dev; 1947 int err; 1948 1949 err = marvell_hwmon_name(phydev); 1950 if (err) 1951 return err; 1952 1953 priv->hwmon_dev = devm_hwmon_device_register_with_info( 1954 dev, priv->hwmon_name, phydev, chip, NULL); 1955 1956 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 1957 } 1958 1959 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1960 { 1961 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 1962 } 1963 1964 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1965 { 1966 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 1967 } 1968 1969 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1970 { 1971 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 1972 } 1973 #else 1974 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1975 { 1976 return 0; 1977 } 1978 1979 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1980 { 1981 return 0; 1982 } 1983 1984 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1985 { 1986 return 0; 1987 } 1988 #endif 1989 1990 static int marvell_probe(struct phy_device *phydev) 1991 { 1992 struct marvell_priv *priv; 1993 1994 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 1995 if (!priv) 1996 return -ENOMEM; 1997 1998 phydev->priv = priv; 1999 2000 return 0; 2001 } 2002 2003 static int m88e1121_probe(struct phy_device *phydev) 2004 { 2005 int err; 2006 2007 err = marvell_probe(phydev); 2008 if (err) 2009 return err; 2010 2011 return m88e1121_hwmon_probe(phydev); 2012 } 2013 2014 static int m88e1510_probe(struct phy_device *phydev) 2015 { 2016 int err; 2017 2018 err = marvell_probe(phydev); 2019 if (err) 2020 return err; 2021 2022 return m88e1510_hwmon_probe(phydev); 2023 } 2024 2025 static int m88e6390_probe(struct phy_device *phydev) 2026 { 2027 int err; 2028 2029 err = marvell_probe(phydev); 2030 if (err) 2031 return err; 2032 2033 return m88e6390_hwmon_probe(phydev); 2034 } 2035 2036 static struct phy_driver marvell_drivers[] = { 2037 { 2038 .phy_id = MARVELL_PHY_ID_88E1101, 2039 .phy_id_mask = MARVELL_PHY_ID_MASK, 2040 .name = "Marvell 88E1101", 2041 .features = PHY_GBIT_FEATURES, 2042 .probe = marvell_probe, 2043 .config_init = &marvell_config_init, 2044 .config_aneg = &m88e1101_config_aneg, 2045 .ack_interrupt = &marvell_ack_interrupt, 2046 .config_intr = &marvell_config_intr, 2047 .resume = &genphy_resume, 2048 .suspend = &genphy_suspend, 2049 .read_page = marvell_read_page, 2050 .write_page = marvell_write_page, 2051 .get_sset_count = marvell_get_sset_count, 2052 .get_strings = marvell_get_strings, 2053 .get_stats = marvell_get_stats, 2054 }, 2055 { 2056 .phy_id = MARVELL_PHY_ID_88E1112, 2057 .phy_id_mask = MARVELL_PHY_ID_MASK, 2058 .name = "Marvell 88E1112", 2059 .features = PHY_GBIT_FEATURES, 2060 .probe = marvell_probe, 2061 .config_init = &m88e1111_config_init, 2062 .config_aneg = &marvell_config_aneg, 2063 .ack_interrupt = &marvell_ack_interrupt, 2064 .config_intr = &marvell_config_intr, 2065 .resume = &genphy_resume, 2066 .suspend = &genphy_suspend, 2067 .read_page = marvell_read_page, 2068 .write_page = marvell_write_page, 2069 .get_sset_count = marvell_get_sset_count, 2070 .get_strings = marvell_get_strings, 2071 .get_stats = marvell_get_stats, 2072 }, 2073 { 2074 .phy_id = MARVELL_PHY_ID_88E1111, 2075 .phy_id_mask = MARVELL_PHY_ID_MASK, 2076 .name = "Marvell 88E1111", 2077 .features = PHY_GBIT_FEATURES, 2078 .probe = marvell_probe, 2079 .config_init = &m88e1111_config_init, 2080 .config_aneg = &marvell_config_aneg, 2081 .read_status = &marvell_read_status, 2082 .ack_interrupt = &marvell_ack_interrupt, 2083 .config_intr = &marvell_config_intr, 2084 .resume = &genphy_resume, 2085 .suspend = &genphy_suspend, 2086 .read_page = marvell_read_page, 2087 .write_page = marvell_write_page, 2088 .get_sset_count = marvell_get_sset_count, 2089 .get_strings = marvell_get_strings, 2090 .get_stats = marvell_get_stats, 2091 }, 2092 { 2093 .phy_id = MARVELL_PHY_ID_88E1118, 2094 .phy_id_mask = MARVELL_PHY_ID_MASK, 2095 .name = "Marvell 88E1118", 2096 .features = PHY_GBIT_FEATURES, 2097 .probe = marvell_probe, 2098 .config_init = &m88e1118_config_init, 2099 .config_aneg = &m88e1118_config_aneg, 2100 .ack_interrupt = &marvell_ack_interrupt, 2101 .config_intr = &marvell_config_intr, 2102 .resume = &genphy_resume, 2103 .suspend = &genphy_suspend, 2104 .read_page = marvell_read_page, 2105 .write_page = marvell_write_page, 2106 .get_sset_count = marvell_get_sset_count, 2107 .get_strings = marvell_get_strings, 2108 .get_stats = marvell_get_stats, 2109 }, 2110 { 2111 .phy_id = MARVELL_PHY_ID_88E1121R, 2112 .phy_id_mask = MARVELL_PHY_ID_MASK, 2113 .name = "Marvell 88E1121R", 2114 .features = PHY_GBIT_FEATURES, 2115 .probe = &m88e1121_probe, 2116 .config_init = &marvell_config_init, 2117 .config_aneg = &m88e1121_config_aneg, 2118 .read_status = &marvell_read_status, 2119 .ack_interrupt = &marvell_ack_interrupt, 2120 .config_intr = &marvell_config_intr, 2121 .did_interrupt = &m88e1121_did_interrupt, 2122 .resume = &genphy_resume, 2123 .suspend = &genphy_suspend, 2124 .read_page = marvell_read_page, 2125 .write_page = marvell_write_page, 2126 .get_sset_count = marvell_get_sset_count, 2127 .get_strings = marvell_get_strings, 2128 .get_stats = marvell_get_stats, 2129 }, 2130 { 2131 .phy_id = MARVELL_PHY_ID_88E1318S, 2132 .phy_id_mask = MARVELL_PHY_ID_MASK, 2133 .name = "Marvell 88E1318S", 2134 .features = PHY_GBIT_FEATURES, 2135 .probe = marvell_probe, 2136 .config_init = &m88e1318_config_init, 2137 .config_aneg = &m88e1318_config_aneg, 2138 .read_status = &marvell_read_status, 2139 .ack_interrupt = &marvell_ack_interrupt, 2140 .config_intr = &marvell_config_intr, 2141 .did_interrupt = &m88e1121_did_interrupt, 2142 .get_wol = &m88e1318_get_wol, 2143 .set_wol = &m88e1318_set_wol, 2144 .resume = &genphy_resume, 2145 .suspend = &genphy_suspend, 2146 .read_page = marvell_read_page, 2147 .write_page = marvell_write_page, 2148 .get_sset_count = marvell_get_sset_count, 2149 .get_strings = marvell_get_strings, 2150 .get_stats = marvell_get_stats, 2151 }, 2152 { 2153 .phy_id = MARVELL_PHY_ID_88E1145, 2154 .phy_id_mask = MARVELL_PHY_ID_MASK, 2155 .name = "Marvell 88E1145", 2156 .features = PHY_GBIT_FEATURES, 2157 .probe = marvell_probe, 2158 .config_init = &m88e1145_config_init, 2159 .config_aneg = &m88e1101_config_aneg, 2160 .read_status = &genphy_read_status, 2161 .ack_interrupt = &marvell_ack_interrupt, 2162 .config_intr = &marvell_config_intr, 2163 .resume = &genphy_resume, 2164 .suspend = &genphy_suspend, 2165 .read_page = marvell_read_page, 2166 .write_page = marvell_write_page, 2167 .get_sset_count = marvell_get_sset_count, 2168 .get_strings = marvell_get_strings, 2169 .get_stats = marvell_get_stats, 2170 }, 2171 { 2172 .phy_id = MARVELL_PHY_ID_88E1149R, 2173 .phy_id_mask = MARVELL_PHY_ID_MASK, 2174 .name = "Marvell 88E1149R", 2175 .features = PHY_GBIT_FEATURES, 2176 .probe = marvell_probe, 2177 .config_init = &m88e1149_config_init, 2178 .config_aneg = &m88e1118_config_aneg, 2179 .ack_interrupt = &marvell_ack_interrupt, 2180 .config_intr = &marvell_config_intr, 2181 .resume = &genphy_resume, 2182 .suspend = &genphy_suspend, 2183 .read_page = marvell_read_page, 2184 .write_page = marvell_write_page, 2185 .get_sset_count = marvell_get_sset_count, 2186 .get_strings = marvell_get_strings, 2187 .get_stats = marvell_get_stats, 2188 }, 2189 { 2190 .phy_id = MARVELL_PHY_ID_88E1240, 2191 .phy_id_mask = MARVELL_PHY_ID_MASK, 2192 .name = "Marvell 88E1240", 2193 .features = PHY_GBIT_FEATURES, 2194 .probe = marvell_probe, 2195 .config_init = &m88e1111_config_init, 2196 .config_aneg = &marvell_config_aneg, 2197 .ack_interrupt = &marvell_ack_interrupt, 2198 .config_intr = &marvell_config_intr, 2199 .resume = &genphy_resume, 2200 .suspend = &genphy_suspend, 2201 .read_page = marvell_read_page, 2202 .write_page = marvell_write_page, 2203 .get_sset_count = marvell_get_sset_count, 2204 .get_strings = marvell_get_strings, 2205 .get_stats = marvell_get_stats, 2206 }, 2207 { 2208 .phy_id = MARVELL_PHY_ID_88E1116R, 2209 .phy_id_mask = MARVELL_PHY_ID_MASK, 2210 .name = "Marvell 88E1116R", 2211 .features = PHY_GBIT_FEATURES, 2212 .probe = marvell_probe, 2213 .config_init = &m88e1116r_config_init, 2214 .ack_interrupt = &marvell_ack_interrupt, 2215 .config_intr = &marvell_config_intr, 2216 .resume = &genphy_resume, 2217 .suspend = &genphy_suspend, 2218 .read_page = marvell_read_page, 2219 .write_page = marvell_write_page, 2220 .get_sset_count = marvell_get_sset_count, 2221 .get_strings = marvell_get_strings, 2222 .get_stats = marvell_get_stats, 2223 }, 2224 { 2225 .phy_id = MARVELL_PHY_ID_88E1510, 2226 .phy_id_mask = MARVELL_PHY_ID_MASK, 2227 .name = "Marvell 88E1510", 2228 .features = PHY_GBIT_FIBRE_FEATURES, 2229 .probe = &m88e1510_probe, 2230 .config_init = &m88e1510_config_init, 2231 .config_aneg = &m88e1510_config_aneg, 2232 .read_status = &marvell_read_status, 2233 .ack_interrupt = &marvell_ack_interrupt, 2234 .config_intr = &marvell_config_intr, 2235 .did_interrupt = &m88e1121_did_interrupt, 2236 .get_wol = &m88e1318_get_wol, 2237 .set_wol = &m88e1318_set_wol, 2238 .resume = &marvell_resume, 2239 .suspend = &marvell_suspend, 2240 .read_page = marvell_read_page, 2241 .write_page = marvell_write_page, 2242 .get_sset_count = marvell_get_sset_count, 2243 .get_strings = marvell_get_strings, 2244 .get_stats = marvell_get_stats, 2245 .set_loopback = genphy_loopback, 2246 }, 2247 { 2248 .phy_id = MARVELL_PHY_ID_88E1540, 2249 .phy_id_mask = MARVELL_PHY_ID_MASK, 2250 .name = "Marvell 88E1540", 2251 .features = PHY_GBIT_FEATURES, 2252 .probe = m88e1510_probe, 2253 .config_init = &marvell_config_init, 2254 .config_aneg = &m88e1510_config_aneg, 2255 .read_status = &marvell_read_status, 2256 .ack_interrupt = &marvell_ack_interrupt, 2257 .config_intr = &marvell_config_intr, 2258 .did_interrupt = &m88e1121_did_interrupt, 2259 .resume = &genphy_resume, 2260 .suspend = &genphy_suspend, 2261 .read_page = marvell_read_page, 2262 .write_page = marvell_write_page, 2263 .get_sset_count = marvell_get_sset_count, 2264 .get_strings = marvell_get_strings, 2265 .get_stats = marvell_get_stats, 2266 }, 2267 { 2268 .phy_id = MARVELL_PHY_ID_88E1545, 2269 .phy_id_mask = MARVELL_PHY_ID_MASK, 2270 .name = "Marvell 88E1545", 2271 .probe = m88e1510_probe, 2272 .features = PHY_GBIT_FEATURES, 2273 .config_init = &marvell_config_init, 2274 .config_aneg = &m88e1510_config_aneg, 2275 .read_status = &marvell_read_status, 2276 .ack_interrupt = &marvell_ack_interrupt, 2277 .config_intr = &marvell_config_intr, 2278 .did_interrupt = &m88e1121_did_interrupt, 2279 .resume = &genphy_resume, 2280 .suspend = &genphy_suspend, 2281 .read_page = marvell_read_page, 2282 .write_page = marvell_write_page, 2283 .get_sset_count = marvell_get_sset_count, 2284 .get_strings = marvell_get_strings, 2285 .get_stats = marvell_get_stats, 2286 }, 2287 { 2288 .phy_id = MARVELL_PHY_ID_88E3016, 2289 .phy_id_mask = MARVELL_PHY_ID_MASK, 2290 .name = "Marvell 88E3016", 2291 .features = PHY_BASIC_FEATURES, 2292 .probe = marvell_probe, 2293 .config_init = &m88e3016_config_init, 2294 .aneg_done = &marvell_aneg_done, 2295 .read_status = &marvell_read_status, 2296 .ack_interrupt = &marvell_ack_interrupt, 2297 .config_intr = &marvell_config_intr, 2298 .did_interrupt = &m88e1121_did_interrupt, 2299 .resume = &genphy_resume, 2300 .suspend = &genphy_suspend, 2301 .read_page = marvell_read_page, 2302 .write_page = marvell_write_page, 2303 .get_sset_count = marvell_get_sset_count, 2304 .get_strings = marvell_get_strings, 2305 .get_stats = marvell_get_stats, 2306 }, 2307 { 2308 .phy_id = MARVELL_PHY_ID_88E6390, 2309 .phy_id_mask = MARVELL_PHY_ID_MASK, 2310 .name = "Marvell 88E6390", 2311 .features = PHY_GBIT_FEATURES, 2312 .probe = m88e6390_probe, 2313 .config_init = &marvell_config_init, 2314 .config_aneg = &m88e6390_config_aneg, 2315 .read_status = &marvell_read_status, 2316 .ack_interrupt = &marvell_ack_interrupt, 2317 .config_intr = &marvell_config_intr, 2318 .did_interrupt = &m88e1121_did_interrupt, 2319 .resume = &genphy_resume, 2320 .suspend = &genphy_suspend, 2321 .read_page = marvell_read_page, 2322 .write_page = marvell_write_page, 2323 .get_sset_count = marvell_get_sset_count, 2324 .get_strings = marvell_get_strings, 2325 .get_stats = marvell_get_stats, 2326 }, 2327 }; 2328 2329 module_phy_driver(marvell_drivers); 2330 2331 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2332 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2333 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2334 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2335 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2336 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2337 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2338 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2339 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2340 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2341 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2342 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2343 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2344 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2345 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2346 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2347 { } 2348 }; 2349 2350 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2351