1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13 #include <linux/kernel.h> 14 #include <linux/string.h> 15 #include <linux/ctype.h> 16 #include <linux/errno.h> 17 #include <linux/unistd.h> 18 #include <linux/hwmon.h> 19 #include <linux/interrupt.h> 20 #include <linux/init.h> 21 #include <linux/delay.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/skbuff.h> 25 #include <linux/spinlock.h> 26 #include <linux/mm.h> 27 #include <linux/module.h> 28 #include <linux/mii.h> 29 #include <linux/ethtool.h> 30 #include <linux/phy.h> 31 #include <linux/marvell_phy.h> 32 #include <linux/bitfield.h> 33 #include <linux/of.h> 34 35 #include <linux/io.h> 36 #include <asm/irq.h> 37 #include <linux/uaccess.h> 38 39 #define MII_MARVELL_PHY_PAGE 22 40 #define MII_MARVELL_COPPER_PAGE 0x00 41 #define MII_MARVELL_FIBER_PAGE 0x01 42 #define MII_MARVELL_MSCR_PAGE 0x02 43 #define MII_MARVELL_LED_PAGE 0x03 44 #define MII_MARVELL_MISC_TEST_PAGE 0x06 45 #define MII_MARVELL_WOL_PAGE 0x11 46 47 #define MII_M1011_IEVENT 0x13 48 #define MII_M1011_IEVENT_CLEAR 0x0000 49 50 #define MII_M1011_IMASK 0x12 51 #define MII_M1011_IMASK_INIT 0x6400 52 #define MII_M1011_IMASK_CLEAR 0x0000 53 54 #define MII_M1011_PHY_SCR 0x10 55 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 56 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12) 57 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8 58 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 59 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 60 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 61 62 #define MII_M1011_PHY_SSR 0x11 63 #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5) 64 65 #define MII_M1111_PHY_LED_CONTROL 0x18 66 #define MII_M1111_PHY_LED_DIRECT 0x4100 67 #define MII_M1111_PHY_LED_COMBINE 0x411c 68 #define MII_M1111_PHY_EXT_CR 0x14 69 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9) 70 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8 71 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8) 72 #define MII_M1111_RGMII_RX_DELAY BIT(7) 73 #define MII_M1111_RGMII_TX_DELAY BIT(1) 74 #define MII_M1111_PHY_EXT_SR 0x1b 75 76 #define MII_M1111_HWCFG_MODE_MASK 0xf 77 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 78 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 79 #define MII_M1111_HWCFG_MODE_RTBI 0x7 80 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 81 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 82 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 83 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 84 85 #define MII_88E1121_PHY_MSCR_REG 21 86 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 87 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 88 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 89 90 #define MII_88E1121_MISC_TEST 0x1a 91 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 92 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 93 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 94 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 95 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 96 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 97 98 #define MII_88E1510_TEMP_SENSOR 0x1b 99 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 100 101 #define MII_88E1540_COPPER_CTRL3 0x1a 102 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) 103 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 104 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 105 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 106 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 107 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) 108 109 #define MII_88E6390_MISC_TEST 0x1b 110 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 111 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 112 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 113 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 114 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 115 116 #define MII_88E6390_TEMP_SENSOR 0x1c 117 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 118 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 119 120 #define MII_88E1318S_PHY_MSCR1_REG 16 121 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 122 123 /* Copper Specific Interrupt Enable Register */ 124 #define MII_88E1318S_PHY_CSIER 0x12 125 /* WOL Event Interrupt Enable */ 126 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 127 128 /* LED Timer Control Register */ 129 #define MII_88E1318S_PHY_LED_TCR 0x12 130 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 131 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 132 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 133 134 /* Magic Packet MAC address registers */ 135 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 136 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 137 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 138 139 #define MII_88E1318S_PHY_WOL_CTRL 0x10 140 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 141 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 142 143 #define MII_PHY_LED_CTRL 16 144 #define MII_88E1121_PHY_LED_DEF 0x0030 145 #define MII_88E1510_PHY_LED_DEF 0x1177 146 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040 147 148 #define MII_M1011_PHY_STATUS 0x11 149 #define MII_M1011_PHY_STATUS_1000 0x8000 150 #define MII_M1011_PHY_STATUS_100 0x4000 151 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 152 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 153 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 154 #define MII_M1011_PHY_STATUS_LINK 0x0400 155 156 #define MII_88E3016_PHY_SPEC_CTRL 0x10 157 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 158 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 159 160 #define MII_88E1510_GEN_CTRL_REG_1 0x14 161 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 162 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 163 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 164 165 #define LPA_FIBER_1000HALF 0x40 166 #define LPA_FIBER_1000FULL 0x20 167 168 #define LPA_PAUSE_FIBER 0x180 169 #define LPA_PAUSE_ASYM_FIBER 0x100 170 171 #define ADVERTISE_FIBER_1000HALF 0x40 172 #define ADVERTISE_FIBER_1000FULL 0x20 173 174 #define ADVERTISE_PAUSE_FIBER 0x180 175 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 176 177 #define REGISTER_LINK_STATUS 0x400 178 #define NB_FIBER_STATS 1 179 180 MODULE_DESCRIPTION("Marvell PHY driver"); 181 MODULE_AUTHOR("Andy Fleming"); 182 MODULE_LICENSE("GPL"); 183 184 struct marvell_hw_stat { 185 const char *string; 186 u8 page; 187 u8 reg; 188 u8 bits; 189 }; 190 191 static struct marvell_hw_stat marvell_hw_stats[] = { 192 { "phy_receive_errors_copper", 0, 21, 16}, 193 { "phy_idle_errors", 0, 10, 8 }, 194 { "phy_receive_errors_fiber", 1, 21, 16}, 195 }; 196 197 struct marvell_priv { 198 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 199 char *hwmon_name; 200 struct device *hwmon_dev; 201 }; 202 203 static int marvell_read_page(struct phy_device *phydev) 204 { 205 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 206 } 207 208 static int marvell_write_page(struct phy_device *phydev, int page) 209 { 210 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 211 } 212 213 static int marvell_set_page(struct phy_device *phydev, int page) 214 { 215 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 216 } 217 218 static int marvell_ack_interrupt(struct phy_device *phydev) 219 { 220 int err; 221 222 /* Clear the interrupts by reading the reg */ 223 err = phy_read(phydev, MII_M1011_IEVENT); 224 225 if (err < 0) 226 return err; 227 228 return 0; 229 } 230 231 static int marvell_config_intr(struct phy_device *phydev) 232 { 233 int err; 234 235 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 236 err = phy_write(phydev, MII_M1011_IMASK, 237 MII_M1011_IMASK_INIT); 238 else 239 err = phy_write(phydev, MII_M1011_IMASK, 240 MII_M1011_IMASK_CLEAR); 241 242 return err; 243 } 244 245 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 246 { 247 int reg; 248 int err; 249 int val; 250 251 /* get the current settings */ 252 reg = phy_read(phydev, MII_M1011_PHY_SCR); 253 if (reg < 0) 254 return reg; 255 256 val = reg; 257 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 258 switch (polarity) { 259 case ETH_TP_MDI: 260 val |= MII_M1011_PHY_SCR_MDI; 261 break; 262 case ETH_TP_MDI_X: 263 val |= MII_M1011_PHY_SCR_MDI_X; 264 break; 265 case ETH_TP_MDI_AUTO: 266 case ETH_TP_MDI_INVALID: 267 default: 268 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 269 break; 270 } 271 272 if (val != reg) { 273 /* Set the new polarity value in the register */ 274 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 275 if (err) 276 return err; 277 } 278 279 return val != reg; 280 } 281 282 static int marvell_config_aneg(struct phy_device *phydev) 283 { 284 int changed = 0; 285 int err; 286 287 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 288 if (err < 0) 289 return err; 290 291 changed = err; 292 293 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 294 MII_M1111_PHY_LED_DIRECT); 295 if (err < 0) 296 return err; 297 298 err = genphy_config_aneg(phydev); 299 if (err < 0) 300 return err; 301 302 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 303 /* A write to speed/duplex bits (that is performed by 304 * genphy_config_aneg() call above) must be followed by 305 * a software reset. Otherwise, the write has no effect. 306 */ 307 err = genphy_soft_reset(phydev); 308 if (err < 0) 309 return err; 310 } 311 312 return 0; 313 } 314 315 static int m88e1101_config_aneg(struct phy_device *phydev) 316 { 317 int err; 318 319 /* This Marvell PHY has an errata which requires 320 * that certain registers get written in order 321 * to restart autonegotiation 322 */ 323 err = genphy_soft_reset(phydev); 324 if (err < 0) 325 return err; 326 327 err = phy_write(phydev, 0x1d, 0x1f); 328 if (err < 0) 329 return err; 330 331 err = phy_write(phydev, 0x1e, 0x200c); 332 if (err < 0) 333 return err; 334 335 err = phy_write(phydev, 0x1d, 0x5); 336 if (err < 0) 337 return err; 338 339 err = phy_write(phydev, 0x1e, 0); 340 if (err < 0) 341 return err; 342 343 err = phy_write(phydev, 0x1e, 0x100); 344 if (err < 0) 345 return err; 346 347 return marvell_config_aneg(phydev); 348 } 349 350 #ifdef CONFIG_OF_MDIO 351 /* Set and/or override some configuration registers based on the 352 * marvell,reg-init property stored in the of_node for the phydev. 353 * 354 * marvell,reg-init = <reg-page reg mask value>,...; 355 * 356 * There may be one or more sets of <reg-page reg mask value>: 357 * 358 * reg-page: which register bank to use. 359 * reg: the register. 360 * mask: if non-zero, ANDed with existing register value. 361 * value: ORed with the masked value and written to the regiser. 362 * 363 */ 364 static int marvell_of_reg_init(struct phy_device *phydev) 365 { 366 const __be32 *paddr; 367 int len, i, saved_page, current_page, ret = 0; 368 369 if (!phydev->mdio.dev.of_node) 370 return 0; 371 372 paddr = of_get_property(phydev->mdio.dev.of_node, 373 "marvell,reg-init", &len); 374 if (!paddr || len < (4 * sizeof(*paddr))) 375 return 0; 376 377 saved_page = phy_save_page(phydev); 378 if (saved_page < 0) 379 goto err; 380 current_page = saved_page; 381 382 len /= sizeof(*paddr); 383 for (i = 0; i < len - 3; i += 4) { 384 u16 page = be32_to_cpup(paddr + i); 385 u16 reg = be32_to_cpup(paddr + i + 1); 386 u16 mask = be32_to_cpup(paddr + i + 2); 387 u16 val_bits = be32_to_cpup(paddr + i + 3); 388 int val; 389 390 if (page != current_page) { 391 current_page = page; 392 ret = marvell_write_page(phydev, page); 393 if (ret < 0) 394 goto err; 395 } 396 397 val = 0; 398 if (mask) { 399 val = __phy_read(phydev, reg); 400 if (val < 0) { 401 ret = val; 402 goto err; 403 } 404 val &= mask; 405 } 406 val |= val_bits; 407 408 ret = __phy_write(phydev, reg, val); 409 if (ret < 0) 410 goto err; 411 } 412 err: 413 return phy_restore_page(phydev, saved_page, ret); 414 } 415 #else 416 static int marvell_of_reg_init(struct phy_device *phydev) 417 { 418 return 0; 419 } 420 #endif /* CONFIG_OF_MDIO */ 421 422 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 423 { 424 int mscr; 425 426 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 427 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 428 MII_88E1121_PHY_MSCR_TX_DELAY; 429 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 430 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 431 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 432 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 433 else 434 mscr = 0; 435 436 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 437 MII_88E1121_PHY_MSCR_REG, 438 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 439 } 440 441 static int m88e1121_config_aneg(struct phy_device *phydev) 442 { 443 int changed = 0; 444 int err = 0; 445 446 if (phy_interface_is_rgmii(phydev)) { 447 err = m88e1121_config_aneg_rgmii_delays(phydev); 448 if (err < 0) 449 return err; 450 } 451 452 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 453 if (err < 0) 454 return err; 455 456 changed = err; 457 458 err = genphy_config_aneg(phydev); 459 if (err < 0) 460 return err; 461 462 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 463 /* A software reset is used to ensure a "commit" of the 464 * changes is done. 465 */ 466 err = genphy_soft_reset(phydev); 467 if (err < 0) 468 return err; 469 } 470 471 return 0; 472 } 473 474 static int m88e1318_config_aneg(struct phy_device *phydev) 475 { 476 int err; 477 478 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 479 MII_88E1318S_PHY_MSCR1_REG, 480 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 481 if (err < 0) 482 return err; 483 484 return m88e1121_config_aneg(phydev); 485 } 486 487 /** 488 * linkmode_adv_to_fiber_adv_t 489 * @advertise: the linkmode advertisement settings 490 * 491 * A small helper function that translates linkmode advertisement 492 * settings to phy autonegotiation advertisements for the MII_ADV 493 * register for fiber link. 494 */ 495 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 496 { 497 u32 result = 0; 498 499 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 500 result |= ADVERTISE_FIBER_1000HALF; 501 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 502 result |= ADVERTISE_FIBER_1000FULL; 503 504 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 505 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 506 result |= LPA_PAUSE_ASYM_FIBER; 507 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 508 result |= (ADVERTISE_PAUSE_FIBER 509 & (~ADVERTISE_PAUSE_ASYM_FIBER)); 510 511 return result; 512 } 513 514 /** 515 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 516 * @phydev: target phy_device struct 517 * 518 * Description: If auto-negotiation is enabled, we configure the 519 * advertising, and then restart auto-negotiation. If it is not 520 * enabled, then we write the BMCR. Adapted for fiber link in 521 * some Marvell's devices. 522 */ 523 static int marvell_config_aneg_fiber(struct phy_device *phydev) 524 { 525 int changed = 0; 526 int err; 527 int adv, oldadv; 528 529 if (phydev->autoneg != AUTONEG_ENABLE) 530 return genphy_setup_forced(phydev); 531 532 /* Only allow advertising what this PHY supports */ 533 linkmode_and(phydev->advertising, phydev->advertising, 534 phydev->supported); 535 536 /* Setup fiber advertisement */ 537 adv = phy_read(phydev, MII_ADVERTISE); 538 if (adv < 0) 539 return adv; 540 541 oldadv = adv; 542 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL 543 | LPA_PAUSE_FIBER); 544 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising); 545 546 if (adv != oldadv) { 547 err = phy_write(phydev, MII_ADVERTISE, adv); 548 if (err < 0) 549 return err; 550 551 changed = 1; 552 } 553 554 if (changed == 0) { 555 /* Advertisement hasn't changed, but maybe aneg was never on to 556 * begin with? Or maybe phy was isolated? 557 */ 558 int ctl = phy_read(phydev, MII_BMCR); 559 560 if (ctl < 0) 561 return ctl; 562 563 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 564 changed = 1; /* do restart aneg */ 565 } 566 567 /* Only restart aneg if we are advertising something different 568 * than we were before. 569 */ 570 if (changed > 0) 571 changed = genphy_restart_aneg(phydev); 572 573 return changed; 574 } 575 576 static int m88e1510_config_aneg(struct phy_device *phydev) 577 { 578 int err; 579 580 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 581 if (err < 0) 582 goto error; 583 584 /* Configure the copper link first */ 585 err = m88e1318_config_aneg(phydev); 586 if (err < 0) 587 goto error; 588 589 /* Do not touch the fiber page if we're in copper->sgmii mode */ 590 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 591 return 0; 592 593 /* Then the fiber link */ 594 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 595 if (err < 0) 596 goto error; 597 598 err = marvell_config_aneg_fiber(phydev); 599 if (err < 0) 600 goto error; 601 602 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 603 604 error: 605 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 606 return err; 607 } 608 609 static void marvell_config_led(struct phy_device *phydev) 610 { 611 u16 def_config; 612 int err; 613 614 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 615 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 616 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 617 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 618 def_config = MII_88E1121_PHY_LED_DEF; 619 break; 620 /* Default PHY LED config: 621 * LED[0] .. 1000Mbps Link 622 * LED[1] .. 100Mbps Link 623 * LED[2] .. Blink, Activity 624 */ 625 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 626 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE) 627 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE; 628 else 629 def_config = MII_88E1510_PHY_LED_DEF; 630 break; 631 default: 632 return; 633 } 634 635 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 636 def_config); 637 if (err < 0) 638 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 639 } 640 641 static int marvell_config_init(struct phy_device *phydev) 642 { 643 /* Set defalut LED */ 644 marvell_config_led(phydev); 645 646 /* Set registers from marvell,reg-init DT property */ 647 return marvell_of_reg_init(phydev); 648 } 649 650 static int m88e3016_config_init(struct phy_device *phydev) 651 { 652 int ret; 653 654 /* Enable Scrambler and Auto-Crossover */ 655 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 656 MII_88E3016_DISABLE_SCRAMBLER, 657 MII_88E3016_AUTO_MDIX_CROSSOVER); 658 if (ret < 0) 659 return ret; 660 661 return marvell_config_init(phydev); 662 } 663 664 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 665 u16 mode, 666 int fibre_copper_auto) 667 { 668 if (fibre_copper_auto) 669 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 670 671 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 672 MII_M1111_HWCFG_MODE_MASK | 673 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 674 MII_M1111_HWCFG_FIBER_COPPER_RES, 675 mode); 676 } 677 678 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 679 { 680 int delay; 681 682 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 683 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 684 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 685 delay = MII_M1111_RGMII_RX_DELAY; 686 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 687 delay = MII_M1111_RGMII_TX_DELAY; 688 } else { 689 delay = 0; 690 } 691 692 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 693 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 694 delay); 695 } 696 697 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 698 { 699 int temp; 700 int err; 701 702 err = m88e1111_config_init_rgmii_delays(phydev); 703 if (err < 0) 704 return err; 705 706 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 707 if (temp < 0) 708 return temp; 709 710 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 711 712 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 713 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 714 else 715 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 716 717 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 718 } 719 720 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 721 { 722 int err; 723 724 err = m88e1111_config_init_hwcfg_mode( 725 phydev, 726 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 727 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 728 if (err < 0) 729 return err; 730 731 /* make sure copper is selected */ 732 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 733 } 734 735 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 736 { 737 int err; 738 739 err = m88e1111_config_init_rgmii_delays(phydev); 740 if (err < 0) 741 return err; 742 743 err = m88e1111_config_init_hwcfg_mode( 744 phydev, 745 MII_M1111_HWCFG_MODE_RTBI, 746 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 747 if (err < 0) 748 return err; 749 750 /* soft reset */ 751 err = genphy_soft_reset(phydev); 752 if (err < 0) 753 return err; 754 755 return m88e1111_config_init_hwcfg_mode( 756 phydev, 757 MII_M1111_HWCFG_MODE_RTBI, 758 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 759 } 760 761 static int m88e1111_config_init(struct phy_device *phydev) 762 { 763 int err; 764 765 if (phy_interface_is_rgmii(phydev)) { 766 err = m88e1111_config_init_rgmii(phydev); 767 if (err < 0) 768 return err; 769 } 770 771 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 772 err = m88e1111_config_init_sgmii(phydev); 773 if (err < 0) 774 return err; 775 } 776 777 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 778 err = m88e1111_config_init_rtbi(phydev); 779 if (err < 0) 780 return err; 781 } 782 783 err = marvell_of_reg_init(phydev); 784 if (err < 0) 785 return err; 786 787 return genphy_soft_reset(phydev); 788 } 789 790 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data) 791 { 792 int val, cnt, enable; 793 794 val = phy_read(phydev, MII_M1111_PHY_EXT_CR); 795 if (val < 0) 796 return val; 797 798 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val); 799 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1; 800 801 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 802 803 return 0; 804 } 805 806 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt) 807 { 808 int val; 809 810 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX) 811 return -E2BIG; 812 813 if (!cnt) 814 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, 815 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); 816 817 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; 818 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); 819 820 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 821 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | 822 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, 823 val); 824 } 825 826 static int m88e1111_get_tunable(struct phy_device *phydev, 827 struct ethtool_tunable *tuna, void *data) 828 { 829 switch (tuna->id) { 830 case ETHTOOL_PHY_DOWNSHIFT: 831 return m88e1111_get_downshift(phydev, data); 832 default: 833 return -EOPNOTSUPP; 834 } 835 } 836 837 static int m88e1111_set_tunable(struct phy_device *phydev, 838 struct ethtool_tunable *tuna, const void *data) 839 { 840 switch (tuna->id) { 841 case ETHTOOL_PHY_DOWNSHIFT: 842 return m88e1111_set_downshift(phydev, *(const u8 *)data); 843 default: 844 return -EOPNOTSUPP; 845 } 846 } 847 848 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data) 849 { 850 int val, cnt, enable; 851 852 val = phy_read(phydev, MII_M1011_PHY_SCR); 853 if (val < 0) 854 return val; 855 856 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val); 857 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1; 858 859 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 860 861 return 0; 862 } 863 864 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt) 865 { 866 int val; 867 868 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX) 869 return -E2BIG; 870 871 if (!cnt) 872 return phy_clear_bits(phydev, MII_M1011_PHY_SCR, 873 MII_M1011_PHY_SCR_DOWNSHIFT_EN); 874 875 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; 876 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); 877 878 return phy_modify(phydev, MII_M1011_PHY_SCR, 879 MII_M1011_PHY_SCR_DOWNSHIFT_EN | 880 MII_M1011_PHY_SCR_DOWNSHIFT_MASK, 881 val); 882 } 883 884 static int m88e1011_get_tunable(struct phy_device *phydev, 885 struct ethtool_tunable *tuna, void *data) 886 { 887 switch (tuna->id) { 888 case ETHTOOL_PHY_DOWNSHIFT: 889 return m88e1011_get_downshift(phydev, data); 890 default: 891 return -EOPNOTSUPP; 892 } 893 } 894 895 static int m88e1011_set_tunable(struct phy_device *phydev, 896 struct ethtool_tunable *tuna, const void *data) 897 { 898 switch (tuna->id) { 899 case ETHTOOL_PHY_DOWNSHIFT: 900 return m88e1011_set_downshift(phydev, *(const u8 *)data); 901 default: 902 return -EOPNOTSUPP; 903 } 904 } 905 906 static void m88e1011_link_change_notify(struct phy_device *phydev) 907 { 908 int status; 909 910 if (phydev->state != PHY_RUNNING) 911 return; 912 913 /* we may be on fiber page currently */ 914 status = phy_read_paged(phydev, MII_MARVELL_COPPER_PAGE, 915 MII_M1011_PHY_SSR); 916 917 if (status > 0 && status & MII_M1011_PHY_SSR_DOWNSHIFT) 918 phydev_warn(phydev, "Downshift occurred! Cabling may be defective.\n"); 919 } 920 921 static int m88e1116r_config_init(struct phy_device *phydev) 922 { 923 int err; 924 925 err = genphy_soft_reset(phydev); 926 if (err < 0) 927 return err; 928 929 msleep(500); 930 931 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 932 if (err < 0) 933 return err; 934 935 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 936 if (err < 0) 937 return err; 938 939 err = m88e1011_set_downshift(phydev, 8); 940 if (err < 0) 941 return err; 942 943 if (phy_interface_is_rgmii(phydev)) { 944 err = m88e1121_config_aneg_rgmii_delays(phydev); 945 if (err < 0) 946 return err; 947 } 948 949 err = genphy_soft_reset(phydev); 950 if (err < 0) 951 return err; 952 953 return marvell_config_init(phydev); 954 } 955 956 static int m88e1318_config_init(struct phy_device *phydev) 957 { 958 if (phy_interrupt_is_valid(phydev)) { 959 int err = phy_modify_paged( 960 phydev, MII_MARVELL_LED_PAGE, 961 MII_88E1318S_PHY_LED_TCR, 962 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 963 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 964 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 965 if (err < 0) 966 return err; 967 } 968 969 return marvell_config_init(phydev); 970 } 971 972 static int m88e1510_config_init(struct phy_device *phydev) 973 { 974 int err; 975 976 /* SGMII-to-Copper mode initialization */ 977 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 978 /* Select page 18 */ 979 err = marvell_set_page(phydev, 18); 980 if (err < 0) 981 return err; 982 983 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 984 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 985 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 986 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 987 if (err < 0) 988 return err; 989 990 /* PHY reset is necessary after changing MODE[2:0] */ 991 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 992 MII_88E1510_GEN_CTRL_REG_1_RESET); 993 if (err < 0) 994 return err; 995 996 /* Reset page selection */ 997 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 998 if (err < 0) 999 return err; 1000 } 1001 1002 return m88e1318_config_init(phydev); 1003 } 1004 1005 static int m88e1118_config_aneg(struct phy_device *phydev) 1006 { 1007 int err; 1008 1009 err = genphy_soft_reset(phydev); 1010 if (err < 0) 1011 return err; 1012 1013 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1014 if (err < 0) 1015 return err; 1016 1017 err = genphy_config_aneg(phydev); 1018 return 0; 1019 } 1020 1021 static int m88e1118_config_init(struct phy_device *phydev) 1022 { 1023 int err; 1024 1025 /* Change address */ 1026 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1027 if (err < 0) 1028 return err; 1029 1030 /* Enable 1000 Mbit */ 1031 err = phy_write(phydev, 0x15, 0x1070); 1032 if (err < 0) 1033 return err; 1034 1035 /* Change address */ 1036 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 1037 if (err < 0) 1038 return err; 1039 1040 /* Adjust LED Control */ 1041 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 1042 err = phy_write(phydev, 0x10, 0x1100); 1043 else 1044 err = phy_write(phydev, 0x10, 0x021e); 1045 if (err < 0) 1046 return err; 1047 1048 err = marvell_of_reg_init(phydev); 1049 if (err < 0) 1050 return err; 1051 1052 /* Reset address */ 1053 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1054 if (err < 0) 1055 return err; 1056 1057 return genphy_soft_reset(phydev); 1058 } 1059 1060 static int m88e1149_config_init(struct phy_device *phydev) 1061 { 1062 int err; 1063 1064 /* Change address */ 1065 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1066 if (err < 0) 1067 return err; 1068 1069 /* Enable 1000 Mbit */ 1070 err = phy_write(phydev, 0x15, 0x1048); 1071 if (err < 0) 1072 return err; 1073 1074 err = marvell_of_reg_init(phydev); 1075 if (err < 0) 1076 return err; 1077 1078 /* Reset address */ 1079 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1080 if (err < 0) 1081 return err; 1082 1083 return genphy_soft_reset(phydev); 1084 } 1085 1086 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 1087 { 1088 int err; 1089 1090 err = m88e1111_config_init_rgmii_delays(phydev); 1091 if (err < 0) 1092 return err; 1093 1094 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 1095 err = phy_write(phydev, 0x1d, 0x0012); 1096 if (err < 0) 1097 return err; 1098 1099 err = phy_modify(phydev, 0x1e, 0x0fc0, 1100 2 << 9 | /* 36 ohm */ 1101 2 << 6); /* 39 ohm */ 1102 if (err < 0) 1103 return err; 1104 1105 err = phy_write(phydev, 0x1d, 0x3); 1106 if (err < 0) 1107 return err; 1108 1109 err = phy_write(phydev, 0x1e, 0x8000); 1110 } 1111 return err; 1112 } 1113 1114 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1115 { 1116 return m88e1111_config_init_hwcfg_mode( 1117 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1118 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1119 } 1120 1121 static int m88e1145_config_init(struct phy_device *phydev) 1122 { 1123 int err; 1124 1125 /* Take care of errata E0 & E1 */ 1126 err = phy_write(phydev, 0x1d, 0x001b); 1127 if (err < 0) 1128 return err; 1129 1130 err = phy_write(phydev, 0x1e, 0x418f); 1131 if (err < 0) 1132 return err; 1133 1134 err = phy_write(phydev, 0x1d, 0x0016); 1135 if (err < 0) 1136 return err; 1137 1138 err = phy_write(phydev, 0x1e, 0xa2da); 1139 if (err < 0) 1140 return err; 1141 1142 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1143 err = m88e1145_config_init_rgmii(phydev); 1144 if (err < 0) 1145 return err; 1146 } 1147 1148 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1149 err = m88e1145_config_init_sgmii(phydev); 1150 if (err < 0) 1151 return err; 1152 } 1153 1154 err = marvell_of_reg_init(phydev); 1155 if (err < 0) 1156 return err; 1157 1158 return 0; 1159 } 1160 1161 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) 1162 { 1163 int val; 1164 1165 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); 1166 if (val < 0) 1167 return val; 1168 1169 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { 1170 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; 1171 return 0; 1172 } 1173 1174 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1175 1176 switch (val) { 1177 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: 1178 *msecs = 0; 1179 break; 1180 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: 1181 *msecs = 10; 1182 break; 1183 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: 1184 *msecs = 20; 1185 break; 1186 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: 1187 *msecs = 40; 1188 break; 1189 default: 1190 return -EINVAL; 1191 } 1192 1193 return 0; 1194 } 1195 1196 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) 1197 { 1198 struct ethtool_eee eee; 1199 int val, ret; 1200 1201 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) 1202 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, 1203 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1204 1205 /* According to the Marvell data sheet EEE must be disabled for 1206 * Fast Link Down detection to work properly 1207 */ 1208 ret = phy_ethtool_get_eee(phydev, &eee); 1209 if (!ret && eee.eee_enabled) { 1210 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); 1211 return -EBUSY; 1212 } 1213 1214 if (*msecs <= 5) 1215 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; 1216 else if (*msecs <= 15) 1217 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; 1218 else if (*msecs <= 30) 1219 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; 1220 else 1221 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; 1222 1223 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1224 1225 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, 1226 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1227 if (ret) 1228 return ret; 1229 1230 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, 1231 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1232 } 1233 1234 static int m88e1540_get_tunable(struct phy_device *phydev, 1235 struct ethtool_tunable *tuna, void *data) 1236 { 1237 switch (tuna->id) { 1238 case ETHTOOL_PHY_FAST_LINK_DOWN: 1239 return m88e1540_get_fld(phydev, data); 1240 case ETHTOOL_PHY_DOWNSHIFT: 1241 return m88e1011_get_downshift(phydev, data); 1242 default: 1243 return -EOPNOTSUPP; 1244 } 1245 } 1246 1247 static int m88e1540_set_tunable(struct phy_device *phydev, 1248 struct ethtool_tunable *tuna, const void *data) 1249 { 1250 switch (tuna->id) { 1251 case ETHTOOL_PHY_FAST_LINK_DOWN: 1252 return m88e1540_set_fld(phydev, data); 1253 case ETHTOOL_PHY_DOWNSHIFT: 1254 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1255 default: 1256 return -EOPNOTSUPP; 1257 } 1258 } 1259 1260 /* The VOD can be out of specification on link up. Poke an 1261 * undocumented register, in an undocumented page, with a magic value 1262 * to fix this. 1263 */ 1264 static int m88e6390_errata(struct phy_device *phydev) 1265 { 1266 int err; 1267 1268 err = phy_write(phydev, MII_BMCR, 1269 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1270 if (err) 1271 return err; 1272 1273 usleep_range(300, 400); 1274 1275 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1276 if (err) 1277 return err; 1278 1279 return genphy_soft_reset(phydev); 1280 } 1281 1282 static int m88e6390_config_aneg(struct phy_device *phydev) 1283 { 1284 int err; 1285 1286 err = m88e6390_errata(phydev); 1287 if (err) 1288 return err; 1289 1290 return m88e1510_config_aneg(phydev); 1291 } 1292 1293 /** 1294 * fiber_lpa_mod_linkmode_lpa_t 1295 * @advertising: the linkmode advertisement settings 1296 * @lpa: value of the MII_LPA register for fiber link 1297 * 1298 * A small helper function that translates MII_LPA bits to linkmode LP 1299 * advertisement settings. Other bits in advertising are left 1300 * unchanged. 1301 */ 1302 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1303 { 1304 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1305 advertising, lpa & LPA_FIBER_1000HALF); 1306 1307 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1308 advertising, lpa & LPA_FIBER_1000FULL); 1309 } 1310 1311 /** 1312 * marvell_update_link - update link status in real time in @phydev 1313 * @phydev: target phy_device struct 1314 * 1315 * Description: Update the value in phydev->link to reflect the 1316 * current link value. 1317 */ 1318 static int marvell_update_link(struct phy_device *phydev, int fiber) 1319 { 1320 int status; 1321 1322 /* Use the generic register for copper link, or specific 1323 * register for fiber case 1324 */ 1325 if (fiber) { 1326 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1327 if (status < 0) 1328 return status; 1329 1330 if ((status & REGISTER_LINK_STATUS) == 0) 1331 phydev->link = 0; 1332 else 1333 phydev->link = 1; 1334 } else { 1335 return genphy_update_link(phydev); 1336 } 1337 1338 return 0; 1339 } 1340 1341 static int marvell_read_status_page_an(struct phy_device *phydev, 1342 int fiber) 1343 { 1344 int status; 1345 int lpa; 1346 int lpagb; 1347 1348 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1349 if (status < 0) 1350 return status; 1351 1352 lpa = phy_read(phydev, MII_LPA); 1353 if (lpa < 0) 1354 return lpa; 1355 1356 lpagb = phy_read(phydev, MII_STAT1000); 1357 if (lpagb < 0) 1358 return lpagb; 1359 1360 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1361 phydev->duplex = DUPLEX_FULL; 1362 else 1363 phydev->duplex = DUPLEX_HALF; 1364 1365 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 1366 phydev->pause = 0; 1367 phydev->asym_pause = 0; 1368 1369 switch (status) { 1370 case MII_M1011_PHY_STATUS_1000: 1371 phydev->speed = SPEED_1000; 1372 break; 1373 1374 case MII_M1011_PHY_STATUS_100: 1375 phydev->speed = SPEED_100; 1376 break; 1377 1378 default: 1379 phydev->speed = SPEED_10; 1380 break; 1381 } 1382 1383 if (!fiber) { 1384 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa); 1385 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb); 1386 1387 if (phydev->duplex == DUPLEX_FULL) { 1388 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 1389 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 1390 } 1391 } else { 1392 /* The fiber link is only 1000M capable */ 1393 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1394 1395 if (phydev->duplex == DUPLEX_FULL) { 1396 if (!(lpa & LPA_PAUSE_FIBER)) { 1397 phydev->pause = 0; 1398 phydev->asym_pause = 0; 1399 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1400 phydev->pause = 1; 1401 phydev->asym_pause = 1; 1402 } else { 1403 phydev->pause = 1; 1404 phydev->asym_pause = 0; 1405 } 1406 } 1407 } 1408 return 0; 1409 } 1410 1411 static int marvell_read_status_page_fixed(struct phy_device *phydev) 1412 { 1413 int bmcr = phy_read(phydev, MII_BMCR); 1414 1415 if (bmcr < 0) 1416 return bmcr; 1417 1418 if (bmcr & BMCR_FULLDPLX) 1419 phydev->duplex = DUPLEX_FULL; 1420 else 1421 phydev->duplex = DUPLEX_HALF; 1422 1423 if (bmcr & BMCR_SPEED1000) 1424 phydev->speed = SPEED_1000; 1425 else if (bmcr & BMCR_SPEED100) 1426 phydev->speed = SPEED_100; 1427 else 1428 phydev->speed = SPEED_10; 1429 1430 phydev->pause = 0; 1431 phydev->asym_pause = 0; 1432 linkmode_zero(phydev->lp_advertising); 1433 1434 return 0; 1435 } 1436 1437 /* marvell_read_status_page 1438 * 1439 * Description: 1440 * Check the link, then figure out the current state 1441 * by comparing what we advertise with what the link partner 1442 * advertises. Start by checking the gigabit possibilities, 1443 * then move on to 10/100. 1444 */ 1445 static int marvell_read_status_page(struct phy_device *phydev, int page) 1446 { 1447 int fiber; 1448 int err; 1449 1450 /* Detect and update the link, but return if there 1451 * was an error 1452 */ 1453 if (page == MII_MARVELL_FIBER_PAGE) 1454 fiber = 1; 1455 else 1456 fiber = 0; 1457 1458 err = marvell_update_link(phydev, fiber); 1459 if (err) 1460 return err; 1461 1462 if (phydev->autoneg == AUTONEG_ENABLE) 1463 err = marvell_read_status_page_an(phydev, fiber); 1464 else 1465 err = marvell_read_status_page_fixed(phydev); 1466 1467 return err; 1468 } 1469 1470 /* marvell_read_status 1471 * 1472 * Some Marvell's phys have two modes: fiber and copper. 1473 * Both need status checked. 1474 * Description: 1475 * First, check the fiber link and status. 1476 * If the fiber link is down, check the copper link and status which 1477 * will be the default value if both link are down. 1478 */ 1479 static int marvell_read_status(struct phy_device *phydev) 1480 { 1481 int err; 1482 1483 /* Check the fiber mode first */ 1484 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1485 phydev->supported) && 1486 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1487 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1488 if (err < 0) 1489 goto error; 1490 1491 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1492 if (err < 0) 1493 goto error; 1494 1495 /* If the fiber link is up, it is the selected and 1496 * used link. In this case, we need to stay in the 1497 * fiber page. Please to be careful about that, avoid 1498 * to restore Copper page in other functions which 1499 * could break the behaviour for some fiber phy like 1500 * 88E1512. 1501 */ 1502 if (phydev->link) 1503 return 0; 1504 1505 /* If fiber link is down, check and save copper mode state */ 1506 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1507 if (err < 0) 1508 goto error; 1509 } 1510 1511 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1512 1513 error: 1514 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1515 return err; 1516 } 1517 1518 /* marvell_suspend 1519 * 1520 * Some Marvell's phys have two modes: fiber and copper. 1521 * Both need to be suspended 1522 */ 1523 static int marvell_suspend(struct phy_device *phydev) 1524 { 1525 int err; 1526 1527 /* Suspend the fiber mode first */ 1528 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1529 phydev->supported)) { 1530 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1531 if (err < 0) 1532 goto error; 1533 1534 /* With the page set, use the generic suspend */ 1535 err = genphy_suspend(phydev); 1536 if (err < 0) 1537 goto error; 1538 1539 /* Then, the copper link */ 1540 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1541 if (err < 0) 1542 goto error; 1543 } 1544 1545 /* With the page set, use the generic suspend */ 1546 return genphy_suspend(phydev); 1547 1548 error: 1549 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1550 return err; 1551 } 1552 1553 /* marvell_resume 1554 * 1555 * Some Marvell's phys have two modes: fiber and copper. 1556 * Both need to be resumed 1557 */ 1558 static int marvell_resume(struct phy_device *phydev) 1559 { 1560 int err; 1561 1562 /* Resume the fiber mode first */ 1563 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1564 phydev->supported)) { 1565 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1566 if (err < 0) 1567 goto error; 1568 1569 /* With the page set, use the generic resume */ 1570 err = genphy_resume(phydev); 1571 if (err < 0) 1572 goto error; 1573 1574 /* Then, the copper link */ 1575 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1576 if (err < 0) 1577 goto error; 1578 } 1579 1580 /* With the page set, use the generic resume */ 1581 return genphy_resume(phydev); 1582 1583 error: 1584 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1585 return err; 1586 } 1587 1588 static int marvell_aneg_done(struct phy_device *phydev) 1589 { 1590 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1591 1592 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1593 } 1594 1595 static int m88e1121_did_interrupt(struct phy_device *phydev) 1596 { 1597 int imask; 1598 1599 imask = phy_read(phydev, MII_M1011_IEVENT); 1600 1601 if (imask & MII_M1011_IMASK_INIT) 1602 return 1; 1603 1604 return 0; 1605 } 1606 1607 static void m88e1318_get_wol(struct phy_device *phydev, 1608 struct ethtool_wolinfo *wol) 1609 { 1610 int oldpage, ret = 0; 1611 1612 wol->supported = WAKE_MAGIC; 1613 wol->wolopts = 0; 1614 1615 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1616 if (oldpage < 0) 1617 goto error; 1618 1619 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1620 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1621 wol->wolopts |= WAKE_MAGIC; 1622 1623 error: 1624 phy_restore_page(phydev, oldpage, ret); 1625 } 1626 1627 static int m88e1318_set_wol(struct phy_device *phydev, 1628 struct ethtool_wolinfo *wol) 1629 { 1630 int err = 0, oldpage; 1631 1632 oldpage = phy_save_page(phydev); 1633 if (oldpage < 0) 1634 goto error; 1635 1636 if (wol->wolopts & WAKE_MAGIC) { 1637 /* Explicitly switch to page 0x00, just to be sure */ 1638 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1639 if (err < 0) 1640 goto error; 1641 1642 /* If WOL event happened once, the LED[2] interrupt pin 1643 * will not be cleared unless we reading the interrupt status 1644 * register. If interrupts are in use, the normal interrupt 1645 * handling will clear the WOL event. Clear the WOL event 1646 * before enabling it if !phy_interrupt_is_valid() 1647 */ 1648 if (!phy_interrupt_is_valid(phydev)) 1649 __phy_read(phydev, MII_M1011_IEVENT); 1650 1651 /* Enable the WOL interrupt */ 1652 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1653 MII_88E1318S_PHY_CSIER_WOL_EIE); 1654 if (err < 0) 1655 goto error; 1656 1657 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1658 if (err < 0) 1659 goto error; 1660 1661 /* Setup LED[2] as interrupt pin (active low) */ 1662 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1663 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1664 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1665 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1666 if (err < 0) 1667 goto error; 1668 1669 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1670 if (err < 0) 1671 goto error; 1672 1673 /* Store the device address for the magic packet */ 1674 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1675 ((phydev->attached_dev->dev_addr[5] << 8) | 1676 phydev->attached_dev->dev_addr[4])); 1677 if (err < 0) 1678 goto error; 1679 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1680 ((phydev->attached_dev->dev_addr[3] << 8) | 1681 phydev->attached_dev->dev_addr[2])); 1682 if (err < 0) 1683 goto error; 1684 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1685 ((phydev->attached_dev->dev_addr[1] << 8) | 1686 phydev->attached_dev->dev_addr[0])); 1687 if (err < 0) 1688 goto error; 1689 1690 /* Clear WOL status and enable magic packet matching */ 1691 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1692 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1693 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1694 if (err < 0) 1695 goto error; 1696 } else { 1697 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1698 if (err < 0) 1699 goto error; 1700 1701 /* Clear WOL status and disable magic packet matching */ 1702 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1703 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1704 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1705 if (err < 0) 1706 goto error; 1707 } 1708 1709 error: 1710 return phy_restore_page(phydev, oldpage, err); 1711 } 1712 1713 static int marvell_get_sset_count(struct phy_device *phydev) 1714 { 1715 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1716 phydev->supported)) 1717 return ARRAY_SIZE(marvell_hw_stats); 1718 else 1719 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1720 } 1721 1722 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1723 { 1724 int count = marvell_get_sset_count(phydev); 1725 int i; 1726 1727 for (i = 0; i < count; i++) { 1728 strlcpy(data + i * ETH_GSTRING_LEN, 1729 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1730 } 1731 } 1732 1733 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1734 { 1735 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1736 struct marvell_priv *priv = phydev->priv; 1737 int val; 1738 u64 ret; 1739 1740 val = phy_read_paged(phydev, stat.page, stat.reg); 1741 if (val < 0) { 1742 ret = U64_MAX; 1743 } else { 1744 val = val & ((1 << stat.bits) - 1); 1745 priv->stats[i] += val; 1746 ret = priv->stats[i]; 1747 } 1748 1749 return ret; 1750 } 1751 1752 static void marvell_get_stats(struct phy_device *phydev, 1753 struct ethtool_stats *stats, u64 *data) 1754 { 1755 int count = marvell_get_sset_count(phydev); 1756 int i; 1757 1758 for (i = 0; i < count; i++) 1759 data[i] = marvell_get_stat(phydev, i); 1760 } 1761 1762 #ifdef CONFIG_HWMON 1763 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1764 { 1765 int oldpage; 1766 int ret = 0; 1767 int val; 1768 1769 *temp = 0; 1770 1771 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1772 if (oldpage < 0) 1773 goto error; 1774 1775 /* Enable temperature sensor */ 1776 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1777 if (ret < 0) 1778 goto error; 1779 1780 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1781 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1782 if (ret < 0) 1783 goto error; 1784 1785 /* Wait for temperature to stabilize */ 1786 usleep_range(10000, 12000); 1787 1788 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1789 if (val < 0) { 1790 ret = val; 1791 goto error; 1792 } 1793 1794 /* Disable temperature sensor */ 1795 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1796 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1797 if (ret < 0) 1798 goto error; 1799 1800 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1801 1802 error: 1803 return phy_restore_page(phydev, oldpage, ret); 1804 } 1805 1806 static int m88e1121_hwmon_read(struct device *dev, 1807 enum hwmon_sensor_types type, 1808 u32 attr, int channel, long *temp) 1809 { 1810 struct phy_device *phydev = dev_get_drvdata(dev); 1811 int err; 1812 1813 switch (attr) { 1814 case hwmon_temp_input: 1815 err = m88e1121_get_temp(phydev, temp); 1816 break; 1817 default: 1818 return -EOPNOTSUPP; 1819 } 1820 1821 return err; 1822 } 1823 1824 static umode_t m88e1121_hwmon_is_visible(const void *data, 1825 enum hwmon_sensor_types type, 1826 u32 attr, int channel) 1827 { 1828 if (type != hwmon_temp) 1829 return 0; 1830 1831 switch (attr) { 1832 case hwmon_temp_input: 1833 return 0444; 1834 default: 1835 return 0; 1836 } 1837 } 1838 1839 static u32 m88e1121_hwmon_chip_config[] = { 1840 HWMON_C_REGISTER_TZ, 1841 0 1842 }; 1843 1844 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1845 .type = hwmon_chip, 1846 .config = m88e1121_hwmon_chip_config, 1847 }; 1848 1849 static u32 m88e1121_hwmon_temp_config[] = { 1850 HWMON_T_INPUT, 1851 0 1852 }; 1853 1854 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1855 .type = hwmon_temp, 1856 .config = m88e1121_hwmon_temp_config, 1857 }; 1858 1859 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1860 &m88e1121_hwmon_chip, 1861 &m88e1121_hwmon_temp, 1862 NULL 1863 }; 1864 1865 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1866 .is_visible = m88e1121_hwmon_is_visible, 1867 .read = m88e1121_hwmon_read, 1868 }; 1869 1870 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1871 .ops = &m88e1121_hwmon_hwmon_ops, 1872 .info = m88e1121_hwmon_info, 1873 }; 1874 1875 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1876 { 1877 int ret; 1878 1879 *temp = 0; 1880 1881 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1882 MII_88E1510_TEMP_SENSOR); 1883 if (ret < 0) 1884 return ret; 1885 1886 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1887 1888 return 0; 1889 } 1890 1891 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1892 { 1893 int ret; 1894 1895 *temp = 0; 1896 1897 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1898 MII_88E1121_MISC_TEST); 1899 if (ret < 0) 1900 return ret; 1901 1902 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1903 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1904 /* convert to mC */ 1905 *temp *= 1000; 1906 1907 return 0; 1908 } 1909 1910 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1911 { 1912 temp = temp / 1000; 1913 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1914 1915 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1916 MII_88E1121_MISC_TEST, 1917 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1918 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1919 } 1920 1921 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1922 { 1923 int ret; 1924 1925 *alarm = false; 1926 1927 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1928 MII_88E1121_MISC_TEST); 1929 if (ret < 0) 1930 return ret; 1931 1932 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1933 1934 return 0; 1935 } 1936 1937 static int m88e1510_hwmon_read(struct device *dev, 1938 enum hwmon_sensor_types type, 1939 u32 attr, int channel, long *temp) 1940 { 1941 struct phy_device *phydev = dev_get_drvdata(dev); 1942 int err; 1943 1944 switch (attr) { 1945 case hwmon_temp_input: 1946 err = m88e1510_get_temp(phydev, temp); 1947 break; 1948 case hwmon_temp_crit: 1949 err = m88e1510_get_temp_critical(phydev, temp); 1950 break; 1951 case hwmon_temp_max_alarm: 1952 err = m88e1510_get_temp_alarm(phydev, temp); 1953 break; 1954 default: 1955 return -EOPNOTSUPP; 1956 } 1957 1958 return err; 1959 } 1960 1961 static int m88e1510_hwmon_write(struct device *dev, 1962 enum hwmon_sensor_types type, 1963 u32 attr, int channel, long temp) 1964 { 1965 struct phy_device *phydev = dev_get_drvdata(dev); 1966 int err; 1967 1968 switch (attr) { 1969 case hwmon_temp_crit: 1970 err = m88e1510_set_temp_critical(phydev, temp); 1971 break; 1972 default: 1973 return -EOPNOTSUPP; 1974 } 1975 return err; 1976 } 1977 1978 static umode_t m88e1510_hwmon_is_visible(const void *data, 1979 enum hwmon_sensor_types type, 1980 u32 attr, int channel) 1981 { 1982 if (type != hwmon_temp) 1983 return 0; 1984 1985 switch (attr) { 1986 case hwmon_temp_input: 1987 case hwmon_temp_max_alarm: 1988 return 0444; 1989 case hwmon_temp_crit: 1990 return 0644; 1991 default: 1992 return 0; 1993 } 1994 } 1995 1996 static u32 m88e1510_hwmon_temp_config[] = { 1997 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1998 0 1999 }; 2000 2001 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 2002 .type = hwmon_temp, 2003 .config = m88e1510_hwmon_temp_config, 2004 }; 2005 2006 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 2007 &m88e1121_hwmon_chip, 2008 &m88e1510_hwmon_temp, 2009 NULL 2010 }; 2011 2012 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 2013 .is_visible = m88e1510_hwmon_is_visible, 2014 .read = m88e1510_hwmon_read, 2015 .write = m88e1510_hwmon_write, 2016 }; 2017 2018 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 2019 .ops = &m88e1510_hwmon_hwmon_ops, 2020 .info = m88e1510_hwmon_info, 2021 }; 2022 2023 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 2024 { 2025 int sum = 0; 2026 int oldpage; 2027 int ret = 0; 2028 int i; 2029 2030 *temp = 0; 2031 2032 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2033 if (oldpage < 0) 2034 goto error; 2035 2036 /* Enable temperature sensor */ 2037 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2038 if (ret < 0) 2039 goto error; 2040 2041 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 2042 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 2043 MII_88E6390_MISC_TEST_SAMPLE_1S; 2044 2045 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2046 if (ret < 0) 2047 goto error; 2048 2049 /* Wait for temperature to stabilize */ 2050 usleep_range(10000, 12000); 2051 2052 /* Reading the temperature sense has an errata. You need to read 2053 * a number of times and take an average. 2054 */ 2055 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 2056 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 2057 if (ret < 0) 2058 goto error; 2059 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 2060 } 2061 2062 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 2063 *temp = (sum - 75) * 1000; 2064 2065 /* Disable temperature sensor */ 2066 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2067 if (ret < 0) 2068 goto error; 2069 2070 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 2071 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 2072 2073 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2074 2075 error: 2076 phy_restore_page(phydev, oldpage, ret); 2077 2078 return ret; 2079 } 2080 2081 static int m88e6390_hwmon_read(struct device *dev, 2082 enum hwmon_sensor_types type, 2083 u32 attr, int channel, long *temp) 2084 { 2085 struct phy_device *phydev = dev_get_drvdata(dev); 2086 int err; 2087 2088 switch (attr) { 2089 case hwmon_temp_input: 2090 err = m88e6390_get_temp(phydev, temp); 2091 break; 2092 default: 2093 return -EOPNOTSUPP; 2094 } 2095 2096 return err; 2097 } 2098 2099 static umode_t m88e6390_hwmon_is_visible(const void *data, 2100 enum hwmon_sensor_types type, 2101 u32 attr, int channel) 2102 { 2103 if (type != hwmon_temp) 2104 return 0; 2105 2106 switch (attr) { 2107 case hwmon_temp_input: 2108 return 0444; 2109 default: 2110 return 0; 2111 } 2112 } 2113 2114 static u32 m88e6390_hwmon_temp_config[] = { 2115 HWMON_T_INPUT, 2116 0 2117 }; 2118 2119 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 2120 .type = hwmon_temp, 2121 .config = m88e6390_hwmon_temp_config, 2122 }; 2123 2124 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 2125 &m88e1121_hwmon_chip, 2126 &m88e6390_hwmon_temp, 2127 NULL 2128 }; 2129 2130 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 2131 .is_visible = m88e6390_hwmon_is_visible, 2132 .read = m88e6390_hwmon_read, 2133 }; 2134 2135 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 2136 .ops = &m88e6390_hwmon_hwmon_ops, 2137 .info = m88e6390_hwmon_info, 2138 }; 2139 2140 static int marvell_hwmon_name(struct phy_device *phydev) 2141 { 2142 struct marvell_priv *priv = phydev->priv; 2143 struct device *dev = &phydev->mdio.dev; 2144 const char *devname = dev_name(dev); 2145 size_t len = strlen(devname); 2146 int i, j; 2147 2148 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 2149 if (!priv->hwmon_name) 2150 return -ENOMEM; 2151 2152 for (i = j = 0; i < len && devname[i]; i++) { 2153 if (isalnum(devname[i])) 2154 priv->hwmon_name[j++] = devname[i]; 2155 } 2156 2157 return 0; 2158 } 2159 2160 static int marvell_hwmon_probe(struct phy_device *phydev, 2161 const struct hwmon_chip_info *chip) 2162 { 2163 struct marvell_priv *priv = phydev->priv; 2164 struct device *dev = &phydev->mdio.dev; 2165 int err; 2166 2167 err = marvell_hwmon_name(phydev); 2168 if (err) 2169 return err; 2170 2171 priv->hwmon_dev = devm_hwmon_device_register_with_info( 2172 dev, priv->hwmon_name, phydev, chip, NULL); 2173 2174 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 2175 } 2176 2177 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2178 { 2179 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 2180 } 2181 2182 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2183 { 2184 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 2185 } 2186 2187 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2188 { 2189 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 2190 } 2191 #else 2192 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2193 { 2194 return 0; 2195 } 2196 2197 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2198 { 2199 return 0; 2200 } 2201 2202 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2203 { 2204 return 0; 2205 } 2206 #endif 2207 2208 static int marvell_probe(struct phy_device *phydev) 2209 { 2210 struct marvell_priv *priv; 2211 2212 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 2213 if (!priv) 2214 return -ENOMEM; 2215 2216 phydev->priv = priv; 2217 2218 return 0; 2219 } 2220 2221 static int m88e1121_probe(struct phy_device *phydev) 2222 { 2223 int err; 2224 2225 err = marvell_probe(phydev); 2226 if (err) 2227 return err; 2228 2229 return m88e1121_hwmon_probe(phydev); 2230 } 2231 2232 static int m88e1510_probe(struct phy_device *phydev) 2233 { 2234 int err; 2235 2236 err = marvell_probe(phydev); 2237 if (err) 2238 return err; 2239 2240 return m88e1510_hwmon_probe(phydev); 2241 } 2242 2243 static int m88e6390_probe(struct phy_device *phydev) 2244 { 2245 int err; 2246 2247 err = marvell_probe(phydev); 2248 if (err) 2249 return err; 2250 2251 return m88e6390_hwmon_probe(phydev); 2252 } 2253 2254 static struct phy_driver marvell_drivers[] = { 2255 { 2256 .phy_id = MARVELL_PHY_ID_88E1101, 2257 .phy_id_mask = MARVELL_PHY_ID_MASK, 2258 .name = "Marvell 88E1101", 2259 /* PHY_GBIT_FEATURES */ 2260 .probe = marvell_probe, 2261 .config_init = &marvell_config_init, 2262 .config_aneg = &m88e1101_config_aneg, 2263 .ack_interrupt = &marvell_ack_interrupt, 2264 .config_intr = &marvell_config_intr, 2265 .resume = &genphy_resume, 2266 .suspend = &genphy_suspend, 2267 .read_page = marvell_read_page, 2268 .write_page = marvell_write_page, 2269 .get_sset_count = marvell_get_sset_count, 2270 .get_strings = marvell_get_strings, 2271 .get_stats = marvell_get_stats, 2272 }, 2273 { 2274 .phy_id = MARVELL_PHY_ID_88E1112, 2275 .phy_id_mask = MARVELL_PHY_ID_MASK, 2276 .name = "Marvell 88E1112", 2277 /* PHY_GBIT_FEATURES */ 2278 .probe = marvell_probe, 2279 .config_init = &m88e1111_config_init, 2280 .config_aneg = &marvell_config_aneg, 2281 .ack_interrupt = &marvell_ack_interrupt, 2282 .config_intr = &marvell_config_intr, 2283 .resume = &genphy_resume, 2284 .suspend = &genphy_suspend, 2285 .read_page = marvell_read_page, 2286 .write_page = marvell_write_page, 2287 .get_sset_count = marvell_get_sset_count, 2288 .get_strings = marvell_get_strings, 2289 .get_stats = marvell_get_stats, 2290 .get_tunable = m88e1011_get_tunable, 2291 .set_tunable = m88e1011_set_tunable, 2292 .link_change_notify = m88e1011_link_change_notify, 2293 }, 2294 { 2295 .phy_id = MARVELL_PHY_ID_88E1111, 2296 .phy_id_mask = MARVELL_PHY_ID_MASK, 2297 .name = "Marvell 88E1111", 2298 /* PHY_GBIT_FEATURES */ 2299 .probe = marvell_probe, 2300 .config_init = &m88e1111_config_init, 2301 .config_aneg = &marvell_config_aneg, 2302 .read_status = &marvell_read_status, 2303 .ack_interrupt = &marvell_ack_interrupt, 2304 .config_intr = &marvell_config_intr, 2305 .resume = &genphy_resume, 2306 .suspend = &genphy_suspend, 2307 .read_page = marvell_read_page, 2308 .write_page = marvell_write_page, 2309 .get_sset_count = marvell_get_sset_count, 2310 .get_strings = marvell_get_strings, 2311 .get_stats = marvell_get_stats, 2312 .get_tunable = m88e1111_get_tunable, 2313 .set_tunable = m88e1111_set_tunable, 2314 .link_change_notify = m88e1011_link_change_notify, 2315 }, 2316 { 2317 .phy_id = MARVELL_PHY_ID_88E1118, 2318 .phy_id_mask = MARVELL_PHY_ID_MASK, 2319 .name = "Marvell 88E1118", 2320 /* PHY_GBIT_FEATURES */ 2321 .probe = marvell_probe, 2322 .config_init = &m88e1118_config_init, 2323 .config_aneg = &m88e1118_config_aneg, 2324 .ack_interrupt = &marvell_ack_interrupt, 2325 .config_intr = &marvell_config_intr, 2326 .resume = &genphy_resume, 2327 .suspend = &genphy_suspend, 2328 .read_page = marvell_read_page, 2329 .write_page = marvell_write_page, 2330 .get_sset_count = marvell_get_sset_count, 2331 .get_strings = marvell_get_strings, 2332 .get_stats = marvell_get_stats, 2333 }, 2334 { 2335 .phy_id = MARVELL_PHY_ID_88E1121R, 2336 .phy_id_mask = MARVELL_PHY_ID_MASK, 2337 .name = "Marvell 88E1121R", 2338 /* PHY_GBIT_FEATURES */ 2339 .probe = &m88e1121_probe, 2340 .config_init = &marvell_config_init, 2341 .config_aneg = &m88e1121_config_aneg, 2342 .read_status = &marvell_read_status, 2343 .ack_interrupt = &marvell_ack_interrupt, 2344 .config_intr = &marvell_config_intr, 2345 .did_interrupt = &m88e1121_did_interrupt, 2346 .resume = &genphy_resume, 2347 .suspend = &genphy_suspend, 2348 .read_page = marvell_read_page, 2349 .write_page = marvell_write_page, 2350 .get_sset_count = marvell_get_sset_count, 2351 .get_strings = marvell_get_strings, 2352 .get_stats = marvell_get_stats, 2353 .get_tunable = m88e1011_get_tunable, 2354 .set_tunable = m88e1011_set_tunable, 2355 .link_change_notify = m88e1011_link_change_notify, 2356 }, 2357 { 2358 .phy_id = MARVELL_PHY_ID_88E1318S, 2359 .phy_id_mask = MARVELL_PHY_ID_MASK, 2360 .name = "Marvell 88E1318S", 2361 /* PHY_GBIT_FEATURES */ 2362 .probe = marvell_probe, 2363 .config_init = &m88e1318_config_init, 2364 .config_aneg = &m88e1318_config_aneg, 2365 .read_status = &marvell_read_status, 2366 .ack_interrupt = &marvell_ack_interrupt, 2367 .config_intr = &marvell_config_intr, 2368 .did_interrupt = &m88e1121_did_interrupt, 2369 .get_wol = &m88e1318_get_wol, 2370 .set_wol = &m88e1318_set_wol, 2371 .resume = &genphy_resume, 2372 .suspend = &genphy_suspend, 2373 .read_page = marvell_read_page, 2374 .write_page = marvell_write_page, 2375 .get_sset_count = marvell_get_sset_count, 2376 .get_strings = marvell_get_strings, 2377 .get_stats = marvell_get_stats, 2378 }, 2379 { 2380 .phy_id = MARVELL_PHY_ID_88E1145, 2381 .phy_id_mask = MARVELL_PHY_ID_MASK, 2382 .name = "Marvell 88E1145", 2383 /* PHY_GBIT_FEATURES */ 2384 .probe = marvell_probe, 2385 .config_init = &m88e1145_config_init, 2386 .config_aneg = &m88e1101_config_aneg, 2387 .read_status = &genphy_read_status, 2388 .ack_interrupt = &marvell_ack_interrupt, 2389 .config_intr = &marvell_config_intr, 2390 .resume = &genphy_resume, 2391 .suspend = &genphy_suspend, 2392 .read_page = marvell_read_page, 2393 .write_page = marvell_write_page, 2394 .get_sset_count = marvell_get_sset_count, 2395 .get_strings = marvell_get_strings, 2396 .get_stats = marvell_get_stats, 2397 .get_tunable = m88e1111_get_tunable, 2398 .set_tunable = m88e1111_set_tunable, 2399 .link_change_notify = m88e1011_link_change_notify, 2400 }, 2401 { 2402 .phy_id = MARVELL_PHY_ID_88E1149R, 2403 .phy_id_mask = MARVELL_PHY_ID_MASK, 2404 .name = "Marvell 88E1149R", 2405 /* PHY_GBIT_FEATURES */ 2406 .probe = marvell_probe, 2407 .config_init = &m88e1149_config_init, 2408 .config_aneg = &m88e1118_config_aneg, 2409 .ack_interrupt = &marvell_ack_interrupt, 2410 .config_intr = &marvell_config_intr, 2411 .resume = &genphy_resume, 2412 .suspend = &genphy_suspend, 2413 .read_page = marvell_read_page, 2414 .write_page = marvell_write_page, 2415 .get_sset_count = marvell_get_sset_count, 2416 .get_strings = marvell_get_strings, 2417 .get_stats = marvell_get_stats, 2418 }, 2419 { 2420 .phy_id = MARVELL_PHY_ID_88E1240, 2421 .phy_id_mask = MARVELL_PHY_ID_MASK, 2422 .name = "Marvell 88E1240", 2423 /* PHY_GBIT_FEATURES */ 2424 .probe = marvell_probe, 2425 .config_init = &m88e1111_config_init, 2426 .config_aneg = &marvell_config_aneg, 2427 .ack_interrupt = &marvell_ack_interrupt, 2428 .config_intr = &marvell_config_intr, 2429 .resume = &genphy_resume, 2430 .suspend = &genphy_suspend, 2431 .read_page = marvell_read_page, 2432 .write_page = marvell_write_page, 2433 .get_sset_count = marvell_get_sset_count, 2434 .get_strings = marvell_get_strings, 2435 .get_stats = marvell_get_stats, 2436 }, 2437 { 2438 .phy_id = MARVELL_PHY_ID_88E1116R, 2439 .phy_id_mask = MARVELL_PHY_ID_MASK, 2440 .name = "Marvell 88E1116R", 2441 /* PHY_GBIT_FEATURES */ 2442 .probe = marvell_probe, 2443 .config_init = &m88e1116r_config_init, 2444 .ack_interrupt = &marvell_ack_interrupt, 2445 .config_intr = &marvell_config_intr, 2446 .resume = &genphy_resume, 2447 .suspend = &genphy_suspend, 2448 .read_page = marvell_read_page, 2449 .write_page = marvell_write_page, 2450 .get_sset_count = marvell_get_sset_count, 2451 .get_strings = marvell_get_strings, 2452 .get_stats = marvell_get_stats, 2453 .get_tunable = m88e1011_get_tunable, 2454 .set_tunable = m88e1011_set_tunable, 2455 .link_change_notify = m88e1011_link_change_notify, 2456 }, 2457 { 2458 .phy_id = MARVELL_PHY_ID_88E1510, 2459 .phy_id_mask = MARVELL_PHY_ID_MASK, 2460 .name = "Marvell 88E1510", 2461 .features = PHY_GBIT_FIBRE_FEATURES, 2462 .probe = &m88e1510_probe, 2463 .config_init = &m88e1510_config_init, 2464 .config_aneg = &m88e1510_config_aneg, 2465 .read_status = &marvell_read_status, 2466 .ack_interrupt = &marvell_ack_interrupt, 2467 .config_intr = &marvell_config_intr, 2468 .did_interrupt = &m88e1121_did_interrupt, 2469 .get_wol = &m88e1318_get_wol, 2470 .set_wol = &m88e1318_set_wol, 2471 .resume = &marvell_resume, 2472 .suspend = &marvell_suspend, 2473 .read_page = marvell_read_page, 2474 .write_page = marvell_write_page, 2475 .get_sset_count = marvell_get_sset_count, 2476 .get_strings = marvell_get_strings, 2477 .get_stats = marvell_get_stats, 2478 .set_loopback = genphy_loopback, 2479 .get_tunable = m88e1011_get_tunable, 2480 .set_tunable = m88e1011_set_tunable, 2481 .link_change_notify = m88e1011_link_change_notify, 2482 }, 2483 { 2484 .phy_id = MARVELL_PHY_ID_88E1540, 2485 .phy_id_mask = MARVELL_PHY_ID_MASK, 2486 .name = "Marvell 88E1540", 2487 /* PHY_GBIT_FEATURES */ 2488 .probe = m88e1510_probe, 2489 .config_init = &marvell_config_init, 2490 .config_aneg = &m88e1510_config_aneg, 2491 .read_status = &marvell_read_status, 2492 .ack_interrupt = &marvell_ack_interrupt, 2493 .config_intr = &marvell_config_intr, 2494 .did_interrupt = &m88e1121_did_interrupt, 2495 .resume = &genphy_resume, 2496 .suspend = &genphy_suspend, 2497 .read_page = marvell_read_page, 2498 .write_page = marvell_write_page, 2499 .get_sset_count = marvell_get_sset_count, 2500 .get_strings = marvell_get_strings, 2501 .get_stats = marvell_get_stats, 2502 .get_tunable = m88e1540_get_tunable, 2503 .set_tunable = m88e1540_set_tunable, 2504 .link_change_notify = m88e1011_link_change_notify, 2505 }, 2506 { 2507 .phy_id = MARVELL_PHY_ID_88E1545, 2508 .phy_id_mask = MARVELL_PHY_ID_MASK, 2509 .name = "Marvell 88E1545", 2510 .probe = m88e1510_probe, 2511 /* PHY_GBIT_FEATURES */ 2512 .config_init = &marvell_config_init, 2513 .config_aneg = &m88e1510_config_aneg, 2514 .read_status = &marvell_read_status, 2515 .ack_interrupt = &marvell_ack_interrupt, 2516 .config_intr = &marvell_config_intr, 2517 .did_interrupt = &m88e1121_did_interrupt, 2518 .resume = &genphy_resume, 2519 .suspend = &genphy_suspend, 2520 .read_page = marvell_read_page, 2521 .write_page = marvell_write_page, 2522 .get_sset_count = marvell_get_sset_count, 2523 .get_strings = marvell_get_strings, 2524 .get_stats = marvell_get_stats, 2525 .get_tunable = m88e1540_get_tunable, 2526 .set_tunable = m88e1540_set_tunable, 2527 .link_change_notify = m88e1011_link_change_notify, 2528 }, 2529 { 2530 .phy_id = MARVELL_PHY_ID_88E3016, 2531 .phy_id_mask = MARVELL_PHY_ID_MASK, 2532 .name = "Marvell 88E3016", 2533 /* PHY_BASIC_FEATURES */ 2534 .probe = marvell_probe, 2535 .config_init = &m88e3016_config_init, 2536 .aneg_done = &marvell_aneg_done, 2537 .read_status = &marvell_read_status, 2538 .ack_interrupt = &marvell_ack_interrupt, 2539 .config_intr = &marvell_config_intr, 2540 .did_interrupt = &m88e1121_did_interrupt, 2541 .resume = &genphy_resume, 2542 .suspend = &genphy_suspend, 2543 .read_page = marvell_read_page, 2544 .write_page = marvell_write_page, 2545 .get_sset_count = marvell_get_sset_count, 2546 .get_strings = marvell_get_strings, 2547 .get_stats = marvell_get_stats, 2548 }, 2549 { 2550 .phy_id = MARVELL_PHY_ID_88E6390, 2551 .phy_id_mask = MARVELL_PHY_ID_MASK, 2552 .name = "Marvell 88E6390", 2553 /* PHY_GBIT_FEATURES */ 2554 .probe = m88e6390_probe, 2555 .config_init = &marvell_config_init, 2556 .config_aneg = &m88e6390_config_aneg, 2557 .read_status = &marvell_read_status, 2558 .ack_interrupt = &marvell_ack_interrupt, 2559 .config_intr = &marvell_config_intr, 2560 .did_interrupt = &m88e1121_did_interrupt, 2561 .resume = &genphy_resume, 2562 .suspend = &genphy_suspend, 2563 .read_page = marvell_read_page, 2564 .write_page = marvell_write_page, 2565 .get_sset_count = marvell_get_sset_count, 2566 .get_strings = marvell_get_strings, 2567 .get_stats = marvell_get_stats, 2568 .get_tunable = m88e1540_get_tunable, 2569 .set_tunable = m88e1540_set_tunable, 2570 .link_change_notify = m88e1011_link_change_notify, 2571 }, 2572 }; 2573 2574 module_phy_driver(marvell_drivers); 2575 2576 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2577 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2578 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2579 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2580 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2581 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2582 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2583 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2584 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2585 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2586 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2587 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2588 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2589 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2590 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2591 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2592 { } 2593 }; 2594 2595 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2596