1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13 #include <linux/kernel.h> 14 #include <linux/string.h> 15 #include <linux/ctype.h> 16 #include <linux/errno.h> 17 #include <linux/unistd.h> 18 #include <linux/hwmon.h> 19 #include <linux/interrupt.h> 20 #include <linux/init.h> 21 #include <linux/delay.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/skbuff.h> 25 #include <linux/spinlock.h> 26 #include <linux/mm.h> 27 #include <linux/module.h> 28 #include <linux/mii.h> 29 #include <linux/ethtool.h> 30 #include <linux/phy.h> 31 #include <linux/marvell_phy.h> 32 #include <linux/bitfield.h> 33 #include <linux/of.h> 34 35 #include <linux/io.h> 36 #include <asm/irq.h> 37 #include <linux/uaccess.h> 38 39 #define MII_MARVELL_PHY_PAGE 22 40 #define MII_MARVELL_COPPER_PAGE 0x00 41 #define MII_MARVELL_FIBER_PAGE 0x01 42 #define MII_MARVELL_MSCR_PAGE 0x02 43 #define MII_MARVELL_LED_PAGE 0x03 44 #define MII_MARVELL_MISC_TEST_PAGE 0x06 45 #define MII_MARVELL_WOL_PAGE 0x11 46 47 #define MII_M1011_IEVENT 0x13 48 #define MII_M1011_IEVENT_CLEAR 0x0000 49 50 #define MII_M1011_IMASK 0x12 51 #define MII_M1011_IMASK_INIT 0x6400 52 #define MII_M1011_IMASK_CLEAR 0x0000 53 54 #define MII_M1011_PHY_SCR 0x10 55 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 56 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12 57 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800 58 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 59 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 60 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 61 62 #define MII_M1111_PHY_LED_CONTROL 0x18 63 #define MII_M1111_PHY_LED_DIRECT 0x4100 64 #define MII_M1111_PHY_LED_COMBINE 0x411c 65 #define MII_M1111_PHY_EXT_CR 0x14 66 #define MII_M1111_RGMII_RX_DELAY BIT(7) 67 #define MII_M1111_RGMII_TX_DELAY BIT(1) 68 #define MII_M1111_PHY_EXT_SR 0x1b 69 70 #define MII_M1111_HWCFG_MODE_MASK 0xf 71 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 72 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 73 #define MII_M1111_HWCFG_MODE_RTBI 0x7 74 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 75 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 76 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 77 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 78 79 #define MII_88E1121_PHY_MSCR_REG 21 80 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 81 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 82 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 83 84 #define MII_88E1121_MISC_TEST 0x1a 85 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 86 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 87 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 88 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 89 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 90 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 91 92 #define MII_88E1510_TEMP_SENSOR 0x1b 93 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 94 95 #define MII_88E1540_COPPER_CTRL3 0x1a 96 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) 97 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 98 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 99 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 100 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 101 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) 102 103 #define MII_88E6390_MISC_TEST 0x1b 104 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 105 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 106 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 107 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 108 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 109 110 #define MII_88E6390_TEMP_SENSOR 0x1c 111 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 112 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 113 114 #define MII_88E1318S_PHY_MSCR1_REG 16 115 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 116 117 /* Copper Specific Interrupt Enable Register */ 118 #define MII_88E1318S_PHY_CSIER 0x12 119 /* WOL Event Interrupt Enable */ 120 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 121 122 /* LED Timer Control Register */ 123 #define MII_88E1318S_PHY_LED_TCR 0x12 124 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 125 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 126 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 127 128 /* Magic Packet MAC address registers */ 129 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 130 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 131 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 132 133 #define MII_88E1318S_PHY_WOL_CTRL 0x10 134 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 135 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 136 137 #define MII_PHY_LED_CTRL 16 138 #define MII_88E1121_PHY_LED_DEF 0x0030 139 #define MII_88E1510_PHY_LED_DEF 0x1177 140 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040 141 142 #define MII_M1011_PHY_STATUS 0x11 143 #define MII_M1011_PHY_STATUS_1000 0x8000 144 #define MII_M1011_PHY_STATUS_100 0x4000 145 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 146 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 147 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 148 #define MII_M1011_PHY_STATUS_LINK 0x0400 149 150 #define MII_88E3016_PHY_SPEC_CTRL 0x10 151 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 152 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 153 154 #define MII_88E1510_GEN_CTRL_REG_1 0x14 155 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 156 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 157 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 158 159 #define LPA_FIBER_1000HALF 0x40 160 #define LPA_FIBER_1000FULL 0x20 161 162 #define LPA_PAUSE_FIBER 0x180 163 #define LPA_PAUSE_ASYM_FIBER 0x100 164 165 #define ADVERTISE_FIBER_1000HALF 0x40 166 #define ADVERTISE_FIBER_1000FULL 0x20 167 168 #define ADVERTISE_PAUSE_FIBER 0x180 169 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 170 171 #define REGISTER_LINK_STATUS 0x400 172 #define NB_FIBER_STATS 1 173 174 MODULE_DESCRIPTION("Marvell PHY driver"); 175 MODULE_AUTHOR("Andy Fleming"); 176 MODULE_LICENSE("GPL"); 177 178 struct marvell_hw_stat { 179 const char *string; 180 u8 page; 181 u8 reg; 182 u8 bits; 183 }; 184 185 static struct marvell_hw_stat marvell_hw_stats[] = { 186 { "phy_receive_errors_copper", 0, 21, 16}, 187 { "phy_idle_errors", 0, 10, 8 }, 188 { "phy_receive_errors_fiber", 1, 21, 16}, 189 }; 190 191 struct marvell_priv { 192 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 193 char *hwmon_name; 194 struct device *hwmon_dev; 195 }; 196 197 static int marvell_read_page(struct phy_device *phydev) 198 { 199 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 200 } 201 202 static int marvell_write_page(struct phy_device *phydev, int page) 203 { 204 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 205 } 206 207 static int marvell_set_page(struct phy_device *phydev, int page) 208 { 209 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 210 } 211 212 static int marvell_ack_interrupt(struct phy_device *phydev) 213 { 214 int err; 215 216 /* Clear the interrupts by reading the reg */ 217 err = phy_read(phydev, MII_M1011_IEVENT); 218 219 if (err < 0) 220 return err; 221 222 return 0; 223 } 224 225 static int marvell_config_intr(struct phy_device *phydev) 226 { 227 int err; 228 229 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 230 err = phy_write(phydev, MII_M1011_IMASK, 231 MII_M1011_IMASK_INIT); 232 else 233 err = phy_write(phydev, MII_M1011_IMASK, 234 MII_M1011_IMASK_CLEAR); 235 236 return err; 237 } 238 239 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 240 { 241 int reg; 242 int err; 243 int val; 244 245 /* get the current settings */ 246 reg = phy_read(phydev, MII_M1011_PHY_SCR); 247 if (reg < 0) 248 return reg; 249 250 val = reg; 251 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 252 switch (polarity) { 253 case ETH_TP_MDI: 254 val |= MII_M1011_PHY_SCR_MDI; 255 break; 256 case ETH_TP_MDI_X: 257 val |= MII_M1011_PHY_SCR_MDI_X; 258 break; 259 case ETH_TP_MDI_AUTO: 260 case ETH_TP_MDI_INVALID: 261 default: 262 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 263 break; 264 } 265 266 if (val != reg) { 267 /* Set the new polarity value in the register */ 268 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 269 if (err) 270 return err; 271 } 272 273 return val != reg; 274 } 275 276 static int marvell_set_downshift(struct phy_device *phydev, bool enable, 277 u8 retries) 278 { 279 int reg; 280 281 reg = phy_read(phydev, MII_M1011_PHY_SCR); 282 if (reg < 0) 283 return reg; 284 285 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK; 286 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT); 287 if (enable) 288 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN; 289 290 return phy_write(phydev, MII_M1011_PHY_SCR, reg); 291 } 292 293 static int marvell_config_aneg(struct phy_device *phydev) 294 { 295 int changed = 0; 296 int err; 297 298 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 299 if (err < 0) 300 return err; 301 302 changed = err; 303 304 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 305 MII_M1111_PHY_LED_DIRECT); 306 if (err < 0) 307 return err; 308 309 err = genphy_config_aneg(phydev); 310 if (err < 0) 311 return err; 312 313 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 314 /* A write to speed/duplex bits (that is performed by 315 * genphy_config_aneg() call above) must be followed by 316 * a software reset. Otherwise, the write has no effect. 317 */ 318 err = genphy_soft_reset(phydev); 319 if (err < 0) 320 return err; 321 } 322 323 return 0; 324 } 325 326 static int m88e1101_config_aneg(struct phy_device *phydev) 327 { 328 int err; 329 330 /* This Marvell PHY has an errata which requires 331 * that certain registers get written in order 332 * to restart autonegotiation 333 */ 334 err = genphy_soft_reset(phydev); 335 if (err < 0) 336 return err; 337 338 err = phy_write(phydev, 0x1d, 0x1f); 339 if (err < 0) 340 return err; 341 342 err = phy_write(phydev, 0x1e, 0x200c); 343 if (err < 0) 344 return err; 345 346 err = phy_write(phydev, 0x1d, 0x5); 347 if (err < 0) 348 return err; 349 350 err = phy_write(phydev, 0x1e, 0); 351 if (err < 0) 352 return err; 353 354 err = phy_write(phydev, 0x1e, 0x100); 355 if (err < 0) 356 return err; 357 358 return marvell_config_aneg(phydev); 359 } 360 361 #ifdef CONFIG_OF_MDIO 362 /* Set and/or override some configuration registers based on the 363 * marvell,reg-init property stored in the of_node for the phydev. 364 * 365 * marvell,reg-init = <reg-page reg mask value>,...; 366 * 367 * There may be one or more sets of <reg-page reg mask value>: 368 * 369 * reg-page: which register bank to use. 370 * reg: the register. 371 * mask: if non-zero, ANDed with existing register value. 372 * value: ORed with the masked value and written to the regiser. 373 * 374 */ 375 static int marvell_of_reg_init(struct phy_device *phydev) 376 { 377 const __be32 *paddr; 378 int len, i, saved_page, current_page, ret = 0; 379 380 if (!phydev->mdio.dev.of_node) 381 return 0; 382 383 paddr = of_get_property(phydev->mdio.dev.of_node, 384 "marvell,reg-init", &len); 385 if (!paddr || len < (4 * sizeof(*paddr))) 386 return 0; 387 388 saved_page = phy_save_page(phydev); 389 if (saved_page < 0) 390 goto err; 391 current_page = saved_page; 392 393 len /= sizeof(*paddr); 394 for (i = 0; i < len - 3; i += 4) { 395 u16 page = be32_to_cpup(paddr + i); 396 u16 reg = be32_to_cpup(paddr + i + 1); 397 u16 mask = be32_to_cpup(paddr + i + 2); 398 u16 val_bits = be32_to_cpup(paddr + i + 3); 399 int val; 400 401 if (page != current_page) { 402 current_page = page; 403 ret = marvell_write_page(phydev, page); 404 if (ret < 0) 405 goto err; 406 } 407 408 val = 0; 409 if (mask) { 410 val = __phy_read(phydev, reg); 411 if (val < 0) { 412 ret = val; 413 goto err; 414 } 415 val &= mask; 416 } 417 val |= val_bits; 418 419 ret = __phy_write(phydev, reg, val); 420 if (ret < 0) 421 goto err; 422 } 423 err: 424 return phy_restore_page(phydev, saved_page, ret); 425 } 426 #else 427 static int marvell_of_reg_init(struct phy_device *phydev) 428 { 429 return 0; 430 } 431 #endif /* CONFIG_OF_MDIO */ 432 433 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 434 { 435 int mscr; 436 437 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 438 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 439 MII_88E1121_PHY_MSCR_TX_DELAY; 440 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 441 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 442 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 443 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 444 else 445 mscr = 0; 446 447 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 448 MII_88E1121_PHY_MSCR_REG, 449 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 450 } 451 452 static int m88e1121_config_aneg(struct phy_device *phydev) 453 { 454 int changed = 0; 455 int err = 0; 456 457 if (phy_interface_is_rgmii(phydev)) { 458 err = m88e1121_config_aneg_rgmii_delays(phydev); 459 if (err < 0) 460 return err; 461 } 462 463 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 464 if (err < 0) 465 return err; 466 467 changed = err; 468 469 err = genphy_config_aneg(phydev); 470 if (err < 0) 471 return err; 472 473 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 474 /* A software reset is used to ensure a "commit" of the 475 * changes is done. 476 */ 477 err = genphy_soft_reset(phydev); 478 if (err < 0) 479 return err; 480 } 481 482 return 0; 483 } 484 485 static int m88e1318_config_aneg(struct phy_device *phydev) 486 { 487 int err; 488 489 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 490 MII_88E1318S_PHY_MSCR1_REG, 491 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 492 if (err < 0) 493 return err; 494 495 return m88e1121_config_aneg(phydev); 496 } 497 498 /** 499 * linkmode_adv_to_fiber_adv_t 500 * @advertise: the linkmode advertisement settings 501 * 502 * A small helper function that translates linkmode advertisement 503 * settings to phy autonegotiation advertisements for the MII_ADV 504 * register for fiber link. 505 */ 506 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 507 { 508 u32 result = 0; 509 510 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 511 result |= ADVERTISE_FIBER_1000HALF; 512 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 513 result |= ADVERTISE_FIBER_1000FULL; 514 515 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 516 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 517 result |= LPA_PAUSE_ASYM_FIBER; 518 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 519 result |= (ADVERTISE_PAUSE_FIBER 520 & (~ADVERTISE_PAUSE_ASYM_FIBER)); 521 522 return result; 523 } 524 525 /** 526 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 527 * @phydev: target phy_device struct 528 * 529 * Description: If auto-negotiation is enabled, we configure the 530 * advertising, and then restart auto-negotiation. If it is not 531 * enabled, then we write the BMCR. Adapted for fiber link in 532 * some Marvell's devices. 533 */ 534 static int marvell_config_aneg_fiber(struct phy_device *phydev) 535 { 536 int changed = 0; 537 int err; 538 int adv, oldadv; 539 540 if (phydev->autoneg != AUTONEG_ENABLE) 541 return genphy_setup_forced(phydev); 542 543 /* Only allow advertising what this PHY supports */ 544 linkmode_and(phydev->advertising, phydev->advertising, 545 phydev->supported); 546 547 /* Setup fiber advertisement */ 548 adv = phy_read(phydev, MII_ADVERTISE); 549 if (adv < 0) 550 return adv; 551 552 oldadv = adv; 553 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL 554 | LPA_PAUSE_FIBER); 555 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising); 556 557 if (adv != oldadv) { 558 err = phy_write(phydev, MII_ADVERTISE, adv); 559 if (err < 0) 560 return err; 561 562 changed = 1; 563 } 564 565 if (changed == 0) { 566 /* Advertisement hasn't changed, but maybe aneg was never on to 567 * begin with? Or maybe phy was isolated? 568 */ 569 int ctl = phy_read(phydev, MII_BMCR); 570 571 if (ctl < 0) 572 return ctl; 573 574 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 575 changed = 1; /* do restart aneg */ 576 } 577 578 /* Only restart aneg if we are advertising something different 579 * than we were before. 580 */ 581 if (changed > 0) 582 changed = genphy_restart_aneg(phydev); 583 584 return changed; 585 } 586 587 static int m88e1510_config_aneg(struct phy_device *phydev) 588 { 589 int err; 590 591 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 592 if (err < 0) 593 goto error; 594 595 /* Configure the copper link first */ 596 err = m88e1318_config_aneg(phydev); 597 if (err < 0) 598 goto error; 599 600 /* Do not touch the fiber page if we're in copper->sgmii mode */ 601 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 602 return 0; 603 604 /* Then the fiber link */ 605 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 606 if (err < 0) 607 goto error; 608 609 err = marvell_config_aneg_fiber(phydev); 610 if (err < 0) 611 goto error; 612 613 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 614 615 error: 616 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 617 return err; 618 } 619 620 static void marvell_config_led(struct phy_device *phydev) 621 { 622 u16 def_config; 623 int err; 624 625 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 626 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 627 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 628 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 629 def_config = MII_88E1121_PHY_LED_DEF; 630 break; 631 /* Default PHY LED config: 632 * LED[0] .. 1000Mbps Link 633 * LED[1] .. 100Mbps Link 634 * LED[2] .. Blink, Activity 635 */ 636 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 637 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE) 638 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE; 639 else 640 def_config = MII_88E1510_PHY_LED_DEF; 641 break; 642 default: 643 return; 644 } 645 646 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 647 def_config); 648 if (err < 0) 649 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 650 } 651 652 static int marvell_config_init(struct phy_device *phydev) 653 { 654 /* Set defalut LED */ 655 marvell_config_led(phydev); 656 657 /* Set registers from marvell,reg-init DT property */ 658 return marvell_of_reg_init(phydev); 659 } 660 661 static int m88e1116r_config_init(struct phy_device *phydev) 662 { 663 int err; 664 665 err = genphy_soft_reset(phydev); 666 if (err < 0) 667 return err; 668 669 msleep(500); 670 671 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 672 if (err < 0) 673 return err; 674 675 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 676 if (err < 0) 677 return err; 678 679 err = marvell_set_downshift(phydev, true, 8); 680 if (err < 0) 681 return err; 682 683 if (phy_interface_is_rgmii(phydev)) { 684 err = m88e1121_config_aneg_rgmii_delays(phydev); 685 if (err < 0) 686 return err; 687 } 688 689 err = genphy_soft_reset(phydev); 690 if (err < 0) 691 return err; 692 693 return marvell_config_init(phydev); 694 } 695 696 static int m88e3016_config_init(struct phy_device *phydev) 697 { 698 int ret; 699 700 /* Enable Scrambler and Auto-Crossover */ 701 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 702 MII_88E3016_DISABLE_SCRAMBLER, 703 MII_88E3016_AUTO_MDIX_CROSSOVER); 704 if (ret < 0) 705 return ret; 706 707 return marvell_config_init(phydev); 708 } 709 710 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 711 u16 mode, 712 int fibre_copper_auto) 713 { 714 if (fibre_copper_auto) 715 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 716 717 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 718 MII_M1111_HWCFG_MODE_MASK | 719 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 720 MII_M1111_HWCFG_FIBER_COPPER_RES, 721 mode); 722 } 723 724 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 725 { 726 int delay; 727 728 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 729 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 730 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 731 delay = MII_M1111_RGMII_RX_DELAY; 732 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 733 delay = MII_M1111_RGMII_TX_DELAY; 734 } else { 735 delay = 0; 736 } 737 738 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 739 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 740 delay); 741 } 742 743 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 744 { 745 int temp; 746 int err; 747 748 err = m88e1111_config_init_rgmii_delays(phydev); 749 if (err < 0) 750 return err; 751 752 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 753 if (temp < 0) 754 return temp; 755 756 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 757 758 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 759 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 760 else 761 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 762 763 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 764 } 765 766 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 767 { 768 int err; 769 770 err = m88e1111_config_init_hwcfg_mode( 771 phydev, 772 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 773 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 774 if (err < 0) 775 return err; 776 777 /* make sure copper is selected */ 778 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 779 } 780 781 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 782 { 783 int err; 784 785 err = m88e1111_config_init_rgmii_delays(phydev); 786 if (err < 0) 787 return err; 788 789 err = m88e1111_config_init_hwcfg_mode( 790 phydev, 791 MII_M1111_HWCFG_MODE_RTBI, 792 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 793 if (err < 0) 794 return err; 795 796 /* soft reset */ 797 err = genphy_soft_reset(phydev); 798 if (err < 0) 799 return err; 800 801 return m88e1111_config_init_hwcfg_mode( 802 phydev, 803 MII_M1111_HWCFG_MODE_RTBI, 804 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 805 } 806 807 static int m88e1111_config_init(struct phy_device *phydev) 808 { 809 int err; 810 811 if (phy_interface_is_rgmii(phydev)) { 812 err = m88e1111_config_init_rgmii(phydev); 813 if (err < 0) 814 return err; 815 } 816 817 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 818 err = m88e1111_config_init_sgmii(phydev); 819 if (err < 0) 820 return err; 821 } 822 823 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 824 err = m88e1111_config_init_rtbi(phydev); 825 if (err < 0) 826 return err; 827 } 828 829 err = marvell_of_reg_init(phydev); 830 if (err < 0) 831 return err; 832 833 return genphy_soft_reset(phydev); 834 } 835 836 static int m88e1318_config_init(struct phy_device *phydev) 837 { 838 if (phy_interrupt_is_valid(phydev)) { 839 int err = phy_modify_paged( 840 phydev, MII_MARVELL_LED_PAGE, 841 MII_88E1318S_PHY_LED_TCR, 842 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 843 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 844 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 845 if (err < 0) 846 return err; 847 } 848 849 return marvell_config_init(phydev); 850 } 851 852 static int m88e1510_config_init(struct phy_device *phydev) 853 { 854 int err; 855 856 /* SGMII-to-Copper mode initialization */ 857 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 858 /* Select page 18 */ 859 err = marvell_set_page(phydev, 18); 860 if (err < 0) 861 return err; 862 863 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 864 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 865 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 866 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 867 if (err < 0) 868 return err; 869 870 /* PHY reset is necessary after changing MODE[2:0] */ 871 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 872 MII_88E1510_GEN_CTRL_REG_1_RESET); 873 if (err < 0) 874 return err; 875 876 /* Reset page selection */ 877 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 878 if (err < 0) 879 return err; 880 } 881 882 return m88e1318_config_init(phydev); 883 } 884 885 static int m88e1118_config_aneg(struct phy_device *phydev) 886 { 887 int err; 888 889 err = genphy_soft_reset(phydev); 890 if (err < 0) 891 return err; 892 893 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 894 if (err < 0) 895 return err; 896 897 err = genphy_config_aneg(phydev); 898 return 0; 899 } 900 901 static int m88e1118_config_init(struct phy_device *phydev) 902 { 903 int err; 904 905 /* Change address */ 906 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 907 if (err < 0) 908 return err; 909 910 /* Enable 1000 Mbit */ 911 err = phy_write(phydev, 0x15, 0x1070); 912 if (err < 0) 913 return err; 914 915 /* Change address */ 916 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 917 if (err < 0) 918 return err; 919 920 /* Adjust LED Control */ 921 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 922 err = phy_write(phydev, 0x10, 0x1100); 923 else 924 err = phy_write(phydev, 0x10, 0x021e); 925 if (err < 0) 926 return err; 927 928 err = marvell_of_reg_init(phydev); 929 if (err < 0) 930 return err; 931 932 /* Reset address */ 933 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 934 if (err < 0) 935 return err; 936 937 return genphy_soft_reset(phydev); 938 } 939 940 static int m88e1149_config_init(struct phy_device *phydev) 941 { 942 int err; 943 944 /* Change address */ 945 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 946 if (err < 0) 947 return err; 948 949 /* Enable 1000 Mbit */ 950 err = phy_write(phydev, 0x15, 0x1048); 951 if (err < 0) 952 return err; 953 954 err = marvell_of_reg_init(phydev); 955 if (err < 0) 956 return err; 957 958 /* Reset address */ 959 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 960 if (err < 0) 961 return err; 962 963 return genphy_soft_reset(phydev); 964 } 965 966 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 967 { 968 int err; 969 970 err = m88e1111_config_init_rgmii_delays(phydev); 971 if (err < 0) 972 return err; 973 974 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 975 err = phy_write(phydev, 0x1d, 0x0012); 976 if (err < 0) 977 return err; 978 979 err = phy_modify(phydev, 0x1e, 0x0fc0, 980 2 << 9 | /* 36 ohm */ 981 2 << 6); /* 39 ohm */ 982 if (err < 0) 983 return err; 984 985 err = phy_write(phydev, 0x1d, 0x3); 986 if (err < 0) 987 return err; 988 989 err = phy_write(phydev, 0x1e, 0x8000); 990 } 991 return err; 992 } 993 994 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 995 { 996 return m88e1111_config_init_hwcfg_mode( 997 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 998 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 999 } 1000 1001 static int m88e1145_config_init(struct phy_device *phydev) 1002 { 1003 int err; 1004 1005 /* Take care of errata E0 & E1 */ 1006 err = phy_write(phydev, 0x1d, 0x001b); 1007 if (err < 0) 1008 return err; 1009 1010 err = phy_write(phydev, 0x1e, 0x418f); 1011 if (err < 0) 1012 return err; 1013 1014 err = phy_write(phydev, 0x1d, 0x0016); 1015 if (err < 0) 1016 return err; 1017 1018 err = phy_write(phydev, 0x1e, 0xa2da); 1019 if (err < 0) 1020 return err; 1021 1022 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1023 err = m88e1145_config_init_rgmii(phydev); 1024 if (err < 0) 1025 return err; 1026 } 1027 1028 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1029 err = m88e1145_config_init_sgmii(phydev); 1030 if (err < 0) 1031 return err; 1032 } 1033 1034 err = marvell_of_reg_init(phydev); 1035 if (err < 0) 1036 return err; 1037 1038 return 0; 1039 } 1040 1041 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) 1042 { 1043 int val; 1044 1045 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); 1046 if (val < 0) 1047 return val; 1048 1049 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { 1050 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; 1051 return 0; 1052 } 1053 1054 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1055 1056 switch (val) { 1057 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: 1058 *msecs = 0; 1059 break; 1060 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: 1061 *msecs = 10; 1062 break; 1063 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: 1064 *msecs = 20; 1065 break; 1066 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: 1067 *msecs = 40; 1068 break; 1069 default: 1070 return -EINVAL; 1071 } 1072 1073 return 0; 1074 } 1075 1076 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) 1077 { 1078 struct ethtool_eee eee; 1079 int val, ret; 1080 1081 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) 1082 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, 1083 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1084 1085 /* According to the Marvell data sheet EEE must be disabled for 1086 * Fast Link Down detection to work properly 1087 */ 1088 ret = phy_ethtool_get_eee(phydev, &eee); 1089 if (!ret && eee.eee_enabled) { 1090 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); 1091 return -EBUSY; 1092 } 1093 1094 if (*msecs <= 5) 1095 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; 1096 else if (*msecs <= 15) 1097 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; 1098 else if (*msecs <= 30) 1099 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; 1100 else 1101 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; 1102 1103 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1104 1105 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, 1106 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1107 if (ret) 1108 return ret; 1109 1110 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, 1111 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1112 } 1113 1114 static int m88e1540_get_tunable(struct phy_device *phydev, 1115 struct ethtool_tunable *tuna, void *data) 1116 { 1117 switch (tuna->id) { 1118 case ETHTOOL_PHY_FAST_LINK_DOWN: 1119 return m88e1540_get_fld(phydev, data); 1120 default: 1121 return -EOPNOTSUPP; 1122 } 1123 } 1124 1125 static int m88e1540_set_tunable(struct phy_device *phydev, 1126 struct ethtool_tunable *tuna, const void *data) 1127 { 1128 switch (tuna->id) { 1129 case ETHTOOL_PHY_FAST_LINK_DOWN: 1130 return m88e1540_set_fld(phydev, data); 1131 default: 1132 return -EOPNOTSUPP; 1133 } 1134 } 1135 1136 /* The VOD can be out of specification on link up. Poke an 1137 * undocumented register, in an undocumented page, with a magic value 1138 * to fix this. 1139 */ 1140 static int m88e6390_errata(struct phy_device *phydev) 1141 { 1142 int err; 1143 1144 err = phy_write(phydev, MII_BMCR, 1145 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1146 if (err) 1147 return err; 1148 1149 usleep_range(300, 400); 1150 1151 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1152 if (err) 1153 return err; 1154 1155 return genphy_soft_reset(phydev); 1156 } 1157 1158 static int m88e6390_config_aneg(struct phy_device *phydev) 1159 { 1160 int err; 1161 1162 err = m88e6390_errata(phydev); 1163 if (err) 1164 return err; 1165 1166 return m88e1510_config_aneg(phydev); 1167 } 1168 1169 /** 1170 * fiber_lpa_mod_linkmode_lpa_t 1171 * @advertising: the linkmode advertisement settings 1172 * @lpa: value of the MII_LPA register for fiber link 1173 * 1174 * A small helper function that translates MII_LPA bits to linkmode LP 1175 * advertisement settings. Other bits in advertising are left 1176 * unchanged. 1177 */ 1178 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1179 { 1180 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1181 advertising, lpa & LPA_FIBER_1000HALF); 1182 1183 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1184 advertising, lpa & LPA_FIBER_1000FULL); 1185 } 1186 1187 /** 1188 * marvell_update_link - update link status in real time in @phydev 1189 * @phydev: target phy_device struct 1190 * 1191 * Description: Update the value in phydev->link to reflect the 1192 * current link value. 1193 */ 1194 static int marvell_update_link(struct phy_device *phydev, int fiber) 1195 { 1196 int status; 1197 1198 /* Use the generic register for copper link, or specific 1199 * register for fiber case 1200 */ 1201 if (fiber) { 1202 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1203 if (status < 0) 1204 return status; 1205 1206 if ((status & REGISTER_LINK_STATUS) == 0) 1207 phydev->link = 0; 1208 else 1209 phydev->link = 1; 1210 } else { 1211 return genphy_update_link(phydev); 1212 } 1213 1214 return 0; 1215 } 1216 1217 static int marvell_read_status_page_an(struct phy_device *phydev, 1218 int fiber) 1219 { 1220 int status; 1221 int lpa; 1222 int lpagb; 1223 1224 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1225 if (status < 0) 1226 return status; 1227 1228 lpa = phy_read(phydev, MII_LPA); 1229 if (lpa < 0) 1230 return lpa; 1231 1232 lpagb = phy_read(phydev, MII_STAT1000); 1233 if (lpagb < 0) 1234 return lpagb; 1235 1236 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1237 phydev->duplex = DUPLEX_FULL; 1238 else 1239 phydev->duplex = DUPLEX_HALF; 1240 1241 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 1242 phydev->pause = 0; 1243 phydev->asym_pause = 0; 1244 1245 switch (status) { 1246 case MII_M1011_PHY_STATUS_1000: 1247 phydev->speed = SPEED_1000; 1248 break; 1249 1250 case MII_M1011_PHY_STATUS_100: 1251 phydev->speed = SPEED_100; 1252 break; 1253 1254 default: 1255 phydev->speed = SPEED_10; 1256 break; 1257 } 1258 1259 if (!fiber) { 1260 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa); 1261 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb); 1262 1263 if (phydev->duplex == DUPLEX_FULL) { 1264 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 1265 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 1266 } 1267 } else { 1268 /* The fiber link is only 1000M capable */ 1269 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1270 1271 if (phydev->duplex == DUPLEX_FULL) { 1272 if (!(lpa & LPA_PAUSE_FIBER)) { 1273 phydev->pause = 0; 1274 phydev->asym_pause = 0; 1275 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1276 phydev->pause = 1; 1277 phydev->asym_pause = 1; 1278 } else { 1279 phydev->pause = 1; 1280 phydev->asym_pause = 0; 1281 } 1282 } 1283 } 1284 return 0; 1285 } 1286 1287 static int marvell_read_status_page_fixed(struct phy_device *phydev) 1288 { 1289 int bmcr = phy_read(phydev, MII_BMCR); 1290 1291 if (bmcr < 0) 1292 return bmcr; 1293 1294 if (bmcr & BMCR_FULLDPLX) 1295 phydev->duplex = DUPLEX_FULL; 1296 else 1297 phydev->duplex = DUPLEX_HALF; 1298 1299 if (bmcr & BMCR_SPEED1000) 1300 phydev->speed = SPEED_1000; 1301 else if (bmcr & BMCR_SPEED100) 1302 phydev->speed = SPEED_100; 1303 else 1304 phydev->speed = SPEED_10; 1305 1306 phydev->pause = 0; 1307 phydev->asym_pause = 0; 1308 linkmode_zero(phydev->lp_advertising); 1309 1310 return 0; 1311 } 1312 1313 /* marvell_read_status_page 1314 * 1315 * Description: 1316 * Check the link, then figure out the current state 1317 * by comparing what we advertise with what the link partner 1318 * advertises. Start by checking the gigabit possibilities, 1319 * then move on to 10/100. 1320 */ 1321 static int marvell_read_status_page(struct phy_device *phydev, int page) 1322 { 1323 int fiber; 1324 int err; 1325 1326 /* Detect and update the link, but return if there 1327 * was an error 1328 */ 1329 if (page == MII_MARVELL_FIBER_PAGE) 1330 fiber = 1; 1331 else 1332 fiber = 0; 1333 1334 err = marvell_update_link(phydev, fiber); 1335 if (err) 1336 return err; 1337 1338 if (phydev->autoneg == AUTONEG_ENABLE) 1339 err = marvell_read_status_page_an(phydev, fiber); 1340 else 1341 err = marvell_read_status_page_fixed(phydev); 1342 1343 return err; 1344 } 1345 1346 /* marvell_read_status 1347 * 1348 * Some Marvell's phys have two modes: fiber and copper. 1349 * Both need status checked. 1350 * Description: 1351 * First, check the fiber link and status. 1352 * If the fiber link is down, check the copper link and status which 1353 * will be the default value if both link are down. 1354 */ 1355 static int marvell_read_status(struct phy_device *phydev) 1356 { 1357 int err; 1358 1359 /* Check the fiber mode first */ 1360 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1361 phydev->supported) && 1362 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1363 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1364 if (err < 0) 1365 goto error; 1366 1367 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1368 if (err < 0) 1369 goto error; 1370 1371 /* If the fiber link is up, it is the selected and 1372 * used link. In this case, we need to stay in the 1373 * fiber page. Please to be careful about that, avoid 1374 * to restore Copper page in other functions which 1375 * could break the behaviour for some fiber phy like 1376 * 88E1512. 1377 */ 1378 if (phydev->link) 1379 return 0; 1380 1381 /* If fiber link is down, check and save copper mode state */ 1382 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1383 if (err < 0) 1384 goto error; 1385 } 1386 1387 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1388 1389 error: 1390 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1391 return err; 1392 } 1393 1394 /* marvell_suspend 1395 * 1396 * Some Marvell's phys have two modes: fiber and copper. 1397 * Both need to be suspended 1398 */ 1399 static int marvell_suspend(struct phy_device *phydev) 1400 { 1401 int err; 1402 1403 /* Suspend the fiber mode first */ 1404 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1405 phydev->supported)) { 1406 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1407 if (err < 0) 1408 goto error; 1409 1410 /* With the page set, use the generic suspend */ 1411 err = genphy_suspend(phydev); 1412 if (err < 0) 1413 goto error; 1414 1415 /* Then, the copper link */ 1416 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1417 if (err < 0) 1418 goto error; 1419 } 1420 1421 /* With the page set, use the generic suspend */ 1422 return genphy_suspend(phydev); 1423 1424 error: 1425 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1426 return err; 1427 } 1428 1429 /* marvell_resume 1430 * 1431 * Some Marvell's phys have two modes: fiber and copper. 1432 * Both need to be resumed 1433 */ 1434 static int marvell_resume(struct phy_device *phydev) 1435 { 1436 int err; 1437 1438 /* Resume the fiber mode first */ 1439 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1440 phydev->supported)) { 1441 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1442 if (err < 0) 1443 goto error; 1444 1445 /* With the page set, use the generic resume */ 1446 err = genphy_resume(phydev); 1447 if (err < 0) 1448 goto error; 1449 1450 /* Then, the copper link */ 1451 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1452 if (err < 0) 1453 goto error; 1454 } 1455 1456 /* With the page set, use the generic resume */ 1457 return genphy_resume(phydev); 1458 1459 error: 1460 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1461 return err; 1462 } 1463 1464 static int marvell_aneg_done(struct phy_device *phydev) 1465 { 1466 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1467 1468 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1469 } 1470 1471 static int m88e1121_did_interrupt(struct phy_device *phydev) 1472 { 1473 int imask; 1474 1475 imask = phy_read(phydev, MII_M1011_IEVENT); 1476 1477 if (imask & MII_M1011_IMASK_INIT) 1478 return 1; 1479 1480 return 0; 1481 } 1482 1483 static void m88e1318_get_wol(struct phy_device *phydev, 1484 struct ethtool_wolinfo *wol) 1485 { 1486 int oldpage, ret = 0; 1487 1488 wol->supported = WAKE_MAGIC; 1489 wol->wolopts = 0; 1490 1491 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1492 if (oldpage < 0) 1493 goto error; 1494 1495 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1496 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1497 wol->wolopts |= WAKE_MAGIC; 1498 1499 error: 1500 phy_restore_page(phydev, oldpage, ret); 1501 } 1502 1503 static int m88e1318_set_wol(struct phy_device *phydev, 1504 struct ethtool_wolinfo *wol) 1505 { 1506 int err = 0, oldpage; 1507 1508 oldpage = phy_save_page(phydev); 1509 if (oldpage < 0) 1510 goto error; 1511 1512 if (wol->wolopts & WAKE_MAGIC) { 1513 /* Explicitly switch to page 0x00, just to be sure */ 1514 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1515 if (err < 0) 1516 goto error; 1517 1518 /* If WOL event happened once, the LED[2] interrupt pin 1519 * will not be cleared unless we reading the interrupt status 1520 * register. If interrupts are in use, the normal interrupt 1521 * handling will clear the WOL event. Clear the WOL event 1522 * before enabling it if !phy_interrupt_is_valid() 1523 */ 1524 if (!phy_interrupt_is_valid(phydev)) 1525 __phy_read(phydev, MII_M1011_IEVENT); 1526 1527 /* Enable the WOL interrupt */ 1528 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1529 MII_88E1318S_PHY_CSIER_WOL_EIE); 1530 if (err < 0) 1531 goto error; 1532 1533 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1534 if (err < 0) 1535 goto error; 1536 1537 /* Setup LED[2] as interrupt pin (active low) */ 1538 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1539 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1540 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1541 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1542 if (err < 0) 1543 goto error; 1544 1545 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1546 if (err < 0) 1547 goto error; 1548 1549 /* Store the device address for the magic packet */ 1550 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1551 ((phydev->attached_dev->dev_addr[5] << 8) | 1552 phydev->attached_dev->dev_addr[4])); 1553 if (err < 0) 1554 goto error; 1555 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1556 ((phydev->attached_dev->dev_addr[3] << 8) | 1557 phydev->attached_dev->dev_addr[2])); 1558 if (err < 0) 1559 goto error; 1560 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1561 ((phydev->attached_dev->dev_addr[1] << 8) | 1562 phydev->attached_dev->dev_addr[0])); 1563 if (err < 0) 1564 goto error; 1565 1566 /* Clear WOL status and enable magic packet matching */ 1567 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1568 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1569 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1570 if (err < 0) 1571 goto error; 1572 } else { 1573 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1574 if (err < 0) 1575 goto error; 1576 1577 /* Clear WOL status and disable magic packet matching */ 1578 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1579 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1580 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1581 if (err < 0) 1582 goto error; 1583 } 1584 1585 error: 1586 return phy_restore_page(phydev, oldpage, err); 1587 } 1588 1589 static int marvell_get_sset_count(struct phy_device *phydev) 1590 { 1591 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1592 phydev->supported)) 1593 return ARRAY_SIZE(marvell_hw_stats); 1594 else 1595 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1596 } 1597 1598 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1599 { 1600 int count = marvell_get_sset_count(phydev); 1601 int i; 1602 1603 for (i = 0; i < count; i++) { 1604 strlcpy(data + i * ETH_GSTRING_LEN, 1605 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1606 } 1607 } 1608 1609 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1610 { 1611 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1612 struct marvell_priv *priv = phydev->priv; 1613 int val; 1614 u64 ret; 1615 1616 val = phy_read_paged(phydev, stat.page, stat.reg); 1617 if (val < 0) { 1618 ret = U64_MAX; 1619 } else { 1620 val = val & ((1 << stat.bits) - 1); 1621 priv->stats[i] += val; 1622 ret = priv->stats[i]; 1623 } 1624 1625 return ret; 1626 } 1627 1628 static void marvell_get_stats(struct phy_device *phydev, 1629 struct ethtool_stats *stats, u64 *data) 1630 { 1631 int count = marvell_get_sset_count(phydev); 1632 int i; 1633 1634 for (i = 0; i < count; i++) 1635 data[i] = marvell_get_stat(phydev, i); 1636 } 1637 1638 #ifdef CONFIG_HWMON 1639 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1640 { 1641 int oldpage; 1642 int ret = 0; 1643 int val; 1644 1645 *temp = 0; 1646 1647 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1648 if (oldpage < 0) 1649 goto error; 1650 1651 /* Enable temperature sensor */ 1652 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1653 if (ret < 0) 1654 goto error; 1655 1656 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1657 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1658 if (ret < 0) 1659 goto error; 1660 1661 /* Wait for temperature to stabilize */ 1662 usleep_range(10000, 12000); 1663 1664 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1665 if (val < 0) { 1666 ret = val; 1667 goto error; 1668 } 1669 1670 /* Disable temperature sensor */ 1671 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1672 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1673 if (ret < 0) 1674 goto error; 1675 1676 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1677 1678 error: 1679 return phy_restore_page(phydev, oldpage, ret); 1680 } 1681 1682 static int m88e1121_hwmon_read(struct device *dev, 1683 enum hwmon_sensor_types type, 1684 u32 attr, int channel, long *temp) 1685 { 1686 struct phy_device *phydev = dev_get_drvdata(dev); 1687 int err; 1688 1689 switch (attr) { 1690 case hwmon_temp_input: 1691 err = m88e1121_get_temp(phydev, temp); 1692 break; 1693 default: 1694 return -EOPNOTSUPP; 1695 } 1696 1697 return err; 1698 } 1699 1700 static umode_t m88e1121_hwmon_is_visible(const void *data, 1701 enum hwmon_sensor_types type, 1702 u32 attr, int channel) 1703 { 1704 if (type != hwmon_temp) 1705 return 0; 1706 1707 switch (attr) { 1708 case hwmon_temp_input: 1709 return 0444; 1710 default: 1711 return 0; 1712 } 1713 } 1714 1715 static u32 m88e1121_hwmon_chip_config[] = { 1716 HWMON_C_REGISTER_TZ, 1717 0 1718 }; 1719 1720 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1721 .type = hwmon_chip, 1722 .config = m88e1121_hwmon_chip_config, 1723 }; 1724 1725 static u32 m88e1121_hwmon_temp_config[] = { 1726 HWMON_T_INPUT, 1727 0 1728 }; 1729 1730 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1731 .type = hwmon_temp, 1732 .config = m88e1121_hwmon_temp_config, 1733 }; 1734 1735 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1736 &m88e1121_hwmon_chip, 1737 &m88e1121_hwmon_temp, 1738 NULL 1739 }; 1740 1741 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1742 .is_visible = m88e1121_hwmon_is_visible, 1743 .read = m88e1121_hwmon_read, 1744 }; 1745 1746 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1747 .ops = &m88e1121_hwmon_hwmon_ops, 1748 .info = m88e1121_hwmon_info, 1749 }; 1750 1751 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1752 { 1753 int ret; 1754 1755 *temp = 0; 1756 1757 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1758 MII_88E1510_TEMP_SENSOR); 1759 if (ret < 0) 1760 return ret; 1761 1762 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1763 1764 return 0; 1765 } 1766 1767 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1768 { 1769 int ret; 1770 1771 *temp = 0; 1772 1773 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1774 MII_88E1121_MISC_TEST); 1775 if (ret < 0) 1776 return ret; 1777 1778 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1779 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1780 /* convert to mC */ 1781 *temp *= 1000; 1782 1783 return 0; 1784 } 1785 1786 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1787 { 1788 temp = temp / 1000; 1789 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1790 1791 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1792 MII_88E1121_MISC_TEST, 1793 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1794 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1795 } 1796 1797 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1798 { 1799 int ret; 1800 1801 *alarm = false; 1802 1803 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1804 MII_88E1121_MISC_TEST); 1805 if (ret < 0) 1806 return ret; 1807 1808 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1809 1810 return 0; 1811 } 1812 1813 static int m88e1510_hwmon_read(struct device *dev, 1814 enum hwmon_sensor_types type, 1815 u32 attr, int channel, long *temp) 1816 { 1817 struct phy_device *phydev = dev_get_drvdata(dev); 1818 int err; 1819 1820 switch (attr) { 1821 case hwmon_temp_input: 1822 err = m88e1510_get_temp(phydev, temp); 1823 break; 1824 case hwmon_temp_crit: 1825 err = m88e1510_get_temp_critical(phydev, temp); 1826 break; 1827 case hwmon_temp_max_alarm: 1828 err = m88e1510_get_temp_alarm(phydev, temp); 1829 break; 1830 default: 1831 return -EOPNOTSUPP; 1832 } 1833 1834 return err; 1835 } 1836 1837 static int m88e1510_hwmon_write(struct device *dev, 1838 enum hwmon_sensor_types type, 1839 u32 attr, int channel, long temp) 1840 { 1841 struct phy_device *phydev = dev_get_drvdata(dev); 1842 int err; 1843 1844 switch (attr) { 1845 case hwmon_temp_crit: 1846 err = m88e1510_set_temp_critical(phydev, temp); 1847 break; 1848 default: 1849 return -EOPNOTSUPP; 1850 } 1851 return err; 1852 } 1853 1854 static umode_t m88e1510_hwmon_is_visible(const void *data, 1855 enum hwmon_sensor_types type, 1856 u32 attr, int channel) 1857 { 1858 if (type != hwmon_temp) 1859 return 0; 1860 1861 switch (attr) { 1862 case hwmon_temp_input: 1863 case hwmon_temp_max_alarm: 1864 return 0444; 1865 case hwmon_temp_crit: 1866 return 0644; 1867 default: 1868 return 0; 1869 } 1870 } 1871 1872 static u32 m88e1510_hwmon_temp_config[] = { 1873 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1874 0 1875 }; 1876 1877 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1878 .type = hwmon_temp, 1879 .config = m88e1510_hwmon_temp_config, 1880 }; 1881 1882 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1883 &m88e1121_hwmon_chip, 1884 &m88e1510_hwmon_temp, 1885 NULL 1886 }; 1887 1888 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1889 .is_visible = m88e1510_hwmon_is_visible, 1890 .read = m88e1510_hwmon_read, 1891 .write = m88e1510_hwmon_write, 1892 }; 1893 1894 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1895 .ops = &m88e1510_hwmon_hwmon_ops, 1896 .info = m88e1510_hwmon_info, 1897 }; 1898 1899 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 1900 { 1901 int sum = 0; 1902 int oldpage; 1903 int ret = 0; 1904 int i; 1905 1906 *temp = 0; 1907 1908 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1909 if (oldpage < 0) 1910 goto error; 1911 1912 /* Enable temperature sensor */ 1913 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1914 if (ret < 0) 1915 goto error; 1916 1917 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1918 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 1919 MII_88E6390_MISC_TEST_SAMPLE_1S; 1920 1921 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1922 if (ret < 0) 1923 goto error; 1924 1925 /* Wait for temperature to stabilize */ 1926 usleep_range(10000, 12000); 1927 1928 /* Reading the temperature sense has an errata. You need to read 1929 * a number of times and take an average. 1930 */ 1931 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 1932 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 1933 if (ret < 0) 1934 goto error; 1935 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 1936 } 1937 1938 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 1939 *temp = (sum - 75) * 1000; 1940 1941 /* Disable temperature sensor */ 1942 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1943 if (ret < 0) 1944 goto error; 1945 1946 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1947 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 1948 1949 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1950 1951 error: 1952 phy_restore_page(phydev, oldpage, ret); 1953 1954 return ret; 1955 } 1956 1957 static int m88e6390_hwmon_read(struct device *dev, 1958 enum hwmon_sensor_types type, 1959 u32 attr, int channel, long *temp) 1960 { 1961 struct phy_device *phydev = dev_get_drvdata(dev); 1962 int err; 1963 1964 switch (attr) { 1965 case hwmon_temp_input: 1966 err = m88e6390_get_temp(phydev, temp); 1967 break; 1968 default: 1969 return -EOPNOTSUPP; 1970 } 1971 1972 return err; 1973 } 1974 1975 static umode_t m88e6390_hwmon_is_visible(const void *data, 1976 enum hwmon_sensor_types type, 1977 u32 attr, int channel) 1978 { 1979 if (type != hwmon_temp) 1980 return 0; 1981 1982 switch (attr) { 1983 case hwmon_temp_input: 1984 return 0444; 1985 default: 1986 return 0; 1987 } 1988 } 1989 1990 static u32 m88e6390_hwmon_temp_config[] = { 1991 HWMON_T_INPUT, 1992 0 1993 }; 1994 1995 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 1996 .type = hwmon_temp, 1997 .config = m88e6390_hwmon_temp_config, 1998 }; 1999 2000 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 2001 &m88e1121_hwmon_chip, 2002 &m88e6390_hwmon_temp, 2003 NULL 2004 }; 2005 2006 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 2007 .is_visible = m88e6390_hwmon_is_visible, 2008 .read = m88e6390_hwmon_read, 2009 }; 2010 2011 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 2012 .ops = &m88e6390_hwmon_hwmon_ops, 2013 .info = m88e6390_hwmon_info, 2014 }; 2015 2016 static int marvell_hwmon_name(struct phy_device *phydev) 2017 { 2018 struct marvell_priv *priv = phydev->priv; 2019 struct device *dev = &phydev->mdio.dev; 2020 const char *devname = dev_name(dev); 2021 size_t len = strlen(devname); 2022 int i, j; 2023 2024 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 2025 if (!priv->hwmon_name) 2026 return -ENOMEM; 2027 2028 for (i = j = 0; i < len && devname[i]; i++) { 2029 if (isalnum(devname[i])) 2030 priv->hwmon_name[j++] = devname[i]; 2031 } 2032 2033 return 0; 2034 } 2035 2036 static int marvell_hwmon_probe(struct phy_device *phydev, 2037 const struct hwmon_chip_info *chip) 2038 { 2039 struct marvell_priv *priv = phydev->priv; 2040 struct device *dev = &phydev->mdio.dev; 2041 int err; 2042 2043 err = marvell_hwmon_name(phydev); 2044 if (err) 2045 return err; 2046 2047 priv->hwmon_dev = devm_hwmon_device_register_with_info( 2048 dev, priv->hwmon_name, phydev, chip, NULL); 2049 2050 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 2051 } 2052 2053 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2054 { 2055 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 2056 } 2057 2058 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2059 { 2060 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 2061 } 2062 2063 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2064 { 2065 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 2066 } 2067 #else 2068 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2069 { 2070 return 0; 2071 } 2072 2073 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2074 { 2075 return 0; 2076 } 2077 2078 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2079 { 2080 return 0; 2081 } 2082 #endif 2083 2084 static int marvell_probe(struct phy_device *phydev) 2085 { 2086 struct marvell_priv *priv; 2087 2088 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 2089 if (!priv) 2090 return -ENOMEM; 2091 2092 phydev->priv = priv; 2093 2094 return 0; 2095 } 2096 2097 static int m88e1121_probe(struct phy_device *phydev) 2098 { 2099 int err; 2100 2101 err = marvell_probe(phydev); 2102 if (err) 2103 return err; 2104 2105 return m88e1121_hwmon_probe(phydev); 2106 } 2107 2108 static int m88e1510_probe(struct phy_device *phydev) 2109 { 2110 int err; 2111 2112 err = marvell_probe(phydev); 2113 if (err) 2114 return err; 2115 2116 return m88e1510_hwmon_probe(phydev); 2117 } 2118 2119 static int m88e6390_probe(struct phy_device *phydev) 2120 { 2121 int err; 2122 2123 err = marvell_probe(phydev); 2124 if (err) 2125 return err; 2126 2127 return m88e6390_hwmon_probe(phydev); 2128 } 2129 2130 static struct phy_driver marvell_drivers[] = { 2131 { 2132 .phy_id = MARVELL_PHY_ID_88E1101, 2133 .phy_id_mask = MARVELL_PHY_ID_MASK, 2134 .name = "Marvell 88E1101", 2135 /* PHY_GBIT_FEATURES */ 2136 .probe = marvell_probe, 2137 .config_init = &marvell_config_init, 2138 .config_aneg = &m88e1101_config_aneg, 2139 .ack_interrupt = &marvell_ack_interrupt, 2140 .config_intr = &marvell_config_intr, 2141 .resume = &genphy_resume, 2142 .suspend = &genphy_suspend, 2143 .read_page = marvell_read_page, 2144 .write_page = marvell_write_page, 2145 .get_sset_count = marvell_get_sset_count, 2146 .get_strings = marvell_get_strings, 2147 .get_stats = marvell_get_stats, 2148 }, 2149 { 2150 .phy_id = MARVELL_PHY_ID_88E1112, 2151 .phy_id_mask = MARVELL_PHY_ID_MASK, 2152 .name = "Marvell 88E1112", 2153 /* PHY_GBIT_FEATURES */ 2154 .probe = marvell_probe, 2155 .config_init = &m88e1111_config_init, 2156 .config_aneg = &marvell_config_aneg, 2157 .ack_interrupt = &marvell_ack_interrupt, 2158 .config_intr = &marvell_config_intr, 2159 .resume = &genphy_resume, 2160 .suspend = &genphy_suspend, 2161 .read_page = marvell_read_page, 2162 .write_page = marvell_write_page, 2163 .get_sset_count = marvell_get_sset_count, 2164 .get_strings = marvell_get_strings, 2165 .get_stats = marvell_get_stats, 2166 }, 2167 { 2168 .phy_id = MARVELL_PHY_ID_88E1111, 2169 .phy_id_mask = MARVELL_PHY_ID_MASK, 2170 .name = "Marvell 88E1111", 2171 /* PHY_GBIT_FEATURES */ 2172 .probe = marvell_probe, 2173 .config_init = &m88e1111_config_init, 2174 .config_aneg = &marvell_config_aneg, 2175 .read_status = &marvell_read_status, 2176 .ack_interrupt = &marvell_ack_interrupt, 2177 .config_intr = &marvell_config_intr, 2178 .resume = &genphy_resume, 2179 .suspend = &genphy_suspend, 2180 .read_page = marvell_read_page, 2181 .write_page = marvell_write_page, 2182 .get_sset_count = marvell_get_sset_count, 2183 .get_strings = marvell_get_strings, 2184 .get_stats = marvell_get_stats, 2185 }, 2186 { 2187 .phy_id = MARVELL_PHY_ID_88E1118, 2188 .phy_id_mask = MARVELL_PHY_ID_MASK, 2189 .name = "Marvell 88E1118", 2190 /* PHY_GBIT_FEATURES */ 2191 .probe = marvell_probe, 2192 .config_init = &m88e1118_config_init, 2193 .config_aneg = &m88e1118_config_aneg, 2194 .ack_interrupt = &marvell_ack_interrupt, 2195 .config_intr = &marvell_config_intr, 2196 .resume = &genphy_resume, 2197 .suspend = &genphy_suspend, 2198 .read_page = marvell_read_page, 2199 .write_page = marvell_write_page, 2200 .get_sset_count = marvell_get_sset_count, 2201 .get_strings = marvell_get_strings, 2202 .get_stats = marvell_get_stats, 2203 }, 2204 { 2205 .phy_id = MARVELL_PHY_ID_88E1121R, 2206 .phy_id_mask = MARVELL_PHY_ID_MASK, 2207 .name = "Marvell 88E1121R", 2208 /* PHY_GBIT_FEATURES */ 2209 .probe = &m88e1121_probe, 2210 .config_init = &marvell_config_init, 2211 .config_aneg = &m88e1121_config_aneg, 2212 .read_status = &marvell_read_status, 2213 .ack_interrupt = &marvell_ack_interrupt, 2214 .config_intr = &marvell_config_intr, 2215 .did_interrupt = &m88e1121_did_interrupt, 2216 .resume = &genphy_resume, 2217 .suspend = &genphy_suspend, 2218 .read_page = marvell_read_page, 2219 .write_page = marvell_write_page, 2220 .get_sset_count = marvell_get_sset_count, 2221 .get_strings = marvell_get_strings, 2222 .get_stats = marvell_get_stats, 2223 }, 2224 { 2225 .phy_id = MARVELL_PHY_ID_88E1318S, 2226 .phy_id_mask = MARVELL_PHY_ID_MASK, 2227 .name = "Marvell 88E1318S", 2228 /* PHY_GBIT_FEATURES */ 2229 .probe = marvell_probe, 2230 .config_init = &m88e1318_config_init, 2231 .config_aneg = &m88e1318_config_aneg, 2232 .read_status = &marvell_read_status, 2233 .ack_interrupt = &marvell_ack_interrupt, 2234 .config_intr = &marvell_config_intr, 2235 .did_interrupt = &m88e1121_did_interrupt, 2236 .get_wol = &m88e1318_get_wol, 2237 .set_wol = &m88e1318_set_wol, 2238 .resume = &genphy_resume, 2239 .suspend = &genphy_suspend, 2240 .read_page = marvell_read_page, 2241 .write_page = marvell_write_page, 2242 .get_sset_count = marvell_get_sset_count, 2243 .get_strings = marvell_get_strings, 2244 .get_stats = marvell_get_stats, 2245 }, 2246 { 2247 .phy_id = MARVELL_PHY_ID_88E1145, 2248 .phy_id_mask = MARVELL_PHY_ID_MASK, 2249 .name = "Marvell 88E1145", 2250 /* PHY_GBIT_FEATURES */ 2251 .probe = marvell_probe, 2252 .config_init = &m88e1145_config_init, 2253 .config_aneg = &m88e1101_config_aneg, 2254 .read_status = &genphy_read_status, 2255 .ack_interrupt = &marvell_ack_interrupt, 2256 .config_intr = &marvell_config_intr, 2257 .resume = &genphy_resume, 2258 .suspend = &genphy_suspend, 2259 .read_page = marvell_read_page, 2260 .write_page = marvell_write_page, 2261 .get_sset_count = marvell_get_sset_count, 2262 .get_strings = marvell_get_strings, 2263 .get_stats = marvell_get_stats, 2264 }, 2265 { 2266 .phy_id = MARVELL_PHY_ID_88E1149R, 2267 .phy_id_mask = MARVELL_PHY_ID_MASK, 2268 .name = "Marvell 88E1149R", 2269 /* PHY_GBIT_FEATURES */ 2270 .probe = marvell_probe, 2271 .config_init = &m88e1149_config_init, 2272 .config_aneg = &m88e1118_config_aneg, 2273 .ack_interrupt = &marvell_ack_interrupt, 2274 .config_intr = &marvell_config_intr, 2275 .resume = &genphy_resume, 2276 .suspend = &genphy_suspend, 2277 .read_page = marvell_read_page, 2278 .write_page = marvell_write_page, 2279 .get_sset_count = marvell_get_sset_count, 2280 .get_strings = marvell_get_strings, 2281 .get_stats = marvell_get_stats, 2282 }, 2283 { 2284 .phy_id = MARVELL_PHY_ID_88E1240, 2285 .phy_id_mask = MARVELL_PHY_ID_MASK, 2286 .name = "Marvell 88E1240", 2287 /* PHY_GBIT_FEATURES */ 2288 .probe = marvell_probe, 2289 .config_init = &m88e1111_config_init, 2290 .config_aneg = &marvell_config_aneg, 2291 .ack_interrupt = &marvell_ack_interrupt, 2292 .config_intr = &marvell_config_intr, 2293 .resume = &genphy_resume, 2294 .suspend = &genphy_suspend, 2295 .read_page = marvell_read_page, 2296 .write_page = marvell_write_page, 2297 .get_sset_count = marvell_get_sset_count, 2298 .get_strings = marvell_get_strings, 2299 .get_stats = marvell_get_stats, 2300 }, 2301 { 2302 .phy_id = MARVELL_PHY_ID_88E1116R, 2303 .phy_id_mask = MARVELL_PHY_ID_MASK, 2304 .name = "Marvell 88E1116R", 2305 /* PHY_GBIT_FEATURES */ 2306 .probe = marvell_probe, 2307 .config_init = &m88e1116r_config_init, 2308 .ack_interrupt = &marvell_ack_interrupt, 2309 .config_intr = &marvell_config_intr, 2310 .resume = &genphy_resume, 2311 .suspend = &genphy_suspend, 2312 .read_page = marvell_read_page, 2313 .write_page = marvell_write_page, 2314 .get_sset_count = marvell_get_sset_count, 2315 .get_strings = marvell_get_strings, 2316 .get_stats = marvell_get_stats, 2317 }, 2318 { 2319 .phy_id = MARVELL_PHY_ID_88E1510, 2320 .phy_id_mask = MARVELL_PHY_ID_MASK, 2321 .name = "Marvell 88E1510", 2322 .features = PHY_GBIT_FIBRE_FEATURES, 2323 .probe = &m88e1510_probe, 2324 .config_init = &m88e1510_config_init, 2325 .config_aneg = &m88e1510_config_aneg, 2326 .read_status = &marvell_read_status, 2327 .ack_interrupt = &marvell_ack_interrupt, 2328 .config_intr = &marvell_config_intr, 2329 .did_interrupt = &m88e1121_did_interrupt, 2330 .get_wol = &m88e1318_get_wol, 2331 .set_wol = &m88e1318_set_wol, 2332 .resume = &marvell_resume, 2333 .suspend = &marvell_suspend, 2334 .read_page = marvell_read_page, 2335 .write_page = marvell_write_page, 2336 .get_sset_count = marvell_get_sset_count, 2337 .get_strings = marvell_get_strings, 2338 .get_stats = marvell_get_stats, 2339 .set_loopback = genphy_loopback, 2340 }, 2341 { 2342 .phy_id = MARVELL_PHY_ID_88E1540, 2343 .phy_id_mask = MARVELL_PHY_ID_MASK, 2344 .name = "Marvell 88E1540", 2345 /* PHY_GBIT_FEATURES */ 2346 .probe = m88e1510_probe, 2347 .config_init = &marvell_config_init, 2348 .config_aneg = &m88e1510_config_aneg, 2349 .read_status = &marvell_read_status, 2350 .ack_interrupt = &marvell_ack_interrupt, 2351 .config_intr = &marvell_config_intr, 2352 .did_interrupt = &m88e1121_did_interrupt, 2353 .resume = &genphy_resume, 2354 .suspend = &genphy_suspend, 2355 .read_page = marvell_read_page, 2356 .write_page = marvell_write_page, 2357 .get_sset_count = marvell_get_sset_count, 2358 .get_strings = marvell_get_strings, 2359 .get_stats = marvell_get_stats, 2360 .get_tunable = m88e1540_get_tunable, 2361 .set_tunable = m88e1540_set_tunable, 2362 }, 2363 { 2364 .phy_id = MARVELL_PHY_ID_88E1545, 2365 .phy_id_mask = MARVELL_PHY_ID_MASK, 2366 .name = "Marvell 88E1545", 2367 .probe = m88e1510_probe, 2368 /* PHY_GBIT_FEATURES */ 2369 .config_init = &marvell_config_init, 2370 .config_aneg = &m88e1510_config_aneg, 2371 .read_status = &marvell_read_status, 2372 .ack_interrupt = &marvell_ack_interrupt, 2373 .config_intr = &marvell_config_intr, 2374 .did_interrupt = &m88e1121_did_interrupt, 2375 .resume = &genphy_resume, 2376 .suspend = &genphy_suspend, 2377 .read_page = marvell_read_page, 2378 .write_page = marvell_write_page, 2379 .get_sset_count = marvell_get_sset_count, 2380 .get_strings = marvell_get_strings, 2381 .get_stats = marvell_get_stats, 2382 }, 2383 { 2384 .phy_id = MARVELL_PHY_ID_88E3016, 2385 .phy_id_mask = MARVELL_PHY_ID_MASK, 2386 .name = "Marvell 88E3016", 2387 /* PHY_BASIC_FEATURES */ 2388 .probe = marvell_probe, 2389 .config_init = &m88e3016_config_init, 2390 .aneg_done = &marvell_aneg_done, 2391 .read_status = &marvell_read_status, 2392 .ack_interrupt = &marvell_ack_interrupt, 2393 .config_intr = &marvell_config_intr, 2394 .did_interrupt = &m88e1121_did_interrupt, 2395 .resume = &genphy_resume, 2396 .suspend = &genphy_suspend, 2397 .read_page = marvell_read_page, 2398 .write_page = marvell_write_page, 2399 .get_sset_count = marvell_get_sset_count, 2400 .get_strings = marvell_get_strings, 2401 .get_stats = marvell_get_stats, 2402 }, 2403 { 2404 .phy_id = MARVELL_PHY_ID_88E6390, 2405 .phy_id_mask = MARVELL_PHY_ID_MASK, 2406 .name = "Marvell 88E6390", 2407 /* PHY_GBIT_FEATURES */ 2408 .probe = m88e6390_probe, 2409 .config_init = &marvell_config_init, 2410 .config_aneg = &m88e6390_config_aneg, 2411 .read_status = &marvell_read_status, 2412 .ack_interrupt = &marvell_ack_interrupt, 2413 .config_intr = &marvell_config_intr, 2414 .did_interrupt = &m88e1121_did_interrupt, 2415 .resume = &genphy_resume, 2416 .suspend = &genphy_suspend, 2417 .read_page = marvell_read_page, 2418 .write_page = marvell_write_page, 2419 .get_sset_count = marvell_get_sset_count, 2420 .get_strings = marvell_get_strings, 2421 .get_stats = marvell_get_stats, 2422 .get_tunable = m88e1540_get_tunable, 2423 .set_tunable = m88e1540_set_tunable, 2424 }, 2425 }; 2426 2427 module_phy_driver(marvell_drivers); 2428 2429 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2430 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2431 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2432 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2433 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2434 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2435 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2436 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2437 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2438 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2439 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2440 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2441 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2442 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2443 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2444 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2445 { } 2446 }; 2447 2448 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2449