xref: /openbmc/linux/drivers/net/phy/marvell.c (revision 710b797c)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * drivers/net/phy/marvell.c
4  *
5  * Driver for Marvell PHYs
6  *
7  * Author: Andy Fleming
8  *
9  * Copyright (c) 2004 Freescale Semiconductor, Inc.
10  *
11  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12  */
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
26 #include <linux/mm.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/ethtool_netlink.h>
31 #include <linux/phy.h>
32 #include <linux/marvell_phy.h>
33 #include <linux/bitfield.h>
34 #include <linux/of.h>
35 
36 #include <linux/io.h>
37 #include <asm/irq.h>
38 #include <linux/uaccess.h>
39 
40 #define MII_MARVELL_PHY_PAGE		22
41 #define MII_MARVELL_COPPER_PAGE		0x00
42 #define MII_MARVELL_FIBER_PAGE		0x01
43 #define MII_MARVELL_MSCR_PAGE		0x02
44 #define MII_MARVELL_LED_PAGE		0x03
45 #define MII_MARVELL_VCT5_PAGE		0x05
46 #define MII_MARVELL_MISC_TEST_PAGE	0x06
47 #define MII_MARVELL_VCT7_PAGE		0x07
48 #define MII_MARVELL_WOL_PAGE		0x11
49 
50 #define MII_M1011_IEVENT		0x13
51 #define MII_M1011_IEVENT_CLEAR		0x0000
52 
53 #define MII_M1011_IMASK			0x12
54 #define MII_M1011_IMASK_INIT		0x6400
55 #define MII_M1011_IMASK_CLEAR		0x0000
56 
57 #define MII_M1011_PHY_SCR			0x10
58 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN		BIT(11)
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK	GENMASK(14, 12)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX		8
61 #define MII_M1011_PHY_SCR_MDI			(0x0 << 5)
62 #define MII_M1011_PHY_SCR_MDI_X			(0x1 << 5)
63 #define MII_M1011_PHY_SCR_AUTO_CROSS		(0x3 << 5)
64 
65 #define MII_M1011_PHY_SSR			0x11
66 #define MII_M1011_PHY_SSR_DOWNSHIFT		BIT(5)
67 
68 #define MII_M1111_PHY_LED_CONTROL	0x18
69 #define MII_M1111_PHY_LED_DIRECT	0x4100
70 #define MII_M1111_PHY_LED_COMBINE	0x411c
71 #define MII_M1111_PHY_EXT_CR		0x14
72 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK	GENMASK(11, 9)
73 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX	8
74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN	BIT(8)
75 #define MII_M1111_RGMII_RX_DELAY	BIT(7)
76 #define MII_M1111_RGMII_TX_DELAY	BIT(1)
77 #define MII_M1111_PHY_EXT_SR		0x1b
78 
79 #define MII_M1111_HWCFG_MODE_MASK		0xf
80 #define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
81 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
82 #define MII_M1111_HWCFG_MODE_RTBI		0x7
83 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN	0x8
84 #define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
85 #define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
86 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN	0xc
87 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS	BIT(12)
88 #define MII_M1111_HWCFG_FIBER_COPPER_RES	BIT(13)
89 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO	BIT(15)
90 
91 #define MII_88E1121_PHY_MSCR_REG	21
92 #define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
93 #define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
94 #define MII_88E1121_PHY_MSCR_DELAY_MASK	(BIT(5) | BIT(4))
95 
96 #define MII_88E1121_MISC_TEST				0x1a
97 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
98 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
99 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
100 #define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
101 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
102 #define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f
103 
104 #define MII_88E1510_TEMP_SENSOR		0x1b
105 #define MII_88E1510_TEMP_SENSOR_MASK	0xff
106 
107 #define MII_88E1540_COPPER_CTRL3	0x1a
108 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK	GENMASK(11, 10)
109 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS	0
110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS	1
111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS	2
112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS	3
113 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN		BIT(9)
114 
115 #define MII_88E6390_MISC_TEST		0x1b
116 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S	(0x0 << 14)
117 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE		(0x1 << 14)
118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT	(0x2 << 14)
119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE		(0x3 << 14)
120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK			(0x3 << 14)
121 #define MII_88E6393_MISC_TEST_SAMPLES_2048	(0x0 << 11)
122 #define MII_88E6393_MISC_TEST_SAMPLES_4096	(0x1 << 11)
123 #define MII_88E6393_MISC_TEST_SAMPLES_8192	(0x2 << 11)
124 #define MII_88E6393_MISC_TEST_SAMPLES_16384	(0x3 << 11)
125 #define MII_88E6393_MISC_TEST_SAMPLES_MASK	(0x3 << 11)
126 #define MII_88E6393_MISC_TEST_RATE_2_3MS	(0x5 << 8)
127 #define MII_88E6393_MISC_TEST_RATE_6_4MS	(0x6 << 8)
128 #define MII_88E6393_MISC_TEST_RATE_11_9MS	(0x7 << 8)
129 #define MII_88E6393_MISC_TEST_RATE_MASK		(0x7 << 8)
130 
131 #define MII_88E6390_TEMP_SENSOR		0x1c
132 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK	0xff00
133 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT	8
134 #define MII_88E6390_TEMP_SENSOR_MASK		0xff
135 #define MII_88E6390_TEMP_SENSOR_SAMPLES		10
136 
137 #define MII_88E1318S_PHY_MSCR1_REG	16
138 #define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
139 
140 /* Copper Specific Interrupt Enable Register */
141 #define MII_88E1318S_PHY_CSIER				0x12
142 /* WOL Event Interrupt Enable */
143 #define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
144 
145 /* LED Timer Control Register */
146 #define MII_88E1318S_PHY_LED_TCR			0x12
147 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT		BIT(15)
148 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE		BIT(7)
149 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW		BIT(11)
150 
151 /* Magic Packet MAC address registers */
152 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2		0x17
153 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1		0x18
154 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0		0x19
155 
156 #define MII_88E1318S_PHY_WOL_CTRL				0x10
157 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS		BIT(12)
158 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE	BIT(14)
159 
160 #define MII_PHY_LED_CTRL	        16
161 #define MII_88E1121_PHY_LED_DEF		0x0030
162 #define MII_88E1510_PHY_LED_DEF		0x1177
163 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE	0x1040
164 
165 #define MII_M1011_PHY_STATUS		0x11
166 #define MII_M1011_PHY_STATUS_1000	0x8000
167 #define MII_M1011_PHY_STATUS_100	0x4000
168 #define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
169 #define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
170 #define MII_M1011_PHY_STATUS_RESOLVED	0x0800
171 #define MII_M1011_PHY_STATUS_LINK	0x0400
172 
173 #define MII_88E3016_PHY_SPEC_CTRL	0x10
174 #define MII_88E3016_DISABLE_SCRAMBLER	0x0200
175 #define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
176 
177 #define MII_88E1510_GEN_CTRL_REG_1		0x14
178 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
179 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
180 #define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */
181 
182 #define MII_VCT5_TX_RX_MDI0_COUPLING	0x10
183 #define MII_VCT5_TX_RX_MDI1_COUPLING	0x11
184 #define MII_VCT5_TX_RX_MDI2_COUPLING	0x12
185 #define MII_VCT5_TX_RX_MDI3_COUPLING	0x13
186 #define MII_VCT5_TX_RX_AMPLITUDE_MASK	0x7f00
187 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT	8
188 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION	BIT(15)
189 
190 #define MII_VCT5_CTRL				0x17
191 #define MII_VCT5_CTRL_ENABLE				BIT(15)
192 #define MII_VCT5_CTRL_COMPLETE				BIT(14)
193 #define MII_VCT5_CTRL_TX_SAME_CHANNEL			(0x0 << 11)
194 #define MII_VCT5_CTRL_TX0_CHANNEL			(0x4 << 11)
195 #define MII_VCT5_CTRL_TX1_CHANNEL			(0x5 << 11)
196 #define MII_VCT5_CTRL_TX2_CHANNEL			(0x6 << 11)
197 #define MII_VCT5_CTRL_TX3_CHANNEL			(0x7 << 11)
198 #define MII_VCT5_CTRL_SAMPLES_2				(0x0 << 8)
199 #define MII_VCT5_CTRL_SAMPLES_4				(0x1 << 8)
200 #define MII_VCT5_CTRL_SAMPLES_8				(0x2 << 8)
201 #define MII_VCT5_CTRL_SAMPLES_16			(0x3 << 8)
202 #define MII_VCT5_CTRL_SAMPLES_32			(0x4 << 8)
203 #define MII_VCT5_CTRL_SAMPLES_64			(0x5 << 8)
204 #define MII_VCT5_CTRL_SAMPLES_128			(0x6 << 8)
205 #define MII_VCT5_CTRL_SAMPLES_DEFAULT			(0x6 << 8)
206 #define MII_VCT5_CTRL_SAMPLES_256			(0x7 << 8)
207 #define MII_VCT5_CTRL_SAMPLES_SHIFT			8
208 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK			(0x0 << 6)
209 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK		(0x1 << 6)
210 #define MII_VCT5_CTRL_MODE_OFFSET			(0x2 << 6)
211 #define MII_VCT5_CTRL_SAMPLE_POINT			(0x3 << 6)
212 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT			3
213 
214 #define MII_VCT5_SAMPLE_POINT_DISTANCE		0x18
215 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX	511
216 #define MII_VCT5_TX_PULSE_CTRL			0x1c
217 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN	BIT(12)
218 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS	(0x0 << 10)
219 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS		(0x1 << 10)
220 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS		(0x2 << 10)
221 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS		(0x3 << 10)
222 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT	10
223 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV	(0x0 << 8)
224 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV	(0x1 << 8)
225 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV	(0x2 << 8)
226 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV	(0x3 << 8)
227 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT	8
228 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP			BIT(7)
229 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV		(0x6 << 0)
230 
231 /* For TDR measurements less than 11 meters, a short pulse should be
232  * used.
233  */
234 #define TDR_SHORT_CABLE_LENGTH	11
235 
236 #define MII_VCT7_PAIR_0_DISTANCE	0x10
237 #define MII_VCT7_PAIR_1_DISTANCE	0x11
238 #define MII_VCT7_PAIR_2_DISTANCE	0x12
239 #define MII_VCT7_PAIR_3_DISTANCE	0x13
240 
241 #define MII_VCT7_RESULTS	0x14
242 #define MII_VCT7_RESULTS_PAIR3_MASK	0xf000
243 #define MII_VCT7_RESULTS_PAIR2_MASK	0x0f00
244 #define MII_VCT7_RESULTS_PAIR1_MASK	0x00f0
245 #define MII_VCT7_RESULTS_PAIR0_MASK	0x000f
246 #define MII_VCT7_RESULTS_PAIR3_SHIFT	12
247 #define MII_VCT7_RESULTS_PAIR2_SHIFT	8
248 #define MII_VCT7_RESULTS_PAIR1_SHIFT	4
249 #define MII_VCT7_RESULTS_PAIR0_SHIFT	0
250 #define MII_VCT7_RESULTS_INVALID	0
251 #define MII_VCT7_RESULTS_OK		1
252 #define MII_VCT7_RESULTS_OPEN		2
253 #define MII_VCT7_RESULTS_SAME_SHORT	3
254 #define MII_VCT7_RESULTS_CROSS_SHORT	4
255 #define MII_VCT7_RESULTS_BUSY		9
256 
257 #define MII_VCT7_CTRL		0x15
258 #define MII_VCT7_CTRL_RUN_NOW			BIT(15)
259 #define MII_VCT7_CTRL_RUN_ANEG			BIT(14)
260 #define MII_VCT7_CTRL_DISABLE_CROSS		BIT(13)
261 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK	BIT(12)
262 #define MII_VCT7_CTRL_IN_PROGRESS		BIT(11)
263 #define MII_VCT7_CTRL_METERS			BIT(10)
264 #define MII_VCT7_CTRL_CENTIMETERS		0
265 
266 #define LPA_PAUSE_FIBER		0x180
267 #define LPA_PAUSE_ASYM_FIBER	0x100
268 
269 #define NB_FIBER_STATS	1
270 
271 MODULE_DESCRIPTION("Marvell PHY driver");
272 MODULE_AUTHOR("Andy Fleming");
273 MODULE_LICENSE("GPL");
274 
275 struct marvell_hw_stat {
276 	const char *string;
277 	u8 page;
278 	u8 reg;
279 	u8 bits;
280 };
281 
282 static struct marvell_hw_stat marvell_hw_stats[] = {
283 	{ "phy_receive_errors_copper", 0, 21, 16},
284 	{ "phy_idle_errors", 0, 10, 8 },
285 	{ "phy_receive_errors_fiber", 1, 21, 16},
286 };
287 
288 struct marvell_priv {
289 	u64 stats[ARRAY_SIZE(marvell_hw_stats)];
290 	char *hwmon_name;
291 	struct device *hwmon_dev;
292 	bool cable_test_tdr;
293 	u32 first;
294 	u32 last;
295 	u32 step;
296 	s8 pair;
297 };
298 
299 static int marvell_read_page(struct phy_device *phydev)
300 {
301 	return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
302 }
303 
304 static int marvell_write_page(struct phy_device *phydev, int page)
305 {
306 	return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
307 }
308 
309 static int marvell_set_page(struct phy_device *phydev, int page)
310 {
311 	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
312 }
313 
314 static int marvell_ack_interrupt(struct phy_device *phydev)
315 {
316 	int err;
317 
318 	/* Clear the interrupts by reading the reg */
319 	err = phy_read(phydev, MII_M1011_IEVENT);
320 
321 	if (err < 0)
322 		return err;
323 
324 	return 0;
325 }
326 
327 static int marvell_config_intr(struct phy_device *phydev)
328 {
329 	int err;
330 
331 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
332 		err = marvell_ack_interrupt(phydev);
333 		if (err)
334 			return err;
335 
336 		err = phy_write(phydev, MII_M1011_IMASK,
337 				MII_M1011_IMASK_INIT);
338 	} else {
339 		err = phy_write(phydev, MII_M1011_IMASK,
340 				MII_M1011_IMASK_CLEAR);
341 		if (err)
342 			return err;
343 
344 		err = marvell_ack_interrupt(phydev);
345 	}
346 
347 	return err;
348 }
349 
350 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
351 {
352 	int irq_status;
353 
354 	irq_status = phy_read(phydev, MII_M1011_IEVENT);
355 	if (irq_status < 0) {
356 		phy_error(phydev);
357 		return IRQ_NONE;
358 	}
359 
360 	if (!(irq_status & MII_M1011_IMASK_INIT))
361 		return IRQ_NONE;
362 
363 	phy_trigger_machine(phydev);
364 
365 	return IRQ_HANDLED;
366 }
367 
368 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
369 {
370 	int reg;
371 	int err;
372 	int val;
373 
374 	/* get the current settings */
375 	reg = phy_read(phydev, MII_M1011_PHY_SCR);
376 	if (reg < 0)
377 		return reg;
378 
379 	val = reg;
380 	val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
381 	switch (polarity) {
382 	case ETH_TP_MDI:
383 		val |= MII_M1011_PHY_SCR_MDI;
384 		break;
385 	case ETH_TP_MDI_X:
386 		val |= MII_M1011_PHY_SCR_MDI_X;
387 		break;
388 	case ETH_TP_MDI_AUTO:
389 	case ETH_TP_MDI_INVALID:
390 	default:
391 		val |= MII_M1011_PHY_SCR_AUTO_CROSS;
392 		break;
393 	}
394 
395 	if (val != reg) {
396 		/* Set the new polarity value in the register */
397 		err = phy_write(phydev, MII_M1011_PHY_SCR, val);
398 		if (err)
399 			return err;
400 	}
401 
402 	return val != reg;
403 }
404 
405 static int marvell_config_aneg(struct phy_device *phydev)
406 {
407 	int changed = 0;
408 	int err;
409 
410 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
411 	if (err < 0)
412 		return err;
413 
414 	changed = err;
415 
416 	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
417 			MII_M1111_PHY_LED_DIRECT);
418 	if (err < 0)
419 		return err;
420 
421 	err = genphy_config_aneg(phydev);
422 	if (err < 0)
423 		return err;
424 
425 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
426 		/* A write to speed/duplex bits (that is performed by
427 		 * genphy_config_aneg() call above) must be followed by
428 		 * a software reset. Otherwise, the write has no effect.
429 		 */
430 		err = genphy_soft_reset(phydev);
431 		if (err < 0)
432 			return err;
433 	}
434 
435 	return 0;
436 }
437 
438 static int m88e1101_config_aneg(struct phy_device *phydev)
439 {
440 	int err;
441 
442 	/* This Marvell PHY has an errata which requires
443 	 * that certain registers get written in order
444 	 * to restart autonegotiation
445 	 */
446 	err = genphy_soft_reset(phydev);
447 	if (err < 0)
448 		return err;
449 
450 	err = phy_write(phydev, 0x1d, 0x1f);
451 	if (err < 0)
452 		return err;
453 
454 	err = phy_write(phydev, 0x1e, 0x200c);
455 	if (err < 0)
456 		return err;
457 
458 	err = phy_write(phydev, 0x1d, 0x5);
459 	if (err < 0)
460 		return err;
461 
462 	err = phy_write(phydev, 0x1e, 0);
463 	if (err < 0)
464 		return err;
465 
466 	err = phy_write(phydev, 0x1e, 0x100);
467 	if (err < 0)
468 		return err;
469 
470 	return marvell_config_aneg(phydev);
471 }
472 
473 #if IS_ENABLED(CONFIG_OF_MDIO)
474 /* Set and/or override some configuration registers based on the
475  * marvell,reg-init property stored in the of_node for the phydev.
476  *
477  * marvell,reg-init = <reg-page reg mask value>,...;
478  *
479  * There may be one or more sets of <reg-page reg mask value>:
480  *
481  * reg-page: which register bank to use.
482  * reg: the register.
483  * mask: if non-zero, ANDed with existing register value.
484  * value: ORed with the masked value and written to the regiser.
485  *
486  */
487 static int marvell_of_reg_init(struct phy_device *phydev)
488 {
489 	const __be32 *paddr;
490 	int len, i, saved_page, current_page, ret = 0;
491 
492 	if (!phydev->mdio.dev.of_node)
493 		return 0;
494 
495 	paddr = of_get_property(phydev->mdio.dev.of_node,
496 				"marvell,reg-init", &len);
497 	if (!paddr || len < (4 * sizeof(*paddr)))
498 		return 0;
499 
500 	saved_page = phy_save_page(phydev);
501 	if (saved_page < 0)
502 		goto err;
503 	current_page = saved_page;
504 
505 	len /= sizeof(*paddr);
506 	for (i = 0; i < len - 3; i += 4) {
507 		u16 page = be32_to_cpup(paddr + i);
508 		u16 reg = be32_to_cpup(paddr + i + 1);
509 		u16 mask = be32_to_cpup(paddr + i + 2);
510 		u16 val_bits = be32_to_cpup(paddr + i + 3);
511 		int val;
512 
513 		if (page != current_page) {
514 			current_page = page;
515 			ret = marvell_write_page(phydev, page);
516 			if (ret < 0)
517 				goto err;
518 		}
519 
520 		val = 0;
521 		if (mask) {
522 			val = __phy_read(phydev, reg);
523 			if (val < 0) {
524 				ret = val;
525 				goto err;
526 			}
527 			val &= mask;
528 		}
529 		val |= val_bits;
530 
531 		ret = __phy_write(phydev, reg, val);
532 		if (ret < 0)
533 			goto err;
534 	}
535 err:
536 	return phy_restore_page(phydev, saved_page, ret);
537 }
538 #else
539 static int marvell_of_reg_init(struct phy_device *phydev)
540 {
541 	return 0;
542 }
543 #endif /* CONFIG_OF_MDIO */
544 
545 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
546 {
547 	int mscr;
548 
549 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
550 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
551 		       MII_88E1121_PHY_MSCR_TX_DELAY;
552 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
553 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
554 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
555 		mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
556 	else
557 		mscr = 0;
558 
559 	return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
560 				MII_88E1121_PHY_MSCR_REG,
561 				MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
562 }
563 
564 static int m88e1121_config_aneg(struct phy_device *phydev)
565 {
566 	int changed = 0;
567 	int err = 0;
568 
569 	if (phy_interface_is_rgmii(phydev)) {
570 		err = m88e1121_config_aneg_rgmii_delays(phydev);
571 		if (err < 0)
572 			return err;
573 	}
574 
575 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
576 	if (err < 0)
577 		return err;
578 
579 	changed = err;
580 
581 	err = genphy_config_aneg(phydev);
582 	if (err < 0)
583 		return err;
584 
585 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
586 		/* A software reset is used to ensure a "commit" of the
587 		 * changes is done.
588 		 */
589 		err = genphy_soft_reset(phydev);
590 		if (err < 0)
591 			return err;
592 	}
593 
594 	return 0;
595 }
596 
597 static int m88e1318_config_aneg(struct phy_device *phydev)
598 {
599 	int err;
600 
601 	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
602 			       MII_88E1318S_PHY_MSCR1_REG,
603 			       0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
604 	if (err < 0)
605 		return err;
606 
607 	return m88e1121_config_aneg(phydev);
608 }
609 
610 /**
611  * linkmode_adv_to_fiber_adv_t
612  * @advertise: the linkmode advertisement settings
613  *
614  * A small helper function that translates linkmode advertisement
615  * settings to phy autonegotiation advertisements for the MII_ADV
616  * register for fiber link.
617  */
618 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
619 {
620 	u32 result = 0;
621 
622 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
623 		result |= ADVERTISE_1000XHALF;
624 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
625 		result |= ADVERTISE_1000XFULL;
626 
627 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
628 	    linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
629 		result |= ADVERTISE_1000XPSE_ASYM;
630 	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
631 		result |= ADVERTISE_1000XPAUSE;
632 
633 	return result;
634 }
635 
636 /**
637  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
638  * @phydev: target phy_device struct
639  *
640  * Description: If auto-negotiation is enabled, we configure the
641  *   advertising, and then restart auto-negotiation.  If it is not
642  *   enabled, then we write the BMCR. Adapted for fiber link in
643  *   some Marvell's devices.
644  */
645 static int marvell_config_aneg_fiber(struct phy_device *phydev)
646 {
647 	int changed = 0;
648 	int err;
649 	u16 adv;
650 
651 	if (phydev->autoneg != AUTONEG_ENABLE)
652 		return genphy_setup_forced(phydev);
653 
654 	/* Only allow advertising what this PHY supports */
655 	linkmode_and(phydev->advertising, phydev->advertising,
656 		     phydev->supported);
657 
658 	adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
659 
660 	/* Setup fiber advertisement */
661 	err = phy_modify_changed(phydev, MII_ADVERTISE,
662 				 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
663 				 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
664 				 adv);
665 	if (err < 0)
666 		return err;
667 	if (err > 0)
668 		changed = 1;
669 
670 	return genphy_check_and_restart_aneg(phydev, changed);
671 }
672 
673 static int m88e1111_config_aneg(struct phy_device *phydev)
674 {
675 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
676 	int err;
677 
678 	if (extsr < 0)
679 		return extsr;
680 
681 	/* If not using SGMII or copper 1000BaseX modes, use normal process.
682 	 * Steps below are only required for these modes.
683 	 */
684 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
685 	    (extsr & MII_M1111_HWCFG_MODE_MASK) !=
686 	    MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
687 		return marvell_config_aneg(phydev);
688 
689 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
690 	if (err < 0)
691 		goto error;
692 
693 	/* Configure the copper link first */
694 	err = marvell_config_aneg(phydev);
695 	if (err < 0)
696 		goto error;
697 
698 	/* Then the fiber link */
699 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
700 	if (err < 0)
701 		goto error;
702 
703 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
704 		/* Do not touch the fiber advertisement if we're in copper->sgmii mode.
705 		 * Just ensure that SGMII-side autonegotiation is enabled.
706 		 * If we switched from some other mode to SGMII it may not be.
707 		 */
708 		err = genphy_check_and_restart_aneg(phydev, false);
709 	else
710 		err = marvell_config_aneg_fiber(phydev);
711 	if (err < 0)
712 		goto error;
713 
714 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
715 
716 error:
717 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
718 	return err;
719 }
720 
721 static int m88e1510_config_aneg(struct phy_device *phydev)
722 {
723 	int err;
724 
725 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
726 	if (err < 0)
727 		goto error;
728 
729 	/* Configure the copper link first */
730 	err = m88e1318_config_aneg(phydev);
731 	if (err < 0)
732 		goto error;
733 
734 	/* Do not touch the fiber page if we're in copper->sgmii mode */
735 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
736 		return 0;
737 
738 	/* Then the fiber link */
739 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
740 	if (err < 0)
741 		goto error;
742 
743 	err = marvell_config_aneg_fiber(phydev);
744 	if (err < 0)
745 		goto error;
746 
747 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
748 
749 error:
750 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
751 	return err;
752 }
753 
754 static void marvell_config_led(struct phy_device *phydev)
755 {
756 	u16 def_config;
757 	int err;
758 
759 	switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
760 	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
761 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
762 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
763 		def_config = MII_88E1121_PHY_LED_DEF;
764 		break;
765 	/* Default PHY LED config:
766 	 * LED[0] .. 1000Mbps Link
767 	 * LED[1] .. 100Mbps Link
768 	 * LED[2] .. Blink, Activity
769 	 */
770 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
771 		if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
772 			def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
773 		else
774 			def_config = MII_88E1510_PHY_LED_DEF;
775 		break;
776 	default:
777 		return;
778 	}
779 
780 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
781 			      def_config);
782 	if (err < 0)
783 		phydev_warn(phydev, "Fail to config marvell phy LED.\n");
784 }
785 
786 static int marvell_config_init(struct phy_device *phydev)
787 {
788 	/* Set default LED */
789 	marvell_config_led(phydev);
790 
791 	/* Set registers from marvell,reg-init DT property */
792 	return marvell_of_reg_init(phydev);
793 }
794 
795 static int m88e3016_config_init(struct phy_device *phydev)
796 {
797 	int ret;
798 
799 	/* Enable Scrambler and Auto-Crossover */
800 	ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
801 			 MII_88E3016_DISABLE_SCRAMBLER,
802 			 MII_88E3016_AUTO_MDIX_CROSSOVER);
803 	if (ret < 0)
804 		return ret;
805 
806 	return marvell_config_init(phydev);
807 }
808 
809 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
810 					   u16 mode,
811 					   int fibre_copper_auto)
812 {
813 	if (fibre_copper_auto)
814 		mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
815 
816 	return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
817 			  MII_M1111_HWCFG_MODE_MASK |
818 			  MII_M1111_HWCFG_FIBER_COPPER_AUTO |
819 			  MII_M1111_HWCFG_FIBER_COPPER_RES,
820 			  mode);
821 }
822 
823 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
824 {
825 	int delay;
826 
827 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
828 		delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
829 	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
830 		delay = MII_M1111_RGMII_RX_DELAY;
831 	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
832 		delay = MII_M1111_RGMII_TX_DELAY;
833 	} else {
834 		delay = 0;
835 	}
836 
837 	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
838 			  MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
839 			  delay);
840 }
841 
842 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
843 {
844 	int temp;
845 	int err;
846 
847 	err = m88e1111_config_init_rgmii_delays(phydev);
848 	if (err < 0)
849 		return err;
850 
851 	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
852 	if (temp < 0)
853 		return temp;
854 
855 	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
856 
857 	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
858 		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
859 	else
860 		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
861 
862 	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
863 }
864 
865 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
866 {
867 	int err;
868 
869 	err = m88e1111_config_init_hwcfg_mode(
870 		phydev,
871 		MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
872 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
873 	if (err < 0)
874 		return err;
875 
876 	/* make sure copper is selected */
877 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
878 }
879 
880 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
881 {
882 	int err;
883 
884 	err = m88e1111_config_init_rgmii_delays(phydev);
885 	if (err < 0)
886 		return err;
887 
888 	err = m88e1111_config_init_hwcfg_mode(
889 		phydev,
890 		MII_M1111_HWCFG_MODE_RTBI,
891 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
892 	if (err < 0)
893 		return err;
894 
895 	/* soft reset */
896 	err = genphy_soft_reset(phydev);
897 	if (err < 0)
898 		return err;
899 
900 	return m88e1111_config_init_hwcfg_mode(
901 		phydev,
902 		MII_M1111_HWCFG_MODE_RTBI,
903 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
904 }
905 
906 static int m88e1111_config_init_1000basex(struct phy_device *phydev)
907 {
908 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
909 	int err, mode;
910 
911 	if (extsr < 0)
912 		return extsr;
913 
914 	/* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
915 	mode = extsr & MII_M1111_HWCFG_MODE_MASK;
916 	if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
917 		err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
918 				 MII_M1111_HWCFG_MODE_MASK |
919 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
920 				 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
921 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
922 		if (err < 0)
923 			return err;
924 	}
925 	return 0;
926 }
927 
928 static int m88e1111_config_init(struct phy_device *phydev)
929 {
930 	int err;
931 
932 	if (phy_interface_is_rgmii(phydev)) {
933 		err = m88e1111_config_init_rgmii(phydev);
934 		if (err < 0)
935 			return err;
936 	}
937 
938 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
939 		err = m88e1111_config_init_sgmii(phydev);
940 		if (err < 0)
941 			return err;
942 	}
943 
944 	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
945 		err = m88e1111_config_init_rtbi(phydev);
946 		if (err < 0)
947 			return err;
948 	}
949 
950 	if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
951 		err = m88e1111_config_init_1000basex(phydev);
952 		if (err < 0)
953 			return err;
954 	}
955 
956 	err = marvell_of_reg_init(phydev);
957 	if (err < 0)
958 		return err;
959 
960 	return genphy_soft_reset(phydev);
961 }
962 
963 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
964 {
965 	int val, cnt, enable;
966 
967 	val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
968 	if (val < 0)
969 		return val;
970 
971 	enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
972 	cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
973 
974 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
975 
976 	return 0;
977 }
978 
979 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
980 {
981 	int val, err;
982 
983 	if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
984 		return -E2BIG;
985 
986 	if (!cnt) {
987 		err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
988 				     MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
989 	} else {
990 		val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
991 		val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
992 
993 		err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
994 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
995 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
996 				 val);
997 	}
998 
999 	if (err < 0)
1000 		return err;
1001 
1002 	return genphy_soft_reset(phydev);
1003 }
1004 
1005 static int m88e1111_get_tunable(struct phy_device *phydev,
1006 				struct ethtool_tunable *tuna, void *data)
1007 {
1008 	switch (tuna->id) {
1009 	case ETHTOOL_PHY_DOWNSHIFT:
1010 		return m88e1111_get_downshift(phydev, data);
1011 	default:
1012 		return -EOPNOTSUPP;
1013 	}
1014 }
1015 
1016 static int m88e1111_set_tunable(struct phy_device *phydev,
1017 				struct ethtool_tunable *tuna, const void *data)
1018 {
1019 	switch (tuna->id) {
1020 	case ETHTOOL_PHY_DOWNSHIFT:
1021 		return m88e1111_set_downshift(phydev, *(const u8 *)data);
1022 	default:
1023 		return -EOPNOTSUPP;
1024 	}
1025 }
1026 
1027 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1028 {
1029 	int val, cnt, enable;
1030 
1031 	val = phy_read(phydev, MII_M1011_PHY_SCR);
1032 	if (val < 0)
1033 		return val;
1034 
1035 	enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1036 	cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1037 
1038 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1039 
1040 	return 0;
1041 }
1042 
1043 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1044 {
1045 	int val, err;
1046 
1047 	if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1048 		return -E2BIG;
1049 
1050 	if (!cnt) {
1051 		err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1052 				     MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1053 	} else {
1054 		val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1055 		val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1056 
1057 		err = phy_modify(phydev, MII_M1011_PHY_SCR,
1058 				 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1059 				 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1060 				 val);
1061 	}
1062 
1063 	if (err < 0)
1064 		return err;
1065 
1066 	return genphy_soft_reset(phydev);
1067 }
1068 
1069 static int m88e1011_get_tunable(struct phy_device *phydev,
1070 				struct ethtool_tunable *tuna, void *data)
1071 {
1072 	switch (tuna->id) {
1073 	case ETHTOOL_PHY_DOWNSHIFT:
1074 		return m88e1011_get_downshift(phydev, data);
1075 	default:
1076 		return -EOPNOTSUPP;
1077 	}
1078 }
1079 
1080 static int m88e1011_set_tunable(struct phy_device *phydev,
1081 				struct ethtool_tunable *tuna, const void *data)
1082 {
1083 	switch (tuna->id) {
1084 	case ETHTOOL_PHY_DOWNSHIFT:
1085 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1086 	default:
1087 		return -EOPNOTSUPP;
1088 	}
1089 }
1090 
1091 static int m88e1112_config_init(struct phy_device *phydev)
1092 {
1093 	int err;
1094 
1095 	err = m88e1011_set_downshift(phydev, 3);
1096 	if (err < 0)
1097 		return err;
1098 
1099 	return m88e1111_config_init(phydev);
1100 }
1101 
1102 static int m88e1111gbe_config_init(struct phy_device *phydev)
1103 {
1104 	int err;
1105 
1106 	err = m88e1111_set_downshift(phydev, 3);
1107 	if (err < 0)
1108 		return err;
1109 
1110 	return m88e1111_config_init(phydev);
1111 }
1112 
1113 static int marvell_1011gbe_config_init(struct phy_device *phydev)
1114 {
1115 	int err;
1116 
1117 	err = m88e1011_set_downshift(phydev, 3);
1118 	if (err < 0)
1119 		return err;
1120 
1121 	return marvell_config_init(phydev);
1122 }
1123 static int m88e1116r_config_init(struct phy_device *phydev)
1124 {
1125 	int err;
1126 
1127 	err = genphy_soft_reset(phydev);
1128 	if (err < 0)
1129 		return err;
1130 
1131 	msleep(500);
1132 
1133 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1134 	if (err < 0)
1135 		return err;
1136 
1137 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1138 	if (err < 0)
1139 		return err;
1140 
1141 	err = m88e1011_set_downshift(phydev, 8);
1142 	if (err < 0)
1143 		return err;
1144 
1145 	if (phy_interface_is_rgmii(phydev)) {
1146 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1147 		if (err < 0)
1148 			return err;
1149 	}
1150 
1151 	err = genphy_soft_reset(phydev);
1152 	if (err < 0)
1153 		return err;
1154 
1155 	return marvell_config_init(phydev);
1156 }
1157 
1158 static int m88e1318_config_init(struct phy_device *phydev)
1159 {
1160 	if (phy_interrupt_is_valid(phydev)) {
1161 		int err = phy_modify_paged(
1162 			phydev, MII_MARVELL_LED_PAGE,
1163 			MII_88E1318S_PHY_LED_TCR,
1164 			MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1165 			MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1166 			MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1167 		if (err < 0)
1168 			return err;
1169 	}
1170 
1171 	return marvell_config_init(phydev);
1172 }
1173 
1174 static int m88e1510_config_init(struct phy_device *phydev)
1175 {
1176 	int err;
1177 
1178 	/* SGMII-to-Copper mode initialization */
1179 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1180 		/* Select page 18 */
1181 		err = marvell_set_page(phydev, 18);
1182 		if (err < 0)
1183 			return err;
1184 
1185 		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1186 		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1187 				 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1188 				 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1189 		if (err < 0)
1190 			return err;
1191 
1192 		/* PHY reset is necessary after changing MODE[2:0] */
1193 		err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1194 				   MII_88E1510_GEN_CTRL_REG_1_RESET);
1195 		if (err < 0)
1196 			return err;
1197 
1198 		/* Reset page selection */
1199 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1200 		if (err < 0)
1201 			return err;
1202 	}
1203 	err = m88e1011_set_downshift(phydev, 3);
1204 	if (err < 0)
1205 		return err;
1206 
1207 	return m88e1318_config_init(phydev);
1208 }
1209 
1210 static int m88e1118_config_aneg(struct phy_device *phydev)
1211 {
1212 	int err;
1213 
1214 	err = genphy_soft_reset(phydev);
1215 	if (err < 0)
1216 		return err;
1217 
1218 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1219 	if (err < 0)
1220 		return err;
1221 
1222 	err = genphy_config_aneg(phydev);
1223 	return 0;
1224 }
1225 
1226 static int m88e1118_config_init(struct phy_device *phydev)
1227 {
1228 	int err;
1229 
1230 	/* Change address */
1231 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1232 	if (err < 0)
1233 		return err;
1234 
1235 	/* Enable 1000 Mbit */
1236 	err = phy_write(phydev, 0x15, 0x1070);
1237 	if (err < 0)
1238 		return err;
1239 
1240 	/* Change address */
1241 	err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1242 	if (err < 0)
1243 		return err;
1244 
1245 	/* Adjust LED Control */
1246 	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1247 		err = phy_write(phydev, 0x10, 0x1100);
1248 	else
1249 		err = phy_write(phydev, 0x10, 0x021e);
1250 	if (err < 0)
1251 		return err;
1252 
1253 	err = marvell_of_reg_init(phydev);
1254 	if (err < 0)
1255 		return err;
1256 
1257 	/* Reset address */
1258 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1259 	if (err < 0)
1260 		return err;
1261 
1262 	return genphy_soft_reset(phydev);
1263 }
1264 
1265 static int m88e1149_config_init(struct phy_device *phydev)
1266 {
1267 	int err;
1268 
1269 	/* Change address */
1270 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1271 	if (err < 0)
1272 		return err;
1273 
1274 	/* Enable 1000 Mbit */
1275 	err = phy_write(phydev, 0x15, 0x1048);
1276 	if (err < 0)
1277 		return err;
1278 
1279 	err = marvell_of_reg_init(phydev);
1280 	if (err < 0)
1281 		return err;
1282 
1283 	/* Reset address */
1284 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1285 	if (err < 0)
1286 		return err;
1287 
1288 	return genphy_soft_reset(phydev);
1289 }
1290 
1291 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1292 {
1293 	int err;
1294 
1295 	err = m88e1111_config_init_rgmii_delays(phydev);
1296 	if (err < 0)
1297 		return err;
1298 
1299 	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1300 		err = phy_write(phydev, 0x1d, 0x0012);
1301 		if (err < 0)
1302 			return err;
1303 
1304 		err = phy_modify(phydev, 0x1e, 0x0fc0,
1305 				 2 << 9 | /* 36 ohm */
1306 				 2 << 6); /* 39 ohm */
1307 		if (err < 0)
1308 			return err;
1309 
1310 		err = phy_write(phydev, 0x1d, 0x3);
1311 		if (err < 0)
1312 			return err;
1313 
1314 		err = phy_write(phydev, 0x1e, 0x8000);
1315 	}
1316 	return err;
1317 }
1318 
1319 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1320 {
1321 	return m88e1111_config_init_hwcfg_mode(
1322 		phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1323 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1324 }
1325 
1326 static int m88e1145_config_init(struct phy_device *phydev)
1327 {
1328 	int err;
1329 
1330 	/* Take care of errata E0 & E1 */
1331 	err = phy_write(phydev, 0x1d, 0x001b);
1332 	if (err < 0)
1333 		return err;
1334 
1335 	err = phy_write(phydev, 0x1e, 0x418f);
1336 	if (err < 0)
1337 		return err;
1338 
1339 	err = phy_write(phydev, 0x1d, 0x0016);
1340 	if (err < 0)
1341 		return err;
1342 
1343 	err = phy_write(phydev, 0x1e, 0xa2da);
1344 	if (err < 0)
1345 		return err;
1346 
1347 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1348 		err = m88e1145_config_init_rgmii(phydev);
1349 		if (err < 0)
1350 			return err;
1351 	}
1352 
1353 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1354 		err = m88e1145_config_init_sgmii(phydev);
1355 		if (err < 0)
1356 			return err;
1357 	}
1358 	err = m88e1111_set_downshift(phydev, 3);
1359 	if (err < 0)
1360 		return err;
1361 
1362 	err = marvell_of_reg_init(phydev);
1363 	if (err < 0)
1364 		return err;
1365 
1366 	return 0;
1367 }
1368 
1369 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1370 {
1371 	int val;
1372 
1373 	val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1374 	if (val < 0)
1375 		return val;
1376 
1377 	if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1378 		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1379 		return 0;
1380 	}
1381 
1382 	val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1383 
1384 	switch (val) {
1385 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1386 		*msecs = 0;
1387 		break;
1388 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1389 		*msecs = 10;
1390 		break;
1391 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1392 		*msecs = 20;
1393 		break;
1394 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1395 		*msecs = 40;
1396 		break;
1397 	default:
1398 		return -EINVAL;
1399 	}
1400 
1401 	return 0;
1402 }
1403 
1404 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1405 {
1406 	struct ethtool_eee eee;
1407 	int val, ret;
1408 
1409 	if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1410 		return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1411 				      MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1412 
1413 	/* According to the Marvell data sheet EEE must be disabled for
1414 	 * Fast Link Down detection to work properly
1415 	 */
1416 	ret = phy_ethtool_get_eee(phydev, &eee);
1417 	if (!ret && eee.eee_enabled) {
1418 		phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1419 		return -EBUSY;
1420 	}
1421 
1422 	if (*msecs <= 5)
1423 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1424 	else if (*msecs <= 15)
1425 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1426 	else if (*msecs <= 30)
1427 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1428 	else
1429 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1430 
1431 	val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1432 
1433 	ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1434 			 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1435 	if (ret)
1436 		return ret;
1437 
1438 	return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1439 			    MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1440 }
1441 
1442 static int m88e1540_get_tunable(struct phy_device *phydev,
1443 				struct ethtool_tunable *tuna, void *data)
1444 {
1445 	switch (tuna->id) {
1446 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1447 		return m88e1540_get_fld(phydev, data);
1448 	case ETHTOOL_PHY_DOWNSHIFT:
1449 		return m88e1011_get_downshift(phydev, data);
1450 	default:
1451 		return -EOPNOTSUPP;
1452 	}
1453 }
1454 
1455 static int m88e1540_set_tunable(struct phy_device *phydev,
1456 				struct ethtool_tunable *tuna, const void *data)
1457 {
1458 	switch (tuna->id) {
1459 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1460 		return m88e1540_set_fld(phydev, data);
1461 	case ETHTOOL_PHY_DOWNSHIFT:
1462 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1463 	default:
1464 		return -EOPNOTSUPP;
1465 	}
1466 }
1467 
1468 /* The VOD can be out of specification on link up. Poke an
1469  * undocumented register, in an undocumented page, with a magic value
1470  * to fix this.
1471  */
1472 static int m88e6390_errata(struct phy_device *phydev)
1473 {
1474 	int err;
1475 
1476 	err = phy_write(phydev, MII_BMCR,
1477 			BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1478 	if (err)
1479 		return err;
1480 
1481 	usleep_range(300, 400);
1482 
1483 	err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1484 	if (err)
1485 		return err;
1486 
1487 	return genphy_soft_reset(phydev);
1488 }
1489 
1490 static int m88e6390_config_aneg(struct phy_device *phydev)
1491 {
1492 	int err;
1493 
1494 	err = m88e6390_errata(phydev);
1495 	if (err)
1496 		return err;
1497 
1498 	return m88e1510_config_aneg(phydev);
1499 }
1500 
1501 /**
1502  * fiber_lpa_mod_linkmode_lpa_t
1503  * @advertising: the linkmode advertisement settings
1504  * @lpa: value of the MII_LPA register for fiber link
1505  *
1506  * A small helper function that translates MII_LPA bits to linkmode LP
1507  * advertisement settings. Other bits in advertising are left
1508  * unchanged.
1509  */
1510 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1511 {
1512 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1513 			 advertising, lpa & LPA_1000XHALF);
1514 
1515 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1516 			 advertising, lpa & LPA_1000XFULL);
1517 }
1518 
1519 static int marvell_read_status_page_an(struct phy_device *phydev,
1520 				       int fiber, int status)
1521 {
1522 	int lpa;
1523 	int err;
1524 
1525 	if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1526 		phydev->link = 0;
1527 		return 0;
1528 	}
1529 
1530 	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1531 		phydev->duplex = DUPLEX_FULL;
1532 	else
1533 		phydev->duplex = DUPLEX_HALF;
1534 
1535 	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1536 	case MII_M1011_PHY_STATUS_1000:
1537 		phydev->speed = SPEED_1000;
1538 		break;
1539 
1540 	case MII_M1011_PHY_STATUS_100:
1541 		phydev->speed = SPEED_100;
1542 		break;
1543 
1544 	default:
1545 		phydev->speed = SPEED_10;
1546 		break;
1547 	}
1548 
1549 	if (!fiber) {
1550 		err = genphy_read_lpa(phydev);
1551 		if (err < 0)
1552 			return err;
1553 
1554 		phy_resolve_aneg_pause(phydev);
1555 	} else {
1556 		lpa = phy_read(phydev, MII_LPA);
1557 		if (lpa < 0)
1558 			return lpa;
1559 
1560 		/* The fiber link is only 1000M capable */
1561 		fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1562 
1563 		if (phydev->duplex == DUPLEX_FULL) {
1564 			if (!(lpa & LPA_PAUSE_FIBER)) {
1565 				phydev->pause = 0;
1566 				phydev->asym_pause = 0;
1567 			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1568 				phydev->pause = 1;
1569 				phydev->asym_pause = 1;
1570 			} else {
1571 				phydev->pause = 1;
1572 				phydev->asym_pause = 0;
1573 			}
1574 		}
1575 	}
1576 
1577 	return 0;
1578 }
1579 
1580 /* marvell_read_status_page
1581  *
1582  * Description:
1583  *   Check the link, then figure out the current state
1584  *   by comparing what we advertise with what the link partner
1585  *   advertises.  Start by checking the gigabit possibilities,
1586  *   then move on to 10/100.
1587  */
1588 static int marvell_read_status_page(struct phy_device *phydev, int page)
1589 {
1590 	int status;
1591 	int fiber;
1592 	int err;
1593 
1594 	status = phy_read(phydev, MII_M1011_PHY_STATUS);
1595 	if (status < 0)
1596 		return status;
1597 
1598 	/* Use the generic register for copper link status,
1599 	 * and the PHY status register for fiber link status.
1600 	 */
1601 	if (page == MII_MARVELL_FIBER_PAGE) {
1602 		phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1603 	} else {
1604 		err = genphy_update_link(phydev);
1605 		if (err)
1606 			return err;
1607 	}
1608 
1609 	if (page == MII_MARVELL_FIBER_PAGE)
1610 		fiber = 1;
1611 	else
1612 		fiber = 0;
1613 
1614 	linkmode_zero(phydev->lp_advertising);
1615 	phydev->pause = 0;
1616 	phydev->asym_pause = 0;
1617 	phydev->speed = SPEED_UNKNOWN;
1618 	phydev->duplex = DUPLEX_UNKNOWN;
1619 	phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1620 
1621 	if (phydev->autoneg == AUTONEG_ENABLE)
1622 		err = marvell_read_status_page_an(phydev, fiber, status);
1623 	else
1624 		err = genphy_read_status_fixed(phydev);
1625 
1626 	return err;
1627 }
1628 
1629 /* marvell_read_status
1630  *
1631  * Some Marvell's phys have two modes: fiber and copper.
1632  * Both need status checked.
1633  * Description:
1634  *   First, check the fiber link and status.
1635  *   If the fiber link is down, check the copper link and status which
1636  *   will be the default value if both link are down.
1637  */
1638 static int marvell_read_status(struct phy_device *phydev)
1639 {
1640 	int err;
1641 
1642 	/* Check the fiber mode first */
1643 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1644 			      phydev->supported) &&
1645 	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1646 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1647 		if (err < 0)
1648 			goto error;
1649 
1650 		err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1651 		if (err < 0)
1652 			goto error;
1653 
1654 		/* If the fiber link is up, it is the selected and
1655 		 * used link. In this case, we need to stay in the
1656 		 * fiber page. Please to be careful about that, avoid
1657 		 * to restore Copper page in other functions which
1658 		 * could break the behaviour for some fiber phy like
1659 		 * 88E1512.
1660 		 */
1661 		if (phydev->link)
1662 			return 0;
1663 
1664 		/* If fiber link is down, check and save copper mode state */
1665 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1666 		if (err < 0)
1667 			goto error;
1668 	}
1669 
1670 	return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1671 
1672 error:
1673 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1674 	return err;
1675 }
1676 
1677 /* marvell_suspend
1678  *
1679  * Some Marvell's phys have two modes: fiber and copper.
1680  * Both need to be suspended
1681  */
1682 static int marvell_suspend(struct phy_device *phydev)
1683 {
1684 	int err;
1685 
1686 	/* Suspend the fiber mode first */
1687 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1688 			       phydev->supported)) {
1689 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1690 		if (err < 0)
1691 			goto error;
1692 
1693 		/* With the page set, use the generic suspend */
1694 		err = genphy_suspend(phydev);
1695 		if (err < 0)
1696 			goto error;
1697 
1698 		/* Then, the copper link */
1699 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1700 		if (err < 0)
1701 			goto error;
1702 	}
1703 
1704 	/* With the page set, use the generic suspend */
1705 	return genphy_suspend(phydev);
1706 
1707 error:
1708 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1709 	return err;
1710 }
1711 
1712 /* marvell_resume
1713  *
1714  * Some Marvell's phys have two modes: fiber and copper.
1715  * Both need to be resumed
1716  */
1717 static int marvell_resume(struct phy_device *phydev)
1718 {
1719 	int err;
1720 
1721 	/* Resume the fiber mode first */
1722 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1723 			       phydev->supported)) {
1724 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1725 		if (err < 0)
1726 			goto error;
1727 
1728 		/* With the page set, use the generic resume */
1729 		err = genphy_resume(phydev);
1730 		if (err < 0)
1731 			goto error;
1732 
1733 		/* Then, the copper link */
1734 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1735 		if (err < 0)
1736 			goto error;
1737 	}
1738 
1739 	/* With the page set, use the generic resume */
1740 	return genphy_resume(phydev);
1741 
1742 error:
1743 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1744 	return err;
1745 }
1746 
1747 static int marvell_aneg_done(struct phy_device *phydev)
1748 {
1749 	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1750 
1751 	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1752 }
1753 
1754 static void m88e1318_get_wol(struct phy_device *phydev,
1755 			     struct ethtool_wolinfo *wol)
1756 {
1757 	int ret;
1758 
1759 	wol->supported = WAKE_MAGIC;
1760 	wol->wolopts = 0;
1761 
1762 	ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1763 			     MII_88E1318S_PHY_WOL_CTRL);
1764 	if (ret >= 0 && ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1765 		wol->wolopts |= WAKE_MAGIC;
1766 }
1767 
1768 static int m88e1318_set_wol(struct phy_device *phydev,
1769 			    struct ethtool_wolinfo *wol)
1770 {
1771 	int err = 0, oldpage;
1772 
1773 	oldpage = phy_save_page(phydev);
1774 	if (oldpage < 0)
1775 		goto error;
1776 
1777 	if (wol->wolopts & WAKE_MAGIC) {
1778 		/* Explicitly switch to page 0x00, just to be sure */
1779 		err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1780 		if (err < 0)
1781 			goto error;
1782 
1783 		/* If WOL event happened once, the LED[2] interrupt pin
1784 		 * will not be cleared unless we reading the interrupt status
1785 		 * register. If interrupts are in use, the normal interrupt
1786 		 * handling will clear the WOL event. Clear the WOL event
1787 		 * before enabling it if !phy_interrupt_is_valid()
1788 		 */
1789 		if (!phy_interrupt_is_valid(phydev))
1790 			__phy_read(phydev, MII_M1011_IEVENT);
1791 
1792 		/* Enable the WOL interrupt */
1793 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1794 				     MII_88E1318S_PHY_CSIER_WOL_EIE);
1795 		if (err < 0)
1796 			goto error;
1797 
1798 		err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1799 		if (err < 0)
1800 			goto error;
1801 
1802 		/* Setup LED[2] as interrupt pin (active low) */
1803 		err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1804 				   MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1805 				   MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1806 				   MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1807 		if (err < 0)
1808 			goto error;
1809 
1810 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1811 		if (err < 0)
1812 			goto error;
1813 
1814 		/* Store the device address for the magic packet */
1815 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1816 				((phydev->attached_dev->dev_addr[5] << 8) |
1817 				 phydev->attached_dev->dev_addr[4]));
1818 		if (err < 0)
1819 			goto error;
1820 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1821 				((phydev->attached_dev->dev_addr[3] << 8) |
1822 				 phydev->attached_dev->dev_addr[2]));
1823 		if (err < 0)
1824 			goto error;
1825 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1826 				((phydev->attached_dev->dev_addr[1] << 8) |
1827 				 phydev->attached_dev->dev_addr[0]));
1828 		if (err < 0)
1829 			goto error;
1830 
1831 		/* Clear WOL status and enable magic packet matching */
1832 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1833 				     MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1834 				     MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1835 		if (err < 0)
1836 			goto error;
1837 	} else {
1838 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1839 		if (err < 0)
1840 			goto error;
1841 
1842 		/* Clear WOL status and disable magic packet matching */
1843 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1844 				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1845 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1846 		if (err < 0)
1847 			goto error;
1848 	}
1849 
1850 error:
1851 	return phy_restore_page(phydev, oldpage, err);
1852 }
1853 
1854 static int marvell_get_sset_count(struct phy_device *phydev)
1855 {
1856 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1857 			      phydev->supported))
1858 		return ARRAY_SIZE(marvell_hw_stats);
1859 	else
1860 		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1861 }
1862 
1863 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1864 {
1865 	int count = marvell_get_sset_count(phydev);
1866 	int i;
1867 
1868 	for (i = 0; i < count; i++) {
1869 		strlcpy(data + i * ETH_GSTRING_LEN,
1870 			marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1871 	}
1872 }
1873 
1874 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1875 {
1876 	struct marvell_hw_stat stat = marvell_hw_stats[i];
1877 	struct marvell_priv *priv = phydev->priv;
1878 	int val;
1879 	u64 ret;
1880 
1881 	val = phy_read_paged(phydev, stat.page, stat.reg);
1882 	if (val < 0) {
1883 		ret = U64_MAX;
1884 	} else {
1885 		val = val & ((1 << stat.bits) - 1);
1886 		priv->stats[i] += val;
1887 		ret = priv->stats[i];
1888 	}
1889 
1890 	return ret;
1891 }
1892 
1893 static void marvell_get_stats(struct phy_device *phydev,
1894 			      struct ethtool_stats *stats, u64 *data)
1895 {
1896 	int count = marvell_get_sset_count(phydev);
1897 	int i;
1898 
1899 	for (i = 0; i < count; i++)
1900 		data[i] = marvell_get_stat(phydev, i);
1901 }
1902 
1903 static int marvell_vct5_wait_complete(struct phy_device *phydev)
1904 {
1905 	int i;
1906 	int val;
1907 
1908 	for (i = 0; i < 32; i++) {
1909 		val = __phy_read(phydev, MII_VCT5_CTRL);
1910 		if (val < 0)
1911 			return val;
1912 
1913 		if (val & MII_VCT5_CTRL_COMPLETE)
1914 			return 0;
1915 	}
1916 
1917 	phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
1918 	return -ETIMEDOUT;
1919 }
1920 
1921 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
1922 {
1923 	int amplitude;
1924 	int val;
1925 	int reg;
1926 
1927 	reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
1928 	val = __phy_read(phydev, reg);
1929 
1930 	if (val < 0)
1931 		return 0;
1932 
1933 	amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
1934 		MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
1935 
1936 	if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
1937 		amplitude = -amplitude;
1938 
1939 	return 1000 * amplitude / 128;
1940 }
1941 
1942 static u32 marvell_vct5_distance2cm(int distance)
1943 {
1944 	return distance * 805 / 10;
1945 }
1946 
1947 static u32 marvell_vct5_cm2distance(int cm)
1948 {
1949 	return cm * 10 / 805;
1950 }
1951 
1952 static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
1953 					   int distance, int pair)
1954 {
1955 	u16 reg;
1956 	int err;
1957 	int mV;
1958 	int i;
1959 
1960 	err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
1961 			  distance);
1962 	if (err)
1963 		return err;
1964 
1965 	reg = MII_VCT5_CTRL_ENABLE |
1966 		MII_VCT5_CTRL_TX_SAME_CHANNEL |
1967 		MII_VCT5_CTRL_SAMPLES_DEFAULT |
1968 		MII_VCT5_CTRL_SAMPLE_POINT |
1969 		MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
1970 	err = __phy_write(phydev, MII_VCT5_CTRL, reg);
1971 	if (err)
1972 		return err;
1973 
1974 	err = marvell_vct5_wait_complete(phydev);
1975 	if (err)
1976 		return err;
1977 
1978 	for (i = 0; i < 4; i++) {
1979 		if (pair != PHY_PAIR_ALL && i != pair)
1980 			continue;
1981 
1982 		mV = marvell_vct5_amplitude(phydev, i);
1983 		ethnl_cable_test_amplitude(phydev, i, mV);
1984 	}
1985 
1986 	return 0;
1987 }
1988 
1989 static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
1990 {
1991 	struct marvell_priv *priv = phydev->priv;
1992 	int distance;
1993 	u16 width;
1994 	int page;
1995 	int err;
1996 	u16 reg;
1997 
1998 	if (priv->first <= TDR_SHORT_CABLE_LENGTH)
1999 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
2000 	else
2001 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2002 
2003 	reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2004 		MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2005 		MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2006 
2007 	err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2008 			      MII_VCT5_TX_PULSE_CTRL, reg);
2009 	if (err)
2010 		return err;
2011 
2012 	/* Reading the TDR data is very MDIO heavy. We need to optimize
2013 	 * access to keep the time to a minimum. So lock the bus once,
2014 	 * and don't release it until complete. We can then avoid having
2015 	 * to change the page for every access, greatly speeding things
2016 	 * up.
2017 	 */
2018 	page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2019 	if (page < 0)
2020 		goto restore_page;
2021 
2022 	for (distance = priv->first;
2023 	     distance <= priv->last;
2024 	     distance += priv->step) {
2025 		err = marvell_vct5_amplitude_distance(phydev, distance,
2026 						      priv->pair);
2027 		if (err)
2028 			goto restore_page;
2029 
2030 		if (distance > TDR_SHORT_CABLE_LENGTH &&
2031 		    width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2032 			width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2033 			reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2034 				MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2035 				MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2036 			err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2037 			if (err)
2038 				goto restore_page;
2039 		}
2040 	}
2041 
2042 restore_page:
2043 	return phy_restore_page(phydev, page, err);
2044 }
2045 
2046 static int marvell_cable_test_start_common(struct phy_device *phydev)
2047 {
2048 	int bmcr, bmsr, ret;
2049 
2050 	/* If auto-negotiation is enabled, but not complete, the cable
2051 	 * test never completes. So disable auto-neg.
2052 	 */
2053 	bmcr = phy_read(phydev, MII_BMCR);
2054 	if (bmcr < 0)
2055 		return bmcr;
2056 
2057 	bmsr = phy_read(phydev, MII_BMSR);
2058 
2059 	if (bmsr < 0)
2060 		return bmsr;
2061 
2062 	if (bmcr & BMCR_ANENABLE) {
2063 		ret =  phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2064 		if (ret < 0)
2065 			return ret;
2066 		ret = genphy_soft_reset(phydev);
2067 		if (ret < 0)
2068 			return ret;
2069 	}
2070 
2071 	/* If the link is up, allow it some time to go down */
2072 	if (bmsr & BMSR_LSTATUS)
2073 		msleep(1500);
2074 
2075 	return 0;
2076 }
2077 
2078 static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2079 {
2080 	struct marvell_priv *priv = phydev->priv;
2081 	int ret;
2082 
2083 	ret = marvell_cable_test_start_common(phydev);
2084 	if (ret)
2085 		return ret;
2086 
2087 	priv->cable_test_tdr = false;
2088 
2089 	/* Reset the VCT5 API control to defaults, otherwise
2090 	 * VCT7 does not work correctly.
2091 	 */
2092 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2093 			      MII_VCT5_CTRL,
2094 			      MII_VCT5_CTRL_TX_SAME_CHANNEL |
2095 			      MII_VCT5_CTRL_SAMPLES_DEFAULT |
2096 			      MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2097 			      MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2098 	if (ret)
2099 		return ret;
2100 
2101 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2102 			      MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2103 	if (ret)
2104 		return ret;
2105 
2106 	return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2107 			       MII_VCT7_CTRL,
2108 			       MII_VCT7_CTRL_RUN_NOW |
2109 			       MII_VCT7_CTRL_CENTIMETERS);
2110 }
2111 
2112 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2113 					     const struct phy_tdr_config *cfg)
2114 {
2115 	struct marvell_priv *priv = phydev->priv;
2116 	int ret;
2117 
2118 	priv->cable_test_tdr = true;
2119 	priv->first = marvell_vct5_cm2distance(cfg->first);
2120 	priv->last = marvell_vct5_cm2distance(cfg->last);
2121 	priv->step = marvell_vct5_cm2distance(cfg->step);
2122 	priv->pair = cfg->pair;
2123 
2124 	if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2125 		return -EINVAL;
2126 
2127 	if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2128 		return -EINVAL;
2129 
2130 	/* Disable  VCT7 */
2131 	ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2132 			      MII_VCT7_CTRL, 0);
2133 	if (ret)
2134 		return ret;
2135 
2136 	ret = marvell_cable_test_start_common(phydev);
2137 	if (ret)
2138 		return ret;
2139 
2140 	ret = ethnl_cable_test_pulse(phydev, 1000);
2141 	if (ret)
2142 		return ret;
2143 
2144 	return ethnl_cable_test_step(phydev,
2145 				     marvell_vct5_distance2cm(priv->first),
2146 				     marvell_vct5_distance2cm(priv->last),
2147 				     marvell_vct5_distance2cm(priv->step));
2148 }
2149 
2150 static int marvell_vct7_distance_to_length(int distance, bool meter)
2151 {
2152 	if (meter)
2153 		distance *= 100;
2154 
2155 	return distance;
2156 }
2157 
2158 static bool marvell_vct7_distance_valid(int result)
2159 {
2160 	switch (result) {
2161 	case MII_VCT7_RESULTS_OPEN:
2162 	case MII_VCT7_RESULTS_SAME_SHORT:
2163 	case MII_VCT7_RESULTS_CROSS_SHORT:
2164 		return true;
2165 	}
2166 	return false;
2167 }
2168 
2169 static int marvell_vct7_report_length(struct phy_device *phydev,
2170 				      int pair, bool meter)
2171 {
2172 	int length;
2173 	int ret;
2174 
2175 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2176 			     MII_VCT7_PAIR_0_DISTANCE + pair);
2177 	if (ret < 0)
2178 		return ret;
2179 
2180 	length = marvell_vct7_distance_to_length(ret, meter);
2181 
2182 	ethnl_cable_test_fault_length(phydev, pair, length);
2183 
2184 	return 0;
2185 }
2186 
2187 static int marvell_vct7_cable_test_report_trans(int result)
2188 {
2189 	switch (result) {
2190 	case MII_VCT7_RESULTS_OK:
2191 		return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2192 	case MII_VCT7_RESULTS_OPEN:
2193 		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2194 	case MII_VCT7_RESULTS_SAME_SHORT:
2195 		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2196 	case MII_VCT7_RESULTS_CROSS_SHORT:
2197 		return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2198 	default:
2199 		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2200 	}
2201 }
2202 
2203 static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2204 {
2205 	int pair0, pair1, pair2, pair3;
2206 	bool meter;
2207 	int ret;
2208 
2209 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2210 			     MII_VCT7_RESULTS);
2211 	if (ret < 0)
2212 		return ret;
2213 
2214 	pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2215 		MII_VCT7_RESULTS_PAIR3_SHIFT;
2216 	pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2217 		MII_VCT7_RESULTS_PAIR2_SHIFT;
2218 	pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2219 		MII_VCT7_RESULTS_PAIR1_SHIFT;
2220 	pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2221 		MII_VCT7_RESULTS_PAIR0_SHIFT;
2222 
2223 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2224 				marvell_vct7_cable_test_report_trans(pair0));
2225 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2226 				marvell_vct7_cable_test_report_trans(pair1));
2227 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2228 				marvell_vct7_cable_test_report_trans(pair2));
2229 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2230 				marvell_vct7_cable_test_report_trans(pair3));
2231 
2232 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2233 	if (ret < 0)
2234 		return ret;
2235 
2236 	meter = ret & MII_VCT7_CTRL_METERS;
2237 
2238 	if (marvell_vct7_distance_valid(pair0))
2239 		marvell_vct7_report_length(phydev, 0, meter);
2240 	if (marvell_vct7_distance_valid(pair1))
2241 		marvell_vct7_report_length(phydev, 1, meter);
2242 	if (marvell_vct7_distance_valid(pair2))
2243 		marvell_vct7_report_length(phydev, 2, meter);
2244 	if (marvell_vct7_distance_valid(pair3))
2245 		marvell_vct7_report_length(phydev, 3, meter);
2246 
2247 	return 0;
2248 }
2249 
2250 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2251 					      bool *finished)
2252 {
2253 	struct marvell_priv *priv = phydev->priv;
2254 	int ret;
2255 
2256 	if (priv->cable_test_tdr) {
2257 		ret = marvell_vct5_amplitude_graph(phydev);
2258 		*finished = true;
2259 		return ret;
2260 	}
2261 
2262 	*finished = false;
2263 
2264 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2265 			     MII_VCT7_CTRL);
2266 
2267 	if (ret < 0)
2268 		return ret;
2269 
2270 	if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2271 		*finished = true;
2272 
2273 		return marvell_vct7_cable_test_report(phydev);
2274 	}
2275 
2276 	return 0;
2277 }
2278 
2279 #ifdef CONFIG_HWMON
2280 struct marvell_hwmon_ops {
2281 	int (*config)(struct phy_device *phydev);
2282 	int (*get_temp)(struct phy_device *phydev, long *temp);
2283 	int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2284 	int (*set_temp_critical)(struct phy_device *phydev, long temp);
2285 	int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2286 };
2287 
2288 static const struct marvell_hwmon_ops *
2289 to_marvell_hwmon_ops(const struct phy_device *phydev)
2290 {
2291 	return phydev->drv->driver_data;
2292 }
2293 
2294 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2295 {
2296 	int oldpage;
2297 	int ret = 0;
2298 	int val;
2299 
2300 	*temp = 0;
2301 
2302 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2303 	if (oldpage < 0)
2304 		goto error;
2305 
2306 	/* Enable temperature sensor */
2307 	ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2308 	if (ret < 0)
2309 		goto error;
2310 
2311 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2312 			  ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2313 	if (ret < 0)
2314 		goto error;
2315 
2316 	/* Wait for temperature to stabilize */
2317 	usleep_range(10000, 12000);
2318 
2319 	val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2320 	if (val < 0) {
2321 		ret = val;
2322 		goto error;
2323 	}
2324 
2325 	/* Disable temperature sensor */
2326 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2327 			  ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2328 	if (ret < 0)
2329 		goto error;
2330 
2331 	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2332 
2333 error:
2334 	return phy_restore_page(phydev, oldpage, ret);
2335 }
2336 
2337 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2338 {
2339 	int ret;
2340 
2341 	*temp = 0;
2342 
2343 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2344 			     MII_88E1510_TEMP_SENSOR);
2345 	if (ret < 0)
2346 		return ret;
2347 
2348 	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2349 
2350 	return 0;
2351 }
2352 
2353 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2354 {
2355 	int ret;
2356 
2357 	*temp = 0;
2358 
2359 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2360 			     MII_88E1121_MISC_TEST);
2361 	if (ret < 0)
2362 		return ret;
2363 
2364 	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2365 		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2366 	/* convert to mC */
2367 	*temp *= 1000;
2368 
2369 	return 0;
2370 }
2371 
2372 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2373 {
2374 	temp = temp / 1000;
2375 	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2376 
2377 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2378 				MII_88E1121_MISC_TEST,
2379 				MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2380 				temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2381 }
2382 
2383 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2384 {
2385 	int ret;
2386 
2387 	*alarm = false;
2388 
2389 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2390 			     MII_88E1121_MISC_TEST);
2391 	if (ret < 0)
2392 		return ret;
2393 
2394 	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2395 
2396 	return 0;
2397 }
2398 
2399 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2400 {
2401 	int sum = 0;
2402 	int oldpage;
2403 	int ret = 0;
2404 	int i;
2405 
2406 	*temp = 0;
2407 
2408 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2409 	if (oldpage < 0)
2410 		goto error;
2411 
2412 	/* Enable temperature sensor */
2413 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2414 	if (ret < 0)
2415 		goto error;
2416 
2417 	ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2418 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2419 
2420 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2421 	if (ret < 0)
2422 		goto error;
2423 
2424 	/* Wait for temperature to stabilize */
2425 	usleep_range(10000, 12000);
2426 
2427 	/* Reading the temperature sense has an errata. You need to read
2428 	 * a number of times and take an average.
2429 	 */
2430 	for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2431 		ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2432 		if (ret < 0)
2433 			goto error;
2434 		sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2435 	}
2436 
2437 	sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2438 	*temp = (sum  - 75) * 1000;
2439 
2440 	/* Disable temperature sensor */
2441 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2442 	if (ret < 0)
2443 		goto error;
2444 
2445 	ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2446 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2447 
2448 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2449 
2450 error:
2451 	phy_restore_page(phydev, oldpage, ret);
2452 
2453 	return ret;
2454 }
2455 
2456 static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2457 {
2458 	int err;
2459 
2460 	err = m88e1510_get_temp(phydev, temp);
2461 
2462 	/* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2463 	 * T + 75, so we have to subtract another 50
2464 	 */
2465 	*temp -= 50000;
2466 
2467 	return err;
2468 }
2469 
2470 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2471 {
2472 	int ret;
2473 
2474 	*temp = 0;
2475 
2476 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2477 			     MII_88E6390_TEMP_SENSOR);
2478 	if (ret < 0)
2479 		return ret;
2480 
2481 	*temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2482 		  MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2483 
2484 	return 0;
2485 }
2486 
2487 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2488 {
2489 	temp = (temp / 1000) + 75;
2490 
2491 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2492 				MII_88E6390_TEMP_SENSOR,
2493 				MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
2494 				temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
2495 }
2496 
2497 static int m88e6393_hwmon_config(struct phy_device *phydev)
2498 {
2499 	int err;
2500 
2501 	err = m88e6393_set_temp_critical(phydev, 100000);
2502 	if (err)
2503 		return err;
2504 
2505 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2506 				MII_88E6390_MISC_TEST,
2507 				MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
2508 				MII_88E6393_MISC_TEST_SAMPLES_MASK |
2509 				MII_88E6393_MISC_TEST_RATE_MASK,
2510 				MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
2511 				MII_88E6393_MISC_TEST_SAMPLES_2048 |
2512 				MII_88E6393_MISC_TEST_RATE_2_3MS);
2513 }
2514 
2515 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
2516 			      u32 attr, int channel, long *temp)
2517 {
2518 	struct phy_device *phydev = dev_get_drvdata(dev);
2519 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2520 	int err = -EOPNOTSUPP;
2521 
2522 	switch (attr) {
2523 	case hwmon_temp_input:
2524 		if (ops->get_temp)
2525 			err = ops->get_temp(phydev, temp);
2526 		break;
2527 	case hwmon_temp_crit:
2528 		if (ops->get_temp_critical)
2529 			err = ops->get_temp_critical(phydev, temp);
2530 		break;
2531 	case hwmon_temp_max_alarm:
2532 		if (ops->get_temp_alarm)
2533 			err = ops->get_temp_alarm(phydev, temp);
2534 		break;
2535 	}
2536 
2537 	return err;
2538 }
2539 
2540 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
2541 			       u32 attr, int channel, long temp)
2542 {
2543 	struct phy_device *phydev = dev_get_drvdata(dev);
2544 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2545 	int err = -EOPNOTSUPP;
2546 
2547 	switch (attr) {
2548 	case hwmon_temp_crit:
2549 		if (ops->set_temp_critical)
2550 			err = ops->set_temp_critical(phydev, temp);
2551 		break;
2552 	}
2553 
2554 	return err;
2555 }
2556 
2557 static umode_t marvell_hwmon_is_visible(const void *data,
2558 					enum hwmon_sensor_types type,
2559 					u32 attr, int channel)
2560 {
2561 	const struct phy_device *phydev = data;
2562 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2563 
2564 	if (type != hwmon_temp)
2565 		return 0;
2566 
2567 	switch (attr) {
2568 	case hwmon_temp_input:
2569 		return ops->get_temp ? 0444 : 0;
2570 	case hwmon_temp_max_alarm:
2571 		return ops->get_temp_alarm ? 0444 : 0;
2572 	case hwmon_temp_crit:
2573 		return (ops->get_temp_critical ? 0444 : 0) |
2574 		       (ops->set_temp_critical ? 0200 : 0);
2575 	default:
2576 		return 0;
2577 	}
2578 }
2579 
2580 static u32 marvell_hwmon_chip_config[] = {
2581 	HWMON_C_REGISTER_TZ,
2582 	0
2583 };
2584 
2585 static const struct hwmon_channel_info marvell_hwmon_chip = {
2586 	.type = hwmon_chip,
2587 	.config = marvell_hwmon_chip_config,
2588 };
2589 
2590 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
2591  * defined for all PHYs, because the hwmon code checks whether the attributes
2592  * exists via the .is_visible method
2593  */
2594 static u32 marvell_hwmon_temp_config[] = {
2595 	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2596 	0
2597 };
2598 
2599 static const struct hwmon_channel_info marvell_hwmon_temp = {
2600 	.type = hwmon_temp,
2601 	.config = marvell_hwmon_temp_config,
2602 };
2603 
2604 static const struct hwmon_channel_info *marvell_hwmon_info[] = {
2605 	&marvell_hwmon_chip,
2606 	&marvell_hwmon_temp,
2607 	NULL
2608 };
2609 
2610 static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
2611 	.is_visible = marvell_hwmon_is_visible,
2612 	.read = marvell_hwmon_read,
2613 	.write = marvell_hwmon_write,
2614 };
2615 
2616 static const struct hwmon_chip_info marvell_hwmon_chip_info = {
2617 	.ops = &marvell_hwmon_hwmon_ops,
2618 	.info = marvell_hwmon_info,
2619 };
2620 
2621 static int marvell_hwmon_name(struct phy_device *phydev)
2622 {
2623 	struct marvell_priv *priv = phydev->priv;
2624 	struct device *dev = &phydev->mdio.dev;
2625 	const char *devname = dev_name(dev);
2626 	size_t len = strlen(devname);
2627 	int i, j;
2628 
2629 	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2630 	if (!priv->hwmon_name)
2631 		return -ENOMEM;
2632 
2633 	for (i = j = 0; i < len && devname[i]; i++) {
2634 		if (isalnum(devname[i]))
2635 			priv->hwmon_name[j++] = devname[i];
2636 	}
2637 
2638 	return 0;
2639 }
2640 
2641 static int marvell_hwmon_probe(struct phy_device *phydev)
2642 {
2643 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2644 	struct marvell_priv *priv = phydev->priv;
2645 	struct device *dev = &phydev->mdio.dev;
2646 	int err;
2647 
2648 	if (!ops)
2649 		return 0;
2650 
2651 	err = marvell_hwmon_name(phydev);
2652 	if (err)
2653 		return err;
2654 
2655 	priv->hwmon_dev = devm_hwmon_device_register_with_info(
2656 		dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
2657 	if (IS_ERR(priv->hwmon_dev))
2658 		return PTR_ERR(priv->hwmon_dev);
2659 
2660 	if (ops->config)
2661 		err = ops->config(phydev);
2662 
2663 	return err;
2664 }
2665 
2666 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
2667 	.get_temp = m88e1121_get_temp,
2668 };
2669 
2670 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
2671 	.get_temp = m88e1510_get_temp,
2672 	.get_temp_critical = m88e1510_get_temp_critical,
2673 	.set_temp_critical = m88e1510_set_temp_critical,
2674 	.get_temp_alarm = m88e1510_get_temp_alarm,
2675 };
2676 
2677 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
2678 	.get_temp = m88e6390_get_temp,
2679 };
2680 
2681 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
2682 	.config = m88e6393_hwmon_config,
2683 	.get_temp = m88e6393_get_temp,
2684 	.get_temp_critical = m88e6393_get_temp_critical,
2685 	.set_temp_critical = m88e6393_set_temp_critical,
2686 	.get_temp_alarm = m88e1510_get_temp_alarm,
2687 };
2688 
2689 #define DEF_MARVELL_HWMON_OPS(s) (&(s))
2690 
2691 #else
2692 
2693 #define DEF_MARVELL_HWMON_OPS(s) NULL
2694 
2695 static int marvell_hwmon_probe(struct phy_device *phydev)
2696 {
2697 	return 0;
2698 }
2699 #endif
2700 
2701 static int marvell_probe(struct phy_device *phydev)
2702 {
2703 	struct marvell_priv *priv;
2704 
2705 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2706 	if (!priv)
2707 		return -ENOMEM;
2708 
2709 	phydev->priv = priv;
2710 
2711 	return marvell_hwmon_probe(phydev);
2712 }
2713 
2714 static struct phy_driver marvell_drivers[] = {
2715 	{
2716 		.phy_id = MARVELL_PHY_ID_88E1101,
2717 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2718 		.name = "Marvell 88E1101",
2719 		/* PHY_GBIT_FEATURES */
2720 		.probe = marvell_probe,
2721 		.config_init = marvell_config_init,
2722 		.config_aneg = m88e1101_config_aneg,
2723 		.config_intr = marvell_config_intr,
2724 		.handle_interrupt = marvell_handle_interrupt,
2725 		.resume = genphy_resume,
2726 		.suspend = genphy_suspend,
2727 		.read_page = marvell_read_page,
2728 		.write_page = marvell_write_page,
2729 		.get_sset_count = marvell_get_sset_count,
2730 		.get_strings = marvell_get_strings,
2731 		.get_stats = marvell_get_stats,
2732 	},
2733 	{
2734 		.phy_id = MARVELL_PHY_ID_88E1112,
2735 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2736 		.name = "Marvell 88E1112",
2737 		/* PHY_GBIT_FEATURES */
2738 		.probe = marvell_probe,
2739 		.config_init = m88e1112_config_init,
2740 		.config_aneg = marvell_config_aneg,
2741 		.config_intr = marvell_config_intr,
2742 		.handle_interrupt = marvell_handle_interrupt,
2743 		.resume = genphy_resume,
2744 		.suspend = genphy_suspend,
2745 		.read_page = marvell_read_page,
2746 		.write_page = marvell_write_page,
2747 		.get_sset_count = marvell_get_sset_count,
2748 		.get_strings = marvell_get_strings,
2749 		.get_stats = marvell_get_stats,
2750 		.get_tunable = m88e1011_get_tunable,
2751 		.set_tunable = m88e1011_set_tunable,
2752 	},
2753 	{
2754 		.phy_id = MARVELL_PHY_ID_88E1111,
2755 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2756 		.name = "Marvell 88E1111",
2757 		/* PHY_GBIT_FEATURES */
2758 		.probe = marvell_probe,
2759 		.config_init = m88e1111gbe_config_init,
2760 		.config_aneg = m88e1111_config_aneg,
2761 		.read_status = marvell_read_status,
2762 		.config_intr = marvell_config_intr,
2763 		.handle_interrupt = marvell_handle_interrupt,
2764 		.resume = genphy_resume,
2765 		.suspend = genphy_suspend,
2766 		.read_page = marvell_read_page,
2767 		.write_page = marvell_write_page,
2768 		.get_sset_count = marvell_get_sset_count,
2769 		.get_strings = marvell_get_strings,
2770 		.get_stats = marvell_get_stats,
2771 		.get_tunable = m88e1111_get_tunable,
2772 		.set_tunable = m88e1111_set_tunable,
2773 	},
2774 	{
2775 		.phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
2776 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2777 		.name = "Marvell 88E1111 (Finisar)",
2778 		/* PHY_GBIT_FEATURES */
2779 		.probe = marvell_probe,
2780 		.config_init = m88e1111gbe_config_init,
2781 		.config_aneg = m88e1111_config_aneg,
2782 		.read_status = marvell_read_status,
2783 		.config_intr = marvell_config_intr,
2784 		.handle_interrupt = marvell_handle_interrupt,
2785 		.resume = genphy_resume,
2786 		.suspend = genphy_suspend,
2787 		.read_page = marvell_read_page,
2788 		.write_page = marvell_write_page,
2789 		.get_sset_count = marvell_get_sset_count,
2790 		.get_strings = marvell_get_strings,
2791 		.get_stats = marvell_get_stats,
2792 		.get_tunable = m88e1111_get_tunable,
2793 		.set_tunable = m88e1111_set_tunable,
2794 	},
2795 	{
2796 		.phy_id = MARVELL_PHY_ID_88E1118,
2797 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2798 		.name = "Marvell 88E1118",
2799 		/* PHY_GBIT_FEATURES */
2800 		.probe = marvell_probe,
2801 		.config_init = m88e1118_config_init,
2802 		.config_aneg = m88e1118_config_aneg,
2803 		.config_intr = marvell_config_intr,
2804 		.handle_interrupt = marvell_handle_interrupt,
2805 		.resume = genphy_resume,
2806 		.suspend = genphy_suspend,
2807 		.read_page = marvell_read_page,
2808 		.write_page = marvell_write_page,
2809 		.get_sset_count = marvell_get_sset_count,
2810 		.get_strings = marvell_get_strings,
2811 		.get_stats = marvell_get_stats,
2812 	},
2813 	{
2814 		.phy_id = MARVELL_PHY_ID_88E1121R,
2815 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2816 		.name = "Marvell 88E1121R",
2817 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
2818 		/* PHY_GBIT_FEATURES */
2819 		.probe = marvell_probe,
2820 		.config_init = marvell_1011gbe_config_init,
2821 		.config_aneg = m88e1121_config_aneg,
2822 		.read_status = marvell_read_status,
2823 		.config_intr = marvell_config_intr,
2824 		.handle_interrupt = marvell_handle_interrupt,
2825 		.resume = genphy_resume,
2826 		.suspend = genphy_suspend,
2827 		.read_page = marvell_read_page,
2828 		.write_page = marvell_write_page,
2829 		.get_sset_count = marvell_get_sset_count,
2830 		.get_strings = marvell_get_strings,
2831 		.get_stats = marvell_get_stats,
2832 		.get_tunable = m88e1011_get_tunable,
2833 		.set_tunable = m88e1011_set_tunable,
2834 	},
2835 	{
2836 		.phy_id = MARVELL_PHY_ID_88E1318S,
2837 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2838 		.name = "Marvell 88E1318S",
2839 		/* PHY_GBIT_FEATURES */
2840 		.probe = marvell_probe,
2841 		.config_init = m88e1318_config_init,
2842 		.config_aneg = m88e1318_config_aneg,
2843 		.read_status = marvell_read_status,
2844 		.config_intr = marvell_config_intr,
2845 		.handle_interrupt = marvell_handle_interrupt,
2846 		.get_wol = m88e1318_get_wol,
2847 		.set_wol = m88e1318_set_wol,
2848 		.resume = genphy_resume,
2849 		.suspend = genphy_suspend,
2850 		.read_page = marvell_read_page,
2851 		.write_page = marvell_write_page,
2852 		.get_sset_count = marvell_get_sset_count,
2853 		.get_strings = marvell_get_strings,
2854 		.get_stats = marvell_get_stats,
2855 	},
2856 	{
2857 		.phy_id = MARVELL_PHY_ID_88E1145,
2858 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2859 		.name = "Marvell 88E1145",
2860 		/* PHY_GBIT_FEATURES */
2861 		.probe = marvell_probe,
2862 		.config_init = m88e1145_config_init,
2863 		.config_aneg = m88e1101_config_aneg,
2864 		.config_intr = marvell_config_intr,
2865 		.handle_interrupt = marvell_handle_interrupt,
2866 		.resume = genphy_resume,
2867 		.suspend = genphy_suspend,
2868 		.read_page = marvell_read_page,
2869 		.write_page = marvell_write_page,
2870 		.get_sset_count = marvell_get_sset_count,
2871 		.get_strings = marvell_get_strings,
2872 		.get_stats = marvell_get_stats,
2873 		.get_tunable = m88e1111_get_tunable,
2874 		.set_tunable = m88e1111_set_tunable,
2875 	},
2876 	{
2877 		.phy_id = MARVELL_PHY_ID_88E1149R,
2878 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2879 		.name = "Marvell 88E1149R",
2880 		/* PHY_GBIT_FEATURES */
2881 		.probe = marvell_probe,
2882 		.config_init = m88e1149_config_init,
2883 		.config_aneg = m88e1118_config_aneg,
2884 		.config_intr = marvell_config_intr,
2885 		.handle_interrupt = marvell_handle_interrupt,
2886 		.resume = genphy_resume,
2887 		.suspend = genphy_suspend,
2888 		.read_page = marvell_read_page,
2889 		.write_page = marvell_write_page,
2890 		.get_sset_count = marvell_get_sset_count,
2891 		.get_strings = marvell_get_strings,
2892 		.get_stats = marvell_get_stats,
2893 	},
2894 	{
2895 		.phy_id = MARVELL_PHY_ID_88E1240,
2896 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2897 		.name = "Marvell 88E1240",
2898 		/* PHY_GBIT_FEATURES */
2899 		.probe = marvell_probe,
2900 		.config_init = m88e1112_config_init,
2901 		.config_aneg = marvell_config_aneg,
2902 		.config_intr = marvell_config_intr,
2903 		.handle_interrupt = marvell_handle_interrupt,
2904 		.resume = genphy_resume,
2905 		.suspend = genphy_suspend,
2906 		.read_page = marvell_read_page,
2907 		.write_page = marvell_write_page,
2908 		.get_sset_count = marvell_get_sset_count,
2909 		.get_strings = marvell_get_strings,
2910 		.get_stats = marvell_get_stats,
2911 		.get_tunable = m88e1011_get_tunable,
2912 		.set_tunable = m88e1011_set_tunable,
2913 	},
2914 	{
2915 		.phy_id = MARVELL_PHY_ID_88E1116R,
2916 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2917 		.name = "Marvell 88E1116R",
2918 		/* PHY_GBIT_FEATURES */
2919 		.probe = marvell_probe,
2920 		.config_init = m88e1116r_config_init,
2921 		.config_intr = marvell_config_intr,
2922 		.handle_interrupt = marvell_handle_interrupt,
2923 		.resume = genphy_resume,
2924 		.suspend = genphy_suspend,
2925 		.read_page = marvell_read_page,
2926 		.write_page = marvell_write_page,
2927 		.get_sset_count = marvell_get_sset_count,
2928 		.get_strings = marvell_get_strings,
2929 		.get_stats = marvell_get_stats,
2930 		.get_tunable = m88e1011_get_tunable,
2931 		.set_tunable = m88e1011_set_tunable,
2932 	},
2933 	{
2934 		.phy_id = MARVELL_PHY_ID_88E1510,
2935 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2936 		.name = "Marvell 88E1510",
2937 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2938 		.features = PHY_GBIT_FIBRE_FEATURES,
2939 		.flags = PHY_POLL_CABLE_TEST,
2940 		.probe = marvell_probe,
2941 		.config_init = m88e1510_config_init,
2942 		.config_aneg = m88e1510_config_aneg,
2943 		.read_status = marvell_read_status,
2944 		.config_intr = marvell_config_intr,
2945 		.handle_interrupt = marvell_handle_interrupt,
2946 		.get_wol = m88e1318_get_wol,
2947 		.set_wol = m88e1318_set_wol,
2948 		.resume = marvell_resume,
2949 		.suspend = marvell_suspend,
2950 		.read_page = marvell_read_page,
2951 		.write_page = marvell_write_page,
2952 		.get_sset_count = marvell_get_sset_count,
2953 		.get_strings = marvell_get_strings,
2954 		.get_stats = marvell_get_stats,
2955 		.set_loopback = genphy_loopback,
2956 		.get_tunable = m88e1011_get_tunable,
2957 		.set_tunable = m88e1011_set_tunable,
2958 		.cable_test_start = marvell_vct7_cable_test_start,
2959 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2960 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
2961 	},
2962 	{
2963 		.phy_id = MARVELL_PHY_ID_88E1540,
2964 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2965 		.name = "Marvell 88E1540",
2966 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2967 		/* PHY_GBIT_FEATURES */
2968 		.flags = PHY_POLL_CABLE_TEST,
2969 		.probe = marvell_probe,
2970 		.config_init = marvell_1011gbe_config_init,
2971 		.config_aneg = m88e1510_config_aneg,
2972 		.read_status = marvell_read_status,
2973 		.config_intr = marvell_config_intr,
2974 		.handle_interrupt = marvell_handle_interrupt,
2975 		.resume = genphy_resume,
2976 		.suspend = genphy_suspend,
2977 		.read_page = marvell_read_page,
2978 		.write_page = marvell_write_page,
2979 		.get_sset_count = marvell_get_sset_count,
2980 		.get_strings = marvell_get_strings,
2981 		.get_stats = marvell_get_stats,
2982 		.get_tunable = m88e1540_get_tunable,
2983 		.set_tunable = m88e1540_set_tunable,
2984 		.cable_test_start = marvell_vct7_cable_test_start,
2985 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2986 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
2987 	},
2988 	{
2989 		.phy_id = MARVELL_PHY_ID_88E1545,
2990 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2991 		.name = "Marvell 88E1545",
2992 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2993 		.probe = marvell_probe,
2994 		/* PHY_GBIT_FEATURES */
2995 		.flags = PHY_POLL_CABLE_TEST,
2996 		.config_init = marvell_1011gbe_config_init,
2997 		.config_aneg = m88e1510_config_aneg,
2998 		.read_status = marvell_read_status,
2999 		.config_intr = marvell_config_intr,
3000 		.handle_interrupt = marvell_handle_interrupt,
3001 		.resume = genphy_resume,
3002 		.suspend = genphy_suspend,
3003 		.read_page = marvell_read_page,
3004 		.write_page = marvell_write_page,
3005 		.get_sset_count = marvell_get_sset_count,
3006 		.get_strings = marvell_get_strings,
3007 		.get_stats = marvell_get_stats,
3008 		.get_tunable = m88e1540_get_tunable,
3009 		.set_tunable = m88e1540_set_tunable,
3010 		.cable_test_start = marvell_vct7_cable_test_start,
3011 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3012 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3013 	},
3014 	{
3015 		.phy_id = MARVELL_PHY_ID_88E3016,
3016 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3017 		.name = "Marvell 88E3016",
3018 		/* PHY_BASIC_FEATURES */
3019 		.probe = marvell_probe,
3020 		.config_init = m88e3016_config_init,
3021 		.aneg_done = marvell_aneg_done,
3022 		.read_status = marvell_read_status,
3023 		.config_intr = marvell_config_intr,
3024 		.handle_interrupt = marvell_handle_interrupt,
3025 		.resume = genphy_resume,
3026 		.suspend = genphy_suspend,
3027 		.read_page = marvell_read_page,
3028 		.write_page = marvell_write_page,
3029 		.get_sset_count = marvell_get_sset_count,
3030 		.get_strings = marvell_get_strings,
3031 		.get_stats = marvell_get_stats,
3032 	},
3033 	{
3034 		.phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
3035 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3036 		.name = "Marvell 88E6341 Family",
3037 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3038 		/* PHY_GBIT_FEATURES */
3039 		.flags = PHY_POLL_CABLE_TEST,
3040 		.probe = marvell_probe,
3041 		.config_init = marvell_1011gbe_config_init,
3042 		.config_aneg = m88e6390_config_aneg,
3043 		.read_status = marvell_read_status,
3044 		.config_intr = marvell_config_intr,
3045 		.handle_interrupt = marvell_handle_interrupt,
3046 		.resume = genphy_resume,
3047 		.suspend = genphy_suspend,
3048 		.read_page = marvell_read_page,
3049 		.write_page = marvell_write_page,
3050 		.get_sset_count = marvell_get_sset_count,
3051 		.get_strings = marvell_get_strings,
3052 		.get_stats = marvell_get_stats,
3053 		.get_tunable = m88e1540_get_tunable,
3054 		.set_tunable = m88e1540_set_tunable,
3055 		.cable_test_start = marvell_vct7_cable_test_start,
3056 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3057 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3058 	},
3059 	{
3060 		.phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
3061 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3062 		.name = "Marvell 88E6390 Family",
3063 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
3064 		/* PHY_GBIT_FEATURES */
3065 		.flags = PHY_POLL_CABLE_TEST,
3066 		.probe = marvell_probe,
3067 		.config_init = marvell_1011gbe_config_init,
3068 		.config_aneg = m88e6390_config_aneg,
3069 		.read_status = marvell_read_status,
3070 		.config_intr = marvell_config_intr,
3071 		.handle_interrupt = marvell_handle_interrupt,
3072 		.resume = genphy_resume,
3073 		.suspend = genphy_suspend,
3074 		.read_page = marvell_read_page,
3075 		.write_page = marvell_write_page,
3076 		.get_sset_count = marvell_get_sset_count,
3077 		.get_strings = marvell_get_strings,
3078 		.get_stats = marvell_get_stats,
3079 		.get_tunable = m88e1540_get_tunable,
3080 		.set_tunable = m88e1540_set_tunable,
3081 		.cable_test_start = marvell_vct7_cable_test_start,
3082 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3083 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3084 	},
3085 	{
3086 		.phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
3087 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3088 		.name = "Marvell 88E6393 Family",
3089 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
3090 		/* PHY_GBIT_FEATURES */
3091 		.flags = PHY_POLL_CABLE_TEST,
3092 		.probe = marvell_probe,
3093 		.config_init = marvell_1011gbe_config_init,
3094 		.config_aneg = m88e1510_config_aneg,
3095 		.read_status = marvell_read_status,
3096 		.config_intr = marvell_config_intr,
3097 		.handle_interrupt = marvell_handle_interrupt,
3098 		.resume = genphy_resume,
3099 		.suspend = genphy_suspend,
3100 		.read_page = marvell_read_page,
3101 		.write_page = marvell_write_page,
3102 		.get_sset_count = marvell_get_sset_count,
3103 		.get_strings = marvell_get_strings,
3104 		.get_stats = marvell_get_stats,
3105 		.get_tunable = m88e1540_get_tunable,
3106 		.set_tunable = m88e1540_set_tunable,
3107 		.cable_test_start = marvell_vct7_cable_test_start,
3108 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3109 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3110 	},
3111 	{
3112 		.phy_id = MARVELL_PHY_ID_88E1340S,
3113 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3114 		.name = "Marvell 88E1340S",
3115 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3116 		.probe = marvell_probe,
3117 		/* PHY_GBIT_FEATURES */
3118 		.config_init = marvell_1011gbe_config_init,
3119 		.config_aneg = m88e1510_config_aneg,
3120 		.read_status = marvell_read_status,
3121 		.config_intr = marvell_config_intr,
3122 		.handle_interrupt = marvell_handle_interrupt,
3123 		.resume = genphy_resume,
3124 		.suspend = genphy_suspend,
3125 		.read_page = marvell_read_page,
3126 		.write_page = marvell_write_page,
3127 		.get_sset_count = marvell_get_sset_count,
3128 		.get_strings = marvell_get_strings,
3129 		.get_stats = marvell_get_stats,
3130 		.get_tunable = m88e1540_get_tunable,
3131 		.set_tunable = m88e1540_set_tunable,
3132 	},
3133 	{
3134 		.phy_id = MARVELL_PHY_ID_88E1548P,
3135 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3136 		.name = "Marvell 88E1548P",
3137 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3138 		.probe = marvell_probe,
3139 		.features = PHY_GBIT_FIBRE_FEATURES,
3140 		.config_init = marvell_1011gbe_config_init,
3141 		.config_aneg = m88e1510_config_aneg,
3142 		.read_status = marvell_read_status,
3143 		.config_intr = marvell_config_intr,
3144 		.handle_interrupt = marvell_handle_interrupt,
3145 		.resume = genphy_resume,
3146 		.suspend = genphy_suspend,
3147 		.read_page = marvell_read_page,
3148 		.write_page = marvell_write_page,
3149 		.get_sset_count = marvell_get_sset_count,
3150 		.get_strings = marvell_get_strings,
3151 		.get_stats = marvell_get_stats,
3152 		.get_tunable = m88e1540_get_tunable,
3153 		.set_tunable = m88e1540_set_tunable,
3154 	},
3155 };
3156 
3157 module_phy_driver(marvell_drivers);
3158 
3159 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
3160 	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
3161 	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
3162 	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
3163 	{ MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
3164 	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
3165 	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3166 	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3167 	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3168 	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3169 	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3170 	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3171 	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3172 	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3173 	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3174 	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3175 	{ MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
3176 	{ MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
3177 	{ MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
3178 	{ MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3179 	{ MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3180 	{ }
3181 };
3182 
3183 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
3184