xref: /openbmc/linux/drivers/net/phy/marvell.c (revision 5f66f73b)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * drivers/net/phy/marvell.c
4  *
5  * Driver for Marvell PHYs
6  *
7  * Author: Andy Fleming
8  *
9  * Copyright (c) 2004 Freescale Semiconductor, Inc.
10  *
11  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12  */
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
26 #include <linux/mm.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/ethtool_netlink.h>
31 #include <linux/phy.h>
32 #include <linux/marvell_phy.h>
33 #include <linux/bitfield.h>
34 #include <linux/of.h>
35 
36 #include <linux/io.h>
37 #include <asm/irq.h>
38 #include <linux/uaccess.h>
39 
40 #define MII_MARVELL_PHY_PAGE		22
41 #define MII_MARVELL_COPPER_PAGE		0x00
42 #define MII_MARVELL_FIBER_PAGE		0x01
43 #define MII_MARVELL_MSCR_PAGE		0x02
44 #define MII_MARVELL_LED_PAGE		0x03
45 #define MII_MARVELL_VCT5_PAGE		0x05
46 #define MII_MARVELL_MISC_TEST_PAGE	0x06
47 #define MII_MARVELL_VCT7_PAGE		0x07
48 #define MII_MARVELL_WOL_PAGE		0x11
49 
50 #define MII_M1011_IEVENT		0x13
51 #define MII_M1011_IEVENT_CLEAR		0x0000
52 
53 #define MII_M1011_IMASK			0x12
54 #define MII_M1011_IMASK_INIT		0x6400
55 #define MII_M1011_IMASK_CLEAR		0x0000
56 
57 #define MII_M1011_PHY_SCR			0x10
58 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN		BIT(11)
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK	GENMASK(14, 12)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX		8
61 #define MII_M1011_PHY_SCR_MDI			(0x0 << 5)
62 #define MII_M1011_PHY_SCR_MDI_X			(0x1 << 5)
63 #define MII_M1011_PHY_SCR_AUTO_CROSS		(0x3 << 5)
64 
65 #define MII_M1011_PHY_SSR			0x11
66 #define MII_M1011_PHY_SSR_DOWNSHIFT		BIT(5)
67 
68 #define MII_M1111_PHY_LED_CONTROL	0x18
69 #define MII_M1111_PHY_LED_DIRECT	0x4100
70 #define MII_M1111_PHY_LED_COMBINE	0x411c
71 #define MII_M1111_PHY_EXT_CR		0x14
72 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK	GENMASK(11, 9)
73 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX	8
74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN	BIT(8)
75 #define MII_M1111_RGMII_RX_DELAY	BIT(7)
76 #define MII_M1111_RGMII_TX_DELAY	BIT(1)
77 #define MII_M1111_PHY_EXT_SR		0x1b
78 
79 #define MII_M1111_HWCFG_MODE_MASK		0xf
80 #define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
81 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
82 #define MII_M1111_HWCFG_MODE_RTBI		0x7
83 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN	0x8
84 #define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
85 #define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
86 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN	0xc
87 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS	BIT(12)
88 #define MII_M1111_HWCFG_FIBER_COPPER_RES	BIT(13)
89 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO	BIT(15)
90 
91 #define MII_88E1121_PHY_MSCR_REG	21
92 #define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
93 #define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
94 #define MII_88E1121_PHY_MSCR_DELAY_MASK	(BIT(5) | BIT(4))
95 
96 #define MII_88E1121_MISC_TEST				0x1a
97 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
98 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
99 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
100 #define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
101 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
102 #define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f
103 
104 #define MII_88E1510_TEMP_SENSOR		0x1b
105 #define MII_88E1510_TEMP_SENSOR_MASK	0xff
106 
107 #define MII_88E1540_COPPER_CTRL3	0x1a
108 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK	GENMASK(11, 10)
109 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS	0
110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS	1
111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS	2
112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS	3
113 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN		BIT(9)
114 
115 #define MII_88E6390_MISC_TEST		0x1b
116 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S	(0x0 << 14)
117 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE		(0x1 << 14)
118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT	(0x2 << 14)
119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE		(0x3 << 14)
120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK			(0x3 << 14)
121 #define MII_88E6393_MISC_TEST_SAMPLES_2048	(0x0 << 11)
122 #define MII_88E6393_MISC_TEST_SAMPLES_4096	(0x1 << 11)
123 #define MII_88E6393_MISC_TEST_SAMPLES_8192	(0x2 << 11)
124 #define MII_88E6393_MISC_TEST_SAMPLES_16384	(0x3 << 11)
125 #define MII_88E6393_MISC_TEST_SAMPLES_MASK	(0x3 << 11)
126 #define MII_88E6393_MISC_TEST_RATE_2_3MS	(0x5 << 8)
127 #define MII_88E6393_MISC_TEST_RATE_6_4MS	(0x6 << 8)
128 #define MII_88E6393_MISC_TEST_RATE_11_9MS	(0x7 << 8)
129 #define MII_88E6393_MISC_TEST_RATE_MASK		(0x7 << 8)
130 
131 #define MII_88E6390_TEMP_SENSOR		0x1c
132 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK	0xff00
133 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT	8
134 #define MII_88E6390_TEMP_SENSOR_MASK		0xff
135 #define MII_88E6390_TEMP_SENSOR_SAMPLES		10
136 
137 #define MII_88E1318S_PHY_MSCR1_REG	16
138 #define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
139 
140 /* Copper Specific Interrupt Enable Register */
141 #define MII_88E1318S_PHY_CSIER				0x12
142 /* WOL Event Interrupt Enable */
143 #define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
144 
145 /* LED Timer Control Register */
146 #define MII_88E1318S_PHY_LED_TCR			0x12
147 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT		BIT(15)
148 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE		BIT(7)
149 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW		BIT(11)
150 
151 /* Magic Packet MAC address registers */
152 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2		0x17
153 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1		0x18
154 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0		0x19
155 
156 #define MII_88E1318S_PHY_WOL_CTRL				0x10
157 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS		BIT(12)
158 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE	BIT(14)
159 
160 #define MII_PHY_LED_CTRL	        16
161 #define MII_88E1121_PHY_LED_DEF		0x0030
162 #define MII_88E1510_PHY_LED_DEF		0x1177
163 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE	0x1040
164 
165 #define MII_M1011_PHY_STATUS		0x11
166 #define MII_M1011_PHY_STATUS_1000	0x8000
167 #define MII_M1011_PHY_STATUS_100	0x4000
168 #define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
169 #define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
170 #define MII_M1011_PHY_STATUS_RESOLVED	0x0800
171 #define MII_M1011_PHY_STATUS_LINK	0x0400
172 
173 #define MII_88E3016_PHY_SPEC_CTRL	0x10
174 #define MII_88E3016_DISABLE_SCRAMBLER	0x0200
175 #define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
176 
177 #define MII_88E1510_GEN_CTRL_REG_1		0x14
178 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
179 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
180 #define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */
181 
182 #define MII_VCT5_TX_RX_MDI0_COUPLING	0x10
183 #define MII_VCT5_TX_RX_MDI1_COUPLING	0x11
184 #define MII_VCT5_TX_RX_MDI2_COUPLING	0x12
185 #define MII_VCT5_TX_RX_MDI3_COUPLING	0x13
186 #define MII_VCT5_TX_RX_AMPLITUDE_MASK	0x7f00
187 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT	8
188 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION	BIT(15)
189 
190 #define MII_VCT5_CTRL				0x17
191 #define MII_VCT5_CTRL_ENABLE				BIT(15)
192 #define MII_VCT5_CTRL_COMPLETE				BIT(14)
193 #define MII_VCT5_CTRL_TX_SAME_CHANNEL			(0x0 << 11)
194 #define MII_VCT5_CTRL_TX0_CHANNEL			(0x4 << 11)
195 #define MII_VCT5_CTRL_TX1_CHANNEL			(0x5 << 11)
196 #define MII_VCT5_CTRL_TX2_CHANNEL			(0x6 << 11)
197 #define MII_VCT5_CTRL_TX3_CHANNEL			(0x7 << 11)
198 #define MII_VCT5_CTRL_SAMPLES_2				(0x0 << 8)
199 #define MII_VCT5_CTRL_SAMPLES_4				(0x1 << 8)
200 #define MII_VCT5_CTRL_SAMPLES_8				(0x2 << 8)
201 #define MII_VCT5_CTRL_SAMPLES_16			(0x3 << 8)
202 #define MII_VCT5_CTRL_SAMPLES_32			(0x4 << 8)
203 #define MII_VCT5_CTRL_SAMPLES_64			(0x5 << 8)
204 #define MII_VCT5_CTRL_SAMPLES_128			(0x6 << 8)
205 #define MII_VCT5_CTRL_SAMPLES_DEFAULT			(0x6 << 8)
206 #define MII_VCT5_CTRL_SAMPLES_256			(0x7 << 8)
207 #define MII_VCT5_CTRL_SAMPLES_SHIFT			8
208 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK			(0x0 << 6)
209 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK		(0x1 << 6)
210 #define MII_VCT5_CTRL_MODE_OFFSET			(0x2 << 6)
211 #define MII_VCT5_CTRL_SAMPLE_POINT			(0x3 << 6)
212 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT			3
213 
214 #define MII_VCT5_SAMPLE_POINT_DISTANCE		0x18
215 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX	511
216 #define MII_VCT5_TX_PULSE_CTRL			0x1c
217 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN	BIT(12)
218 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS	(0x0 << 10)
219 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS		(0x1 << 10)
220 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS		(0x2 << 10)
221 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS		(0x3 << 10)
222 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT	10
223 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV	(0x0 << 8)
224 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV	(0x1 << 8)
225 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV	(0x2 << 8)
226 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV	(0x3 << 8)
227 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT	8
228 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP			BIT(7)
229 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV		(0x6 << 0)
230 
231 /* For TDR measurements less than 11 meters, a short pulse should be
232  * used.
233  */
234 #define TDR_SHORT_CABLE_LENGTH	11
235 
236 #define MII_VCT7_PAIR_0_DISTANCE	0x10
237 #define MII_VCT7_PAIR_1_DISTANCE	0x11
238 #define MII_VCT7_PAIR_2_DISTANCE	0x12
239 #define MII_VCT7_PAIR_3_DISTANCE	0x13
240 
241 #define MII_VCT7_RESULTS	0x14
242 #define MII_VCT7_RESULTS_PAIR3_MASK	0xf000
243 #define MII_VCT7_RESULTS_PAIR2_MASK	0x0f00
244 #define MII_VCT7_RESULTS_PAIR1_MASK	0x00f0
245 #define MII_VCT7_RESULTS_PAIR0_MASK	0x000f
246 #define MII_VCT7_RESULTS_PAIR3_SHIFT	12
247 #define MII_VCT7_RESULTS_PAIR2_SHIFT	8
248 #define MII_VCT7_RESULTS_PAIR1_SHIFT	4
249 #define MII_VCT7_RESULTS_PAIR0_SHIFT	0
250 #define MII_VCT7_RESULTS_INVALID	0
251 #define MII_VCT7_RESULTS_OK		1
252 #define MII_VCT7_RESULTS_OPEN		2
253 #define MII_VCT7_RESULTS_SAME_SHORT	3
254 #define MII_VCT7_RESULTS_CROSS_SHORT	4
255 #define MII_VCT7_RESULTS_BUSY		9
256 
257 #define MII_VCT7_CTRL		0x15
258 #define MII_VCT7_CTRL_RUN_NOW			BIT(15)
259 #define MII_VCT7_CTRL_RUN_ANEG			BIT(14)
260 #define MII_VCT7_CTRL_DISABLE_CROSS		BIT(13)
261 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK	BIT(12)
262 #define MII_VCT7_CTRL_IN_PROGRESS		BIT(11)
263 #define MII_VCT7_CTRL_METERS			BIT(10)
264 #define MII_VCT7_CTRL_CENTIMETERS		0
265 
266 #define LPA_PAUSE_FIBER		0x180
267 #define LPA_PAUSE_ASYM_FIBER	0x100
268 
269 #define NB_FIBER_STATS	1
270 
271 MODULE_DESCRIPTION("Marvell PHY driver");
272 MODULE_AUTHOR("Andy Fleming");
273 MODULE_LICENSE("GPL");
274 
275 struct marvell_hw_stat {
276 	const char *string;
277 	u8 page;
278 	u8 reg;
279 	u8 bits;
280 };
281 
282 static struct marvell_hw_stat marvell_hw_stats[] = {
283 	{ "phy_receive_errors_copper", 0, 21, 16},
284 	{ "phy_idle_errors", 0, 10, 8 },
285 	{ "phy_receive_errors_fiber", 1, 21, 16},
286 };
287 
288 struct marvell_priv {
289 	u64 stats[ARRAY_SIZE(marvell_hw_stats)];
290 	char *hwmon_name;
291 	struct device *hwmon_dev;
292 	bool cable_test_tdr;
293 	u32 first;
294 	u32 last;
295 	u32 step;
296 	s8 pair;
297 };
298 
299 static int marvell_read_page(struct phy_device *phydev)
300 {
301 	return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
302 }
303 
304 static int marvell_write_page(struct phy_device *phydev, int page)
305 {
306 	return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
307 }
308 
309 static int marvell_set_page(struct phy_device *phydev, int page)
310 {
311 	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
312 }
313 
314 static int marvell_ack_interrupt(struct phy_device *phydev)
315 {
316 	int err;
317 
318 	/* Clear the interrupts by reading the reg */
319 	err = phy_read(phydev, MII_M1011_IEVENT);
320 
321 	if (err < 0)
322 		return err;
323 
324 	return 0;
325 }
326 
327 static int marvell_config_intr(struct phy_device *phydev)
328 {
329 	int err;
330 
331 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
332 		err = marvell_ack_interrupt(phydev);
333 		if (err)
334 			return err;
335 
336 		err = phy_write(phydev, MII_M1011_IMASK,
337 				MII_M1011_IMASK_INIT);
338 	} else {
339 		err = phy_write(phydev, MII_M1011_IMASK,
340 				MII_M1011_IMASK_CLEAR);
341 		if (err)
342 			return err;
343 
344 		err = marvell_ack_interrupt(phydev);
345 	}
346 
347 	return err;
348 }
349 
350 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
351 {
352 	int irq_status;
353 
354 	irq_status = phy_read(phydev, MII_M1011_IEVENT);
355 	if (irq_status < 0) {
356 		phy_error(phydev);
357 		return IRQ_NONE;
358 	}
359 
360 	if (!(irq_status & MII_M1011_IMASK_INIT))
361 		return IRQ_NONE;
362 
363 	phy_trigger_machine(phydev);
364 
365 	return IRQ_HANDLED;
366 }
367 
368 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
369 {
370 	int reg;
371 	int err;
372 	int val;
373 
374 	/* get the current settings */
375 	reg = phy_read(phydev, MII_M1011_PHY_SCR);
376 	if (reg < 0)
377 		return reg;
378 
379 	val = reg;
380 	val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
381 	switch (polarity) {
382 	case ETH_TP_MDI:
383 		val |= MII_M1011_PHY_SCR_MDI;
384 		break;
385 	case ETH_TP_MDI_X:
386 		val |= MII_M1011_PHY_SCR_MDI_X;
387 		break;
388 	case ETH_TP_MDI_AUTO:
389 	case ETH_TP_MDI_INVALID:
390 	default:
391 		val |= MII_M1011_PHY_SCR_AUTO_CROSS;
392 		break;
393 	}
394 
395 	if (val != reg) {
396 		/* Set the new polarity value in the register */
397 		err = phy_write(phydev, MII_M1011_PHY_SCR, val);
398 		if (err)
399 			return err;
400 	}
401 
402 	return val != reg;
403 }
404 
405 static int marvell_config_aneg(struct phy_device *phydev)
406 {
407 	int changed = 0;
408 	int err;
409 
410 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
411 	if (err < 0)
412 		return err;
413 
414 	changed = err;
415 
416 	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
417 			MII_M1111_PHY_LED_DIRECT);
418 	if (err < 0)
419 		return err;
420 
421 	err = genphy_config_aneg(phydev);
422 	if (err < 0)
423 		return err;
424 
425 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
426 		/* A write to speed/duplex bits (that is performed by
427 		 * genphy_config_aneg() call above) must be followed by
428 		 * a software reset. Otherwise, the write has no effect.
429 		 */
430 		err = genphy_soft_reset(phydev);
431 		if (err < 0)
432 			return err;
433 	}
434 
435 	return 0;
436 }
437 
438 static int m88e1101_config_aneg(struct phy_device *phydev)
439 {
440 	int err;
441 
442 	/* This Marvell PHY has an errata which requires
443 	 * that certain registers get written in order
444 	 * to restart autonegotiation
445 	 */
446 	err = genphy_soft_reset(phydev);
447 	if (err < 0)
448 		return err;
449 
450 	err = phy_write(phydev, 0x1d, 0x1f);
451 	if (err < 0)
452 		return err;
453 
454 	err = phy_write(phydev, 0x1e, 0x200c);
455 	if (err < 0)
456 		return err;
457 
458 	err = phy_write(phydev, 0x1d, 0x5);
459 	if (err < 0)
460 		return err;
461 
462 	err = phy_write(phydev, 0x1e, 0);
463 	if (err < 0)
464 		return err;
465 
466 	err = phy_write(phydev, 0x1e, 0x100);
467 	if (err < 0)
468 		return err;
469 
470 	return marvell_config_aneg(phydev);
471 }
472 
473 #if IS_ENABLED(CONFIG_OF_MDIO)
474 /* Set and/or override some configuration registers based on the
475  * marvell,reg-init property stored in the of_node for the phydev.
476  *
477  * marvell,reg-init = <reg-page reg mask value>,...;
478  *
479  * There may be one or more sets of <reg-page reg mask value>:
480  *
481  * reg-page: which register bank to use.
482  * reg: the register.
483  * mask: if non-zero, ANDed with existing register value.
484  * value: ORed with the masked value and written to the regiser.
485  *
486  */
487 static int marvell_of_reg_init(struct phy_device *phydev)
488 {
489 	const __be32 *paddr;
490 	int len, i, saved_page, current_page, ret = 0;
491 
492 	if (!phydev->mdio.dev.of_node)
493 		return 0;
494 
495 	paddr = of_get_property(phydev->mdio.dev.of_node,
496 				"marvell,reg-init", &len);
497 	if (!paddr || len < (4 * sizeof(*paddr)))
498 		return 0;
499 
500 	saved_page = phy_save_page(phydev);
501 	if (saved_page < 0)
502 		goto err;
503 	current_page = saved_page;
504 
505 	len /= sizeof(*paddr);
506 	for (i = 0; i < len - 3; i += 4) {
507 		u16 page = be32_to_cpup(paddr + i);
508 		u16 reg = be32_to_cpup(paddr + i + 1);
509 		u16 mask = be32_to_cpup(paddr + i + 2);
510 		u16 val_bits = be32_to_cpup(paddr + i + 3);
511 		int val;
512 
513 		if (page != current_page) {
514 			current_page = page;
515 			ret = marvell_write_page(phydev, page);
516 			if (ret < 0)
517 				goto err;
518 		}
519 
520 		val = 0;
521 		if (mask) {
522 			val = __phy_read(phydev, reg);
523 			if (val < 0) {
524 				ret = val;
525 				goto err;
526 			}
527 			val &= mask;
528 		}
529 		val |= val_bits;
530 
531 		ret = __phy_write(phydev, reg, val);
532 		if (ret < 0)
533 			goto err;
534 	}
535 err:
536 	return phy_restore_page(phydev, saved_page, ret);
537 }
538 #else
539 static int marvell_of_reg_init(struct phy_device *phydev)
540 {
541 	return 0;
542 }
543 #endif /* CONFIG_OF_MDIO */
544 
545 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
546 {
547 	int mscr;
548 
549 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
550 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
551 		       MII_88E1121_PHY_MSCR_TX_DELAY;
552 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
553 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
554 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
555 		mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
556 	else
557 		mscr = 0;
558 
559 	return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
560 				MII_88E1121_PHY_MSCR_REG,
561 				MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
562 }
563 
564 static int m88e1121_config_aneg(struct phy_device *phydev)
565 {
566 	int changed = 0;
567 	int err = 0;
568 
569 	if (phy_interface_is_rgmii(phydev)) {
570 		err = m88e1121_config_aneg_rgmii_delays(phydev);
571 		if (err < 0)
572 			return err;
573 	}
574 
575 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
576 	if (err < 0)
577 		return err;
578 
579 	changed = err;
580 
581 	err = genphy_config_aneg(phydev);
582 	if (err < 0)
583 		return err;
584 
585 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
586 		/* A software reset is used to ensure a "commit" of the
587 		 * changes is done.
588 		 */
589 		err = genphy_soft_reset(phydev);
590 		if (err < 0)
591 			return err;
592 	}
593 
594 	return 0;
595 }
596 
597 static int m88e1318_config_aneg(struct phy_device *phydev)
598 {
599 	int err;
600 
601 	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
602 			       MII_88E1318S_PHY_MSCR1_REG,
603 			       0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
604 	if (err < 0)
605 		return err;
606 
607 	return m88e1121_config_aneg(phydev);
608 }
609 
610 /**
611  * linkmode_adv_to_fiber_adv_t
612  * @advertise: the linkmode advertisement settings
613  *
614  * A small helper function that translates linkmode advertisement
615  * settings to phy autonegotiation advertisements for the MII_ADV
616  * register for fiber link.
617  */
618 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
619 {
620 	u32 result = 0;
621 
622 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
623 		result |= ADVERTISE_1000XHALF;
624 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
625 		result |= ADVERTISE_1000XFULL;
626 
627 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
628 	    linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
629 		result |= ADVERTISE_1000XPSE_ASYM;
630 	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
631 		result |= ADVERTISE_1000XPAUSE;
632 
633 	return result;
634 }
635 
636 /**
637  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
638  * @phydev: target phy_device struct
639  *
640  * Description: If auto-negotiation is enabled, we configure the
641  *   advertising, and then restart auto-negotiation.  If it is not
642  *   enabled, then we write the BMCR. Adapted for fiber link in
643  *   some Marvell's devices.
644  */
645 static int marvell_config_aneg_fiber(struct phy_device *phydev)
646 {
647 	int changed = 0;
648 	int err;
649 	u16 adv;
650 
651 	if (phydev->autoneg != AUTONEG_ENABLE)
652 		return genphy_setup_forced(phydev);
653 
654 	/* Only allow advertising what this PHY supports */
655 	linkmode_and(phydev->advertising, phydev->advertising,
656 		     phydev->supported);
657 
658 	adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
659 
660 	/* Setup fiber advertisement */
661 	err = phy_modify_changed(phydev, MII_ADVERTISE,
662 				 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
663 				 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
664 				 adv);
665 	if (err < 0)
666 		return err;
667 	if (err > 0)
668 		changed = 1;
669 
670 	return genphy_check_and_restart_aneg(phydev, changed);
671 }
672 
673 static int m88e1111_config_aneg(struct phy_device *phydev)
674 {
675 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
676 	int err;
677 
678 	if (extsr < 0)
679 		return extsr;
680 
681 	/* If not using SGMII or copper 1000BaseX modes, use normal process.
682 	 * Steps below are only required for these modes.
683 	 */
684 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
685 	    (extsr & MII_M1111_HWCFG_MODE_MASK) !=
686 	    MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
687 		return marvell_config_aneg(phydev);
688 
689 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
690 	if (err < 0)
691 		goto error;
692 
693 	/* Configure the copper link first */
694 	err = marvell_config_aneg(phydev);
695 	if (err < 0)
696 		goto error;
697 
698 	/* Then the fiber link */
699 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
700 	if (err < 0)
701 		goto error;
702 
703 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
704 		/* Do not touch the fiber advertisement if we're in copper->sgmii mode.
705 		 * Just ensure that SGMII-side autonegotiation is enabled.
706 		 * If we switched from some other mode to SGMII it may not be.
707 		 */
708 		err = genphy_check_and_restart_aneg(phydev, false);
709 	else
710 		err = marvell_config_aneg_fiber(phydev);
711 	if (err < 0)
712 		goto error;
713 
714 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
715 
716 error:
717 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
718 	return err;
719 }
720 
721 static int m88e1510_config_aneg(struct phy_device *phydev)
722 {
723 	int err;
724 
725 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
726 	if (err < 0)
727 		goto error;
728 
729 	/* Configure the copper link first */
730 	err = m88e1318_config_aneg(phydev);
731 	if (err < 0)
732 		goto error;
733 
734 	/* Do not touch the fiber page if we're in copper->sgmii mode */
735 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
736 		return 0;
737 
738 	/* Then the fiber link */
739 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
740 	if (err < 0)
741 		goto error;
742 
743 	err = marvell_config_aneg_fiber(phydev);
744 	if (err < 0)
745 		goto error;
746 
747 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
748 
749 error:
750 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
751 	return err;
752 }
753 
754 static void marvell_config_led(struct phy_device *phydev)
755 {
756 	u16 def_config;
757 	int err;
758 
759 	switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
760 	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
761 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
762 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
763 		def_config = MII_88E1121_PHY_LED_DEF;
764 		break;
765 	/* Default PHY LED config:
766 	 * LED[0] .. 1000Mbps Link
767 	 * LED[1] .. 100Mbps Link
768 	 * LED[2] .. Blink, Activity
769 	 */
770 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
771 		if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
772 			def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
773 		else
774 			def_config = MII_88E1510_PHY_LED_DEF;
775 		break;
776 	default:
777 		return;
778 	}
779 
780 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
781 			      def_config);
782 	if (err < 0)
783 		phydev_warn(phydev, "Fail to config marvell phy LED.\n");
784 }
785 
786 static int marvell_config_init(struct phy_device *phydev)
787 {
788 	/* Set default LED */
789 	marvell_config_led(phydev);
790 
791 	/* Set registers from marvell,reg-init DT property */
792 	return marvell_of_reg_init(phydev);
793 }
794 
795 static int m88e3016_config_init(struct phy_device *phydev)
796 {
797 	int ret;
798 
799 	/* Enable Scrambler and Auto-Crossover */
800 	ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
801 			 MII_88E3016_DISABLE_SCRAMBLER,
802 			 MII_88E3016_AUTO_MDIX_CROSSOVER);
803 	if (ret < 0)
804 		return ret;
805 
806 	return marvell_config_init(phydev);
807 }
808 
809 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
810 					   u16 mode,
811 					   int fibre_copper_auto)
812 {
813 	if (fibre_copper_auto)
814 		mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
815 
816 	return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
817 			  MII_M1111_HWCFG_MODE_MASK |
818 			  MII_M1111_HWCFG_FIBER_COPPER_AUTO |
819 			  MII_M1111_HWCFG_FIBER_COPPER_RES,
820 			  mode);
821 }
822 
823 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
824 {
825 	int delay;
826 
827 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
828 		delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
829 	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
830 		delay = MII_M1111_RGMII_RX_DELAY;
831 	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
832 		delay = MII_M1111_RGMII_TX_DELAY;
833 	} else {
834 		delay = 0;
835 	}
836 
837 	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
838 			  MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
839 			  delay);
840 }
841 
842 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
843 {
844 	int temp;
845 	int err;
846 
847 	err = m88e1111_config_init_rgmii_delays(phydev);
848 	if (err < 0)
849 		return err;
850 
851 	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
852 	if (temp < 0)
853 		return temp;
854 
855 	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
856 
857 	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
858 		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
859 	else
860 		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
861 
862 	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
863 }
864 
865 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
866 {
867 	int err;
868 
869 	err = m88e1111_config_init_hwcfg_mode(
870 		phydev,
871 		MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
872 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
873 	if (err < 0)
874 		return err;
875 
876 	/* make sure copper is selected */
877 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
878 }
879 
880 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
881 {
882 	int err;
883 
884 	err = m88e1111_config_init_rgmii_delays(phydev);
885 	if (err < 0)
886 		return err;
887 
888 	err = m88e1111_config_init_hwcfg_mode(
889 		phydev,
890 		MII_M1111_HWCFG_MODE_RTBI,
891 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
892 	if (err < 0)
893 		return err;
894 
895 	/* soft reset */
896 	err = genphy_soft_reset(phydev);
897 	if (err < 0)
898 		return err;
899 
900 	return m88e1111_config_init_hwcfg_mode(
901 		phydev,
902 		MII_M1111_HWCFG_MODE_RTBI,
903 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
904 }
905 
906 static int m88e1111_config_init_1000basex(struct phy_device *phydev)
907 {
908 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
909 	int err, mode;
910 
911 	if (extsr < 0)
912 		return extsr;
913 
914 	/* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
915 	mode = extsr & MII_M1111_HWCFG_MODE_MASK;
916 	if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
917 		err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
918 				 MII_M1111_HWCFG_MODE_MASK |
919 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
920 				 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
921 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
922 		if (err < 0)
923 			return err;
924 	}
925 	return 0;
926 }
927 
928 static int m88e1111_config_init(struct phy_device *phydev)
929 {
930 	int err;
931 
932 	if (phy_interface_is_rgmii(phydev)) {
933 		err = m88e1111_config_init_rgmii(phydev);
934 		if (err < 0)
935 			return err;
936 	}
937 
938 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
939 		err = m88e1111_config_init_sgmii(phydev);
940 		if (err < 0)
941 			return err;
942 	}
943 
944 	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
945 		err = m88e1111_config_init_rtbi(phydev);
946 		if (err < 0)
947 			return err;
948 	}
949 
950 	if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
951 		err = m88e1111_config_init_1000basex(phydev);
952 		if (err < 0)
953 			return err;
954 	}
955 
956 	err = marvell_of_reg_init(phydev);
957 	if (err < 0)
958 		return err;
959 
960 	return genphy_soft_reset(phydev);
961 }
962 
963 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
964 {
965 	int val, cnt, enable;
966 
967 	val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
968 	if (val < 0)
969 		return val;
970 
971 	enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
972 	cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
973 
974 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
975 
976 	return 0;
977 }
978 
979 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
980 {
981 	int val, err;
982 
983 	if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
984 		return -E2BIG;
985 
986 	if (!cnt) {
987 		err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
988 				     MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
989 	} else {
990 		val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
991 		val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
992 
993 		err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
994 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
995 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
996 				 val);
997 	}
998 
999 	if (err < 0)
1000 		return err;
1001 
1002 	return genphy_soft_reset(phydev);
1003 }
1004 
1005 static int m88e1111_get_tunable(struct phy_device *phydev,
1006 				struct ethtool_tunable *tuna, void *data)
1007 {
1008 	switch (tuna->id) {
1009 	case ETHTOOL_PHY_DOWNSHIFT:
1010 		return m88e1111_get_downshift(phydev, data);
1011 	default:
1012 		return -EOPNOTSUPP;
1013 	}
1014 }
1015 
1016 static int m88e1111_set_tunable(struct phy_device *phydev,
1017 				struct ethtool_tunable *tuna, const void *data)
1018 {
1019 	switch (tuna->id) {
1020 	case ETHTOOL_PHY_DOWNSHIFT:
1021 		return m88e1111_set_downshift(phydev, *(const u8 *)data);
1022 	default:
1023 		return -EOPNOTSUPP;
1024 	}
1025 }
1026 
1027 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1028 {
1029 	int val, cnt, enable;
1030 
1031 	val = phy_read(phydev, MII_M1011_PHY_SCR);
1032 	if (val < 0)
1033 		return val;
1034 
1035 	enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1036 	cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1037 
1038 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1039 
1040 	return 0;
1041 }
1042 
1043 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1044 {
1045 	int val, err;
1046 
1047 	if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1048 		return -E2BIG;
1049 
1050 	if (!cnt) {
1051 		err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1052 				     MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1053 	} else {
1054 		val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1055 		val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1056 
1057 		err = phy_modify(phydev, MII_M1011_PHY_SCR,
1058 				 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1059 				 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1060 				 val);
1061 	}
1062 
1063 	if (err < 0)
1064 		return err;
1065 
1066 	return genphy_soft_reset(phydev);
1067 }
1068 
1069 static int m88e1011_get_tunable(struct phy_device *phydev,
1070 				struct ethtool_tunable *tuna, void *data)
1071 {
1072 	switch (tuna->id) {
1073 	case ETHTOOL_PHY_DOWNSHIFT:
1074 		return m88e1011_get_downshift(phydev, data);
1075 	default:
1076 		return -EOPNOTSUPP;
1077 	}
1078 }
1079 
1080 static int m88e1011_set_tunable(struct phy_device *phydev,
1081 				struct ethtool_tunable *tuna, const void *data)
1082 {
1083 	switch (tuna->id) {
1084 	case ETHTOOL_PHY_DOWNSHIFT:
1085 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1086 	default:
1087 		return -EOPNOTSUPP;
1088 	}
1089 }
1090 
1091 static int m88e1116r_config_init(struct phy_device *phydev)
1092 {
1093 	int err;
1094 
1095 	err = genphy_soft_reset(phydev);
1096 	if (err < 0)
1097 		return err;
1098 
1099 	msleep(500);
1100 
1101 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1102 	if (err < 0)
1103 		return err;
1104 
1105 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1106 	if (err < 0)
1107 		return err;
1108 
1109 	err = m88e1011_set_downshift(phydev, 8);
1110 	if (err < 0)
1111 		return err;
1112 
1113 	if (phy_interface_is_rgmii(phydev)) {
1114 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1115 		if (err < 0)
1116 			return err;
1117 	}
1118 
1119 	err = genphy_soft_reset(phydev);
1120 	if (err < 0)
1121 		return err;
1122 
1123 	return marvell_config_init(phydev);
1124 }
1125 
1126 static int m88e1318_config_init(struct phy_device *phydev)
1127 {
1128 	if (phy_interrupt_is_valid(phydev)) {
1129 		int err = phy_modify_paged(
1130 			phydev, MII_MARVELL_LED_PAGE,
1131 			MII_88E1318S_PHY_LED_TCR,
1132 			MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1133 			MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1134 			MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1135 		if (err < 0)
1136 			return err;
1137 	}
1138 
1139 	return marvell_config_init(phydev);
1140 }
1141 
1142 static int m88e1510_config_init(struct phy_device *phydev)
1143 {
1144 	int err;
1145 
1146 	/* SGMII-to-Copper mode initialization */
1147 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1148 		/* Select page 18 */
1149 		err = marvell_set_page(phydev, 18);
1150 		if (err < 0)
1151 			return err;
1152 
1153 		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1154 		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1155 				 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1156 				 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1157 		if (err < 0)
1158 			return err;
1159 
1160 		/* PHY reset is necessary after changing MODE[2:0] */
1161 		err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1162 				   MII_88E1510_GEN_CTRL_REG_1_RESET);
1163 		if (err < 0)
1164 			return err;
1165 
1166 		/* Reset page selection */
1167 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1168 		if (err < 0)
1169 			return err;
1170 	}
1171 
1172 	return m88e1318_config_init(phydev);
1173 }
1174 
1175 static int m88e1118_config_aneg(struct phy_device *phydev)
1176 {
1177 	int err;
1178 
1179 	err = genphy_soft_reset(phydev);
1180 	if (err < 0)
1181 		return err;
1182 
1183 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1184 	if (err < 0)
1185 		return err;
1186 
1187 	err = genphy_config_aneg(phydev);
1188 	return 0;
1189 }
1190 
1191 static int m88e1118_config_init(struct phy_device *phydev)
1192 {
1193 	int err;
1194 
1195 	/* Change address */
1196 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1197 	if (err < 0)
1198 		return err;
1199 
1200 	/* Enable 1000 Mbit */
1201 	err = phy_write(phydev, 0x15, 0x1070);
1202 	if (err < 0)
1203 		return err;
1204 
1205 	/* Change address */
1206 	err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1207 	if (err < 0)
1208 		return err;
1209 
1210 	/* Adjust LED Control */
1211 	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1212 		err = phy_write(phydev, 0x10, 0x1100);
1213 	else
1214 		err = phy_write(phydev, 0x10, 0x021e);
1215 	if (err < 0)
1216 		return err;
1217 
1218 	err = marvell_of_reg_init(phydev);
1219 	if (err < 0)
1220 		return err;
1221 
1222 	/* Reset address */
1223 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1224 	if (err < 0)
1225 		return err;
1226 
1227 	return genphy_soft_reset(phydev);
1228 }
1229 
1230 static int m88e1149_config_init(struct phy_device *phydev)
1231 {
1232 	int err;
1233 
1234 	/* Change address */
1235 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1236 	if (err < 0)
1237 		return err;
1238 
1239 	/* Enable 1000 Mbit */
1240 	err = phy_write(phydev, 0x15, 0x1048);
1241 	if (err < 0)
1242 		return err;
1243 
1244 	err = marvell_of_reg_init(phydev);
1245 	if (err < 0)
1246 		return err;
1247 
1248 	/* Reset address */
1249 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1250 	if (err < 0)
1251 		return err;
1252 
1253 	return genphy_soft_reset(phydev);
1254 }
1255 
1256 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1257 {
1258 	int err;
1259 
1260 	err = m88e1111_config_init_rgmii_delays(phydev);
1261 	if (err < 0)
1262 		return err;
1263 
1264 	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1265 		err = phy_write(phydev, 0x1d, 0x0012);
1266 		if (err < 0)
1267 			return err;
1268 
1269 		err = phy_modify(phydev, 0x1e, 0x0fc0,
1270 				 2 << 9 | /* 36 ohm */
1271 				 2 << 6); /* 39 ohm */
1272 		if (err < 0)
1273 			return err;
1274 
1275 		err = phy_write(phydev, 0x1d, 0x3);
1276 		if (err < 0)
1277 			return err;
1278 
1279 		err = phy_write(phydev, 0x1e, 0x8000);
1280 	}
1281 	return err;
1282 }
1283 
1284 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1285 {
1286 	return m88e1111_config_init_hwcfg_mode(
1287 		phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1288 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1289 }
1290 
1291 static int m88e1145_config_init(struct phy_device *phydev)
1292 {
1293 	int err;
1294 
1295 	/* Take care of errata E0 & E1 */
1296 	err = phy_write(phydev, 0x1d, 0x001b);
1297 	if (err < 0)
1298 		return err;
1299 
1300 	err = phy_write(phydev, 0x1e, 0x418f);
1301 	if (err < 0)
1302 		return err;
1303 
1304 	err = phy_write(phydev, 0x1d, 0x0016);
1305 	if (err < 0)
1306 		return err;
1307 
1308 	err = phy_write(phydev, 0x1e, 0xa2da);
1309 	if (err < 0)
1310 		return err;
1311 
1312 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1313 		err = m88e1145_config_init_rgmii(phydev);
1314 		if (err < 0)
1315 			return err;
1316 	}
1317 
1318 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1319 		err = m88e1145_config_init_sgmii(phydev);
1320 		if (err < 0)
1321 			return err;
1322 	}
1323 
1324 	err = marvell_of_reg_init(phydev);
1325 	if (err < 0)
1326 		return err;
1327 
1328 	return 0;
1329 }
1330 
1331 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1332 {
1333 	int val;
1334 
1335 	val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1336 	if (val < 0)
1337 		return val;
1338 
1339 	if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1340 		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1341 		return 0;
1342 	}
1343 
1344 	val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1345 
1346 	switch (val) {
1347 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1348 		*msecs = 0;
1349 		break;
1350 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1351 		*msecs = 10;
1352 		break;
1353 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1354 		*msecs = 20;
1355 		break;
1356 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1357 		*msecs = 40;
1358 		break;
1359 	default:
1360 		return -EINVAL;
1361 	}
1362 
1363 	return 0;
1364 }
1365 
1366 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1367 {
1368 	struct ethtool_eee eee;
1369 	int val, ret;
1370 
1371 	if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1372 		return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1373 				      MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1374 
1375 	/* According to the Marvell data sheet EEE must be disabled for
1376 	 * Fast Link Down detection to work properly
1377 	 */
1378 	ret = phy_ethtool_get_eee(phydev, &eee);
1379 	if (!ret && eee.eee_enabled) {
1380 		phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1381 		return -EBUSY;
1382 	}
1383 
1384 	if (*msecs <= 5)
1385 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1386 	else if (*msecs <= 15)
1387 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1388 	else if (*msecs <= 30)
1389 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1390 	else
1391 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1392 
1393 	val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1394 
1395 	ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1396 			 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1397 	if (ret)
1398 		return ret;
1399 
1400 	return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1401 			    MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1402 }
1403 
1404 static int m88e1540_get_tunable(struct phy_device *phydev,
1405 				struct ethtool_tunable *tuna, void *data)
1406 {
1407 	switch (tuna->id) {
1408 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1409 		return m88e1540_get_fld(phydev, data);
1410 	case ETHTOOL_PHY_DOWNSHIFT:
1411 		return m88e1011_get_downshift(phydev, data);
1412 	default:
1413 		return -EOPNOTSUPP;
1414 	}
1415 }
1416 
1417 static int m88e1540_set_tunable(struct phy_device *phydev,
1418 				struct ethtool_tunable *tuna, const void *data)
1419 {
1420 	switch (tuna->id) {
1421 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1422 		return m88e1540_set_fld(phydev, data);
1423 	case ETHTOOL_PHY_DOWNSHIFT:
1424 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1425 	default:
1426 		return -EOPNOTSUPP;
1427 	}
1428 }
1429 
1430 /* The VOD can be out of specification on link up. Poke an
1431  * undocumented register, in an undocumented page, with a magic value
1432  * to fix this.
1433  */
1434 static int m88e6390_errata(struct phy_device *phydev)
1435 {
1436 	int err;
1437 
1438 	err = phy_write(phydev, MII_BMCR,
1439 			BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1440 	if (err)
1441 		return err;
1442 
1443 	usleep_range(300, 400);
1444 
1445 	err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1446 	if (err)
1447 		return err;
1448 
1449 	return genphy_soft_reset(phydev);
1450 }
1451 
1452 static int m88e6390_config_aneg(struct phy_device *phydev)
1453 {
1454 	int err;
1455 
1456 	err = m88e6390_errata(phydev);
1457 	if (err)
1458 		return err;
1459 
1460 	return m88e1510_config_aneg(phydev);
1461 }
1462 
1463 /**
1464  * fiber_lpa_mod_linkmode_lpa_t
1465  * @advertising: the linkmode advertisement settings
1466  * @lpa: value of the MII_LPA register for fiber link
1467  *
1468  * A small helper function that translates MII_LPA bits to linkmode LP
1469  * advertisement settings. Other bits in advertising are left
1470  * unchanged.
1471  */
1472 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1473 {
1474 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1475 			 advertising, lpa & LPA_1000XHALF);
1476 
1477 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1478 			 advertising, lpa & LPA_1000XFULL);
1479 }
1480 
1481 static int marvell_read_status_page_an(struct phy_device *phydev,
1482 				       int fiber, int status)
1483 {
1484 	int lpa;
1485 	int err;
1486 
1487 	if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1488 		phydev->link = 0;
1489 		return 0;
1490 	}
1491 
1492 	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1493 		phydev->duplex = DUPLEX_FULL;
1494 	else
1495 		phydev->duplex = DUPLEX_HALF;
1496 
1497 	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1498 	case MII_M1011_PHY_STATUS_1000:
1499 		phydev->speed = SPEED_1000;
1500 		break;
1501 
1502 	case MII_M1011_PHY_STATUS_100:
1503 		phydev->speed = SPEED_100;
1504 		break;
1505 
1506 	default:
1507 		phydev->speed = SPEED_10;
1508 		break;
1509 	}
1510 
1511 	if (!fiber) {
1512 		err = genphy_read_lpa(phydev);
1513 		if (err < 0)
1514 			return err;
1515 
1516 		phy_resolve_aneg_pause(phydev);
1517 	} else {
1518 		lpa = phy_read(phydev, MII_LPA);
1519 		if (lpa < 0)
1520 			return lpa;
1521 
1522 		/* The fiber link is only 1000M capable */
1523 		fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1524 
1525 		if (phydev->duplex == DUPLEX_FULL) {
1526 			if (!(lpa & LPA_PAUSE_FIBER)) {
1527 				phydev->pause = 0;
1528 				phydev->asym_pause = 0;
1529 			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1530 				phydev->pause = 1;
1531 				phydev->asym_pause = 1;
1532 			} else {
1533 				phydev->pause = 1;
1534 				phydev->asym_pause = 0;
1535 			}
1536 		}
1537 	}
1538 
1539 	return 0;
1540 }
1541 
1542 /* marvell_read_status_page
1543  *
1544  * Description:
1545  *   Check the link, then figure out the current state
1546  *   by comparing what we advertise with what the link partner
1547  *   advertises.  Start by checking the gigabit possibilities,
1548  *   then move on to 10/100.
1549  */
1550 static int marvell_read_status_page(struct phy_device *phydev, int page)
1551 {
1552 	int status;
1553 	int fiber;
1554 	int err;
1555 
1556 	status = phy_read(phydev, MII_M1011_PHY_STATUS);
1557 	if (status < 0)
1558 		return status;
1559 
1560 	/* Use the generic register for copper link status,
1561 	 * and the PHY status register for fiber link status.
1562 	 */
1563 	if (page == MII_MARVELL_FIBER_PAGE) {
1564 		phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1565 	} else {
1566 		err = genphy_update_link(phydev);
1567 		if (err)
1568 			return err;
1569 	}
1570 
1571 	if (page == MII_MARVELL_FIBER_PAGE)
1572 		fiber = 1;
1573 	else
1574 		fiber = 0;
1575 
1576 	linkmode_zero(phydev->lp_advertising);
1577 	phydev->pause = 0;
1578 	phydev->asym_pause = 0;
1579 	phydev->speed = SPEED_UNKNOWN;
1580 	phydev->duplex = DUPLEX_UNKNOWN;
1581 	phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1582 
1583 	if (phydev->autoneg == AUTONEG_ENABLE)
1584 		err = marvell_read_status_page_an(phydev, fiber, status);
1585 	else
1586 		err = genphy_read_status_fixed(phydev);
1587 
1588 	return err;
1589 }
1590 
1591 /* marvell_read_status
1592  *
1593  * Some Marvell's phys have two modes: fiber and copper.
1594  * Both need status checked.
1595  * Description:
1596  *   First, check the fiber link and status.
1597  *   If the fiber link is down, check the copper link and status which
1598  *   will be the default value if both link are down.
1599  */
1600 static int marvell_read_status(struct phy_device *phydev)
1601 {
1602 	int err;
1603 
1604 	/* Check the fiber mode first */
1605 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1606 			      phydev->supported) &&
1607 	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1608 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1609 		if (err < 0)
1610 			goto error;
1611 
1612 		err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1613 		if (err < 0)
1614 			goto error;
1615 
1616 		/* If the fiber link is up, it is the selected and
1617 		 * used link. In this case, we need to stay in the
1618 		 * fiber page. Please to be careful about that, avoid
1619 		 * to restore Copper page in other functions which
1620 		 * could break the behaviour for some fiber phy like
1621 		 * 88E1512.
1622 		 */
1623 		if (phydev->link)
1624 			return 0;
1625 
1626 		/* If fiber link is down, check and save copper mode state */
1627 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1628 		if (err < 0)
1629 			goto error;
1630 	}
1631 
1632 	return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1633 
1634 error:
1635 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1636 	return err;
1637 }
1638 
1639 /* marvell_suspend
1640  *
1641  * Some Marvell's phys have two modes: fiber and copper.
1642  * Both need to be suspended
1643  */
1644 static int marvell_suspend(struct phy_device *phydev)
1645 {
1646 	int err;
1647 
1648 	/* Suspend the fiber mode first */
1649 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1650 			       phydev->supported)) {
1651 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1652 		if (err < 0)
1653 			goto error;
1654 
1655 		/* With the page set, use the generic suspend */
1656 		err = genphy_suspend(phydev);
1657 		if (err < 0)
1658 			goto error;
1659 
1660 		/* Then, the copper link */
1661 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1662 		if (err < 0)
1663 			goto error;
1664 	}
1665 
1666 	/* With the page set, use the generic suspend */
1667 	return genphy_suspend(phydev);
1668 
1669 error:
1670 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1671 	return err;
1672 }
1673 
1674 /* marvell_resume
1675  *
1676  * Some Marvell's phys have two modes: fiber and copper.
1677  * Both need to be resumed
1678  */
1679 static int marvell_resume(struct phy_device *phydev)
1680 {
1681 	int err;
1682 
1683 	/* Resume the fiber mode first */
1684 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1685 			       phydev->supported)) {
1686 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1687 		if (err < 0)
1688 			goto error;
1689 
1690 		/* With the page set, use the generic resume */
1691 		err = genphy_resume(phydev);
1692 		if (err < 0)
1693 			goto error;
1694 
1695 		/* Then, the copper link */
1696 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1697 		if (err < 0)
1698 			goto error;
1699 	}
1700 
1701 	/* With the page set, use the generic resume */
1702 	return genphy_resume(phydev);
1703 
1704 error:
1705 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1706 	return err;
1707 }
1708 
1709 static int marvell_aneg_done(struct phy_device *phydev)
1710 {
1711 	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1712 
1713 	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1714 }
1715 
1716 static void m88e1318_get_wol(struct phy_device *phydev,
1717 			     struct ethtool_wolinfo *wol)
1718 {
1719 	int ret;
1720 
1721 	wol->supported = WAKE_MAGIC;
1722 	wol->wolopts = 0;
1723 
1724 	ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1725 			     MII_88E1318S_PHY_WOL_CTRL);
1726 	if (ret >= 0 && ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1727 		wol->wolopts |= WAKE_MAGIC;
1728 }
1729 
1730 static int m88e1318_set_wol(struct phy_device *phydev,
1731 			    struct ethtool_wolinfo *wol)
1732 {
1733 	int err = 0, oldpage;
1734 
1735 	oldpage = phy_save_page(phydev);
1736 	if (oldpage < 0)
1737 		goto error;
1738 
1739 	if (wol->wolopts & WAKE_MAGIC) {
1740 		/* Explicitly switch to page 0x00, just to be sure */
1741 		err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1742 		if (err < 0)
1743 			goto error;
1744 
1745 		/* If WOL event happened once, the LED[2] interrupt pin
1746 		 * will not be cleared unless we reading the interrupt status
1747 		 * register. If interrupts are in use, the normal interrupt
1748 		 * handling will clear the WOL event. Clear the WOL event
1749 		 * before enabling it if !phy_interrupt_is_valid()
1750 		 */
1751 		if (!phy_interrupt_is_valid(phydev))
1752 			__phy_read(phydev, MII_M1011_IEVENT);
1753 
1754 		/* Enable the WOL interrupt */
1755 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1756 				     MII_88E1318S_PHY_CSIER_WOL_EIE);
1757 		if (err < 0)
1758 			goto error;
1759 
1760 		err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1761 		if (err < 0)
1762 			goto error;
1763 
1764 		/* Setup LED[2] as interrupt pin (active low) */
1765 		err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1766 				   MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1767 				   MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1768 				   MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1769 		if (err < 0)
1770 			goto error;
1771 
1772 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1773 		if (err < 0)
1774 			goto error;
1775 
1776 		/* Store the device address for the magic packet */
1777 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1778 				((phydev->attached_dev->dev_addr[5] << 8) |
1779 				 phydev->attached_dev->dev_addr[4]));
1780 		if (err < 0)
1781 			goto error;
1782 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1783 				((phydev->attached_dev->dev_addr[3] << 8) |
1784 				 phydev->attached_dev->dev_addr[2]));
1785 		if (err < 0)
1786 			goto error;
1787 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1788 				((phydev->attached_dev->dev_addr[1] << 8) |
1789 				 phydev->attached_dev->dev_addr[0]));
1790 		if (err < 0)
1791 			goto error;
1792 
1793 		/* Clear WOL status and enable magic packet matching */
1794 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1795 				     MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1796 				     MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1797 		if (err < 0)
1798 			goto error;
1799 	} else {
1800 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1801 		if (err < 0)
1802 			goto error;
1803 
1804 		/* Clear WOL status and disable magic packet matching */
1805 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1806 				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1807 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1808 		if (err < 0)
1809 			goto error;
1810 	}
1811 
1812 error:
1813 	return phy_restore_page(phydev, oldpage, err);
1814 }
1815 
1816 static int marvell_get_sset_count(struct phy_device *phydev)
1817 {
1818 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1819 			      phydev->supported))
1820 		return ARRAY_SIZE(marvell_hw_stats);
1821 	else
1822 		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1823 }
1824 
1825 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1826 {
1827 	int count = marvell_get_sset_count(phydev);
1828 	int i;
1829 
1830 	for (i = 0; i < count; i++) {
1831 		strlcpy(data + i * ETH_GSTRING_LEN,
1832 			marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1833 	}
1834 }
1835 
1836 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1837 {
1838 	struct marvell_hw_stat stat = marvell_hw_stats[i];
1839 	struct marvell_priv *priv = phydev->priv;
1840 	int val;
1841 	u64 ret;
1842 
1843 	val = phy_read_paged(phydev, stat.page, stat.reg);
1844 	if (val < 0) {
1845 		ret = U64_MAX;
1846 	} else {
1847 		val = val & ((1 << stat.bits) - 1);
1848 		priv->stats[i] += val;
1849 		ret = priv->stats[i];
1850 	}
1851 
1852 	return ret;
1853 }
1854 
1855 static void marvell_get_stats(struct phy_device *phydev,
1856 			      struct ethtool_stats *stats, u64 *data)
1857 {
1858 	int count = marvell_get_sset_count(phydev);
1859 	int i;
1860 
1861 	for (i = 0; i < count; i++)
1862 		data[i] = marvell_get_stat(phydev, i);
1863 }
1864 
1865 static int marvell_vct5_wait_complete(struct phy_device *phydev)
1866 {
1867 	int i;
1868 	int val;
1869 
1870 	for (i = 0; i < 32; i++) {
1871 		val = __phy_read(phydev, MII_VCT5_CTRL);
1872 		if (val < 0)
1873 			return val;
1874 
1875 		if (val & MII_VCT5_CTRL_COMPLETE)
1876 			return 0;
1877 	}
1878 
1879 	phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
1880 	return -ETIMEDOUT;
1881 }
1882 
1883 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
1884 {
1885 	int amplitude;
1886 	int val;
1887 	int reg;
1888 
1889 	reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
1890 	val = __phy_read(phydev, reg);
1891 
1892 	if (val < 0)
1893 		return 0;
1894 
1895 	amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
1896 		MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
1897 
1898 	if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
1899 		amplitude = -amplitude;
1900 
1901 	return 1000 * amplitude / 128;
1902 }
1903 
1904 static u32 marvell_vct5_distance2cm(int distance)
1905 {
1906 	return distance * 805 / 10;
1907 }
1908 
1909 static u32 marvell_vct5_cm2distance(int cm)
1910 {
1911 	return cm * 10 / 805;
1912 }
1913 
1914 static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
1915 					   int distance, int pair)
1916 {
1917 	u16 reg;
1918 	int err;
1919 	int mV;
1920 	int i;
1921 
1922 	err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
1923 			  distance);
1924 	if (err)
1925 		return err;
1926 
1927 	reg = MII_VCT5_CTRL_ENABLE |
1928 		MII_VCT5_CTRL_TX_SAME_CHANNEL |
1929 		MII_VCT5_CTRL_SAMPLES_DEFAULT |
1930 		MII_VCT5_CTRL_SAMPLE_POINT |
1931 		MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
1932 	err = __phy_write(phydev, MII_VCT5_CTRL, reg);
1933 	if (err)
1934 		return err;
1935 
1936 	err = marvell_vct5_wait_complete(phydev);
1937 	if (err)
1938 		return err;
1939 
1940 	for (i = 0; i < 4; i++) {
1941 		if (pair != PHY_PAIR_ALL && i != pair)
1942 			continue;
1943 
1944 		mV = marvell_vct5_amplitude(phydev, i);
1945 		ethnl_cable_test_amplitude(phydev, i, mV);
1946 	}
1947 
1948 	return 0;
1949 }
1950 
1951 static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
1952 {
1953 	struct marvell_priv *priv = phydev->priv;
1954 	int distance;
1955 	u16 width;
1956 	int page;
1957 	int err;
1958 	u16 reg;
1959 
1960 	if (priv->first <= TDR_SHORT_CABLE_LENGTH)
1961 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
1962 	else
1963 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
1964 
1965 	reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
1966 		MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
1967 		MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
1968 
1969 	err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1970 			      MII_VCT5_TX_PULSE_CTRL, reg);
1971 	if (err)
1972 		return err;
1973 
1974 	/* Reading the TDR data is very MDIO heavy. We need to optimize
1975 	 * access to keep the time to a minimum. So lock the bus once,
1976 	 * and don't release it until complete. We can then avoid having
1977 	 * to change the page for every access, greatly speeding things
1978 	 * up.
1979 	 */
1980 	page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
1981 	if (page < 0)
1982 		goto restore_page;
1983 
1984 	for (distance = priv->first;
1985 	     distance <= priv->last;
1986 	     distance += priv->step) {
1987 		err = marvell_vct5_amplitude_distance(phydev, distance,
1988 						      priv->pair);
1989 		if (err)
1990 			goto restore_page;
1991 
1992 		if (distance > TDR_SHORT_CABLE_LENGTH &&
1993 		    width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
1994 			width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
1995 			reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
1996 				MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
1997 				MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
1998 			err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
1999 			if (err)
2000 				goto restore_page;
2001 		}
2002 	}
2003 
2004 restore_page:
2005 	return phy_restore_page(phydev, page, err);
2006 }
2007 
2008 static int marvell_cable_test_start_common(struct phy_device *phydev)
2009 {
2010 	int bmcr, bmsr, ret;
2011 
2012 	/* If auto-negotiation is enabled, but not complete, the cable
2013 	 * test never completes. So disable auto-neg.
2014 	 */
2015 	bmcr = phy_read(phydev, MII_BMCR);
2016 	if (bmcr < 0)
2017 		return bmcr;
2018 
2019 	bmsr = phy_read(phydev, MII_BMSR);
2020 
2021 	if (bmsr < 0)
2022 		return bmsr;
2023 
2024 	if (bmcr & BMCR_ANENABLE) {
2025 		ret =  phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2026 		if (ret < 0)
2027 			return ret;
2028 		ret = genphy_soft_reset(phydev);
2029 		if (ret < 0)
2030 			return ret;
2031 	}
2032 
2033 	/* If the link is up, allow it some time to go down */
2034 	if (bmsr & BMSR_LSTATUS)
2035 		msleep(1500);
2036 
2037 	return 0;
2038 }
2039 
2040 static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2041 {
2042 	struct marvell_priv *priv = phydev->priv;
2043 	int ret;
2044 
2045 	ret = marvell_cable_test_start_common(phydev);
2046 	if (ret)
2047 		return ret;
2048 
2049 	priv->cable_test_tdr = false;
2050 
2051 	/* Reset the VCT5 API control to defaults, otherwise
2052 	 * VCT7 does not work correctly.
2053 	 */
2054 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2055 			      MII_VCT5_CTRL,
2056 			      MII_VCT5_CTRL_TX_SAME_CHANNEL |
2057 			      MII_VCT5_CTRL_SAMPLES_DEFAULT |
2058 			      MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2059 			      MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2060 	if (ret)
2061 		return ret;
2062 
2063 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2064 			      MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2065 	if (ret)
2066 		return ret;
2067 
2068 	return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2069 			       MII_VCT7_CTRL,
2070 			       MII_VCT7_CTRL_RUN_NOW |
2071 			       MII_VCT7_CTRL_CENTIMETERS);
2072 }
2073 
2074 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2075 					     const struct phy_tdr_config *cfg)
2076 {
2077 	struct marvell_priv *priv = phydev->priv;
2078 	int ret;
2079 
2080 	priv->cable_test_tdr = true;
2081 	priv->first = marvell_vct5_cm2distance(cfg->first);
2082 	priv->last = marvell_vct5_cm2distance(cfg->last);
2083 	priv->step = marvell_vct5_cm2distance(cfg->step);
2084 	priv->pair = cfg->pair;
2085 
2086 	if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2087 		return -EINVAL;
2088 
2089 	if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2090 		return -EINVAL;
2091 
2092 	/* Disable  VCT7 */
2093 	ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2094 			      MII_VCT7_CTRL, 0);
2095 	if (ret)
2096 		return ret;
2097 
2098 	ret = marvell_cable_test_start_common(phydev);
2099 	if (ret)
2100 		return ret;
2101 
2102 	ret = ethnl_cable_test_pulse(phydev, 1000);
2103 	if (ret)
2104 		return ret;
2105 
2106 	return ethnl_cable_test_step(phydev,
2107 				     marvell_vct5_distance2cm(priv->first),
2108 				     marvell_vct5_distance2cm(priv->last),
2109 				     marvell_vct5_distance2cm(priv->step));
2110 }
2111 
2112 static int marvell_vct7_distance_to_length(int distance, bool meter)
2113 {
2114 	if (meter)
2115 		distance *= 100;
2116 
2117 	return distance;
2118 }
2119 
2120 static bool marvell_vct7_distance_valid(int result)
2121 {
2122 	switch (result) {
2123 	case MII_VCT7_RESULTS_OPEN:
2124 	case MII_VCT7_RESULTS_SAME_SHORT:
2125 	case MII_VCT7_RESULTS_CROSS_SHORT:
2126 		return true;
2127 	}
2128 	return false;
2129 }
2130 
2131 static int marvell_vct7_report_length(struct phy_device *phydev,
2132 				      int pair, bool meter)
2133 {
2134 	int length;
2135 	int ret;
2136 
2137 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2138 			     MII_VCT7_PAIR_0_DISTANCE + pair);
2139 	if (ret < 0)
2140 		return ret;
2141 
2142 	length = marvell_vct7_distance_to_length(ret, meter);
2143 
2144 	ethnl_cable_test_fault_length(phydev, pair, length);
2145 
2146 	return 0;
2147 }
2148 
2149 static int marvell_vct7_cable_test_report_trans(int result)
2150 {
2151 	switch (result) {
2152 	case MII_VCT7_RESULTS_OK:
2153 		return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2154 	case MII_VCT7_RESULTS_OPEN:
2155 		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2156 	case MII_VCT7_RESULTS_SAME_SHORT:
2157 		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2158 	case MII_VCT7_RESULTS_CROSS_SHORT:
2159 		return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2160 	default:
2161 		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2162 	}
2163 }
2164 
2165 static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2166 {
2167 	int pair0, pair1, pair2, pair3;
2168 	bool meter;
2169 	int ret;
2170 
2171 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2172 			     MII_VCT7_RESULTS);
2173 	if (ret < 0)
2174 		return ret;
2175 
2176 	pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2177 		MII_VCT7_RESULTS_PAIR3_SHIFT;
2178 	pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2179 		MII_VCT7_RESULTS_PAIR2_SHIFT;
2180 	pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2181 		MII_VCT7_RESULTS_PAIR1_SHIFT;
2182 	pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2183 		MII_VCT7_RESULTS_PAIR0_SHIFT;
2184 
2185 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2186 				marvell_vct7_cable_test_report_trans(pair0));
2187 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2188 				marvell_vct7_cable_test_report_trans(pair1));
2189 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2190 				marvell_vct7_cable_test_report_trans(pair2));
2191 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2192 				marvell_vct7_cable_test_report_trans(pair3));
2193 
2194 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2195 	if (ret < 0)
2196 		return ret;
2197 
2198 	meter = ret & MII_VCT7_CTRL_METERS;
2199 
2200 	if (marvell_vct7_distance_valid(pair0))
2201 		marvell_vct7_report_length(phydev, 0, meter);
2202 	if (marvell_vct7_distance_valid(pair1))
2203 		marvell_vct7_report_length(phydev, 1, meter);
2204 	if (marvell_vct7_distance_valid(pair2))
2205 		marvell_vct7_report_length(phydev, 2, meter);
2206 	if (marvell_vct7_distance_valid(pair3))
2207 		marvell_vct7_report_length(phydev, 3, meter);
2208 
2209 	return 0;
2210 }
2211 
2212 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2213 					      bool *finished)
2214 {
2215 	struct marvell_priv *priv = phydev->priv;
2216 	int ret;
2217 
2218 	if (priv->cable_test_tdr) {
2219 		ret = marvell_vct5_amplitude_graph(phydev);
2220 		*finished = true;
2221 		return ret;
2222 	}
2223 
2224 	*finished = false;
2225 
2226 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2227 			     MII_VCT7_CTRL);
2228 
2229 	if (ret < 0)
2230 		return ret;
2231 
2232 	if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2233 		*finished = true;
2234 
2235 		return marvell_vct7_cable_test_report(phydev);
2236 	}
2237 
2238 	return 0;
2239 }
2240 
2241 #ifdef CONFIG_HWMON
2242 struct marvell_hwmon_ops {
2243 	int (*config)(struct phy_device *phydev);
2244 	int (*get_temp)(struct phy_device *phydev, long *temp);
2245 	int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2246 	int (*set_temp_critical)(struct phy_device *phydev, long temp);
2247 	int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2248 };
2249 
2250 static const struct marvell_hwmon_ops *
2251 to_marvell_hwmon_ops(const struct phy_device *phydev)
2252 {
2253 	return phydev->drv->driver_data;
2254 }
2255 
2256 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2257 {
2258 	int oldpage;
2259 	int ret = 0;
2260 	int val;
2261 
2262 	*temp = 0;
2263 
2264 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2265 	if (oldpage < 0)
2266 		goto error;
2267 
2268 	/* Enable temperature sensor */
2269 	ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2270 	if (ret < 0)
2271 		goto error;
2272 
2273 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2274 			  ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2275 	if (ret < 0)
2276 		goto error;
2277 
2278 	/* Wait for temperature to stabilize */
2279 	usleep_range(10000, 12000);
2280 
2281 	val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2282 	if (val < 0) {
2283 		ret = val;
2284 		goto error;
2285 	}
2286 
2287 	/* Disable temperature sensor */
2288 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2289 			  ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2290 	if (ret < 0)
2291 		goto error;
2292 
2293 	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2294 
2295 error:
2296 	return phy_restore_page(phydev, oldpage, ret);
2297 }
2298 
2299 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2300 {
2301 	int ret;
2302 
2303 	*temp = 0;
2304 
2305 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2306 			     MII_88E1510_TEMP_SENSOR);
2307 	if (ret < 0)
2308 		return ret;
2309 
2310 	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2311 
2312 	return 0;
2313 }
2314 
2315 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2316 {
2317 	int ret;
2318 
2319 	*temp = 0;
2320 
2321 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2322 			     MII_88E1121_MISC_TEST);
2323 	if (ret < 0)
2324 		return ret;
2325 
2326 	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2327 		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2328 	/* convert to mC */
2329 	*temp *= 1000;
2330 
2331 	return 0;
2332 }
2333 
2334 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2335 {
2336 	temp = temp / 1000;
2337 	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2338 
2339 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2340 				MII_88E1121_MISC_TEST,
2341 				MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2342 				temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2343 }
2344 
2345 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2346 {
2347 	int ret;
2348 
2349 	*alarm = false;
2350 
2351 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2352 			     MII_88E1121_MISC_TEST);
2353 	if (ret < 0)
2354 		return ret;
2355 
2356 	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2357 
2358 	return 0;
2359 }
2360 
2361 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2362 {
2363 	int sum = 0;
2364 	int oldpage;
2365 	int ret = 0;
2366 	int i;
2367 
2368 	*temp = 0;
2369 
2370 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2371 	if (oldpage < 0)
2372 		goto error;
2373 
2374 	/* Enable temperature sensor */
2375 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2376 	if (ret < 0)
2377 		goto error;
2378 
2379 	ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2380 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2381 
2382 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2383 	if (ret < 0)
2384 		goto error;
2385 
2386 	/* Wait for temperature to stabilize */
2387 	usleep_range(10000, 12000);
2388 
2389 	/* Reading the temperature sense has an errata. You need to read
2390 	 * a number of times and take an average.
2391 	 */
2392 	for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2393 		ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2394 		if (ret < 0)
2395 			goto error;
2396 		sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2397 	}
2398 
2399 	sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2400 	*temp = (sum  - 75) * 1000;
2401 
2402 	/* Disable temperature sensor */
2403 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2404 	if (ret < 0)
2405 		goto error;
2406 
2407 	ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2408 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2409 
2410 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2411 
2412 error:
2413 	phy_restore_page(phydev, oldpage, ret);
2414 
2415 	return ret;
2416 }
2417 
2418 static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2419 {
2420 	int err;
2421 
2422 	err = m88e1510_get_temp(phydev, temp);
2423 
2424 	/* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2425 	 * T + 75, so we have to subtract another 50
2426 	 */
2427 	*temp -= 50000;
2428 
2429 	return err;
2430 }
2431 
2432 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2433 {
2434 	int ret;
2435 
2436 	*temp = 0;
2437 
2438 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2439 			     MII_88E6390_TEMP_SENSOR);
2440 	if (ret < 0)
2441 		return ret;
2442 
2443 	*temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2444 		  MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2445 
2446 	return 0;
2447 }
2448 
2449 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2450 {
2451 	temp = (temp / 1000) + 75;
2452 
2453 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2454 				MII_88E6390_TEMP_SENSOR,
2455 				MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
2456 				temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
2457 }
2458 
2459 static int m88e6393_hwmon_config(struct phy_device *phydev)
2460 {
2461 	int err;
2462 
2463 	err = m88e6393_set_temp_critical(phydev, 100000);
2464 	if (err)
2465 		return err;
2466 
2467 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2468 				MII_88E6390_MISC_TEST,
2469 				MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
2470 				MII_88E6393_MISC_TEST_SAMPLES_MASK |
2471 				MII_88E6393_MISC_TEST_RATE_MASK,
2472 				MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
2473 				MII_88E6393_MISC_TEST_SAMPLES_2048 |
2474 				MII_88E6393_MISC_TEST_RATE_2_3MS);
2475 }
2476 
2477 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
2478 			      u32 attr, int channel, long *temp)
2479 {
2480 	struct phy_device *phydev = dev_get_drvdata(dev);
2481 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2482 	int err = -EOPNOTSUPP;
2483 
2484 	switch (attr) {
2485 	case hwmon_temp_input:
2486 		if (ops->get_temp)
2487 			err = ops->get_temp(phydev, temp);
2488 		break;
2489 	case hwmon_temp_crit:
2490 		if (ops->get_temp_critical)
2491 			err = ops->get_temp_critical(phydev, temp);
2492 		break;
2493 	case hwmon_temp_max_alarm:
2494 		if (ops->get_temp_alarm)
2495 			err = ops->get_temp_alarm(phydev, temp);
2496 		break;
2497 	}
2498 
2499 	return err;
2500 }
2501 
2502 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
2503 			       u32 attr, int channel, long temp)
2504 {
2505 	struct phy_device *phydev = dev_get_drvdata(dev);
2506 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2507 	int err = -EOPNOTSUPP;
2508 
2509 	switch (attr) {
2510 	case hwmon_temp_crit:
2511 		if (ops->set_temp_critical)
2512 			err = ops->set_temp_critical(phydev, temp);
2513 		break;
2514 	}
2515 
2516 	return err;
2517 }
2518 
2519 static umode_t marvell_hwmon_is_visible(const void *data,
2520 					enum hwmon_sensor_types type,
2521 					u32 attr, int channel)
2522 {
2523 	const struct phy_device *phydev = data;
2524 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2525 
2526 	if (type != hwmon_temp)
2527 		return 0;
2528 
2529 	switch (attr) {
2530 	case hwmon_temp_input:
2531 		return ops->get_temp ? 0444 : 0;
2532 	case hwmon_temp_max_alarm:
2533 		return ops->get_temp_alarm ? 0444 : 0;
2534 	case hwmon_temp_crit:
2535 		return (ops->get_temp_critical ? 0444 : 0) |
2536 		       (ops->set_temp_critical ? 0200 : 0);
2537 	default:
2538 		return 0;
2539 	}
2540 }
2541 
2542 static u32 marvell_hwmon_chip_config[] = {
2543 	HWMON_C_REGISTER_TZ,
2544 	0
2545 };
2546 
2547 static const struct hwmon_channel_info marvell_hwmon_chip = {
2548 	.type = hwmon_chip,
2549 	.config = marvell_hwmon_chip_config,
2550 };
2551 
2552 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
2553  * defined for all PHYs, because the hwmon code checks whether the attributes
2554  * exists via the .is_visible method
2555  */
2556 static u32 marvell_hwmon_temp_config[] = {
2557 	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2558 	0
2559 };
2560 
2561 static const struct hwmon_channel_info marvell_hwmon_temp = {
2562 	.type = hwmon_temp,
2563 	.config = marvell_hwmon_temp_config,
2564 };
2565 
2566 static const struct hwmon_channel_info *marvell_hwmon_info[] = {
2567 	&marvell_hwmon_chip,
2568 	&marvell_hwmon_temp,
2569 	NULL
2570 };
2571 
2572 static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
2573 	.is_visible = marvell_hwmon_is_visible,
2574 	.read = marvell_hwmon_read,
2575 	.write = marvell_hwmon_write,
2576 };
2577 
2578 static const struct hwmon_chip_info marvell_hwmon_chip_info = {
2579 	.ops = &marvell_hwmon_hwmon_ops,
2580 	.info = marvell_hwmon_info,
2581 };
2582 
2583 static int marvell_hwmon_name(struct phy_device *phydev)
2584 {
2585 	struct marvell_priv *priv = phydev->priv;
2586 	struct device *dev = &phydev->mdio.dev;
2587 	const char *devname = dev_name(dev);
2588 	size_t len = strlen(devname);
2589 	int i, j;
2590 
2591 	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2592 	if (!priv->hwmon_name)
2593 		return -ENOMEM;
2594 
2595 	for (i = j = 0; i < len && devname[i]; i++) {
2596 		if (isalnum(devname[i]))
2597 			priv->hwmon_name[j++] = devname[i];
2598 	}
2599 
2600 	return 0;
2601 }
2602 
2603 static int marvell_hwmon_probe(struct phy_device *phydev)
2604 {
2605 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2606 	struct marvell_priv *priv = phydev->priv;
2607 	struct device *dev = &phydev->mdio.dev;
2608 	int err;
2609 
2610 	if (!ops)
2611 		return 0;
2612 
2613 	err = marvell_hwmon_name(phydev);
2614 	if (err)
2615 		return err;
2616 
2617 	priv->hwmon_dev = devm_hwmon_device_register_with_info(
2618 		dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
2619 	if (IS_ERR(priv->hwmon_dev))
2620 		return PTR_ERR(priv->hwmon_dev);
2621 
2622 	if (ops->config)
2623 		err = ops->config(phydev);
2624 
2625 	return err;
2626 }
2627 
2628 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
2629 	.get_temp = m88e1121_get_temp,
2630 };
2631 
2632 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
2633 	.get_temp = m88e1510_get_temp,
2634 	.get_temp_critical = m88e1510_get_temp_critical,
2635 	.set_temp_critical = m88e1510_set_temp_critical,
2636 	.get_temp_alarm = m88e1510_get_temp_alarm,
2637 };
2638 
2639 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
2640 	.get_temp = m88e6390_get_temp,
2641 };
2642 
2643 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
2644 	.config = m88e6393_hwmon_config,
2645 	.get_temp = m88e6393_get_temp,
2646 	.get_temp_critical = m88e6393_get_temp_critical,
2647 	.set_temp_critical = m88e6393_set_temp_critical,
2648 	.get_temp_alarm = m88e1510_get_temp_alarm,
2649 };
2650 
2651 #define DEF_MARVELL_HWMON_OPS(s) (&(s))
2652 
2653 #else
2654 
2655 #define DEF_MARVELL_HWMON_OPS(s) NULL
2656 
2657 static int marvell_hwmon_probe(struct phy_device *phydev)
2658 {
2659 	return 0;
2660 }
2661 #endif
2662 
2663 static int marvell_probe(struct phy_device *phydev)
2664 {
2665 	struct marvell_priv *priv;
2666 
2667 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2668 	if (!priv)
2669 		return -ENOMEM;
2670 
2671 	phydev->priv = priv;
2672 
2673 	return marvell_hwmon_probe(phydev);
2674 }
2675 
2676 static struct phy_driver marvell_drivers[] = {
2677 	{
2678 		.phy_id = MARVELL_PHY_ID_88E1101,
2679 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2680 		.name = "Marvell 88E1101",
2681 		/* PHY_GBIT_FEATURES */
2682 		.probe = marvell_probe,
2683 		.config_init = marvell_config_init,
2684 		.config_aneg = m88e1101_config_aneg,
2685 		.config_intr = marvell_config_intr,
2686 		.handle_interrupt = marvell_handle_interrupt,
2687 		.resume = genphy_resume,
2688 		.suspend = genphy_suspend,
2689 		.read_page = marvell_read_page,
2690 		.write_page = marvell_write_page,
2691 		.get_sset_count = marvell_get_sset_count,
2692 		.get_strings = marvell_get_strings,
2693 		.get_stats = marvell_get_stats,
2694 	},
2695 	{
2696 		.phy_id = MARVELL_PHY_ID_88E1112,
2697 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2698 		.name = "Marvell 88E1112",
2699 		/* PHY_GBIT_FEATURES */
2700 		.probe = marvell_probe,
2701 		.config_init = m88e1111_config_init,
2702 		.config_aneg = marvell_config_aneg,
2703 		.config_intr = marvell_config_intr,
2704 		.handle_interrupt = marvell_handle_interrupt,
2705 		.resume = genphy_resume,
2706 		.suspend = genphy_suspend,
2707 		.read_page = marvell_read_page,
2708 		.write_page = marvell_write_page,
2709 		.get_sset_count = marvell_get_sset_count,
2710 		.get_strings = marvell_get_strings,
2711 		.get_stats = marvell_get_stats,
2712 		.get_tunable = m88e1011_get_tunable,
2713 		.set_tunable = m88e1011_set_tunable,
2714 	},
2715 	{
2716 		.phy_id = MARVELL_PHY_ID_88E1111,
2717 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2718 		.name = "Marvell 88E1111",
2719 		/* PHY_GBIT_FEATURES */
2720 		.probe = marvell_probe,
2721 		.config_init = m88e1111_config_init,
2722 		.config_aneg = m88e1111_config_aneg,
2723 		.read_status = marvell_read_status,
2724 		.config_intr = marvell_config_intr,
2725 		.handle_interrupt = marvell_handle_interrupt,
2726 		.resume = genphy_resume,
2727 		.suspend = genphy_suspend,
2728 		.read_page = marvell_read_page,
2729 		.write_page = marvell_write_page,
2730 		.get_sset_count = marvell_get_sset_count,
2731 		.get_strings = marvell_get_strings,
2732 		.get_stats = marvell_get_stats,
2733 		.get_tunable = m88e1111_get_tunable,
2734 		.set_tunable = m88e1111_set_tunable,
2735 	},
2736 	{
2737 		.phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
2738 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2739 		.name = "Marvell 88E1111 (Finisar)",
2740 		/* PHY_GBIT_FEATURES */
2741 		.probe = marvell_probe,
2742 		.config_init = m88e1111_config_init,
2743 		.config_aneg = m88e1111_config_aneg,
2744 		.read_status = marvell_read_status,
2745 		.config_intr = marvell_config_intr,
2746 		.handle_interrupt = marvell_handle_interrupt,
2747 		.resume = genphy_resume,
2748 		.suspend = genphy_suspend,
2749 		.read_page = marvell_read_page,
2750 		.write_page = marvell_write_page,
2751 		.get_sset_count = marvell_get_sset_count,
2752 		.get_strings = marvell_get_strings,
2753 		.get_stats = marvell_get_stats,
2754 		.get_tunable = m88e1111_get_tunable,
2755 		.set_tunable = m88e1111_set_tunable,
2756 	},
2757 	{
2758 		.phy_id = MARVELL_PHY_ID_88E1118,
2759 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2760 		.name = "Marvell 88E1118",
2761 		/* PHY_GBIT_FEATURES */
2762 		.probe = marvell_probe,
2763 		.config_init = m88e1118_config_init,
2764 		.config_aneg = m88e1118_config_aneg,
2765 		.config_intr = marvell_config_intr,
2766 		.handle_interrupt = marvell_handle_interrupt,
2767 		.resume = genphy_resume,
2768 		.suspend = genphy_suspend,
2769 		.read_page = marvell_read_page,
2770 		.write_page = marvell_write_page,
2771 		.get_sset_count = marvell_get_sset_count,
2772 		.get_strings = marvell_get_strings,
2773 		.get_stats = marvell_get_stats,
2774 	},
2775 	{
2776 		.phy_id = MARVELL_PHY_ID_88E1121R,
2777 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2778 		.name = "Marvell 88E1121R",
2779 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
2780 		/* PHY_GBIT_FEATURES */
2781 		.probe = marvell_probe,
2782 		.config_init = marvell_config_init,
2783 		.config_aneg = m88e1121_config_aneg,
2784 		.read_status = marvell_read_status,
2785 		.config_intr = marvell_config_intr,
2786 		.handle_interrupt = marvell_handle_interrupt,
2787 		.resume = genphy_resume,
2788 		.suspend = genphy_suspend,
2789 		.read_page = marvell_read_page,
2790 		.write_page = marvell_write_page,
2791 		.get_sset_count = marvell_get_sset_count,
2792 		.get_strings = marvell_get_strings,
2793 		.get_stats = marvell_get_stats,
2794 		.get_tunable = m88e1011_get_tunable,
2795 		.set_tunable = m88e1011_set_tunable,
2796 	},
2797 	{
2798 		.phy_id = MARVELL_PHY_ID_88E1318S,
2799 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2800 		.name = "Marvell 88E1318S",
2801 		/* PHY_GBIT_FEATURES */
2802 		.probe = marvell_probe,
2803 		.config_init = m88e1318_config_init,
2804 		.config_aneg = m88e1318_config_aneg,
2805 		.read_status = marvell_read_status,
2806 		.config_intr = marvell_config_intr,
2807 		.handle_interrupt = marvell_handle_interrupt,
2808 		.get_wol = m88e1318_get_wol,
2809 		.set_wol = m88e1318_set_wol,
2810 		.resume = genphy_resume,
2811 		.suspend = genphy_suspend,
2812 		.read_page = marvell_read_page,
2813 		.write_page = marvell_write_page,
2814 		.get_sset_count = marvell_get_sset_count,
2815 		.get_strings = marvell_get_strings,
2816 		.get_stats = marvell_get_stats,
2817 	},
2818 	{
2819 		.phy_id = MARVELL_PHY_ID_88E1145,
2820 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2821 		.name = "Marvell 88E1145",
2822 		/* PHY_GBIT_FEATURES */
2823 		.probe = marvell_probe,
2824 		.config_init = m88e1145_config_init,
2825 		.config_aneg = m88e1101_config_aneg,
2826 		.config_intr = marvell_config_intr,
2827 		.handle_interrupt = marvell_handle_interrupt,
2828 		.resume = genphy_resume,
2829 		.suspend = genphy_suspend,
2830 		.read_page = marvell_read_page,
2831 		.write_page = marvell_write_page,
2832 		.get_sset_count = marvell_get_sset_count,
2833 		.get_strings = marvell_get_strings,
2834 		.get_stats = marvell_get_stats,
2835 		.get_tunable = m88e1111_get_tunable,
2836 		.set_tunable = m88e1111_set_tunable,
2837 	},
2838 	{
2839 		.phy_id = MARVELL_PHY_ID_88E1149R,
2840 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2841 		.name = "Marvell 88E1149R",
2842 		/* PHY_GBIT_FEATURES */
2843 		.probe = marvell_probe,
2844 		.config_init = m88e1149_config_init,
2845 		.config_aneg = m88e1118_config_aneg,
2846 		.config_intr = marvell_config_intr,
2847 		.handle_interrupt = marvell_handle_interrupt,
2848 		.resume = genphy_resume,
2849 		.suspend = genphy_suspend,
2850 		.read_page = marvell_read_page,
2851 		.write_page = marvell_write_page,
2852 		.get_sset_count = marvell_get_sset_count,
2853 		.get_strings = marvell_get_strings,
2854 		.get_stats = marvell_get_stats,
2855 	},
2856 	{
2857 		.phy_id = MARVELL_PHY_ID_88E1240,
2858 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2859 		.name = "Marvell 88E1240",
2860 		/* PHY_GBIT_FEATURES */
2861 		.probe = marvell_probe,
2862 		.config_init = m88e1111_config_init,
2863 		.config_aneg = marvell_config_aneg,
2864 		.config_intr = marvell_config_intr,
2865 		.handle_interrupt = marvell_handle_interrupt,
2866 		.resume = genphy_resume,
2867 		.suspend = genphy_suspend,
2868 		.read_page = marvell_read_page,
2869 		.write_page = marvell_write_page,
2870 		.get_sset_count = marvell_get_sset_count,
2871 		.get_strings = marvell_get_strings,
2872 		.get_stats = marvell_get_stats,
2873 		.get_tunable = m88e1011_get_tunable,
2874 		.set_tunable = m88e1011_set_tunable,
2875 	},
2876 	{
2877 		.phy_id = MARVELL_PHY_ID_88E1116R,
2878 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2879 		.name = "Marvell 88E1116R",
2880 		/* PHY_GBIT_FEATURES */
2881 		.probe = marvell_probe,
2882 		.config_init = m88e1116r_config_init,
2883 		.config_intr = marvell_config_intr,
2884 		.handle_interrupt = marvell_handle_interrupt,
2885 		.resume = genphy_resume,
2886 		.suspend = genphy_suspend,
2887 		.read_page = marvell_read_page,
2888 		.write_page = marvell_write_page,
2889 		.get_sset_count = marvell_get_sset_count,
2890 		.get_strings = marvell_get_strings,
2891 		.get_stats = marvell_get_stats,
2892 		.get_tunable = m88e1011_get_tunable,
2893 		.set_tunable = m88e1011_set_tunable,
2894 	},
2895 	{
2896 		.phy_id = MARVELL_PHY_ID_88E1510,
2897 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2898 		.name = "Marvell 88E1510",
2899 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2900 		.features = PHY_GBIT_FIBRE_FEATURES,
2901 		.flags = PHY_POLL_CABLE_TEST,
2902 		.probe = marvell_probe,
2903 		.config_init = m88e1510_config_init,
2904 		.config_aneg = m88e1510_config_aneg,
2905 		.read_status = marvell_read_status,
2906 		.config_intr = marvell_config_intr,
2907 		.handle_interrupt = marvell_handle_interrupt,
2908 		.get_wol = m88e1318_get_wol,
2909 		.set_wol = m88e1318_set_wol,
2910 		.resume = marvell_resume,
2911 		.suspend = marvell_suspend,
2912 		.read_page = marvell_read_page,
2913 		.write_page = marvell_write_page,
2914 		.get_sset_count = marvell_get_sset_count,
2915 		.get_strings = marvell_get_strings,
2916 		.get_stats = marvell_get_stats,
2917 		.set_loopback = genphy_loopback,
2918 		.get_tunable = m88e1011_get_tunable,
2919 		.set_tunable = m88e1011_set_tunable,
2920 		.cable_test_start = marvell_vct7_cable_test_start,
2921 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2922 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
2923 	},
2924 	{
2925 		.phy_id = MARVELL_PHY_ID_88E1540,
2926 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2927 		.name = "Marvell 88E1540",
2928 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2929 		/* PHY_GBIT_FEATURES */
2930 		.flags = PHY_POLL_CABLE_TEST,
2931 		.probe = marvell_probe,
2932 		.config_init = marvell_config_init,
2933 		.config_aneg = m88e1510_config_aneg,
2934 		.read_status = marvell_read_status,
2935 		.config_intr = marvell_config_intr,
2936 		.handle_interrupt = marvell_handle_interrupt,
2937 		.resume = genphy_resume,
2938 		.suspend = genphy_suspend,
2939 		.read_page = marvell_read_page,
2940 		.write_page = marvell_write_page,
2941 		.get_sset_count = marvell_get_sset_count,
2942 		.get_strings = marvell_get_strings,
2943 		.get_stats = marvell_get_stats,
2944 		.get_tunable = m88e1540_get_tunable,
2945 		.set_tunable = m88e1540_set_tunable,
2946 		.cable_test_start = marvell_vct7_cable_test_start,
2947 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2948 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
2949 	},
2950 	{
2951 		.phy_id = MARVELL_PHY_ID_88E1545,
2952 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2953 		.name = "Marvell 88E1545",
2954 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2955 		.probe = marvell_probe,
2956 		/* PHY_GBIT_FEATURES */
2957 		.flags = PHY_POLL_CABLE_TEST,
2958 		.config_init = marvell_config_init,
2959 		.config_aneg = m88e1510_config_aneg,
2960 		.read_status = marvell_read_status,
2961 		.config_intr = marvell_config_intr,
2962 		.handle_interrupt = marvell_handle_interrupt,
2963 		.resume = genphy_resume,
2964 		.suspend = genphy_suspend,
2965 		.read_page = marvell_read_page,
2966 		.write_page = marvell_write_page,
2967 		.get_sset_count = marvell_get_sset_count,
2968 		.get_strings = marvell_get_strings,
2969 		.get_stats = marvell_get_stats,
2970 		.get_tunable = m88e1540_get_tunable,
2971 		.set_tunable = m88e1540_set_tunable,
2972 		.cable_test_start = marvell_vct7_cable_test_start,
2973 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2974 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
2975 	},
2976 	{
2977 		.phy_id = MARVELL_PHY_ID_88E3016,
2978 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2979 		.name = "Marvell 88E3016",
2980 		/* PHY_BASIC_FEATURES */
2981 		.probe = marvell_probe,
2982 		.config_init = m88e3016_config_init,
2983 		.aneg_done = marvell_aneg_done,
2984 		.read_status = marvell_read_status,
2985 		.config_intr = marvell_config_intr,
2986 		.handle_interrupt = marvell_handle_interrupt,
2987 		.resume = genphy_resume,
2988 		.suspend = genphy_suspend,
2989 		.read_page = marvell_read_page,
2990 		.write_page = marvell_write_page,
2991 		.get_sset_count = marvell_get_sset_count,
2992 		.get_strings = marvell_get_strings,
2993 		.get_stats = marvell_get_stats,
2994 	},
2995 	{
2996 		.phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
2997 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2998 		.name = "Marvell 88E6341 Family",
2999 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3000 		/* PHY_GBIT_FEATURES */
3001 		.flags = PHY_POLL_CABLE_TEST,
3002 		.probe = marvell_probe,
3003 		.config_init = marvell_config_init,
3004 		.config_aneg = m88e6390_config_aneg,
3005 		.read_status = marvell_read_status,
3006 		.config_intr = marvell_config_intr,
3007 		.handle_interrupt = marvell_handle_interrupt,
3008 		.resume = genphy_resume,
3009 		.suspend = genphy_suspend,
3010 		.read_page = marvell_read_page,
3011 		.write_page = marvell_write_page,
3012 		.get_sset_count = marvell_get_sset_count,
3013 		.get_strings = marvell_get_strings,
3014 		.get_stats = marvell_get_stats,
3015 		.get_tunable = m88e1540_get_tunable,
3016 		.set_tunable = m88e1540_set_tunable,
3017 		.cable_test_start = marvell_vct7_cable_test_start,
3018 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3019 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3020 	},
3021 	{
3022 		.phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
3023 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3024 		.name = "Marvell 88E6390 Family",
3025 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
3026 		/* PHY_GBIT_FEATURES */
3027 		.flags = PHY_POLL_CABLE_TEST,
3028 		.probe = marvell_probe,
3029 		.config_init = marvell_config_init,
3030 		.config_aneg = m88e6390_config_aneg,
3031 		.read_status = marvell_read_status,
3032 		.config_intr = marvell_config_intr,
3033 		.handle_interrupt = marvell_handle_interrupt,
3034 		.resume = genphy_resume,
3035 		.suspend = genphy_suspend,
3036 		.read_page = marvell_read_page,
3037 		.write_page = marvell_write_page,
3038 		.get_sset_count = marvell_get_sset_count,
3039 		.get_strings = marvell_get_strings,
3040 		.get_stats = marvell_get_stats,
3041 		.get_tunable = m88e1540_get_tunable,
3042 		.set_tunable = m88e1540_set_tunable,
3043 		.cable_test_start = marvell_vct7_cable_test_start,
3044 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3045 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3046 	},
3047 	{
3048 		.phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
3049 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3050 		.name = "Marvell 88E6393 Family",
3051 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
3052 		/* PHY_GBIT_FEATURES */
3053 		.flags = PHY_POLL_CABLE_TEST,
3054 		.probe = marvell_probe,
3055 		.config_init = marvell_config_init,
3056 		.config_aneg = m88e1510_config_aneg,
3057 		.read_status = marvell_read_status,
3058 		.config_intr = marvell_config_intr,
3059 		.handle_interrupt = marvell_handle_interrupt,
3060 		.resume = genphy_resume,
3061 		.suspend = genphy_suspend,
3062 		.read_page = marvell_read_page,
3063 		.write_page = marvell_write_page,
3064 		.get_sset_count = marvell_get_sset_count,
3065 		.get_strings = marvell_get_strings,
3066 		.get_stats = marvell_get_stats,
3067 		.get_tunable = m88e1540_get_tunable,
3068 		.set_tunable = m88e1540_set_tunable,
3069 		.cable_test_start = marvell_vct7_cable_test_start,
3070 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3071 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3072 	},
3073 	{
3074 		.phy_id = MARVELL_PHY_ID_88E1340S,
3075 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3076 		.name = "Marvell 88E1340S",
3077 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3078 		.probe = marvell_probe,
3079 		/* PHY_GBIT_FEATURES */
3080 		.config_init = marvell_config_init,
3081 		.config_aneg = m88e1510_config_aneg,
3082 		.read_status = marvell_read_status,
3083 		.config_intr = marvell_config_intr,
3084 		.handle_interrupt = marvell_handle_interrupt,
3085 		.resume = genphy_resume,
3086 		.suspend = genphy_suspend,
3087 		.read_page = marvell_read_page,
3088 		.write_page = marvell_write_page,
3089 		.get_sset_count = marvell_get_sset_count,
3090 		.get_strings = marvell_get_strings,
3091 		.get_stats = marvell_get_stats,
3092 		.get_tunable = m88e1540_get_tunable,
3093 		.set_tunable = m88e1540_set_tunable,
3094 	},
3095 	{
3096 		.phy_id = MARVELL_PHY_ID_88E1548P,
3097 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3098 		.name = "Marvell 88E1548P",
3099 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3100 		.probe = marvell_probe,
3101 		.features = PHY_GBIT_FIBRE_FEATURES,
3102 		.config_init = marvell_config_init,
3103 		.config_aneg = m88e1510_config_aneg,
3104 		.read_status = marvell_read_status,
3105 		.config_intr = marvell_config_intr,
3106 		.handle_interrupt = marvell_handle_interrupt,
3107 		.resume = genphy_resume,
3108 		.suspend = genphy_suspend,
3109 		.read_page = marvell_read_page,
3110 		.write_page = marvell_write_page,
3111 		.get_sset_count = marvell_get_sset_count,
3112 		.get_strings = marvell_get_strings,
3113 		.get_stats = marvell_get_stats,
3114 		.get_tunable = m88e1540_get_tunable,
3115 		.set_tunable = m88e1540_set_tunable,
3116 	},
3117 };
3118 
3119 module_phy_driver(marvell_drivers);
3120 
3121 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
3122 	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
3123 	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
3124 	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
3125 	{ MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
3126 	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
3127 	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3128 	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3129 	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3130 	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3131 	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3132 	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3133 	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3134 	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3135 	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3136 	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3137 	{ MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
3138 	{ MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
3139 	{ MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
3140 	{ MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3141 	{ MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3142 	{ }
3143 };
3144 
3145 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
3146