1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13 #include <linux/kernel.h> 14 #include <linux/string.h> 15 #include <linux/ctype.h> 16 #include <linux/errno.h> 17 #include <linux/unistd.h> 18 #include <linux/hwmon.h> 19 #include <linux/interrupt.h> 20 #include <linux/init.h> 21 #include <linux/delay.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/skbuff.h> 25 #include <linux/spinlock.h> 26 #include <linux/mm.h> 27 #include <linux/module.h> 28 #include <linux/mii.h> 29 #include <linux/ethtool.h> 30 #include <linux/ethtool_netlink.h> 31 #include <linux/phy.h> 32 #include <linux/marvell_phy.h> 33 #include <linux/bitfield.h> 34 #include <linux/of.h> 35 #include <linux/sfp.h> 36 37 #include <linux/io.h> 38 #include <asm/irq.h> 39 #include <linux/uaccess.h> 40 41 #define MII_MARVELL_PHY_PAGE 22 42 #define MII_MARVELL_COPPER_PAGE 0x00 43 #define MII_MARVELL_FIBER_PAGE 0x01 44 #define MII_MARVELL_MSCR_PAGE 0x02 45 #define MII_MARVELL_LED_PAGE 0x03 46 #define MII_MARVELL_VCT5_PAGE 0x05 47 #define MII_MARVELL_MISC_TEST_PAGE 0x06 48 #define MII_MARVELL_VCT7_PAGE 0x07 49 #define MII_MARVELL_WOL_PAGE 0x11 50 #define MII_MARVELL_MODE_PAGE 0x12 51 52 #define MII_M1011_IEVENT 0x13 53 #define MII_M1011_IEVENT_CLEAR 0x0000 54 55 #define MII_M1011_IMASK 0x12 56 #define MII_M1011_IMASK_INIT 0x6400 57 #define MII_M1011_IMASK_CLEAR 0x0000 58 59 #define MII_M1011_PHY_SCR 0x10 60 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 61 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12) 62 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8 63 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 64 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 65 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 66 67 #define MII_M1011_PHY_SSR 0x11 68 #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5) 69 70 #define MII_M1111_PHY_LED_CONTROL 0x18 71 #define MII_M1111_PHY_LED_DIRECT 0x4100 72 #define MII_M1111_PHY_LED_COMBINE 0x411c 73 #define MII_M1111_PHY_EXT_CR 0x14 74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9) 75 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8 76 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8) 77 #define MII_M1111_RGMII_RX_DELAY BIT(7) 78 #define MII_M1111_RGMII_TX_DELAY BIT(1) 79 #define MII_M1111_PHY_EXT_SR 0x1b 80 81 #define MII_M1111_HWCFG_MODE_MASK 0xf 82 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 83 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 84 #define MII_M1111_HWCFG_MODE_RTBI 0x7 85 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8 86 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 87 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 88 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc 89 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12) 90 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 91 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 92 93 #define MII_88E1121_PHY_MSCR_REG 21 94 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 95 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 96 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 97 98 #define MII_88E1121_MISC_TEST 0x1a 99 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 100 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 101 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 102 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 103 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 104 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 105 106 #define MII_88E1510_TEMP_SENSOR 0x1b 107 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 108 109 #define MII_88E1540_COPPER_CTRL3 0x1a 110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) 111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 113 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 114 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 115 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) 116 117 #define MII_88E6390_MISC_TEST 0x1b 118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14) 119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14) 120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14) 121 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14) 122 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14) 123 #define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11) 124 #define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11) 125 #define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11) 126 #define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11) 127 #define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11) 128 #define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8) 129 #define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8) 130 #define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8) 131 #define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8) 132 133 #define MII_88E6390_TEMP_SENSOR 0x1c 134 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00 135 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8 136 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 137 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 138 139 #define MII_88E1318S_PHY_MSCR1_REG 16 140 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 141 142 /* Copper Specific Interrupt Enable Register */ 143 #define MII_88E1318S_PHY_CSIER 0x12 144 /* WOL Event Interrupt Enable */ 145 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 146 147 /* LED Timer Control Register */ 148 #define MII_88E1318S_PHY_LED_TCR 0x12 149 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 150 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 151 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 152 153 /* Magic Packet MAC address registers */ 154 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 155 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 156 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 157 158 #define MII_88E1318S_PHY_WOL_CTRL 0x10 159 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 160 #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE BIT(13) 161 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 162 163 #define MII_PHY_LED_CTRL 16 164 #define MII_88E1121_PHY_LED_DEF 0x0030 165 #define MII_88E1510_PHY_LED_DEF 0x1177 166 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040 167 168 #define MII_M1011_PHY_STATUS 0x11 169 #define MII_M1011_PHY_STATUS_1000 0x8000 170 #define MII_M1011_PHY_STATUS_100 0x4000 171 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 172 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 173 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 174 #define MII_M1011_PHY_STATUS_LINK 0x0400 175 176 #define MII_88E3016_PHY_SPEC_CTRL 0x10 177 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 178 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 179 180 #define MII_88E1510_GEN_CTRL_REG_1 0x14 181 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 182 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */ 183 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 184 /* RGMII to 1000BASE-X */ 185 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2 186 /* RGMII to 100BASE-FX */ 187 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3 188 /* RGMII to SGMII */ 189 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4 190 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 191 192 #define MII_88E1510_MSCR_2 0x15 193 194 #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10 195 #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11 196 #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12 197 #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13 198 #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00 199 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8 200 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15) 201 202 #define MII_VCT5_CTRL 0x17 203 #define MII_VCT5_CTRL_ENABLE BIT(15) 204 #define MII_VCT5_CTRL_COMPLETE BIT(14) 205 #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11) 206 #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11) 207 #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11) 208 #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11) 209 #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11) 210 #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8) 211 #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8) 212 #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8) 213 #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8) 214 #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8) 215 #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8) 216 #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8) 217 #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8) 218 #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8) 219 #define MII_VCT5_CTRL_SAMPLES_SHIFT 8 220 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6) 221 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6) 222 #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6) 223 #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6) 224 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3 225 226 #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18 227 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511 228 #define MII_VCT5_TX_PULSE_CTRL 0x1c 229 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12) 230 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10) 231 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10) 232 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10) 233 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10) 234 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10 235 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8) 236 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8) 237 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8) 238 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8) 239 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8 240 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7) 241 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0) 242 243 /* For TDR measurements less than 11 meters, a short pulse should be 244 * used. 245 */ 246 #define TDR_SHORT_CABLE_LENGTH 11 247 248 #define MII_VCT7_PAIR_0_DISTANCE 0x10 249 #define MII_VCT7_PAIR_1_DISTANCE 0x11 250 #define MII_VCT7_PAIR_2_DISTANCE 0x12 251 #define MII_VCT7_PAIR_3_DISTANCE 0x13 252 253 #define MII_VCT7_RESULTS 0x14 254 #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000 255 #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00 256 #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0 257 #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f 258 #define MII_VCT7_RESULTS_PAIR3_SHIFT 12 259 #define MII_VCT7_RESULTS_PAIR2_SHIFT 8 260 #define MII_VCT7_RESULTS_PAIR1_SHIFT 4 261 #define MII_VCT7_RESULTS_PAIR0_SHIFT 0 262 #define MII_VCT7_RESULTS_INVALID 0 263 #define MII_VCT7_RESULTS_OK 1 264 #define MII_VCT7_RESULTS_OPEN 2 265 #define MII_VCT7_RESULTS_SAME_SHORT 3 266 #define MII_VCT7_RESULTS_CROSS_SHORT 4 267 #define MII_VCT7_RESULTS_BUSY 9 268 269 #define MII_VCT7_CTRL 0x15 270 #define MII_VCT7_CTRL_RUN_NOW BIT(15) 271 #define MII_VCT7_CTRL_RUN_ANEG BIT(14) 272 #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13) 273 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12) 274 #define MII_VCT7_CTRL_IN_PROGRESS BIT(11) 275 #define MII_VCT7_CTRL_METERS BIT(10) 276 #define MII_VCT7_CTRL_CENTIMETERS 0 277 278 #define LPA_PAUSE_FIBER 0x180 279 #define LPA_PAUSE_ASYM_FIBER 0x100 280 281 #define NB_FIBER_STATS 1 282 283 MODULE_DESCRIPTION("Marvell PHY driver"); 284 MODULE_AUTHOR("Andy Fleming"); 285 MODULE_LICENSE("GPL"); 286 287 struct marvell_hw_stat { 288 const char *string; 289 u8 page; 290 u8 reg; 291 u8 bits; 292 }; 293 294 static struct marvell_hw_stat marvell_hw_stats[] = { 295 { "phy_receive_errors_copper", 0, 21, 16}, 296 { "phy_idle_errors", 0, 10, 8 }, 297 { "phy_receive_errors_fiber", 1, 21, 16}, 298 }; 299 300 struct marvell_priv { 301 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 302 char *hwmon_name; 303 struct device *hwmon_dev; 304 bool cable_test_tdr; 305 u32 first; 306 u32 last; 307 u32 step; 308 s8 pair; 309 }; 310 311 static int marvell_read_page(struct phy_device *phydev) 312 { 313 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 314 } 315 316 static int marvell_write_page(struct phy_device *phydev, int page) 317 { 318 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 319 } 320 321 static int marvell_set_page(struct phy_device *phydev, int page) 322 { 323 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 324 } 325 326 static int marvell_ack_interrupt(struct phy_device *phydev) 327 { 328 int err; 329 330 /* Clear the interrupts by reading the reg */ 331 err = phy_read(phydev, MII_M1011_IEVENT); 332 333 if (err < 0) 334 return err; 335 336 return 0; 337 } 338 339 static int marvell_config_intr(struct phy_device *phydev) 340 { 341 int err; 342 343 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { 344 err = marvell_ack_interrupt(phydev); 345 if (err) 346 return err; 347 348 err = phy_write(phydev, MII_M1011_IMASK, 349 MII_M1011_IMASK_INIT); 350 } else { 351 err = phy_write(phydev, MII_M1011_IMASK, 352 MII_M1011_IMASK_CLEAR); 353 if (err) 354 return err; 355 356 err = marvell_ack_interrupt(phydev); 357 } 358 359 return err; 360 } 361 362 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev) 363 { 364 int irq_status; 365 366 irq_status = phy_read(phydev, MII_M1011_IEVENT); 367 if (irq_status < 0) { 368 phy_error(phydev); 369 return IRQ_NONE; 370 } 371 372 if (!(irq_status & MII_M1011_IMASK_INIT)) 373 return IRQ_NONE; 374 375 phy_trigger_machine(phydev); 376 377 return IRQ_HANDLED; 378 } 379 380 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 381 { 382 u16 val; 383 384 switch (polarity) { 385 case ETH_TP_MDI: 386 val = MII_M1011_PHY_SCR_MDI; 387 break; 388 case ETH_TP_MDI_X: 389 val = MII_M1011_PHY_SCR_MDI_X; 390 break; 391 case ETH_TP_MDI_AUTO: 392 case ETH_TP_MDI_INVALID: 393 default: 394 val = MII_M1011_PHY_SCR_AUTO_CROSS; 395 break; 396 } 397 398 return phy_modify_changed(phydev, MII_M1011_PHY_SCR, 399 MII_M1011_PHY_SCR_AUTO_CROSS, val); 400 } 401 402 static int marvell_config_aneg(struct phy_device *phydev) 403 { 404 int changed = 0; 405 int err; 406 407 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 408 if (err < 0) 409 return err; 410 411 changed = err; 412 413 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 414 MII_M1111_PHY_LED_DIRECT); 415 if (err < 0) 416 return err; 417 418 err = genphy_config_aneg(phydev); 419 if (err < 0) 420 return err; 421 422 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 423 /* A write to speed/duplex bits (that is performed by 424 * genphy_config_aneg() call above) must be followed by 425 * a software reset. Otherwise, the write has no effect. 426 */ 427 err = genphy_soft_reset(phydev); 428 if (err < 0) 429 return err; 430 } 431 432 return 0; 433 } 434 435 static int m88e1101_config_aneg(struct phy_device *phydev) 436 { 437 int err; 438 439 /* This Marvell PHY has an errata which requires 440 * that certain registers get written in order 441 * to restart autonegotiation 442 */ 443 err = genphy_soft_reset(phydev); 444 if (err < 0) 445 return err; 446 447 err = phy_write(phydev, 0x1d, 0x1f); 448 if (err < 0) 449 return err; 450 451 err = phy_write(phydev, 0x1e, 0x200c); 452 if (err < 0) 453 return err; 454 455 err = phy_write(phydev, 0x1d, 0x5); 456 if (err < 0) 457 return err; 458 459 err = phy_write(phydev, 0x1e, 0); 460 if (err < 0) 461 return err; 462 463 err = phy_write(phydev, 0x1e, 0x100); 464 if (err < 0) 465 return err; 466 467 return marvell_config_aneg(phydev); 468 } 469 470 #if IS_ENABLED(CONFIG_OF_MDIO) 471 /* Set and/or override some configuration registers based on the 472 * marvell,reg-init property stored in the of_node for the phydev. 473 * 474 * marvell,reg-init = <reg-page reg mask value>,...; 475 * 476 * There may be one or more sets of <reg-page reg mask value>: 477 * 478 * reg-page: which register bank to use. 479 * reg: the register. 480 * mask: if non-zero, ANDed with existing register value. 481 * value: ORed with the masked value and written to the regiser. 482 * 483 */ 484 static int marvell_of_reg_init(struct phy_device *phydev) 485 { 486 const __be32 *paddr; 487 int len, i, saved_page, current_page, ret = 0; 488 489 if (!phydev->mdio.dev.of_node) 490 return 0; 491 492 paddr = of_get_property(phydev->mdio.dev.of_node, 493 "marvell,reg-init", &len); 494 if (!paddr || len < (4 * sizeof(*paddr))) 495 return 0; 496 497 saved_page = phy_save_page(phydev); 498 if (saved_page < 0) 499 goto err; 500 current_page = saved_page; 501 502 len /= sizeof(*paddr); 503 for (i = 0; i < len - 3; i += 4) { 504 u16 page = be32_to_cpup(paddr + i); 505 u16 reg = be32_to_cpup(paddr + i + 1); 506 u16 mask = be32_to_cpup(paddr + i + 2); 507 u16 val_bits = be32_to_cpup(paddr + i + 3); 508 int val; 509 510 if (page != current_page) { 511 current_page = page; 512 ret = marvell_write_page(phydev, page); 513 if (ret < 0) 514 goto err; 515 } 516 517 val = 0; 518 if (mask) { 519 val = __phy_read(phydev, reg); 520 if (val < 0) { 521 ret = val; 522 goto err; 523 } 524 val &= mask; 525 } 526 val |= val_bits; 527 528 ret = __phy_write(phydev, reg, val); 529 if (ret < 0) 530 goto err; 531 } 532 err: 533 return phy_restore_page(phydev, saved_page, ret); 534 } 535 #else 536 static int marvell_of_reg_init(struct phy_device *phydev) 537 { 538 return 0; 539 } 540 #endif /* CONFIG_OF_MDIO */ 541 542 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 543 { 544 int mscr; 545 546 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 547 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 548 MII_88E1121_PHY_MSCR_TX_DELAY; 549 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 550 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 551 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 552 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 553 else 554 mscr = 0; 555 556 return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE, 557 MII_88E1121_PHY_MSCR_REG, 558 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 559 } 560 561 static int m88e1121_config_aneg(struct phy_device *phydev) 562 { 563 int changed = 0; 564 int err = 0; 565 566 if (phy_interface_is_rgmii(phydev)) { 567 err = m88e1121_config_aneg_rgmii_delays(phydev); 568 if (err < 0) 569 return err; 570 } 571 572 changed = err; 573 574 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 575 if (err < 0) 576 return err; 577 578 changed |= err; 579 580 err = genphy_config_aneg(phydev); 581 if (err < 0) 582 return err; 583 584 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 585 /* A software reset is used to ensure a "commit" of the 586 * changes is done. 587 */ 588 err = genphy_soft_reset(phydev); 589 if (err < 0) 590 return err; 591 } 592 593 return 0; 594 } 595 596 static int m88e1318_config_aneg(struct phy_device *phydev) 597 { 598 int err; 599 600 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 601 MII_88E1318S_PHY_MSCR1_REG, 602 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 603 if (err < 0) 604 return err; 605 606 return m88e1121_config_aneg(phydev); 607 } 608 609 /** 610 * linkmode_adv_to_fiber_adv_t 611 * @advertise: the linkmode advertisement settings 612 * 613 * A small helper function that translates linkmode advertisement 614 * settings to phy autonegotiation advertisements for the MII_ADV 615 * register for fiber link. 616 */ 617 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 618 { 619 u32 result = 0; 620 621 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 622 result |= ADVERTISE_1000XHALF; 623 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 624 result |= ADVERTISE_1000XFULL; 625 626 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 627 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 628 result |= ADVERTISE_1000XPSE_ASYM; 629 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 630 result |= ADVERTISE_1000XPAUSE; 631 632 return result; 633 } 634 635 /** 636 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 637 * @phydev: target phy_device struct 638 * 639 * Description: If auto-negotiation is enabled, we configure the 640 * advertising, and then restart auto-negotiation. If it is not 641 * enabled, then we write the BMCR. Adapted for fiber link in 642 * some Marvell's devices. 643 */ 644 static int marvell_config_aneg_fiber(struct phy_device *phydev) 645 { 646 int changed = 0; 647 int err; 648 u16 adv; 649 650 if (phydev->autoneg != AUTONEG_ENABLE) 651 return genphy_setup_forced(phydev); 652 653 /* Only allow advertising what this PHY supports */ 654 linkmode_and(phydev->advertising, phydev->advertising, 655 phydev->supported); 656 657 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising); 658 659 /* Setup fiber advertisement */ 660 err = phy_modify_changed(phydev, MII_ADVERTISE, 661 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL | 662 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM, 663 adv); 664 if (err < 0) 665 return err; 666 if (err > 0) 667 changed = 1; 668 669 return genphy_check_and_restart_aneg(phydev, changed); 670 } 671 672 static int m88e1111_config_aneg(struct phy_device *phydev) 673 { 674 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); 675 int err; 676 677 if (extsr < 0) 678 return extsr; 679 680 /* If not using SGMII or copper 1000BaseX modes, use normal process. 681 * Steps below are only required for these modes. 682 */ 683 if (phydev->interface != PHY_INTERFACE_MODE_SGMII && 684 (extsr & MII_M1111_HWCFG_MODE_MASK) != 685 MII_M1111_HWCFG_MODE_COPPER_1000X_AN) 686 return marvell_config_aneg(phydev); 687 688 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 689 if (err < 0) 690 goto error; 691 692 /* Configure the copper link first */ 693 err = marvell_config_aneg(phydev); 694 if (err < 0) 695 goto error; 696 697 /* Then the fiber link */ 698 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 699 if (err < 0) 700 goto error; 701 702 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 703 /* Do not touch the fiber advertisement if we're in copper->sgmii mode. 704 * Just ensure that SGMII-side autonegotiation is enabled. 705 * If we switched from some other mode to SGMII it may not be. 706 */ 707 err = genphy_check_and_restart_aneg(phydev, false); 708 else 709 err = marvell_config_aneg_fiber(phydev); 710 if (err < 0) 711 goto error; 712 713 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 714 715 error: 716 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 717 return err; 718 } 719 720 static int m88e1510_config_aneg(struct phy_device *phydev) 721 { 722 int err; 723 724 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 725 if (err < 0) 726 goto error; 727 728 /* Configure the copper link first */ 729 err = m88e1318_config_aneg(phydev); 730 if (err < 0) 731 goto error; 732 733 /* Do not touch the fiber page if we're in copper->sgmii mode */ 734 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 735 return 0; 736 737 /* Then the fiber link */ 738 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 739 if (err < 0) 740 goto error; 741 742 err = marvell_config_aneg_fiber(phydev); 743 if (err < 0) 744 goto error; 745 746 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 747 748 error: 749 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 750 return err; 751 } 752 753 static void marvell_config_led(struct phy_device *phydev) 754 { 755 u16 def_config; 756 int err; 757 758 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 759 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 760 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 761 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 762 def_config = MII_88E1121_PHY_LED_DEF; 763 break; 764 /* Default PHY LED config: 765 * LED[0] .. 1000Mbps Link 766 * LED[1] .. 100Mbps Link 767 * LED[2] .. Blink, Activity 768 */ 769 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 770 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE) 771 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE; 772 else 773 def_config = MII_88E1510_PHY_LED_DEF; 774 break; 775 default: 776 return; 777 } 778 779 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 780 def_config); 781 if (err < 0) 782 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 783 } 784 785 static int marvell_config_init(struct phy_device *phydev) 786 { 787 /* Set default LED */ 788 marvell_config_led(phydev); 789 790 /* Set registers from marvell,reg-init DT property */ 791 return marvell_of_reg_init(phydev); 792 } 793 794 static int m88e3016_config_init(struct phy_device *phydev) 795 { 796 int ret; 797 798 /* Enable Scrambler and Auto-Crossover */ 799 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 800 MII_88E3016_DISABLE_SCRAMBLER, 801 MII_88E3016_AUTO_MDIX_CROSSOVER); 802 if (ret < 0) 803 return ret; 804 805 return marvell_config_init(phydev); 806 } 807 808 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 809 u16 mode, 810 int fibre_copper_auto) 811 { 812 if (fibre_copper_auto) 813 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 814 815 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 816 MII_M1111_HWCFG_MODE_MASK | 817 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 818 MII_M1111_HWCFG_FIBER_COPPER_RES, 819 mode); 820 } 821 822 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 823 { 824 int delay; 825 826 switch (phydev->interface) { 827 case PHY_INTERFACE_MODE_RGMII_ID: 828 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 829 break; 830 case PHY_INTERFACE_MODE_RGMII_RXID: 831 delay = MII_M1111_RGMII_RX_DELAY; 832 break; 833 case PHY_INTERFACE_MODE_RGMII_TXID: 834 delay = MII_M1111_RGMII_TX_DELAY; 835 break; 836 default: 837 delay = 0; 838 break; 839 } 840 841 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 842 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 843 delay); 844 } 845 846 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 847 { 848 int temp; 849 int err; 850 851 err = m88e1111_config_init_rgmii_delays(phydev); 852 if (err < 0) 853 return err; 854 855 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 856 if (temp < 0) 857 return temp; 858 859 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 860 861 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 862 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 863 else 864 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 865 866 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 867 } 868 869 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 870 { 871 int err; 872 873 err = m88e1111_config_init_hwcfg_mode( 874 phydev, 875 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 876 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 877 if (err < 0) 878 return err; 879 880 /* make sure copper is selected */ 881 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 882 } 883 884 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 885 { 886 int err; 887 888 err = m88e1111_config_init_rgmii_delays(phydev); 889 if (err < 0) 890 return err; 891 892 err = m88e1111_config_init_hwcfg_mode( 893 phydev, 894 MII_M1111_HWCFG_MODE_RTBI, 895 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 896 if (err < 0) 897 return err; 898 899 /* soft reset */ 900 err = genphy_soft_reset(phydev); 901 if (err < 0) 902 return err; 903 904 return m88e1111_config_init_hwcfg_mode( 905 phydev, 906 MII_M1111_HWCFG_MODE_RTBI, 907 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 908 } 909 910 static int m88e1111_config_init_1000basex(struct phy_device *phydev) 911 { 912 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); 913 int err, mode; 914 915 if (extsr < 0) 916 return extsr; 917 918 /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */ 919 mode = extsr & MII_M1111_HWCFG_MODE_MASK; 920 if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) { 921 err = phy_modify(phydev, MII_M1111_PHY_EXT_SR, 922 MII_M1111_HWCFG_MODE_MASK | 923 MII_M1111_HWCFG_SERIAL_AN_BYPASS, 924 MII_M1111_HWCFG_MODE_COPPER_1000X_AN | 925 MII_M1111_HWCFG_SERIAL_AN_BYPASS); 926 if (err < 0) 927 return err; 928 } 929 return 0; 930 } 931 932 static int m88e1111_config_init(struct phy_device *phydev) 933 { 934 int err; 935 936 if (phy_interface_is_rgmii(phydev)) { 937 err = m88e1111_config_init_rgmii(phydev); 938 if (err < 0) 939 return err; 940 } 941 942 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 943 err = m88e1111_config_init_sgmii(phydev); 944 if (err < 0) 945 return err; 946 } 947 948 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 949 err = m88e1111_config_init_rtbi(phydev); 950 if (err < 0) 951 return err; 952 } 953 954 if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) { 955 err = m88e1111_config_init_1000basex(phydev); 956 if (err < 0) 957 return err; 958 } 959 960 err = marvell_of_reg_init(phydev); 961 if (err < 0) 962 return err; 963 964 return genphy_soft_reset(phydev); 965 } 966 967 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data) 968 { 969 int val, cnt, enable; 970 971 val = phy_read(phydev, MII_M1111_PHY_EXT_CR); 972 if (val < 0) 973 return val; 974 975 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val); 976 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1; 977 978 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 979 980 return 0; 981 } 982 983 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt) 984 { 985 int val, err; 986 987 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX) 988 return -E2BIG; 989 990 if (!cnt) { 991 err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, 992 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); 993 } else { 994 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; 995 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); 996 997 err = phy_modify(phydev, MII_M1111_PHY_EXT_CR, 998 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | 999 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, 1000 val); 1001 } 1002 1003 if (err < 0) 1004 return err; 1005 1006 return genphy_soft_reset(phydev); 1007 } 1008 1009 static int m88e1111_get_tunable(struct phy_device *phydev, 1010 struct ethtool_tunable *tuna, void *data) 1011 { 1012 switch (tuna->id) { 1013 case ETHTOOL_PHY_DOWNSHIFT: 1014 return m88e1111_get_downshift(phydev, data); 1015 default: 1016 return -EOPNOTSUPP; 1017 } 1018 } 1019 1020 static int m88e1111_set_tunable(struct phy_device *phydev, 1021 struct ethtool_tunable *tuna, const void *data) 1022 { 1023 switch (tuna->id) { 1024 case ETHTOOL_PHY_DOWNSHIFT: 1025 return m88e1111_set_downshift(phydev, *(const u8 *)data); 1026 default: 1027 return -EOPNOTSUPP; 1028 } 1029 } 1030 1031 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data) 1032 { 1033 int val, cnt, enable; 1034 1035 val = phy_read(phydev, MII_M1011_PHY_SCR); 1036 if (val < 0) 1037 return val; 1038 1039 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val); 1040 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1; 1041 1042 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 1043 1044 return 0; 1045 } 1046 1047 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt) 1048 { 1049 int val, err; 1050 1051 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX) 1052 return -E2BIG; 1053 1054 if (!cnt) { 1055 err = phy_clear_bits(phydev, MII_M1011_PHY_SCR, 1056 MII_M1011_PHY_SCR_DOWNSHIFT_EN); 1057 } else { 1058 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; 1059 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); 1060 1061 err = phy_modify(phydev, MII_M1011_PHY_SCR, 1062 MII_M1011_PHY_SCR_DOWNSHIFT_EN | 1063 MII_M1011_PHY_SCR_DOWNSHIFT_MASK, 1064 val); 1065 } 1066 1067 if (err < 0) 1068 return err; 1069 1070 return genphy_soft_reset(phydev); 1071 } 1072 1073 static int m88e1011_get_tunable(struct phy_device *phydev, 1074 struct ethtool_tunable *tuna, void *data) 1075 { 1076 switch (tuna->id) { 1077 case ETHTOOL_PHY_DOWNSHIFT: 1078 return m88e1011_get_downshift(phydev, data); 1079 default: 1080 return -EOPNOTSUPP; 1081 } 1082 } 1083 1084 static int m88e1011_set_tunable(struct phy_device *phydev, 1085 struct ethtool_tunable *tuna, const void *data) 1086 { 1087 switch (tuna->id) { 1088 case ETHTOOL_PHY_DOWNSHIFT: 1089 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1090 default: 1091 return -EOPNOTSUPP; 1092 } 1093 } 1094 1095 static int m88e1112_config_init(struct phy_device *phydev) 1096 { 1097 int err; 1098 1099 err = m88e1011_set_downshift(phydev, 3); 1100 if (err < 0) 1101 return err; 1102 1103 return m88e1111_config_init(phydev); 1104 } 1105 1106 static int m88e1111gbe_config_init(struct phy_device *phydev) 1107 { 1108 int err; 1109 1110 err = m88e1111_set_downshift(phydev, 3); 1111 if (err < 0) 1112 return err; 1113 1114 return m88e1111_config_init(phydev); 1115 } 1116 1117 static int marvell_1011gbe_config_init(struct phy_device *phydev) 1118 { 1119 int err; 1120 1121 err = m88e1011_set_downshift(phydev, 3); 1122 if (err < 0) 1123 return err; 1124 1125 return marvell_config_init(phydev); 1126 } 1127 static int m88e1116r_config_init(struct phy_device *phydev) 1128 { 1129 int err; 1130 1131 err = genphy_soft_reset(phydev); 1132 if (err < 0) 1133 return err; 1134 1135 msleep(500); 1136 1137 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1138 if (err < 0) 1139 return err; 1140 1141 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1142 if (err < 0) 1143 return err; 1144 1145 err = m88e1011_set_downshift(phydev, 8); 1146 if (err < 0) 1147 return err; 1148 1149 if (phy_interface_is_rgmii(phydev)) { 1150 err = m88e1121_config_aneg_rgmii_delays(phydev); 1151 if (err < 0) 1152 return err; 1153 } 1154 1155 err = genphy_soft_reset(phydev); 1156 if (err < 0) 1157 return err; 1158 1159 return marvell_config_init(phydev); 1160 } 1161 1162 static int m88e1318_config_init(struct phy_device *phydev) 1163 { 1164 if (phy_interrupt_is_valid(phydev)) { 1165 int err = phy_modify_paged( 1166 phydev, MII_MARVELL_LED_PAGE, 1167 MII_88E1318S_PHY_LED_TCR, 1168 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1169 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1170 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1171 if (err < 0) 1172 return err; 1173 } 1174 1175 return marvell_config_init(phydev); 1176 } 1177 1178 static int m88e1510_config_init(struct phy_device *phydev) 1179 { 1180 int err; 1181 1182 /* SGMII-to-Copper mode initialization */ 1183 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1184 /* Select page 18 */ 1185 err = marvell_set_page(phydev, 18); 1186 if (err < 0) 1187 return err; 1188 1189 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 1190 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 1191 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 1192 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 1193 if (err < 0) 1194 return err; 1195 1196 /* PHY reset is necessary after changing MODE[2:0] */ 1197 err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 1198 MII_88E1510_GEN_CTRL_REG_1_RESET); 1199 if (err < 0) 1200 return err; 1201 1202 /* Reset page selection */ 1203 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1204 if (err < 0) 1205 return err; 1206 } 1207 err = m88e1011_set_downshift(phydev, 3); 1208 if (err < 0) 1209 return err; 1210 1211 return m88e1318_config_init(phydev); 1212 } 1213 1214 static int m88e1118_config_aneg(struct phy_device *phydev) 1215 { 1216 int err; 1217 1218 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1219 if (err < 0) 1220 return err; 1221 1222 err = genphy_config_aneg(phydev); 1223 if (err < 0) 1224 return err; 1225 1226 return genphy_soft_reset(phydev); 1227 } 1228 1229 static int m88e1118_config_init(struct phy_device *phydev) 1230 { 1231 u16 leds; 1232 int err; 1233 1234 /* Enable 1000 Mbit */ 1235 err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE, 1236 MII_88E1121_PHY_MSCR_REG, 0x1070); 1237 if (err < 0) 1238 return err; 1239 1240 if (phy_interface_is_rgmii(phydev)) { 1241 err = m88e1121_config_aneg_rgmii_delays(phydev); 1242 if (err < 0) 1243 return err; 1244 } 1245 1246 /* Adjust LED Control */ 1247 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 1248 leds = 0x1100; 1249 else 1250 leds = 0x021e; 1251 1252 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds); 1253 if (err < 0) 1254 return err; 1255 1256 err = marvell_of_reg_init(phydev); 1257 if (err < 0) 1258 return err; 1259 1260 /* Reset page register */ 1261 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1262 if (err < 0) 1263 return err; 1264 1265 return genphy_soft_reset(phydev); 1266 } 1267 1268 static int m88e1149_config_init(struct phy_device *phydev) 1269 { 1270 int err; 1271 1272 /* Change address */ 1273 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1274 if (err < 0) 1275 return err; 1276 1277 /* Enable 1000 Mbit */ 1278 err = phy_write(phydev, 0x15, 0x1048); 1279 if (err < 0) 1280 return err; 1281 1282 err = marvell_of_reg_init(phydev); 1283 if (err < 0) 1284 return err; 1285 1286 /* Reset address */ 1287 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1288 if (err < 0) 1289 return err; 1290 1291 return genphy_soft_reset(phydev); 1292 } 1293 1294 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 1295 { 1296 int err; 1297 1298 err = m88e1111_config_init_rgmii_delays(phydev); 1299 if (err < 0) 1300 return err; 1301 1302 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 1303 err = phy_write(phydev, 0x1d, 0x0012); 1304 if (err < 0) 1305 return err; 1306 1307 err = phy_modify(phydev, 0x1e, 0x0fc0, 1308 2 << 9 | /* 36 ohm */ 1309 2 << 6); /* 39 ohm */ 1310 if (err < 0) 1311 return err; 1312 1313 err = phy_write(phydev, 0x1d, 0x3); 1314 if (err < 0) 1315 return err; 1316 1317 err = phy_write(phydev, 0x1e, 0x8000); 1318 } 1319 return err; 1320 } 1321 1322 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1323 { 1324 return m88e1111_config_init_hwcfg_mode( 1325 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1326 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1327 } 1328 1329 static int m88e1145_config_init(struct phy_device *phydev) 1330 { 1331 int err; 1332 1333 /* Take care of errata E0 & E1 */ 1334 err = phy_write(phydev, 0x1d, 0x001b); 1335 if (err < 0) 1336 return err; 1337 1338 err = phy_write(phydev, 0x1e, 0x418f); 1339 if (err < 0) 1340 return err; 1341 1342 err = phy_write(phydev, 0x1d, 0x0016); 1343 if (err < 0) 1344 return err; 1345 1346 err = phy_write(phydev, 0x1e, 0xa2da); 1347 if (err < 0) 1348 return err; 1349 1350 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1351 err = m88e1145_config_init_rgmii(phydev); 1352 if (err < 0) 1353 return err; 1354 } 1355 1356 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1357 err = m88e1145_config_init_sgmii(phydev); 1358 if (err < 0) 1359 return err; 1360 } 1361 err = m88e1111_set_downshift(phydev, 3); 1362 if (err < 0) 1363 return err; 1364 1365 err = marvell_of_reg_init(phydev); 1366 if (err < 0) 1367 return err; 1368 1369 return 0; 1370 } 1371 1372 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) 1373 { 1374 int val; 1375 1376 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); 1377 if (val < 0) 1378 return val; 1379 1380 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { 1381 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; 1382 return 0; 1383 } 1384 1385 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1386 1387 switch (val) { 1388 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: 1389 *msecs = 0; 1390 break; 1391 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: 1392 *msecs = 10; 1393 break; 1394 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: 1395 *msecs = 20; 1396 break; 1397 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: 1398 *msecs = 40; 1399 break; 1400 default: 1401 return -EINVAL; 1402 } 1403 1404 return 0; 1405 } 1406 1407 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) 1408 { 1409 struct ethtool_eee eee; 1410 int val, ret; 1411 1412 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) 1413 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, 1414 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1415 1416 /* According to the Marvell data sheet EEE must be disabled for 1417 * Fast Link Down detection to work properly 1418 */ 1419 ret = phy_ethtool_get_eee(phydev, &eee); 1420 if (!ret && eee.eee_enabled) { 1421 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); 1422 return -EBUSY; 1423 } 1424 1425 if (*msecs <= 5) 1426 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; 1427 else if (*msecs <= 15) 1428 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; 1429 else if (*msecs <= 30) 1430 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; 1431 else 1432 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; 1433 1434 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1435 1436 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, 1437 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1438 if (ret) 1439 return ret; 1440 1441 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, 1442 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1443 } 1444 1445 static int m88e1540_get_tunable(struct phy_device *phydev, 1446 struct ethtool_tunable *tuna, void *data) 1447 { 1448 switch (tuna->id) { 1449 case ETHTOOL_PHY_FAST_LINK_DOWN: 1450 return m88e1540_get_fld(phydev, data); 1451 case ETHTOOL_PHY_DOWNSHIFT: 1452 return m88e1011_get_downshift(phydev, data); 1453 default: 1454 return -EOPNOTSUPP; 1455 } 1456 } 1457 1458 static int m88e1540_set_tunable(struct phy_device *phydev, 1459 struct ethtool_tunable *tuna, const void *data) 1460 { 1461 switch (tuna->id) { 1462 case ETHTOOL_PHY_FAST_LINK_DOWN: 1463 return m88e1540_set_fld(phydev, data); 1464 case ETHTOOL_PHY_DOWNSHIFT: 1465 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1466 default: 1467 return -EOPNOTSUPP; 1468 } 1469 } 1470 1471 /* The VOD can be out of specification on link up. Poke an 1472 * undocumented register, in an undocumented page, with a magic value 1473 * to fix this. 1474 */ 1475 static int m88e6390_errata(struct phy_device *phydev) 1476 { 1477 int err; 1478 1479 err = phy_write(phydev, MII_BMCR, 1480 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1481 if (err) 1482 return err; 1483 1484 usleep_range(300, 400); 1485 1486 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1487 if (err) 1488 return err; 1489 1490 return genphy_soft_reset(phydev); 1491 } 1492 1493 static int m88e6390_config_aneg(struct phy_device *phydev) 1494 { 1495 int err; 1496 1497 err = m88e6390_errata(phydev); 1498 if (err) 1499 return err; 1500 1501 return m88e1510_config_aneg(phydev); 1502 } 1503 1504 /** 1505 * fiber_lpa_mod_linkmode_lpa_t 1506 * @advertising: the linkmode advertisement settings 1507 * @lpa: value of the MII_LPA register for fiber link 1508 * 1509 * A small helper function that translates MII_LPA bits to linkmode LP 1510 * advertisement settings. Other bits in advertising are left 1511 * unchanged. 1512 */ 1513 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1514 { 1515 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1516 advertising, lpa & LPA_1000XHALF); 1517 1518 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1519 advertising, lpa & LPA_1000XFULL); 1520 } 1521 1522 static int marvell_read_status_page_an(struct phy_device *phydev, 1523 int fiber, int status) 1524 { 1525 int lpa; 1526 int err; 1527 1528 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) { 1529 phydev->link = 0; 1530 return 0; 1531 } 1532 1533 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1534 phydev->duplex = DUPLEX_FULL; 1535 else 1536 phydev->duplex = DUPLEX_HALF; 1537 1538 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) { 1539 case MII_M1011_PHY_STATUS_1000: 1540 phydev->speed = SPEED_1000; 1541 break; 1542 1543 case MII_M1011_PHY_STATUS_100: 1544 phydev->speed = SPEED_100; 1545 break; 1546 1547 default: 1548 phydev->speed = SPEED_10; 1549 break; 1550 } 1551 1552 if (!fiber) { 1553 err = genphy_read_lpa(phydev); 1554 if (err < 0) 1555 return err; 1556 1557 phy_resolve_aneg_pause(phydev); 1558 } else { 1559 lpa = phy_read(phydev, MII_LPA); 1560 if (lpa < 0) 1561 return lpa; 1562 1563 /* The fiber link is only 1000M capable */ 1564 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1565 1566 if (phydev->duplex == DUPLEX_FULL) { 1567 if (!(lpa & LPA_PAUSE_FIBER)) { 1568 phydev->pause = 0; 1569 phydev->asym_pause = 0; 1570 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1571 phydev->pause = 1; 1572 phydev->asym_pause = 1; 1573 } else { 1574 phydev->pause = 1; 1575 phydev->asym_pause = 0; 1576 } 1577 } 1578 } 1579 1580 return 0; 1581 } 1582 1583 /* marvell_read_status_page 1584 * 1585 * Description: 1586 * Check the link, then figure out the current state 1587 * by comparing what we advertise with what the link partner 1588 * advertises. Start by checking the gigabit possibilities, 1589 * then move on to 10/100. 1590 */ 1591 static int marvell_read_status_page(struct phy_device *phydev, int page) 1592 { 1593 int status; 1594 int fiber; 1595 int err; 1596 1597 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1598 if (status < 0) 1599 return status; 1600 1601 /* Use the generic register for copper link status, 1602 * and the PHY status register for fiber link status. 1603 */ 1604 if (page == MII_MARVELL_FIBER_PAGE) { 1605 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK); 1606 } else { 1607 err = genphy_update_link(phydev); 1608 if (err) 1609 return err; 1610 } 1611 1612 if (page == MII_MARVELL_FIBER_PAGE) 1613 fiber = 1; 1614 else 1615 fiber = 0; 1616 1617 linkmode_zero(phydev->lp_advertising); 1618 phydev->pause = 0; 1619 phydev->asym_pause = 0; 1620 phydev->speed = SPEED_UNKNOWN; 1621 phydev->duplex = DUPLEX_UNKNOWN; 1622 phydev->port = fiber ? PORT_FIBRE : PORT_TP; 1623 1624 if (phydev->autoneg == AUTONEG_ENABLE) 1625 err = marvell_read_status_page_an(phydev, fiber, status); 1626 else 1627 err = genphy_read_status_fixed(phydev); 1628 1629 return err; 1630 } 1631 1632 /* marvell_read_status 1633 * 1634 * Some Marvell's phys have two modes: fiber and copper. 1635 * Both need status checked. 1636 * Description: 1637 * First, check the fiber link and status. 1638 * If the fiber link is down, check the copper link and status which 1639 * will be the default value if both link are down. 1640 */ 1641 static int marvell_read_status(struct phy_device *phydev) 1642 { 1643 int err; 1644 1645 /* Check the fiber mode first */ 1646 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1647 phydev->supported) && 1648 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1649 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1650 if (err < 0) 1651 goto error; 1652 1653 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1654 if (err < 0) 1655 goto error; 1656 1657 /* If the fiber link is up, it is the selected and 1658 * used link. In this case, we need to stay in the 1659 * fiber page. Please to be careful about that, avoid 1660 * to restore Copper page in other functions which 1661 * could break the behaviour for some fiber phy like 1662 * 88E1512. 1663 */ 1664 if (phydev->link) 1665 return 0; 1666 1667 /* If fiber link is down, check and save copper mode state */ 1668 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1669 if (err < 0) 1670 goto error; 1671 } 1672 1673 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1674 1675 error: 1676 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1677 return err; 1678 } 1679 1680 /* marvell_suspend 1681 * 1682 * Some Marvell's phys have two modes: fiber and copper. 1683 * Both need to be suspended 1684 */ 1685 static int marvell_suspend(struct phy_device *phydev) 1686 { 1687 int err; 1688 1689 /* Suspend the fiber mode first */ 1690 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1691 phydev->supported)) { 1692 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1693 if (err < 0) 1694 goto error; 1695 1696 /* With the page set, use the generic suspend */ 1697 err = genphy_suspend(phydev); 1698 if (err < 0) 1699 goto error; 1700 1701 /* Then, the copper link */ 1702 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1703 if (err < 0) 1704 goto error; 1705 } 1706 1707 /* With the page set, use the generic suspend */ 1708 return genphy_suspend(phydev); 1709 1710 error: 1711 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1712 return err; 1713 } 1714 1715 /* marvell_resume 1716 * 1717 * Some Marvell's phys have two modes: fiber and copper. 1718 * Both need to be resumed 1719 */ 1720 static int marvell_resume(struct phy_device *phydev) 1721 { 1722 int err; 1723 1724 /* Resume the fiber mode first */ 1725 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1726 phydev->supported)) { 1727 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1728 if (err < 0) 1729 goto error; 1730 1731 /* With the page set, use the generic resume */ 1732 err = genphy_resume(phydev); 1733 if (err < 0) 1734 goto error; 1735 1736 /* Then, the copper link */ 1737 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1738 if (err < 0) 1739 goto error; 1740 } 1741 1742 /* With the page set, use the generic resume */ 1743 return genphy_resume(phydev); 1744 1745 error: 1746 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1747 return err; 1748 } 1749 1750 static int marvell_aneg_done(struct phy_device *phydev) 1751 { 1752 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1753 1754 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1755 } 1756 1757 static void m88e1318_get_wol(struct phy_device *phydev, 1758 struct ethtool_wolinfo *wol) 1759 { 1760 int ret; 1761 1762 wol->supported = WAKE_MAGIC | WAKE_PHY; 1763 wol->wolopts = 0; 1764 1765 ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE, 1766 MII_88E1318S_PHY_WOL_CTRL); 1767 if (ret < 0) 1768 return; 1769 1770 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1771 wol->wolopts |= WAKE_MAGIC; 1772 1773 if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE) 1774 wol->wolopts |= WAKE_PHY; 1775 } 1776 1777 static int m88e1318_set_wol(struct phy_device *phydev, 1778 struct ethtool_wolinfo *wol) 1779 { 1780 int err = 0, oldpage; 1781 1782 oldpage = phy_save_page(phydev); 1783 if (oldpage < 0) 1784 goto error; 1785 1786 if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) { 1787 /* Explicitly switch to page 0x00, just to be sure */ 1788 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1789 if (err < 0) 1790 goto error; 1791 1792 /* If WOL event happened once, the LED[2] interrupt pin 1793 * will not be cleared unless we reading the interrupt status 1794 * register. If interrupts are in use, the normal interrupt 1795 * handling will clear the WOL event. Clear the WOL event 1796 * before enabling it if !phy_interrupt_is_valid() 1797 */ 1798 if (!phy_interrupt_is_valid(phydev)) 1799 __phy_read(phydev, MII_M1011_IEVENT); 1800 1801 /* Enable the WOL interrupt */ 1802 err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER, 1803 MII_88E1318S_PHY_CSIER_WOL_EIE); 1804 if (err < 0) 1805 goto error; 1806 1807 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1808 if (err < 0) 1809 goto error; 1810 1811 /* Setup LED[2] as interrupt pin (active low) */ 1812 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1813 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1814 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1815 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1816 if (err < 0) 1817 goto error; 1818 } 1819 1820 if (wol->wolopts & WAKE_MAGIC) { 1821 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1822 if (err < 0) 1823 goto error; 1824 1825 /* Store the device address for the magic packet */ 1826 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1827 ((phydev->attached_dev->dev_addr[5] << 8) | 1828 phydev->attached_dev->dev_addr[4])); 1829 if (err < 0) 1830 goto error; 1831 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1832 ((phydev->attached_dev->dev_addr[3] << 8) | 1833 phydev->attached_dev->dev_addr[2])); 1834 if (err < 0) 1835 goto error; 1836 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1837 ((phydev->attached_dev->dev_addr[1] << 8) | 1838 phydev->attached_dev->dev_addr[0])); 1839 if (err < 0) 1840 goto error; 1841 1842 /* Clear WOL status and enable magic packet matching */ 1843 err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL, 1844 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1845 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1846 if (err < 0) 1847 goto error; 1848 } else { 1849 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1850 if (err < 0) 1851 goto error; 1852 1853 /* Clear WOL status and disable magic packet matching */ 1854 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1855 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1856 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1857 if (err < 0) 1858 goto error; 1859 } 1860 1861 if (wol->wolopts & WAKE_PHY) { 1862 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1863 if (err < 0) 1864 goto error; 1865 1866 /* Clear WOL status and enable link up event */ 1867 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1868 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1869 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE); 1870 if (err < 0) 1871 goto error; 1872 } else { 1873 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1874 if (err < 0) 1875 goto error; 1876 1877 /* Clear WOL status and disable link up event */ 1878 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1879 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE, 1880 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1881 if (err < 0) 1882 goto error; 1883 } 1884 1885 error: 1886 return phy_restore_page(phydev, oldpage, err); 1887 } 1888 1889 static int marvell_get_sset_count(struct phy_device *phydev) 1890 { 1891 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1892 phydev->supported)) 1893 return ARRAY_SIZE(marvell_hw_stats); 1894 else 1895 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1896 } 1897 1898 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1899 { 1900 int count = marvell_get_sset_count(phydev); 1901 int i; 1902 1903 for (i = 0; i < count; i++) { 1904 strlcpy(data + i * ETH_GSTRING_LEN, 1905 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1906 } 1907 } 1908 1909 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1910 { 1911 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1912 struct marvell_priv *priv = phydev->priv; 1913 int val; 1914 u64 ret; 1915 1916 val = phy_read_paged(phydev, stat.page, stat.reg); 1917 if (val < 0) { 1918 ret = U64_MAX; 1919 } else { 1920 val = val & ((1 << stat.bits) - 1); 1921 priv->stats[i] += val; 1922 ret = priv->stats[i]; 1923 } 1924 1925 return ret; 1926 } 1927 1928 static void marvell_get_stats(struct phy_device *phydev, 1929 struct ethtool_stats *stats, u64 *data) 1930 { 1931 int count = marvell_get_sset_count(phydev); 1932 int i; 1933 1934 for (i = 0; i < count; i++) 1935 data[i] = marvell_get_stat(phydev, i); 1936 } 1937 1938 static int m88e1510_loopback(struct phy_device *phydev, bool enable) 1939 { 1940 int err; 1941 1942 if (enable) { 1943 u16 bmcr_ctl = 0, mscr2_ctl = 0; 1944 1945 if (phydev->speed == SPEED_1000) 1946 bmcr_ctl = BMCR_SPEED1000; 1947 else if (phydev->speed == SPEED_100) 1948 bmcr_ctl = BMCR_SPEED100; 1949 1950 if (phydev->duplex == DUPLEX_FULL) 1951 bmcr_ctl |= BMCR_FULLDPLX; 1952 1953 err = phy_write(phydev, MII_BMCR, bmcr_ctl); 1954 if (err < 0) 1955 return err; 1956 1957 if (phydev->speed == SPEED_1000) 1958 mscr2_ctl = BMCR_SPEED1000; 1959 else if (phydev->speed == SPEED_100) 1960 mscr2_ctl = BMCR_SPEED100; 1961 1962 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 1963 MII_88E1510_MSCR_2, BMCR_SPEED1000 | 1964 BMCR_SPEED100, mscr2_ctl); 1965 if (err < 0) 1966 return err; 1967 1968 /* Need soft reset to have speed configuration takes effect */ 1969 err = genphy_soft_reset(phydev); 1970 if (err < 0) 1971 return err; 1972 1973 /* FIXME: Based on trial and error test, it seem 1G need to have 1974 * delay between soft reset and loopback enablement. 1975 */ 1976 if (phydev->speed == SPEED_1000) 1977 msleep(1000); 1978 1979 return phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 1980 BMCR_LOOPBACK); 1981 } else { 1982 err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0); 1983 if (err < 0) 1984 return err; 1985 1986 return phy_config_aneg(phydev); 1987 } 1988 } 1989 1990 static int marvell_vct5_wait_complete(struct phy_device *phydev) 1991 { 1992 int i; 1993 int val; 1994 1995 for (i = 0; i < 32; i++) { 1996 val = __phy_read(phydev, MII_VCT5_CTRL); 1997 if (val < 0) 1998 return val; 1999 2000 if (val & MII_VCT5_CTRL_COMPLETE) 2001 return 0; 2002 } 2003 2004 phydev_err(phydev, "Timeout while waiting for cable test to finish\n"); 2005 return -ETIMEDOUT; 2006 } 2007 2008 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair) 2009 { 2010 int amplitude; 2011 int val; 2012 int reg; 2013 2014 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair; 2015 val = __phy_read(phydev, reg); 2016 2017 if (val < 0) 2018 return 0; 2019 2020 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >> 2021 MII_VCT5_TX_RX_AMPLITUDE_SHIFT; 2022 2023 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION)) 2024 amplitude = -amplitude; 2025 2026 return 1000 * amplitude / 128; 2027 } 2028 2029 static u32 marvell_vct5_distance2cm(int distance) 2030 { 2031 return distance * 805 / 10; 2032 } 2033 2034 static u32 marvell_vct5_cm2distance(int cm) 2035 { 2036 return cm * 10 / 805; 2037 } 2038 2039 static int marvell_vct5_amplitude_distance(struct phy_device *phydev, 2040 int distance, int pair) 2041 { 2042 u16 reg; 2043 int err; 2044 int mV; 2045 int i; 2046 2047 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE, 2048 distance); 2049 if (err) 2050 return err; 2051 2052 reg = MII_VCT5_CTRL_ENABLE | 2053 MII_VCT5_CTRL_TX_SAME_CHANNEL | 2054 MII_VCT5_CTRL_SAMPLES_DEFAULT | 2055 MII_VCT5_CTRL_SAMPLE_POINT | 2056 MII_VCT5_CTRL_PEEK_HYST_DEFAULT; 2057 err = __phy_write(phydev, MII_VCT5_CTRL, reg); 2058 if (err) 2059 return err; 2060 2061 err = marvell_vct5_wait_complete(phydev); 2062 if (err) 2063 return err; 2064 2065 for (i = 0; i < 4; i++) { 2066 if (pair != PHY_PAIR_ALL && i != pair) 2067 continue; 2068 2069 mV = marvell_vct5_amplitude(phydev, i); 2070 ethnl_cable_test_amplitude(phydev, i, mV); 2071 } 2072 2073 return 0; 2074 } 2075 2076 static int marvell_vct5_amplitude_graph(struct phy_device *phydev) 2077 { 2078 struct marvell_priv *priv = phydev->priv; 2079 int distance; 2080 u16 width; 2081 int page; 2082 int err; 2083 u16 reg; 2084 2085 if (priv->first <= TDR_SHORT_CABLE_LENGTH) 2086 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS; 2087 else 2088 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 2089 2090 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 2091 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 2092 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 2093 2094 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 2095 MII_VCT5_TX_PULSE_CTRL, reg); 2096 if (err) 2097 return err; 2098 2099 /* Reading the TDR data is very MDIO heavy. We need to optimize 2100 * access to keep the time to a minimum. So lock the bus once, 2101 * and don't release it until complete. We can then avoid having 2102 * to change the page for every access, greatly speeding things 2103 * up. 2104 */ 2105 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE); 2106 if (page < 0) 2107 goto restore_page; 2108 2109 for (distance = priv->first; 2110 distance <= priv->last; 2111 distance += priv->step) { 2112 err = marvell_vct5_amplitude_distance(phydev, distance, 2113 priv->pair); 2114 if (err) 2115 goto restore_page; 2116 2117 if (distance > TDR_SHORT_CABLE_LENGTH && 2118 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) { 2119 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 2120 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 2121 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 2122 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 2123 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg); 2124 if (err) 2125 goto restore_page; 2126 } 2127 } 2128 2129 restore_page: 2130 return phy_restore_page(phydev, page, err); 2131 } 2132 2133 static int marvell_cable_test_start_common(struct phy_device *phydev) 2134 { 2135 int bmcr, bmsr, ret; 2136 2137 /* If auto-negotiation is enabled, but not complete, the cable 2138 * test never completes. So disable auto-neg. 2139 */ 2140 bmcr = phy_read(phydev, MII_BMCR); 2141 if (bmcr < 0) 2142 return bmcr; 2143 2144 bmsr = phy_read(phydev, MII_BMSR); 2145 2146 if (bmsr < 0) 2147 return bmsr; 2148 2149 if (bmcr & BMCR_ANENABLE) { 2150 ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE); 2151 if (ret < 0) 2152 return ret; 2153 ret = genphy_soft_reset(phydev); 2154 if (ret < 0) 2155 return ret; 2156 } 2157 2158 /* If the link is up, allow it some time to go down */ 2159 if (bmsr & BMSR_LSTATUS) 2160 msleep(1500); 2161 2162 return 0; 2163 } 2164 2165 static int marvell_vct7_cable_test_start(struct phy_device *phydev) 2166 { 2167 struct marvell_priv *priv = phydev->priv; 2168 int ret; 2169 2170 ret = marvell_cable_test_start_common(phydev); 2171 if (ret) 2172 return ret; 2173 2174 priv->cable_test_tdr = false; 2175 2176 /* Reset the VCT5 API control to defaults, otherwise 2177 * VCT7 does not work correctly. 2178 */ 2179 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 2180 MII_VCT5_CTRL, 2181 MII_VCT5_CTRL_TX_SAME_CHANNEL | 2182 MII_VCT5_CTRL_SAMPLES_DEFAULT | 2183 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK | 2184 MII_VCT5_CTRL_PEEK_HYST_DEFAULT); 2185 if (ret) 2186 return ret; 2187 2188 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 2189 MII_VCT5_SAMPLE_POINT_DISTANCE, 0); 2190 if (ret) 2191 return ret; 2192 2193 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 2194 MII_VCT7_CTRL, 2195 MII_VCT7_CTRL_RUN_NOW | 2196 MII_VCT7_CTRL_CENTIMETERS); 2197 } 2198 2199 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev, 2200 const struct phy_tdr_config *cfg) 2201 { 2202 struct marvell_priv *priv = phydev->priv; 2203 int ret; 2204 2205 priv->cable_test_tdr = true; 2206 priv->first = marvell_vct5_cm2distance(cfg->first); 2207 priv->last = marvell_vct5_cm2distance(cfg->last); 2208 priv->step = marvell_vct5_cm2distance(cfg->step); 2209 priv->pair = cfg->pair; 2210 2211 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 2212 return -EINVAL; 2213 2214 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 2215 return -EINVAL; 2216 2217 /* Disable VCT7 */ 2218 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 2219 MII_VCT7_CTRL, 0); 2220 if (ret) 2221 return ret; 2222 2223 ret = marvell_cable_test_start_common(phydev); 2224 if (ret) 2225 return ret; 2226 2227 ret = ethnl_cable_test_pulse(phydev, 1000); 2228 if (ret) 2229 return ret; 2230 2231 return ethnl_cable_test_step(phydev, 2232 marvell_vct5_distance2cm(priv->first), 2233 marvell_vct5_distance2cm(priv->last), 2234 marvell_vct5_distance2cm(priv->step)); 2235 } 2236 2237 static int marvell_vct7_distance_to_length(int distance, bool meter) 2238 { 2239 if (meter) 2240 distance *= 100; 2241 2242 return distance; 2243 } 2244 2245 static bool marvell_vct7_distance_valid(int result) 2246 { 2247 switch (result) { 2248 case MII_VCT7_RESULTS_OPEN: 2249 case MII_VCT7_RESULTS_SAME_SHORT: 2250 case MII_VCT7_RESULTS_CROSS_SHORT: 2251 return true; 2252 } 2253 return false; 2254 } 2255 2256 static int marvell_vct7_report_length(struct phy_device *phydev, 2257 int pair, bool meter) 2258 { 2259 int length; 2260 int ret; 2261 2262 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2263 MII_VCT7_PAIR_0_DISTANCE + pair); 2264 if (ret < 0) 2265 return ret; 2266 2267 length = marvell_vct7_distance_to_length(ret, meter); 2268 2269 ethnl_cable_test_fault_length(phydev, pair, length); 2270 2271 return 0; 2272 } 2273 2274 static int marvell_vct7_cable_test_report_trans(int result) 2275 { 2276 switch (result) { 2277 case MII_VCT7_RESULTS_OK: 2278 return ETHTOOL_A_CABLE_RESULT_CODE_OK; 2279 case MII_VCT7_RESULTS_OPEN: 2280 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN; 2281 case MII_VCT7_RESULTS_SAME_SHORT: 2282 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT; 2283 case MII_VCT7_RESULTS_CROSS_SHORT: 2284 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT; 2285 default: 2286 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC; 2287 } 2288 } 2289 2290 static int marvell_vct7_cable_test_report(struct phy_device *phydev) 2291 { 2292 int pair0, pair1, pair2, pair3; 2293 bool meter; 2294 int ret; 2295 2296 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2297 MII_VCT7_RESULTS); 2298 if (ret < 0) 2299 return ret; 2300 2301 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >> 2302 MII_VCT7_RESULTS_PAIR3_SHIFT; 2303 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >> 2304 MII_VCT7_RESULTS_PAIR2_SHIFT; 2305 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >> 2306 MII_VCT7_RESULTS_PAIR1_SHIFT; 2307 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >> 2308 MII_VCT7_RESULTS_PAIR0_SHIFT; 2309 2310 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, 2311 marvell_vct7_cable_test_report_trans(pair0)); 2312 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B, 2313 marvell_vct7_cable_test_report_trans(pair1)); 2314 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C, 2315 marvell_vct7_cable_test_report_trans(pair2)); 2316 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D, 2317 marvell_vct7_cable_test_report_trans(pair3)); 2318 2319 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL); 2320 if (ret < 0) 2321 return ret; 2322 2323 meter = ret & MII_VCT7_CTRL_METERS; 2324 2325 if (marvell_vct7_distance_valid(pair0)) 2326 marvell_vct7_report_length(phydev, 0, meter); 2327 if (marvell_vct7_distance_valid(pair1)) 2328 marvell_vct7_report_length(phydev, 1, meter); 2329 if (marvell_vct7_distance_valid(pair2)) 2330 marvell_vct7_report_length(phydev, 2, meter); 2331 if (marvell_vct7_distance_valid(pair3)) 2332 marvell_vct7_report_length(phydev, 3, meter); 2333 2334 return 0; 2335 } 2336 2337 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev, 2338 bool *finished) 2339 { 2340 struct marvell_priv *priv = phydev->priv; 2341 int ret; 2342 2343 if (priv->cable_test_tdr) { 2344 ret = marvell_vct5_amplitude_graph(phydev); 2345 *finished = true; 2346 return ret; 2347 } 2348 2349 *finished = false; 2350 2351 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2352 MII_VCT7_CTRL); 2353 2354 if (ret < 0) 2355 return ret; 2356 2357 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) { 2358 *finished = true; 2359 2360 return marvell_vct7_cable_test_report(phydev); 2361 } 2362 2363 return 0; 2364 } 2365 2366 #ifdef CONFIG_HWMON 2367 struct marvell_hwmon_ops { 2368 int (*config)(struct phy_device *phydev); 2369 int (*get_temp)(struct phy_device *phydev, long *temp); 2370 int (*get_temp_critical)(struct phy_device *phydev, long *temp); 2371 int (*set_temp_critical)(struct phy_device *phydev, long temp); 2372 int (*get_temp_alarm)(struct phy_device *phydev, long *alarm); 2373 }; 2374 2375 static const struct marvell_hwmon_ops * 2376 to_marvell_hwmon_ops(const struct phy_device *phydev) 2377 { 2378 return phydev->drv->driver_data; 2379 } 2380 2381 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 2382 { 2383 int oldpage; 2384 int ret = 0; 2385 int val; 2386 2387 *temp = 0; 2388 2389 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2390 if (oldpage < 0) 2391 goto error; 2392 2393 /* Enable temperature sensor */ 2394 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 2395 if (ret < 0) 2396 goto error; 2397 2398 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 2399 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 2400 if (ret < 0) 2401 goto error; 2402 2403 /* Wait for temperature to stabilize */ 2404 usleep_range(10000, 12000); 2405 2406 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 2407 if (val < 0) { 2408 ret = val; 2409 goto error; 2410 } 2411 2412 /* Disable temperature sensor */ 2413 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 2414 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 2415 if (ret < 0) 2416 goto error; 2417 2418 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 2419 2420 error: 2421 return phy_restore_page(phydev, oldpage, ret); 2422 } 2423 2424 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 2425 { 2426 int ret; 2427 2428 *temp = 0; 2429 2430 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2431 MII_88E1510_TEMP_SENSOR); 2432 if (ret < 0) 2433 return ret; 2434 2435 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 2436 2437 return 0; 2438 } 2439 2440 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 2441 { 2442 int ret; 2443 2444 *temp = 0; 2445 2446 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2447 MII_88E1121_MISC_TEST); 2448 if (ret < 0) 2449 return ret; 2450 2451 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 2452 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 2453 /* convert to mC */ 2454 *temp *= 1000; 2455 2456 return 0; 2457 } 2458 2459 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 2460 { 2461 temp = temp / 1000; 2462 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 2463 2464 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2465 MII_88E1121_MISC_TEST, 2466 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 2467 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 2468 } 2469 2470 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 2471 { 2472 int ret; 2473 2474 *alarm = false; 2475 2476 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2477 MII_88E1121_MISC_TEST); 2478 if (ret < 0) 2479 return ret; 2480 2481 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 2482 2483 return 0; 2484 } 2485 2486 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 2487 { 2488 int sum = 0; 2489 int oldpage; 2490 int ret = 0; 2491 int i; 2492 2493 *temp = 0; 2494 2495 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2496 if (oldpage < 0) 2497 goto error; 2498 2499 /* Enable temperature sensor */ 2500 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2501 if (ret < 0) 2502 goto error; 2503 2504 ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK; 2505 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S; 2506 2507 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2508 if (ret < 0) 2509 goto error; 2510 2511 /* Wait for temperature to stabilize */ 2512 usleep_range(10000, 12000); 2513 2514 /* Reading the temperature sense has an errata. You need to read 2515 * a number of times and take an average. 2516 */ 2517 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 2518 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 2519 if (ret < 0) 2520 goto error; 2521 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 2522 } 2523 2524 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 2525 *temp = (sum - 75) * 1000; 2526 2527 /* Disable temperature sensor */ 2528 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2529 if (ret < 0) 2530 goto error; 2531 2532 ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK; 2533 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE; 2534 2535 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2536 2537 error: 2538 phy_restore_page(phydev, oldpage, ret); 2539 2540 return ret; 2541 } 2542 2543 static int m88e6393_get_temp(struct phy_device *phydev, long *temp) 2544 { 2545 int err; 2546 2547 err = m88e1510_get_temp(phydev, temp); 2548 2549 /* 88E1510 measures T + 25, while the PHY on 88E6393X switch 2550 * T + 75, so we have to subtract another 50 2551 */ 2552 *temp -= 50000; 2553 2554 return err; 2555 } 2556 2557 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp) 2558 { 2559 int ret; 2560 2561 *temp = 0; 2562 2563 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2564 MII_88E6390_TEMP_SENSOR); 2565 if (ret < 0) 2566 return ret; 2567 2568 *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >> 2569 MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000; 2570 2571 return 0; 2572 } 2573 2574 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp) 2575 { 2576 temp = (temp / 1000) + 75; 2577 2578 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2579 MII_88E6390_TEMP_SENSOR, 2580 MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK, 2581 temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT); 2582 } 2583 2584 static int m88e6393_hwmon_config(struct phy_device *phydev) 2585 { 2586 int err; 2587 2588 err = m88e6393_set_temp_critical(phydev, 100000); 2589 if (err) 2590 return err; 2591 2592 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2593 MII_88E6390_MISC_TEST, 2594 MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK | 2595 MII_88E6393_MISC_TEST_SAMPLES_MASK | 2596 MII_88E6393_MISC_TEST_RATE_MASK, 2597 MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE | 2598 MII_88E6393_MISC_TEST_SAMPLES_2048 | 2599 MII_88E6393_MISC_TEST_RATE_2_3MS); 2600 } 2601 2602 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type, 2603 u32 attr, int channel, long *temp) 2604 { 2605 struct phy_device *phydev = dev_get_drvdata(dev); 2606 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 2607 int err = -EOPNOTSUPP; 2608 2609 switch (attr) { 2610 case hwmon_temp_input: 2611 if (ops->get_temp) 2612 err = ops->get_temp(phydev, temp); 2613 break; 2614 case hwmon_temp_crit: 2615 if (ops->get_temp_critical) 2616 err = ops->get_temp_critical(phydev, temp); 2617 break; 2618 case hwmon_temp_max_alarm: 2619 if (ops->get_temp_alarm) 2620 err = ops->get_temp_alarm(phydev, temp); 2621 break; 2622 } 2623 2624 return err; 2625 } 2626 2627 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type, 2628 u32 attr, int channel, long temp) 2629 { 2630 struct phy_device *phydev = dev_get_drvdata(dev); 2631 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 2632 int err = -EOPNOTSUPP; 2633 2634 switch (attr) { 2635 case hwmon_temp_crit: 2636 if (ops->set_temp_critical) 2637 err = ops->set_temp_critical(phydev, temp); 2638 break; 2639 } 2640 2641 return err; 2642 } 2643 2644 static umode_t marvell_hwmon_is_visible(const void *data, 2645 enum hwmon_sensor_types type, 2646 u32 attr, int channel) 2647 { 2648 const struct phy_device *phydev = data; 2649 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 2650 2651 if (type != hwmon_temp) 2652 return 0; 2653 2654 switch (attr) { 2655 case hwmon_temp_input: 2656 return ops->get_temp ? 0444 : 0; 2657 case hwmon_temp_max_alarm: 2658 return ops->get_temp_alarm ? 0444 : 0; 2659 case hwmon_temp_crit: 2660 return (ops->get_temp_critical ? 0444 : 0) | 2661 (ops->set_temp_critical ? 0200 : 0); 2662 default: 2663 return 0; 2664 } 2665 } 2666 2667 static u32 marvell_hwmon_chip_config[] = { 2668 HWMON_C_REGISTER_TZ, 2669 0 2670 }; 2671 2672 static const struct hwmon_channel_info marvell_hwmon_chip = { 2673 .type = hwmon_chip, 2674 .config = marvell_hwmon_chip_config, 2675 }; 2676 2677 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not 2678 * defined for all PHYs, because the hwmon code checks whether the attributes 2679 * exists via the .is_visible method 2680 */ 2681 static u32 marvell_hwmon_temp_config[] = { 2682 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 2683 0 2684 }; 2685 2686 static const struct hwmon_channel_info marvell_hwmon_temp = { 2687 .type = hwmon_temp, 2688 .config = marvell_hwmon_temp_config, 2689 }; 2690 2691 static const struct hwmon_channel_info *marvell_hwmon_info[] = { 2692 &marvell_hwmon_chip, 2693 &marvell_hwmon_temp, 2694 NULL 2695 }; 2696 2697 static const struct hwmon_ops marvell_hwmon_hwmon_ops = { 2698 .is_visible = marvell_hwmon_is_visible, 2699 .read = marvell_hwmon_read, 2700 .write = marvell_hwmon_write, 2701 }; 2702 2703 static const struct hwmon_chip_info marvell_hwmon_chip_info = { 2704 .ops = &marvell_hwmon_hwmon_ops, 2705 .info = marvell_hwmon_info, 2706 }; 2707 2708 static int marvell_hwmon_name(struct phy_device *phydev) 2709 { 2710 struct marvell_priv *priv = phydev->priv; 2711 struct device *dev = &phydev->mdio.dev; 2712 const char *devname = dev_name(dev); 2713 size_t len = strlen(devname); 2714 int i, j; 2715 2716 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 2717 if (!priv->hwmon_name) 2718 return -ENOMEM; 2719 2720 for (i = j = 0; i < len && devname[i]; i++) { 2721 if (isalnum(devname[i])) 2722 priv->hwmon_name[j++] = devname[i]; 2723 } 2724 2725 return 0; 2726 } 2727 2728 static int marvell_hwmon_probe(struct phy_device *phydev) 2729 { 2730 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 2731 struct marvell_priv *priv = phydev->priv; 2732 struct device *dev = &phydev->mdio.dev; 2733 int err; 2734 2735 if (!ops) 2736 return 0; 2737 2738 err = marvell_hwmon_name(phydev); 2739 if (err) 2740 return err; 2741 2742 priv->hwmon_dev = devm_hwmon_device_register_with_info( 2743 dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL); 2744 if (IS_ERR(priv->hwmon_dev)) 2745 return PTR_ERR(priv->hwmon_dev); 2746 2747 if (ops->config) 2748 err = ops->config(phydev); 2749 2750 return err; 2751 } 2752 2753 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = { 2754 .get_temp = m88e1121_get_temp, 2755 }; 2756 2757 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = { 2758 .get_temp = m88e1510_get_temp, 2759 .get_temp_critical = m88e1510_get_temp_critical, 2760 .set_temp_critical = m88e1510_set_temp_critical, 2761 .get_temp_alarm = m88e1510_get_temp_alarm, 2762 }; 2763 2764 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = { 2765 .get_temp = m88e6390_get_temp, 2766 }; 2767 2768 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = { 2769 .config = m88e6393_hwmon_config, 2770 .get_temp = m88e6393_get_temp, 2771 .get_temp_critical = m88e6393_get_temp_critical, 2772 .set_temp_critical = m88e6393_set_temp_critical, 2773 .get_temp_alarm = m88e1510_get_temp_alarm, 2774 }; 2775 2776 #define DEF_MARVELL_HWMON_OPS(s) (&(s)) 2777 2778 #else 2779 2780 #define DEF_MARVELL_HWMON_OPS(s) NULL 2781 2782 static int marvell_hwmon_probe(struct phy_device *phydev) 2783 { 2784 return 0; 2785 } 2786 #endif 2787 2788 static int marvell_probe(struct phy_device *phydev) 2789 { 2790 struct marvell_priv *priv; 2791 2792 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 2793 if (!priv) 2794 return -ENOMEM; 2795 2796 phydev->priv = priv; 2797 2798 return marvell_hwmon_probe(phydev); 2799 } 2800 2801 static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id) 2802 { 2803 struct phy_device *phydev = upstream; 2804 phy_interface_t interface; 2805 struct device *dev; 2806 int oldpage; 2807 int ret = 0; 2808 u16 mode; 2809 2810 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, }; 2811 2812 dev = &phydev->mdio.dev; 2813 2814 sfp_parse_support(phydev->sfp_bus, id, supported); 2815 interface = sfp_select_interface(phydev->sfp_bus, supported); 2816 2817 dev_info(dev, "%s SFP module inserted\n", phy_modes(interface)); 2818 2819 switch (interface) { 2820 case PHY_INTERFACE_MODE_1000BASEX: 2821 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X; 2822 2823 break; 2824 case PHY_INTERFACE_MODE_100BASEX: 2825 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX; 2826 2827 break; 2828 case PHY_INTERFACE_MODE_SGMII: 2829 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII; 2830 2831 break; 2832 default: 2833 dev_err(dev, "Incompatible SFP module inserted\n"); 2834 2835 return -EINVAL; 2836 } 2837 2838 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE); 2839 if (oldpage < 0) 2840 goto error; 2841 2842 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 2843 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode); 2844 if (ret < 0) 2845 goto error; 2846 2847 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 2848 MII_88E1510_GEN_CTRL_REG_1_RESET); 2849 2850 error: 2851 return phy_restore_page(phydev, oldpage, ret); 2852 } 2853 2854 static void m88e1510_sfp_remove(void *upstream) 2855 { 2856 struct phy_device *phydev = upstream; 2857 int oldpage; 2858 int ret = 0; 2859 2860 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE); 2861 if (oldpage < 0) 2862 goto error; 2863 2864 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 2865 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 2866 MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII); 2867 if (ret < 0) 2868 goto error; 2869 2870 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 2871 MII_88E1510_GEN_CTRL_REG_1_RESET); 2872 2873 error: 2874 phy_restore_page(phydev, oldpage, ret); 2875 } 2876 2877 static const struct sfp_upstream_ops m88e1510_sfp_ops = { 2878 .module_insert = m88e1510_sfp_insert, 2879 .module_remove = m88e1510_sfp_remove, 2880 .attach = phy_sfp_attach, 2881 .detach = phy_sfp_detach, 2882 }; 2883 2884 static int m88e1510_probe(struct phy_device *phydev) 2885 { 2886 int err; 2887 2888 err = marvell_probe(phydev); 2889 if (err) 2890 return err; 2891 2892 return phy_sfp_probe(phydev, &m88e1510_sfp_ops); 2893 } 2894 2895 static struct phy_driver marvell_drivers[] = { 2896 { 2897 .phy_id = MARVELL_PHY_ID_88E1101, 2898 .phy_id_mask = MARVELL_PHY_ID_MASK, 2899 .name = "Marvell 88E1101", 2900 /* PHY_GBIT_FEATURES */ 2901 .probe = marvell_probe, 2902 .config_init = marvell_config_init, 2903 .config_aneg = m88e1101_config_aneg, 2904 .config_intr = marvell_config_intr, 2905 .handle_interrupt = marvell_handle_interrupt, 2906 .resume = genphy_resume, 2907 .suspend = genphy_suspend, 2908 .read_page = marvell_read_page, 2909 .write_page = marvell_write_page, 2910 .get_sset_count = marvell_get_sset_count, 2911 .get_strings = marvell_get_strings, 2912 .get_stats = marvell_get_stats, 2913 }, 2914 { 2915 .phy_id = MARVELL_PHY_ID_88E1112, 2916 .phy_id_mask = MARVELL_PHY_ID_MASK, 2917 .name = "Marvell 88E1112", 2918 /* PHY_GBIT_FEATURES */ 2919 .probe = marvell_probe, 2920 .config_init = m88e1112_config_init, 2921 .config_aneg = marvell_config_aneg, 2922 .config_intr = marvell_config_intr, 2923 .handle_interrupt = marvell_handle_interrupt, 2924 .resume = genphy_resume, 2925 .suspend = genphy_suspend, 2926 .read_page = marvell_read_page, 2927 .write_page = marvell_write_page, 2928 .get_sset_count = marvell_get_sset_count, 2929 .get_strings = marvell_get_strings, 2930 .get_stats = marvell_get_stats, 2931 .get_tunable = m88e1011_get_tunable, 2932 .set_tunable = m88e1011_set_tunable, 2933 }, 2934 { 2935 .phy_id = MARVELL_PHY_ID_88E1111, 2936 .phy_id_mask = MARVELL_PHY_ID_MASK, 2937 .name = "Marvell 88E1111", 2938 /* PHY_GBIT_FEATURES */ 2939 .probe = marvell_probe, 2940 .config_init = m88e1111gbe_config_init, 2941 .config_aneg = m88e1111_config_aneg, 2942 .read_status = marvell_read_status, 2943 .config_intr = marvell_config_intr, 2944 .handle_interrupt = marvell_handle_interrupt, 2945 .resume = genphy_resume, 2946 .suspend = genphy_suspend, 2947 .read_page = marvell_read_page, 2948 .write_page = marvell_write_page, 2949 .get_sset_count = marvell_get_sset_count, 2950 .get_strings = marvell_get_strings, 2951 .get_stats = marvell_get_stats, 2952 .get_tunable = m88e1111_get_tunable, 2953 .set_tunable = m88e1111_set_tunable, 2954 }, 2955 { 2956 .phy_id = MARVELL_PHY_ID_88E1111_FINISAR, 2957 .phy_id_mask = MARVELL_PHY_ID_MASK, 2958 .name = "Marvell 88E1111 (Finisar)", 2959 /* PHY_GBIT_FEATURES */ 2960 .probe = marvell_probe, 2961 .config_init = m88e1111gbe_config_init, 2962 .config_aneg = m88e1111_config_aneg, 2963 .read_status = marvell_read_status, 2964 .config_intr = marvell_config_intr, 2965 .handle_interrupt = marvell_handle_interrupt, 2966 .resume = genphy_resume, 2967 .suspend = genphy_suspend, 2968 .read_page = marvell_read_page, 2969 .write_page = marvell_write_page, 2970 .get_sset_count = marvell_get_sset_count, 2971 .get_strings = marvell_get_strings, 2972 .get_stats = marvell_get_stats, 2973 .get_tunable = m88e1111_get_tunable, 2974 .set_tunable = m88e1111_set_tunable, 2975 }, 2976 { 2977 .phy_id = MARVELL_PHY_ID_88E1118, 2978 .phy_id_mask = MARVELL_PHY_ID_MASK, 2979 .name = "Marvell 88E1118", 2980 /* PHY_GBIT_FEATURES */ 2981 .probe = marvell_probe, 2982 .config_init = m88e1118_config_init, 2983 .config_aneg = m88e1118_config_aneg, 2984 .config_intr = marvell_config_intr, 2985 .handle_interrupt = marvell_handle_interrupt, 2986 .resume = genphy_resume, 2987 .suspend = genphy_suspend, 2988 .read_page = marvell_read_page, 2989 .write_page = marvell_write_page, 2990 .get_sset_count = marvell_get_sset_count, 2991 .get_strings = marvell_get_strings, 2992 .get_stats = marvell_get_stats, 2993 }, 2994 { 2995 .phy_id = MARVELL_PHY_ID_88E1121R, 2996 .phy_id_mask = MARVELL_PHY_ID_MASK, 2997 .name = "Marvell 88E1121R", 2998 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops), 2999 /* PHY_GBIT_FEATURES */ 3000 .probe = marvell_probe, 3001 .config_init = marvell_1011gbe_config_init, 3002 .config_aneg = m88e1121_config_aneg, 3003 .read_status = marvell_read_status, 3004 .config_intr = marvell_config_intr, 3005 .handle_interrupt = marvell_handle_interrupt, 3006 .resume = genphy_resume, 3007 .suspend = genphy_suspend, 3008 .read_page = marvell_read_page, 3009 .write_page = marvell_write_page, 3010 .get_sset_count = marvell_get_sset_count, 3011 .get_strings = marvell_get_strings, 3012 .get_stats = marvell_get_stats, 3013 .get_tunable = m88e1011_get_tunable, 3014 .set_tunable = m88e1011_set_tunable, 3015 }, 3016 { 3017 .phy_id = MARVELL_PHY_ID_88E1318S, 3018 .phy_id_mask = MARVELL_PHY_ID_MASK, 3019 .name = "Marvell 88E1318S", 3020 /* PHY_GBIT_FEATURES */ 3021 .probe = marvell_probe, 3022 .config_init = m88e1318_config_init, 3023 .config_aneg = m88e1318_config_aneg, 3024 .read_status = marvell_read_status, 3025 .config_intr = marvell_config_intr, 3026 .handle_interrupt = marvell_handle_interrupt, 3027 .get_wol = m88e1318_get_wol, 3028 .set_wol = m88e1318_set_wol, 3029 .resume = genphy_resume, 3030 .suspend = genphy_suspend, 3031 .read_page = marvell_read_page, 3032 .write_page = marvell_write_page, 3033 .get_sset_count = marvell_get_sset_count, 3034 .get_strings = marvell_get_strings, 3035 .get_stats = marvell_get_stats, 3036 }, 3037 { 3038 .phy_id = MARVELL_PHY_ID_88E1145, 3039 .phy_id_mask = MARVELL_PHY_ID_MASK, 3040 .name = "Marvell 88E1145", 3041 /* PHY_GBIT_FEATURES */ 3042 .probe = marvell_probe, 3043 .config_init = m88e1145_config_init, 3044 .config_aneg = m88e1101_config_aneg, 3045 .config_intr = marvell_config_intr, 3046 .handle_interrupt = marvell_handle_interrupt, 3047 .resume = genphy_resume, 3048 .suspend = genphy_suspend, 3049 .read_page = marvell_read_page, 3050 .write_page = marvell_write_page, 3051 .get_sset_count = marvell_get_sset_count, 3052 .get_strings = marvell_get_strings, 3053 .get_stats = marvell_get_stats, 3054 .get_tunable = m88e1111_get_tunable, 3055 .set_tunable = m88e1111_set_tunable, 3056 }, 3057 { 3058 .phy_id = MARVELL_PHY_ID_88E1149R, 3059 .phy_id_mask = MARVELL_PHY_ID_MASK, 3060 .name = "Marvell 88E1149R", 3061 /* PHY_GBIT_FEATURES */ 3062 .probe = marvell_probe, 3063 .config_init = m88e1149_config_init, 3064 .config_aneg = m88e1118_config_aneg, 3065 .config_intr = marvell_config_intr, 3066 .handle_interrupt = marvell_handle_interrupt, 3067 .resume = genphy_resume, 3068 .suspend = genphy_suspend, 3069 .read_page = marvell_read_page, 3070 .write_page = marvell_write_page, 3071 .get_sset_count = marvell_get_sset_count, 3072 .get_strings = marvell_get_strings, 3073 .get_stats = marvell_get_stats, 3074 }, 3075 { 3076 .phy_id = MARVELL_PHY_ID_88E1240, 3077 .phy_id_mask = MARVELL_PHY_ID_MASK, 3078 .name = "Marvell 88E1240", 3079 /* PHY_GBIT_FEATURES */ 3080 .probe = marvell_probe, 3081 .config_init = m88e1112_config_init, 3082 .config_aneg = marvell_config_aneg, 3083 .config_intr = marvell_config_intr, 3084 .handle_interrupt = marvell_handle_interrupt, 3085 .resume = genphy_resume, 3086 .suspend = genphy_suspend, 3087 .read_page = marvell_read_page, 3088 .write_page = marvell_write_page, 3089 .get_sset_count = marvell_get_sset_count, 3090 .get_strings = marvell_get_strings, 3091 .get_stats = marvell_get_stats, 3092 .get_tunable = m88e1011_get_tunable, 3093 .set_tunable = m88e1011_set_tunable, 3094 }, 3095 { 3096 .phy_id = MARVELL_PHY_ID_88E1116R, 3097 .phy_id_mask = MARVELL_PHY_ID_MASK, 3098 .name = "Marvell 88E1116R", 3099 /* PHY_GBIT_FEATURES */ 3100 .probe = marvell_probe, 3101 .config_init = m88e1116r_config_init, 3102 .config_intr = marvell_config_intr, 3103 .handle_interrupt = marvell_handle_interrupt, 3104 .resume = genphy_resume, 3105 .suspend = genphy_suspend, 3106 .read_page = marvell_read_page, 3107 .write_page = marvell_write_page, 3108 .get_sset_count = marvell_get_sset_count, 3109 .get_strings = marvell_get_strings, 3110 .get_stats = marvell_get_stats, 3111 .get_tunable = m88e1011_get_tunable, 3112 .set_tunable = m88e1011_set_tunable, 3113 }, 3114 { 3115 .phy_id = MARVELL_PHY_ID_88E1510, 3116 .phy_id_mask = MARVELL_PHY_ID_MASK, 3117 .name = "Marvell 88E1510", 3118 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3119 .features = PHY_GBIT_FIBRE_FEATURES, 3120 .flags = PHY_POLL_CABLE_TEST, 3121 .probe = m88e1510_probe, 3122 .config_init = m88e1510_config_init, 3123 .config_aneg = m88e1510_config_aneg, 3124 .read_status = marvell_read_status, 3125 .config_intr = marvell_config_intr, 3126 .handle_interrupt = marvell_handle_interrupt, 3127 .get_wol = m88e1318_get_wol, 3128 .set_wol = m88e1318_set_wol, 3129 .resume = marvell_resume, 3130 .suspend = marvell_suspend, 3131 .read_page = marvell_read_page, 3132 .write_page = marvell_write_page, 3133 .get_sset_count = marvell_get_sset_count, 3134 .get_strings = marvell_get_strings, 3135 .get_stats = marvell_get_stats, 3136 .set_loopback = m88e1510_loopback, 3137 .get_tunable = m88e1011_get_tunable, 3138 .set_tunable = m88e1011_set_tunable, 3139 .cable_test_start = marvell_vct7_cable_test_start, 3140 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3141 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3142 }, 3143 { 3144 .phy_id = MARVELL_PHY_ID_88E1540, 3145 .phy_id_mask = MARVELL_PHY_ID_MASK, 3146 .name = "Marvell 88E1540", 3147 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3148 /* PHY_GBIT_FEATURES */ 3149 .flags = PHY_POLL_CABLE_TEST, 3150 .probe = marvell_probe, 3151 .config_init = marvell_1011gbe_config_init, 3152 .config_aneg = m88e1510_config_aneg, 3153 .read_status = marvell_read_status, 3154 .config_intr = marvell_config_intr, 3155 .handle_interrupt = marvell_handle_interrupt, 3156 .resume = genphy_resume, 3157 .suspend = genphy_suspend, 3158 .read_page = marvell_read_page, 3159 .write_page = marvell_write_page, 3160 .get_sset_count = marvell_get_sset_count, 3161 .get_strings = marvell_get_strings, 3162 .get_stats = marvell_get_stats, 3163 .get_tunable = m88e1540_get_tunable, 3164 .set_tunable = m88e1540_set_tunable, 3165 .cable_test_start = marvell_vct7_cable_test_start, 3166 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3167 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3168 }, 3169 { 3170 .phy_id = MARVELL_PHY_ID_88E1545, 3171 .phy_id_mask = MARVELL_PHY_ID_MASK, 3172 .name = "Marvell 88E1545", 3173 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3174 .probe = marvell_probe, 3175 /* PHY_GBIT_FEATURES */ 3176 .flags = PHY_POLL_CABLE_TEST, 3177 .config_init = marvell_1011gbe_config_init, 3178 .config_aneg = m88e1510_config_aneg, 3179 .read_status = marvell_read_status, 3180 .config_intr = marvell_config_intr, 3181 .handle_interrupt = marvell_handle_interrupt, 3182 .resume = genphy_resume, 3183 .suspend = genphy_suspend, 3184 .read_page = marvell_read_page, 3185 .write_page = marvell_write_page, 3186 .get_sset_count = marvell_get_sset_count, 3187 .get_strings = marvell_get_strings, 3188 .get_stats = marvell_get_stats, 3189 .get_tunable = m88e1540_get_tunable, 3190 .set_tunable = m88e1540_set_tunable, 3191 .cable_test_start = marvell_vct7_cable_test_start, 3192 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3193 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3194 }, 3195 { 3196 .phy_id = MARVELL_PHY_ID_88E3016, 3197 .phy_id_mask = MARVELL_PHY_ID_MASK, 3198 .name = "Marvell 88E3016", 3199 /* PHY_BASIC_FEATURES */ 3200 .probe = marvell_probe, 3201 .config_init = m88e3016_config_init, 3202 .aneg_done = marvell_aneg_done, 3203 .read_status = marvell_read_status, 3204 .config_intr = marvell_config_intr, 3205 .handle_interrupt = marvell_handle_interrupt, 3206 .resume = genphy_resume, 3207 .suspend = genphy_suspend, 3208 .read_page = marvell_read_page, 3209 .write_page = marvell_write_page, 3210 .get_sset_count = marvell_get_sset_count, 3211 .get_strings = marvell_get_strings, 3212 .get_stats = marvell_get_stats, 3213 }, 3214 { 3215 .phy_id = MARVELL_PHY_ID_88E6341_FAMILY, 3216 .phy_id_mask = MARVELL_PHY_ID_MASK, 3217 .name = "Marvell 88E6341 Family", 3218 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3219 /* PHY_GBIT_FEATURES */ 3220 .flags = PHY_POLL_CABLE_TEST, 3221 .probe = marvell_probe, 3222 .config_init = marvell_1011gbe_config_init, 3223 .config_aneg = m88e6390_config_aneg, 3224 .read_status = marvell_read_status, 3225 .config_intr = marvell_config_intr, 3226 .handle_interrupt = marvell_handle_interrupt, 3227 .resume = genphy_resume, 3228 .suspend = genphy_suspend, 3229 .read_page = marvell_read_page, 3230 .write_page = marvell_write_page, 3231 .get_sset_count = marvell_get_sset_count, 3232 .get_strings = marvell_get_strings, 3233 .get_stats = marvell_get_stats, 3234 .get_tunable = m88e1540_get_tunable, 3235 .set_tunable = m88e1540_set_tunable, 3236 .cable_test_start = marvell_vct7_cable_test_start, 3237 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3238 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3239 }, 3240 { 3241 .phy_id = MARVELL_PHY_ID_88E6390_FAMILY, 3242 .phy_id_mask = MARVELL_PHY_ID_MASK, 3243 .name = "Marvell 88E6390 Family", 3244 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops), 3245 /* PHY_GBIT_FEATURES */ 3246 .flags = PHY_POLL_CABLE_TEST, 3247 .probe = marvell_probe, 3248 .config_init = marvell_1011gbe_config_init, 3249 .config_aneg = m88e6390_config_aneg, 3250 .read_status = marvell_read_status, 3251 .config_intr = marvell_config_intr, 3252 .handle_interrupt = marvell_handle_interrupt, 3253 .resume = genphy_resume, 3254 .suspend = genphy_suspend, 3255 .read_page = marvell_read_page, 3256 .write_page = marvell_write_page, 3257 .get_sset_count = marvell_get_sset_count, 3258 .get_strings = marvell_get_strings, 3259 .get_stats = marvell_get_stats, 3260 .get_tunable = m88e1540_get_tunable, 3261 .set_tunable = m88e1540_set_tunable, 3262 .cable_test_start = marvell_vct7_cable_test_start, 3263 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3264 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3265 }, 3266 { 3267 .phy_id = MARVELL_PHY_ID_88E6393_FAMILY, 3268 .phy_id_mask = MARVELL_PHY_ID_MASK, 3269 .name = "Marvell 88E6393 Family", 3270 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops), 3271 /* PHY_GBIT_FEATURES */ 3272 .flags = PHY_POLL_CABLE_TEST, 3273 .probe = marvell_probe, 3274 .config_init = marvell_1011gbe_config_init, 3275 .config_aneg = m88e1510_config_aneg, 3276 .read_status = marvell_read_status, 3277 .config_intr = marvell_config_intr, 3278 .handle_interrupt = marvell_handle_interrupt, 3279 .resume = genphy_resume, 3280 .suspend = genphy_suspend, 3281 .read_page = marvell_read_page, 3282 .write_page = marvell_write_page, 3283 .get_sset_count = marvell_get_sset_count, 3284 .get_strings = marvell_get_strings, 3285 .get_stats = marvell_get_stats, 3286 .get_tunable = m88e1540_get_tunable, 3287 .set_tunable = m88e1540_set_tunable, 3288 .cable_test_start = marvell_vct7_cable_test_start, 3289 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3290 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3291 }, 3292 { 3293 .phy_id = MARVELL_PHY_ID_88E1340S, 3294 .phy_id_mask = MARVELL_PHY_ID_MASK, 3295 .name = "Marvell 88E1340S", 3296 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3297 .probe = marvell_probe, 3298 /* PHY_GBIT_FEATURES */ 3299 .config_init = marvell_1011gbe_config_init, 3300 .config_aneg = m88e1510_config_aneg, 3301 .read_status = marvell_read_status, 3302 .config_intr = marvell_config_intr, 3303 .handle_interrupt = marvell_handle_interrupt, 3304 .resume = genphy_resume, 3305 .suspend = genphy_suspend, 3306 .read_page = marvell_read_page, 3307 .write_page = marvell_write_page, 3308 .get_sset_count = marvell_get_sset_count, 3309 .get_strings = marvell_get_strings, 3310 .get_stats = marvell_get_stats, 3311 .get_tunable = m88e1540_get_tunable, 3312 .set_tunable = m88e1540_set_tunable, 3313 }, 3314 { 3315 .phy_id = MARVELL_PHY_ID_88E1548P, 3316 .phy_id_mask = MARVELL_PHY_ID_MASK, 3317 .name = "Marvell 88E1548P", 3318 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3319 .probe = marvell_probe, 3320 .features = PHY_GBIT_FIBRE_FEATURES, 3321 .config_init = marvell_1011gbe_config_init, 3322 .config_aneg = m88e1510_config_aneg, 3323 .read_status = marvell_read_status, 3324 .config_intr = marvell_config_intr, 3325 .handle_interrupt = marvell_handle_interrupt, 3326 .resume = genphy_resume, 3327 .suspend = genphy_suspend, 3328 .read_page = marvell_read_page, 3329 .write_page = marvell_write_page, 3330 .get_sset_count = marvell_get_sset_count, 3331 .get_strings = marvell_get_strings, 3332 .get_stats = marvell_get_stats, 3333 .get_tunable = m88e1540_get_tunable, 3334 .set_tunable = m88e1540_set_tunable, 3335 }, 3336 }; 3337 3338 module_phy_driver(marvell_drivers); 3339 3340 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 3341 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 3342 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 3343 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 3344 { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK }, 3345 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 3346 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 3347 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 3348 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 3349 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 3350 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 3351 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 3352 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 3353 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 3354 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 3355 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 3356 { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK }, 3357 { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK }, 3358 { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK }, 3359 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK }, 3360 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK }, 3361 { } 3362 }; 3363 3364 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 3365