1 /* 2 * drivers/net/phy/marvell.c 3 * 4 * Driver for Marvell PHYs 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 * 10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the 14 * Free Software Foundation; either version 2 of the License, or (at your 15 * option) any later version. 16 * 17 */ 18 #include <linux/kernel.h> 19 #include <linux/string.h> 20 #include <linux/ctype.h> 21 #include <linux/errno.h> 22 #include <linux/unistd.h> 23 #include <linux/hwmon.h> 24 #include <linux/interrupt.h> 25 #include <linux/init.h> 26 #include <linux/delay.h> 27 #include <linux/netdevice.h> 28 #include <linux/etherdevice.h> 29 #include <linux/skbuff.h> 30 #include <linux/spinlock.h> 31 #include <linux/mm.h> 32 #include <linux/module.h> 33 #include <linux/mii.h> 34 #include <linux/ethtool.h> 35 #include <linux/phy.h> 36 #include <linux/marvell_phy.h> 37 #include <linux/of.h> 38 39 #include <linux/io.h> 40 #include <asm/irq.h> 41 #include <linux/uaccess.h> 42 43 #define MII_MARVELL_PHY_PAGE 22 44 #define MII_MARVELL_COPPER_PAGE 0x00 45 #define MII_MARVELL_FIBER_PAGE 0x01 46 #define MII_MARVELL_MSCR_PAGE 0x02 47 #define MII_MARVELL_LED_PAGE 0x03 48 #define MII_MARVELL_MISC_TEST_PAGE 0x06 49 #define MII_MARVELL_WOL_PAGE 0x11 50 51 #define MII_M1011_IEVENT 0x13 52 #define MII_M1011_IEVENT_CLEAR 0x0000 53 54 #define MII_M1011_IMASK 0x12 55 #define MII_M1011_IMASK_INIT 0x6400 56 #define MII_M1011_IMASK_CLEAR 0x0000 57 58 #define MII_M1011_PHY_SCR 0x10 59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12 61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800 62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 65 66 #define MII_M1111_PHY_LED_CONTROL 0x18 67 #define MII_M1111_PHY_LED_DIRECT 0x4100 68 #define MII_M1111_PHY_LED_COMBINE 0x411c 69 #define MII_M1111_PHY_EXT_CR 0x14 70 #define MII_M1111_RGMII_RX_DELAY BIT(7) 71 #define MII_M1111_RGMII_TX_DELAY BIT(1) 72 #define MII_M1111_PHY_EXT_SR 0x1b 73 74 #define MII_M1111_HWCFG_MODE_MASK 0xf 75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 77 #define MII_M1111_HWCFG_MODE_RTBI 0x7 78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 82 83 #define MII_88E1121_PHY_MSCR_REG 21 84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 87 88 #define MII_88E1121_MISC_TEST 0x1a 89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 95 96 #define MII_88E1510_TEMP_SENSOR 0x1b 97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 98 99 #define MII_88E6390_MISC_TEST 0x1b 100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 105 106 #define MII_88E6390_TEMP_SENSOR 0x1c 107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 109 110 #define MII_88E1318S_PHY_MSCR1_REG 16 111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 112 113 /* Copper Specific Interrupt Enable Register */ 114 #define MII_88E1318S_PHY_CSIER 0x12 115 /* WOL Event Interrupt Enable */ 116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 117 118 /* LED Timer Control Register */ 119 #define MII_88E1318S_PHY_LED_TCR 0x12 120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 123 124 /* Magic Packet MAC address registers */ 125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 128 129 #define MII_88E1318S_PHY_WOL_CTRL 0x10 130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 132 133 #define MII_88E1121_PHY_LED_CTRL 16 134 #define MII_88E1121_PHY_LED_DEF 0x0030 135 136 #define MII_M1011_PHY_STATUS 0x11 137 #define MII_M1011_PHY_STATUS_1000 0x8000 138 #define MII_M1011_PHY_STATUS_100 0x4000 139 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 140 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 141 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 142 #define MII_M1011_PHY_STATUS_LINK 0x0400 143 144 #define MII_88E3016_PHY_SPEC_CTRL 0x10 145 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 146 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 147 148 #define MII_88E1510_GEN_CTRL_REG_1 0x14 149 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 151 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 152 153 #define LPA_FIBER_1000HALF 0x40 154 #define LPA_FIBER_1000FULL 0x20 155 156 #define LPA_PAUSE_FIBER 0x180 157 #define LPA_PAUSE_ASYM_FIBER 0x100 158 159 #define ADVERTISE_FIBER_1000HALF 0x40 160 #define ADVERTISE_FIBER_1000FULL 0x20 161 162 #define ADVERTISE_PAUSE_FIBER 0x180 163 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 164 165 #define REGISTER_LINK_STATUS 0x400 166 #define NB_FIBER_STATS 1 167 168 MODULE_DESCRIPTION("Marvell PHY driver"); 169 MODULE_AUTHOR("Andy Fleming"); 170 MODULE_LICENSE("GPL"); 171 172 struct marvell_hw_stat { 173 const char *string; 174 u8 page; 175 u8 reg; 176 u8 bits; 177 }; 178 179 static struct marvell_hw_stat marvell_hw_stats[] = { 180 { "phy_receive_errors_copper", 0, 21, 16}, 181 { "phy_idle_errors", 0, 10, 8 }, 182 { "phy_receive_errors_fiber", 1, 21, 16}, 183 }; 184 185 struct marvell_priv { 186 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 187 char *hwmon_name; 188 struct device *hwmon_dev; 189 }; 190 191 static int marvell_read_page(struct phy_device *phydev) 192 { 193 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 194 } 195 196 static int marvell_write_page(struct phy_device *phydev, int page) 197 { 198 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 199 } 200 201 static int marvell_set_page(struct phy_device *phydev, int page) 202 { 203 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 204 } 205 206 static int marvell_ack_interrupt(struct phy_device *phydev) 207 { 208 int err; 209 210 /* Clear the interrupts by reading the reg */ 211 err = phy_read(phydev, MII_M1011_IEVENT); 212 213 if (err < 0) 214 return err; 215 216 return 0; 217 } 218 219 static int marvell_config_intr(struct phy_device *phydev) 220 { 221 int err; 222 223 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 224 err = phy_write(phydev, MII_M1011_IMASK, 225 MII_M1011_IMASK_INIT); 226 else 227 err = phy_write(phydev, MII_M1011_IMASK, 228 MII_M1011_IMASK_CLEAR); 229 230 return err; 231 } 232 233 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 234 { 235 int reg; 236 int err; 237 int val; 238 239 /* get the current settings */ 240 reg = phy_read(phydev, MII_M1011_PHY_SCR); 241 if (reg < 0) 242 return reg; 243 244 val = reg; 245 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 246 switch (polarity) { 247 case ETH_TP_MDI: 248 val |= MII_M1011_PHY_SCR_MDI; 249 break; 250 case ETH_TP_MDI_X: 251 val |= MII_M1011_PHY_SCR_MDI_X; 252 break; 253 case ETH_TP_MDI_AUTO: 254 case ETH_TP_MDI_INVALID: 255 default: 256 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 257 break; 258 } 259 260 if (val != reg) { 261 /* Set the new polarity value in the register */ 262 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 263 if (err) 264 return err; 265 } 266 267 return 0; 268 } 269 270 static int marvell_set_downshift(struct phy_device *phydev, bool enable, 271 u8 retries) 272 { 273 int reg; 274 275 reg = phy_read(phydev, MII_M1011_PHY_SCR); 276 if (reg < 0) 277 return reg; 278 279 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK; 280 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT); 281 if (enable) 282 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN; 283 284 return phy_write(phydev, MII_M1011_PHY_SCR, reg); 285 } 286 287 static int marvell_config_aneg(struct phy_device *phydev) 288 { 289 int err; 290 291 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 292 if (err < 0) 293 return err; 294 295 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 296 MII_M1111_PHY_LED_DIRECT); 297 if (err < 0) 298 return err; 299 300 err = genphy_config_aneg(phydev); 301 if (err < 0) 302 return err; 303 304 if (phydev->autoneg != AUTONEG_ENABLE) { 305 /* A write to speed/duplex bits (that is performed by 306 * genphy_config_aneg() call above) must be followed by 307 * a software reset. Otherwise, the write has no effect. 308 */ 309 err = genphy_soft_reset(phydev); 310 if (err < 0) 311 return err; 312 } 313 314 return 0; 315 } 316 317 static int m88e1101_config_aneg(struct phy_device *phydev) 318 { 319 int err; 320 321 /* This Marvell PHY has an errata which requires 322 * that certain registers get written in order 323 * to restart autonegotiation 324 */ 325 err = genphy_soft_reset(phydev); 326 if (err < 0) 327 return err; 328 329 err = phy_write(phydev, 0x1d, 0x1f); 330 if (err < 0) 331 return err; 332 333 err = phy_write(phydev, 0x1e, 0x200c); 334 if (err < 0) 335 return err; 336 337 err = phy_write(phydev, 0x1d, 0x5); 338 if (err < 0) 339 return err; 340 341 err = phy_write(phydev, 0x1e, 0); 342 if (err < 0) 343 return err; 344 345 err = phy_write(phydev, 0x1e, 0x100); 346 if (err < 0) 347 return err; 348 349 return marvell_config_aneg(phydev); 350 } 351 352 static int m88e1111_config_aneg(struct phy_device *phydev) 353 { 354 int err; 355 356 /* The Marvell PHY has an errata which requires 357 * that certain registers get written in order 358 * to restart autonegotiation 359 */ 360 err = genphy_soft_reset(phydev); 361 362 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 363 if (err < 0) 364 return err; 365 366 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 367 MII_M1111_PHY_LED_DIRECT); 368 if (err < 0) 369 return err; 370 371 err = genphy_config_aneg(phydev); 372 if (err < 0) 373 return err; 374 375 if (phydev->autoneg != AUTONEG_ENABLE) { 376 /* A write to speed/duplex bits (that is performed by 377 * genphy_config_aneg() call above) must be followed by 378 * a software reset. Otherwise, the write has no effect. 379 */ 380 err = genphy_soft_reset(phydev); 381 if (err < 0) 382 return err; 383 } 384 385 return 0; 386 } 387 388 #ifdef CONFIG_OF_MDIO 389 /* Set and/or override some configuration registers based on the 390 * marvell,reg-init property stored in the of_node for the phydev. 391 * 392 * marvell,reg-init = <reg-page reg mask value>,...; 393 * 394 * There may be one or more sets of <reg-page reg mask value>: 395 * 396 * reg-page: which register bank to use. 397 * reg: the register. 398 * mask: if non-zero, ANDed with existing register value. 399 * value: ORed with the masked value and written to the regiser. 400 * 401 */ 402 static int marvell_of_reg_init(struct phy_device *phydev) 403 { 404 const __be32 *paddr; 405 int len, i, saved_page, current_page, ret = 0; 406 407 if (!phydev->mdio.dev.of_node) 408 return 0; 409 410 paddr = of_get_property(phydev->mdio.dev.of_node, 411 "marvell,reg-init", &len); 412 if (!paddr || len < (4 * sizeof(*paddr))) 413 return 0; 414 415 saved_page = phy_save_page(phydev); 416 if (saved_page < 0) 417 goto err; 418 current_page = saved_page; 419 420 len /= sizeof(*paddr); 421 for (i = 0; i < len - 3; i += 4) { 422 u16 page = be32_to_cpup(paddr + i); 423 u16 reg = be32_to_cpup(paddr + i + 1); 424 u16 mask = be32_to_cpup(paddr + i + 2); 425 u16 val_bits = be32_to_cpup(paddr + i + 3); 426 int val; 427 428 if (page != current_page) { 429 current_page = page; 430 ret = marvell_write_page(phydev, page); 431 if (ret < 0) 432 goto err; 433 } 434 435 val = 0; 436 if (mask) { 437 val = __phy_read(phydev, reg); 438 if (val < 0) { 439 ret = val; 440 goto err; 441 } 442 val &= mask; 443 } 444 val |= val_bits; 445 446 ret = __phy_write(phydev, reg, val); 447 if (ret < 0) 448 goto err; 449 } 450 err: 451 return phy_restore_page(phydev, saved_page, ret); 452 } 453 #else 454 static int marvell_of_reg_init(struct phy_device *phydev) 455 { 456 return 0; 457 } 458 #endif /* CONFIG_OF_MDIO */ 459 460 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 461 { 462 int mscr; 463 464 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 465 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 466 MII_88E1121_PHY_MSCR_TX_DELAY; 467 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 468 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 469 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 470 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 471 else 472 mscr = 0; 473 474 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 475 MII_88E1121_PHY_MSCR_REG, 476 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 477 } 478 479 static int m88e1121_config_aneg(struct phy_device *phydev) 480 { 481 int err = 0; 482 483 if (phy_interface_is_rgmii(phydev)) { 484 err = m88e1121_config_aneg_rgmii_delays(phydev); 485 if (err < 0) 486 return err; 487 } 488 489 err = genphy_soft_reset(phydev); 490 if (err < 0) 491 return err; 492 493 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 494 if (err < 0) 495 return err; 496 497 return genphy_config_aneg(phydev); 498 } 499 500 static int m88e1318_config_aneg(struct phy_device *phydev) 501 { 502 int err; 503 504 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 505 MII_88E1318S_PHY_MSCR1_REG, 506 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 507 if (err < 0) 508 return err; 509 510 return m88e1121_config_aneg(phydev); 511 } 512 513 /** 514 * ethtool_adv_to_fiber_adv_t 515 * @ethadv: the ethtool advertisement settings 516 * 517 * A small helper function that translates ethtool advertisement 518 * settings to phy autonegotiation advertisements for the 519 * MII_ADV register for fiber link. 520 */ 521 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv) 522 { 523 u32 result = 0; 524 525 if (ethadv & ADVERTISED_1000baseT_Half) 526 result |= ADVERTISE_FIBER_1000HALF; 527 if (ethadv & ADVERTISED_1000baseT_Full) 528 result |= ADVERTISE_FIBER_1000FULL; 529 530 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP)) 531 result |= LPA_PAUSE_ASYM_FIBER; 532 else if (ethadv & ADVERTISE_PAUSE_CAP) 533 result |= (ADVERTISE_PAUSE_FIBER 534 & (~ADVERTISE_PAUSE_ASYM_FIBER)); 535 536 return result; 537 } 538 539 /** 540 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 541 * @phydev: target phy_device struct 542 * 543 * Description: If auto-negotiation is enabled, we configure the 544 * advertising, and then restart auto-negotiation. If it is not 545 * enabled, then we write the BMCR. Adapted for fiber link in 546 * some Marvell's devices. 547 */ 548 static int marvell_config_aneg_fiber(struct phy_device *phydev) 549 { 550 int changed = 0; 551 int err; 552 int adv, oldadv; 553 u32 advertise; 554 555 if (phydev->autoneg != AUTONEG_ENABLE) 556 return genphy_setup_forced(phydev); 557 558 /* Only allow advertising what this PHY supports */ 559 phydev->advertising &= phydev->supported; 560 advertise = phydev->advertising; 561 562 /* Setup fiber advertisement */ 563 adv = phy_read(phydev, MII_ADVERTISE); 564 if (adv < 0) 565 return adv; 566 567 oldadv = adv; 568 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL 569 | LPA_PAUSE_FIBER); 570 adv |= ethtool_adv_to_fiber_adv_t(advertise); 571 572 if (adv != oldadv) { 573 err = phy_write(phydev, MII_ADVERTISE, adv); 574 if (err < 0) 575 return err; 576 577 changed = 1; 578 } 579 580 if (changed == 0) { 581 /* Advertisement hasn't changed, but maybe aneg was never on to 582 * begin with? Or maybe phy was isolated? 583 */ 584 int ctl = phy_read(phydev, MII_BMCR); 585 586 if (ctl < 0) 587 return ctl; 588 589 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 590 changed = 1; /* do restart aneg */ 591 } 592 593 /* Only restart aneg if we are advertising something different 594 * than we were before. 595 */ 596 if (changed > 0) 597 changed = genphy_restart_aneg(phydev); 598 599 return changed; 600 } 601 602 static int m88e1510_config_aneg(struct phy_device *phydev) 603 { 604 int err; 605 606 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 607 if (err < 0) 608 goto error; 609 610 /* Configure the copper link first */ 611 err = m88e1318_config_aneg(phydev); 612 if (err < 0) 613 goto error; 614 615 /* Do not touch the fiber page if we're in copper->sgmii mode */ 616 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 617 return 0; 618 619 /* Then the fiber link */ 620 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 621 if (err < 0) 622 goto error; 623 624 err = marvell_config_aneg_fiber(phydev); 625 if (err < 0) 626 goto error; 627 628 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 629 630 error: 631 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 632 return err; 633 } 634 635 static int marvell_config_init(struct phy_device *phydev) 636 { 637 /* Set registers from marvell,reg-init DT property */ 638 return marvell_of_reg_init(phydev); 639 } 640 641 static int m88e1116r_config_init(struct phy_device *phydev) 642 { 643 int err; 644 645 err = genphy_soft_reset(phydev); 646 if (err < 0) 647 return err; 648 649 mdelay(500); 650 651 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 652 if (err < 0) 653 return err; 654 655 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 656 if (err < 0) 657 return err; 658 659 err = marvell_set_downshift(phydev, true, 8); 660 if (err < 0) 661 return err; 662 663 if (phy_interface_is_rgmii(phydev)) { 664 err = m88e1121_config_aneg_rgmii_delays(phydev); 665 if (err < 0) 666 return err; 667 } 668 669 err = genphy_soft_reset(phydev); 670 if (err < 0) 671 return err; 672 673 return marvell_config_init(phydev); 674 } 675 676 static int m88e3016_config_init(struct phy_device *phydev) 677 { 678 int ret; 679 680 /* Enable Scrambler and Auto-Crossover */ 681 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 682 MII_88E3016_DISABLE_SCRAMBLER, 683 MII_88E3016_AUTO_MDIX_CROSSOVER); 684 if (ret < 0) 685 return ret; 686 687 return marvell_config_init(phydev); 688 } 689 690 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 691 u16 mode, 692 int fibre_copper_auto) 693 { 694 if (fibre_copper_auto) 695 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 696 697 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 698 MII_M1111_HWCFG_MODE_MASK | 699 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 700 MII_M1111_HWCFG_FIBER_COPPER_RES, 701 mode); 702 } 703 704 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 705 { 706 int delay; 707 708 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 709 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 710 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 711 delay = MII_M1111_RGMII_RX_DELAY; 712 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 713 delay = MII_M1111_RGMII_TX_DELAY; 714 } else { 715 delay = 0; 716 } 717 718 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 719 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 720 delay); 721 } 722 723 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 724 { 725 int temp; 726 int err; 727 728 err = m88e1111_config_init_rgmii_delays(phydev); 729 if (err < 0) 730 return err; 731 732 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 733 if (temp < 0) 734 return temp; 735 736 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 737 738 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 739 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 740 else 741 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 742 743 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 744 } 745 746 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 747 { 748 int err; 749 750 err = m88e1111_config_init_hwcfg_mode( 751 phydev, 752 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 753 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 754 if (err < 0) 755 return err; 756 757 /* make sure copper is selected */ 758 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 759 } 760 761 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 762 { 763 int err; 764 765 err = m88e1111_config_init_rgmii_delays(phydev); 766 if (err < 0) 767 return err; 768 769 err = m88e1111_config_init_hwcfg_mode( 770 phydev, 771 MII_M1111_HWCFG_MODE_RTBI, 772 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 773 if (err < 0) 774 return err; 775 776 /* soft reset */ 777 err = genphy_soft_reset(phydev); 778 if (err < 0) 779 return err; 780 781 return m88e1111_config_init_hwcfg_mode( 782 phydev, 783 MII_M1111_HWCFG_MODE_RTBI, 784 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 785 } 786 787 static int m88e1111_config_init(struct phy_device *phydev) 788 { 789 int err; 790 791 if (phy_interface_is_rgmii(phydev)) { 792 err = m88e1111_config_init_rgmii(phydev); 793 if (err < 0) 794 return err; 795 } 796 797 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 798 err = m88e1111_config_init_sgmii(phydev); 799 if (err < 0) 800 return err; 801 } 802 803 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 804 err = m88e1111_config_init_rtbi(phydev); 805 if (err < 0) 806 return err; 807 } 808 809 err = marvell_of_reg_init(phydev); 810 if (err < 0) 811 return err; 812 813 return genphy_soft_reset(phydev); 814 } 815 816 static int m88e1121_config_init(struct phy_device *phydev) 817 { 818 int err; 819 820 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 821 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 822 MII_88E1121_PHY_LED_CTRL, 823 MII_88E1121_PHY_LED_DEF); 824 if (err < 0) 825 return err; 826 827 /* Set marvell,reg-init configuration from device tree */ 828 return marvell_config_init(phydev); 829 } 830 831 static int m88e1318_config_init(struct phy_device *phydev) 832 { 833 if (phy_interrupt_is_valid(phydev)) { 834 int err = phy_modify_paged( 835 phydev, MII_MARVELL_LED_PAGE, 836 MII_88E1318S_PHY_LED_TCR, 837 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 838 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 839 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 840 if (err < 0) 841 return err; 842 } 843 844 return m88e1121_config_init(phydev); 845 } 846 847 static int m88e1510_config_init(struct phy_device *phydev) 848 { 849 int err; 850 851 /* SGMII-to-Copper mode initialization */ 852 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 853 u32 pause; 854 855 /* Select page 18 */ 856 err = marvell_set_page(phydev, 18); 857 if (err < 0) 858 return err; 859 860 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 861 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 862 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 863 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 864 if (err < 0) 865 return err; 866 867 /* PHY reset is necessary after changing MODE[2:0] */ 868 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 869 MII_88E1510_GEN_CTRL_REG_1_RESET); 870 if (err < 0) 871 return err; 872 873 /* Reset page selection */ 874 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 875 if (err < 0) 876 return err; 877 878 /* There appears to be a bug in the 88e1512 when used in 879 * SGMII to copper mode, where the AN advertisement register 880 * clears the pause bits each time a negotiation occurs. 881 * This means we can never be truely sure what was advertised, 882 * so disable Pause support. 883 */ 884 pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause; 885 phydev->supported &= ~pause; 886 phydev->advertising &= ~pause; 887 } 888 889 return m88e1318_config_init(phydev); 890 } 891 892 static int m88e1118_config_aneg(struct phy_device *phydev) 893 { 894 int err; 895 896 err = genphy_soft_reset(phydev); 897 if (err < 0) 898 return err; 899 900 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 901 if (err < 0) 902 return err; 903 904 err = genphy_config_aneg(phydev); 905 return 0; 906 } 907 908 static int m88e1118_config_init(struct phy_device *phydev) 909 { 910 int err; 911 912 /* Change address */ 913 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 914 if (err < 0) 915 return err; 916 917 /* Enable 1000 Mbit */ 918 err = phy_write(phydev, 0x15, 0x1070); 919 if (err < 0) 920 return err; 921 922 /* Change address */ 923 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 924 if (err < 0) 925 return err; 926 927 /* Adjust LED Control */ 928 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 929 err = phy_write(phydev, 0x10, 0x1100); 930 else 931 err = phy_write(phydev, 0x10, 0x021e); 932 if (err < 0) 933 return err; 934 935 err = marvell_of_reg_init(phydev); 936 if (err < 0) 937 return err; 938 939 /* Reset address */ 940 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 941 if (err < 0) 942 return err; 943 944 return genphy_soft_reset(phydev); 945 } 946 947 static int m88e1149_config_init(struct phy_device *phydev) 948 { 949 int err; 950 951 /* Change address */ 952 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 953 if (err < 0) 954 return err; 955 956 /* Enable 1000 Mbit */ 957 err = phy_write(phydev, 0x15, 0x1048); 958 if (err < 0) 959 return err; 960 961 err = marvell_of_reg_init(phydev); 962 if (err < 0) 963 return err; 964 965 /* Reset address */ 966 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 967 if (err < 0) 968 return err; 969 970 return genphy_soft_reset(phydev); 971 } 972 973 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 974 { 975 int err; 976 977 err = m88e1111_config_init_rgmii_delays(phydev); 978 if (err < 0) 979 return err; 980 981 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 982 err = phy_write(phydev, 0x1d, 0x0012); 983 if (err < 0) 984 return err; 985 986 err = phy_modify(phydev, 0x1e, 0x0fc0, 987 2 << 9 | /* 36 ohm */ 988 2 << 6); /* 39 ohm */ 989 if (err < 0) 990 return err; 991 992 err = phy_write(phydev, 0x1d, 0x3); 993 if (err < 0) 994 return err; 995 996 err = phy_write(phydev, 0x1e, 0x8000); 997 } 998 return err; 999 } 1000 1001 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1002 { 1003 return m88e1111_config_init_hwcfg_mode( 1004 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1005 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1006 } 1007 1008 static int m88e1145_config_init(struct phy_device *phydev) 1009 { 1010 int err; 1011 1012 /* Take care of errata E0 & E1 */ 1013 err = phy_write(phydev, 0x1d, 0x001b); 1014 if (err < 0) 1015 return err; 1016 1017 err = phy_write(phydev, 0x1e, 0x418f); 1018 if (err < 0) 1019 return err; 1020 1021 err = phy_write(phydev, 0x1d, 0x0016); 1022 if (err < 0) 1023 return err; 1024 1025 err = phy_write(phydev, 0x1e, 0xa2da); 1026 if (err < 0) 1027 return err; 1028 1029 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1030 err = m88e1145_config_init_rgmii(phydev); 1031 if (err < 0) 1032 return err; 1033 } 1034 1035 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1036 err = m88e1145_config_init_sgmii(phydev); 1037 if (err < 0) 1038 return err; 1039 } 1040 1041 err = marvell_of_reg_init(phydev); 1042 if (err < 0) 1043 return err; 1044 1045 return 0; 1046 } 1047 1048 /** 1049 * fiber_lpa_to_ethtool_lpa_t 1050 * @lpa: value of the MII_LPA register for fiber link 1051 * 1052 * A small helper function that translates MII_LPA 1053 * bits to ethtool LP advertisement settings. 1054 */ 1055 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa) 1056 { 1057 u32 result = 0; 1058 1059 if (lpa & LPA_FIBER_1000HALF) 1060 result |= ADVERTISED_1000baseT_Half; 1061 if (lpa & LPA_FIBER_1000FULL) 1062 result |= ADVERTISED_1000baseT_Full; 1063 1064 return result; 1065 } 1066 1067 /** 1068 * marvell_update_link - update link status in real time in @phydev 1069 * @phydev: target phy_device struct 1070 * 1071 * Description: Update the value in phydev->link to reflect the 1072 * current link value. 1073 */ 1074 static int marvell_update_link(struct phy_device *phydev, int fiber) 1075 { 1076 int status; 1077 1078 /* Use the generic register for copper link, or specific 1079 * register for fiber case 1080 */ 1081 if (fiber) { 1082 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1083 if (status < 0) 1084 return status; 1085 1086 if ((status & REGISTER_LINK_STATUS) == 0) 1087 phydev->link = 0; 1088 else 1089 phydev->link = 1; 1090 } else { 1091 return genphy_update_link(phydev); 1092 } 1093 1094 return 0; 1095 } 1096 1097 static int marvell_read_status_page_an(struct phy_device *phydev, 1098 int fiber) 1099 { 1100 int status; 1101 int lpa; 1102 int lpagb; 1103 1104 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1105 if (status < 0) 1106 return status; 1107 1108 lpa = phy_read(phydev, MII_LPA); 1109 if (lpa < 0) 1110 return lpa; 1111 1112 lpagb = phy_read(phydev, MII_STAT1000); 1113 if (lpagb < 0) 1114 return lpagb; 1115 1116 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1117 phydev->duplex = DUPLEX_FULL; 1118 else 1119 phydev->duplex = DUPLEX_HALF; 1120 1121 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 1122 phydev->pause = 0; 1123 phydev->asym_pause = 0; 1124 1125 switch (status) { 1126 case MII_M1011_PHY_STATUS_1000: 1127 phydev->speed = SPEED_1000; 1128 break; 1129 1130 case MII_M1011_PHY_STATUS_100: 1131 phydev->speed = SPEED_100; 1132 break; 1133 1134 default: 1135 phydev->speed = SPEED_10; 1136 break; 1137 } 1138 1139 if (!fiber) { 1140 phydev->lp_advertising = 1141 mii_stat1000_to_ethtool_lpa_t(lpagb) | 1142 mii_lpa_to_ethtool_lpa_t(lpa); 1143 1144 if (phydev->duplex == DUPLEX_FULL) { 1145 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 1146 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 1147 } 1148 } else { 1149 /* The fiber link is only 1000M capable */ 1150 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa); 1151 1152 if (phydev->duplex == DUPLEX_FULL) { 1153 if (!(lpa & LPA_PAUSE_FIBER)) { 1154 phydev->pause = 0; 1155 phydev->asym_pause = 0; 1156 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1157 phydev->pause = 1; 1158 phydev->asym_pause = 1; 1159 } else { 1160 phydev->pause = 1; 1161 phydev->asym_pause = 0; 1162 } 1163 } 1164 } 1165 return 0; 1166 } 1167 1168 static int marvell_read_status_page_fixed(struct phy_device *phydev) 1169 { 1170 int bmcr = phy_read(phydev, MII_BMCR); 1171 1172 if (bmcr < 0) 1173 return bmcr; 1174 1175 if (bmcr & BMCR_FULLDPLX) 1176 phydev->duplex = DUPLEX_FULL; 1177 else 1178 phydev->duplex = DUPLEX_HALF; 1179 1180 if (bmcr & BMCR_SPEED1000) 1181 phydev->speed = SPEED_1000; 1182 else if (bmcr & BMCR_SPEED100) 1183 phydev->speed = SPEED_100; 1184 else 1185 phydev->speed = SPEED_10; 1186 1187 phydev->pause = 0; 1188 phydev->asym_pause = 0; 1189 phydev->lp_advertising = 0; 1190 1191 return 0; 1192 } 1193 1194 /* marvell_read_status_page 1195 * 1196 * Description: 1197 * Check the link, then figure out the current state 1198 * by comparing what we advertise with what the link partner 1199 * advertises. Start by checking the gigabit possibilities, 1200 * then move on to 10/100. 1201 */ 1202 static int marvell_read_status_page(struct phy_device *phydev, int page) 1203 { 1204 int fiber; 1205 int err; 1206 1207 /* Detect and update the link, but return if there 1208 * was an error 1209 */ 1210 if (page == MII_MARVELL_FIBER_PAGE) 1211 fiber = 1; 1212 else 1213 fiber = 0; 1214 1215 err = marvell_update_link(phydev, fiber); 1216 if (err) 1217 return err; 1218 1219 if (phydev->autoneg == AUTONEG_ENABLE) 1220 err = marvell_read_status_page_an(phydev, fiber); 1221 else 1222 err = marvell_read_status_page_fixed(phydev); 1223 1224 return err; 1225 } 1226 1227 /* marvell_read_status 1228 * 1229 * Some Marvell's phys have two modes: fiber and copper. 1230 * Both need status checked. 1231 * Description: 1232 * First, check the fiber link and status. 1233 * If the fiber link is down, check the copper link and status which 1234 * will be the default value if both link are down. 1235 */ 1236 static int marvell_read_status(struct phy_device *phydev) 1237 { 1238 int err; 1239 1240 /* Check the fiber mode first */ 1241 if (phydev->supported & SUPPORTED_FIBRE && 1242 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1243 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1244 if (err < 0) 1245 goto error; 1246 1247 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1248 if (err < 0) 1249 goto error; 1250 1251 /* If the fiber link is up, it is the selected and 1252 * used link. In this case, we need to stay in the 1253 * fiber page. Please to be careful about that, avoid 1254 * to restore Copper page in other functions which 1255 * could break the behaviour for some fiber phy like 1256 * 88E1512. 1257 */ 1258 if (phydev->link) 1259 return 0; 1260 1261 /* If fiber link is down, check and save copper mode state */ 1262 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1263 if (err < 0) 1264 goto error; 1265 } 1266 1267 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1268 1269 error: 1270 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1271 return err; 1272 } 1273 1274 /* marvell_suspend 1275 * 1276 * Some Marvell's phys have two modes: fiber and copper. 1277 * Both need to be suspended 1278 */ 1279 static int marvell_suspend(struct phy_device *phydev) 1280 { 1281 int err; 1282 1283 /* Suspend the fiber mode first */ 1284 if (!(phydev->supported & SUPPORTED_FIBRE)) { 1285 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1286 if (err < 0) 1287 goto error; 1288 1289 /* With the page set, use the generic suspend */ 1290 err = genphy_suspend(phydev); 1291 if (err < 0) 1292 goto error; 1293 1294 /* Then, the copper link */ 1295 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1296 if (err < 0) 1297 goto error; 1298 } 1299 1300 /* With the page set, use the generic suspend */ 1301 return genphy_suspend(phydev); 1302 1303 error: 1304 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1305 return err; 1306 } 1307 1308 /* marvell_resume 1309 * 1310 * Some Marvell's phys have two modes: fiber and copper. 1311 * Both need to be resumed 1312 */ 1313 static int marvell_resume(struct phy_device *phydev) 1314 { 1315 int err; 1316 1317 /* Resume the fiber mode first */ 1318 if (!(phydev->supported & SUPPORTED_FIBRE)) { 1319 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1320 if (err < 0) 1321 goto error; 1322 1323 /* With the page set, use the generic resume */ 1324 err = genphy_resume(phydev); 1325 if (err < 0) 1326 goto error; 1327 1328 /* Then, the copper link */ 1329 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1330 if (err < 0) 1331 goto error; 1332 } 1333 1334 /* With the page set, use the generic resume */ 1335 return genphy_resume(phydev); 1336 1337 error: 1338 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1339 return err; 1340 } 1341 1342 static int marvell_aneg_done(struct phy_device *phydev) 1343 { 1344 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1345 1346 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1347 } 1348 1349 static int m88e1121_did_interrupt(struct phy_device *phydev) 1350 { 1351 int imask; 1352 1353 imask = phy_read(phydev, MII_M1011_IEVENT); 1354 1355 if (imask & MII_M1011_IMASK_INIT) 1356 return 1; 1357 1358 return 0; 1359 } 1360 1361 static void m88e1318_get_wol(struct phy_device *phydev, 1362 struct ethtool_wolinfo *wol) 1363 { 1364 int oldpage, ret = 0; 1365 1366 wol->supported = WAKE_MAGIC; 1367 wol->wolopts = 0; 1368 1369 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1370 if (oldpage < 0) 1371 goto error; 1372 1373 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1374 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1375 wol->wolopts |= WAKE_MAGIC; 1376 1377 error: 1378 phy_restore_page(phydev, oldpage, ret); 1379 } 1380 1381 static int m88e1318_set_wol(struct phy_device *phydev, 1382 struct ethtool_wolinfo *wol) 1383 { 1384 int err = 0, oldpage; 1385 1386 oldpage = phy_save_page(phydev); 1387 if (oldpage < 0) 1388 goto error; 1389 1390 if (wol->wolopts & WAKE_MAGIC) { 1391 /* Explicitly switch to page 0x00, just to be sure */ 1392 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1393 if (err < 0) 1394 goto error; 1395 1396 /* If WOL event happened once, the LED[2] interrupt pin 1397 * will not be cleared unless we reading the interrupt status 1398 * register. If interrupts are in use, the normal interrupt 1399 * handling will clear the WOL event. Clear the WOL event 1400 * before enabling it if !phy_interrupt_is_valid() 1401 */ 1402 if (!phy_interrupt_is_valid(phydev)) 1403 phy_read(phydev, MII_M1011_IEVENT); 1404 1405 /* Enable the WOL interrupt */ 1406 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1407 MII_88E1318S_PHY_CSIER_WOL_EIE); 1408 if (err < 0) 1409 goto error; 1410 1411 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1412 if (err < 0) 1413 goto error; 1414 1415 /* Setup LED[2] as interrupt pin (active low) */ 1416 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1417 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1418 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1419 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1420 if (err < 0) 1421 goto error; 1422 1423 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1424 if (err < 0) 1425 goto error; 1426 1427 /* Store the device address for the magic packet */ 1428 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1429 ((phydev->attached_dev->dev_addr[5] << 8) | 1430 phydev->attached_dev->dev_addr[4])); 1431 if (err < 0) 1432 goto error; 1433 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1434 ((phydev->attached_dev->dev_addr[3] << 8) | 1435 phydev->attached_dev->dev_addr[2])); 1436 if (err < 0) 1437 goto error; 1438 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1439 ((phydev->attached_dev->dev_addr[1] << 8) | 1440 phydev->attached_dev->dev_addr[0])); 1441 if (err < 0) 1442 goto error; 1443 1444 /* Clear WOL status and enable magic packet matching */ 1445 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1446 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1447 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1448 if (err < 0) 1449 goto error; 1450 } else { 1451 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1452 if (err < 0) 1453 goto error; 1454 1455 /* Clear WOL status and disable magic packet matching */ 1456 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1457 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1458 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1459 if (err < 0) 1460 goto error; 1461 } 1462 1463 error: 1464 return phy_restore_page(phydev, oldpage, err); 1465 } 1466 1467 static int marvell_get_sset_count(struct phy_device *phydev) 1468 { 1469 if (phydev->supported & SUPPORTED_FIBRE) 1470 return ARRAY_SIZE(marvell_hw_stats); 1471 else 1472 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1473 } 1474 1475 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1476 { 1477 int i; 1478 1479 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) { 1480 strlcpy(data + i * ETH_GSTRING_LEN, 1481 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1482 } 1483 } 1484 1485 #ifndef UINT64_MAX 1486 #define UINT64_MAX (u64)(~((u64)0)) 1487 #endif 1488 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1489 { 1490 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1491 struct marvell_priv *priv = phydev->priv; 1492 int val; 1493 u64 ret; 1494 1495 val = phy_read_paged(phydev, stat.page, stat.reg); 1496 if (val < 0) { 1497 ret = UINT64_MAX; 1498 } else { 1499 val = val & ((1 << stat.bits) - 1); 1500 priv->stats[i] += val; 1501 ret = priv->stats[i]; 1502 } 1503 1504 return ret; 1505 } 1506 1507 static void marvell_get_stats(struct phy_device *phydev, 1508 struct ethtool_stats *stats, u64 *data) 1509 { 1510 int i; 1511 1512 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) 1513 data[i] = marvell_get_stat(phydev, i); 1514 } 1515 1516 #ifdef CONFIG_HWMON 1517 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1518 { 1519 int oldpage; 1520 int ret = 0; 1521 int val; 1522 1523 *temp = 0; 1524 1525 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1526 if (oldpage < 0) 1527 goto error; 1528 1529 /* Enable temperature sensor */ 1530 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1531 if (ret < 0) 1532 goto error; 1533 1534 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1535 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1536 if (ret < 0) 1537 goto error; 1538 1539 /* Wait for temperature to stabilize */ 1540 usleep_range(10000, 12000); 1541 1542 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1543 if (val < 0) { 1544 ret = val; 1545 goto error; 1546 } 1547 1548 /* Disable temperature sensor */ 1549 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1550 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1551 if (ret < 0) 1552 goto error; 1553 1554 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1555 1556 error: 1557 return phy_restore_page(phydev, oldpage, ret); 1558 } 1559 1560 static int m88e1121_hwmon_read(struct device *dev, 1561 enum hwmon_sensor_types type, 1562 u32 attr, int channel, long *temp) 1563 { 1564 struct phy_device *phydev = dev_get_drvdata(dev); 1565 int err; 1566 1567 switch (attr) { 1568 case hwmon_temp_input: 1569 err = m88e1121_get_temp(phydev, temp); 1570 break; 1571 default: 1572 return -EOPNOTSUPP; 1573 } 1574 1575 return err; 1576 } 1577 1578 static umode_t m88e1121_hwmon_is_visible(const void *data, 1579 enum hwmon_sensor_types type, 1580 u32 attr, int channel) 1581 { 1582 if (type != hwmon_temp) 1583 return 0; 1584 1585 switch (attr) { 1586 case hwmon_temp_input: 1587 return 0444; 1588 default: 1589 return 0; 1590 } 1591 } 1592 1593 static u32 m88e1121_hwmon_chip_config[] = { 1594 HWMON_C_REGISTER_TZ, 1595 0 1596 }; 1597 1598 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1599 .type = hwmon_chip, 1600 .config = m88e1121_hwmon_chip_config, 1601 }; 1602 1603 static u32 m88e1121_hwmon_temp_config[] = { 1604 HWMON_T_INPUT, 1605 0 1606 }; 1607 1608 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1609 .type = hwmon_temp, 1610 .config = m88e1121_hwmon_temp_config, 1611 }; 1612 1613 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1614 &m88e1121_hwmon_chip, 1615 &m88e1121_hwmon_temp, 1616 NULL 1617 }; 1618 1619 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1620 .is_visible = m88e1121_hwmon_is_visible, 1621 .read = m88e1121_hwmon_read, 1622 }; 1623 1624 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1625 .ops = &m88e1121_hwmon_hwmon_ops, 1626 .info = m88e1121_hwmon_info, 1627 }; 1628 1629 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1630 { 1631 int ret; 1632 1633 *temp = 0; 1634 1635 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1636 MII_88E1510_TEMP_SENSOR); 1637 if (ret < 0) 1638 return ret; 1639 1640 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1641 1642 return 0; 1643 } 1644 1645 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1646 { 1647 int ret; 1648 1649 *temp = 0; 1650 1651 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1652 MII_88E1121_MISC_TEST); 1653 if (ret < 0) 1654 return ret; 1655 1656 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1657 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1658 /* convert to mC */ 1659 *temp *= 1000; 1660 1661 return 0; 1662 } 1663 1664 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1665 { 1666 temp = temp / 1000; 1667 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1668 1669 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1670 MII_88E1121_MISC_TEST, 1671 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1672 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1673 } 1674 1675 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1676 { 1677 int ret; 1678 1679 *alarm = false; 1680 1681 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1682 MII_88E1121_MISC_TEST); 1683 if (ret < 0) 1684 return ret; 1685 1686 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1687 1688 return 0; 1689 } 1690 1691 static int m88e1510_hwmon_read(struct device *dev, 1692 enum hwmon_sensor_types type, 1693 u32 attr, int channel, long *temp) 1694 { 1695 struct phy_device *phydev = dev_get_drvdata(dev); 1696 int err; 1697 1698 switch (attr) { 1699 case hwmon_temp_input: 1700 err = m88e1510_get_temp(phydev, temp); 1701 break; 1702 case hwmon_temp_crit: 1703 err = m88e1510_get_temp_critical(phydev, temp); 1704 break; 1705 case hwmon_temp_max_alarm: 1706 err = m88e1510_get_temp_alarm(phydev, temp); 1707 break; 1708 default: 1709 return -EOPNOTSUPP; 1710 } 1711 1712 return err; 1713 } 1714 1715 static int m88e1510_hwmon_write(struct device *dev, 1716 enum hwmon_sensor_types type, 1717 u32 attr, int channel, long temp) 1718 { 1719 struct phy_device *phydev = dev_get_drvdata(dev); 1720 int err; 1721 1722 switch (attr) { 1723 case hwmon_temp_crit: 1724 err = m88e1510_set_temp_critical(phydev, temp); 1725 break; 1726 default: 1727 return -EOPNOTSUPP; 1728 } 1729 return err; 1730 } 1731 1732 static umode_t m88e1510_hwmon_is_visible(const void *data, 1733 enum hwmon_sensor_types type, 1734 u32 attr, int channel) 1735 { 1736 if (type != hwmon_temp) 1737 return 0; 1738 1739 switch (attr) { 1740 case hwmon_temp_input: 1741 case hwmon_temp_max_alarm: 1742 return 0444; 1743 case hwmon_temp_crit: 1744 return 0644; 1745 default: 1746 return 0; 1747 } 1748 } 1749 1750 static u32 m88e1510_hwmon_temp_config[] = { 1751 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1752 0 1753 }; 1754 1755 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1756 .type = hwmon_temp, 1757 .config = m88e1510_hwmon_temp_config, 1758 }; 1759 1760 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1761 &m88e1121_hwmon_chip, 1762 &m88e1510_hwmon_temp, 1763 NULL 1764 }; 1765 1766 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1767 .is_visible = m88e1510_hwmon_is_visible, 1768 .read = m88e1510_hwmon_read, 1769 .write = m88e1510_hwmon_write, 1770 }; 1771 1772 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1773 .ops = &m88e1510_hwmon_hwmon_ops, 1774 .info = m88e1510_hwmon_info, 1775 }; 1776 1777 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 1778 { 1779 int sum = 0; 1780 int oldpage; 1781 int ret = 0; 1782 int i; 1783 1784 *temp = 0; 1785 1786 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1787 if (oldpage < 0) 1788 goto error; 1789 1790 /* Enable temperature sensor */ 1791 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1792 if (ret < 0) 1793 goto error; 1794 1795 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1796 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 1797 MII_88E6390_MISC_TEST_SAMPLE_1S; 1798 1799 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1800 if (ret < 0) 1801 goto error; 1802 1803 /* Wait for temperature to stabilize */ 1804 usleep_range(10000, 12000); 1805 1806 /* Reading the temperature sense has an errata. You need to read 1807 * a number of times and take an average. 1808 */ 1809 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 1810 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 1811 if (ret < 0) 1812 goto error; 1813 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 1814 } 1815 1816 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 1817 *temp = (sum - 75) * 1000; 1818 1819 /* Disable temperature sensor */ 1820 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1821 if (ret < 0) 1822 goto error; 1823 1824 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1825 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 1826 1827 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1828 1829 error: 1830 phy_restore_page(phydev, oldpage, ret); 1831 1832 return ret; 1833 } 1834 1835 static int m88e6390_hwmon_read(struct device *dev, 1836 enum hwmon_sensor_types type, 1837 u32 attr, int channel, long *temp) 1838 { 1839 struct phy_device *phydev = dev_get_drvdata(dev); 1840 int err; 1841 1842 switch (attr) { 1843 case hwmon_temp_input: 1844 err = m88e6390_get_temp(phydev, temp); 1845 break; 1846 default: 1847 return -EOPNOTSUPP; 1848 } 1849 1850 return err; 1851 } 1852 1853 static umode_t m88e6390_hwmon_is_visible(const void *data, 1854 enum hwmon_sensor_types type, 1855 u32 attr, int channel) 1856 { 1857 if (type != hwmon_temp) 1858 return 0; 1859 1860 switch (attr) { 1861 case hwmon_temp_input: 1862 return 0444; 1863 default: 1864 return 0; 1865 } 1866 } 1867 1868 static u32 m88e6390_hwmon_temp_config[] = { 1869 HWMON_T_INPUT, 1870 0 1871 }; 1872 1873 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 1874 .type = hwmon_temp, 1875 .config = m88e6390_hwmon_temp_config, 1876 }; 1877 1878 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 1879 &m88e1121_hwmon_chip, 1880 &m88e6390_hwmon_temp, 1881 NULL 1882 }; 1883 1884 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 1885 .is_visible = m88e6390_hwmon_is_visible, 1886 .read = m88e6390_hwmon_read, 1887 }; 1888 1889 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 1890 .ops = &m88e6390_hwmon_hwmon_ops, 1891 .info = m88e6390_hwmon_info, 1892 }; 1893 1894 static int marvell_hwmon_name(struct phy_device *phydev) 1895 { 1896 struct marvell_priv *priv = phydev->priv; 1897 struct device *dev = &phydev->mdio.dev; 1898 const char *devname = dev_name(dev); 1899 size_t len = strlen(devname); 1900 int i, j; 1901 1902 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 1903 if (!priv->hwmon_name) 1904 return -ENOMEM; 1905 1906 for (i = j = 0; i < len && devname[i]; i++) { 1907 if (isalnum(devname[i])) 1908 priv->hwmon_name[j++] = devname[i]; 1909 } 1910 1911 return 0; 1912 } 1913 1914 static int marvell_hwmon_probe(struct phy_device *phydev, 1915 const struct hwmon_chip_info *chip) 1916 { 1917 struct marvell_priv *priv = phydev->priv; 1918 struct device *dev = &phydev->mdio.dev; 1919 int err; 1920 1921 err = marvell_hwmon_name(phydev); 1922 if (err) 1923 return err; 1924 1925 priv->hwmon_dev = devm_hwmon_device_register_with_info( 1926 dev, priv->hwmon_name, phydev, chip, NULL); 1927 1928 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 1929 } 1930 1931 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1932 { 1933 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 1934 } 1935 1936 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1937 { 1938 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 1939 } 1940 1941 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1942 { 1943 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 1944 } 1945 #else 1946 static int m88e1121_hwmon_probe(struct phy_device *phydev) 1947 { 1948 return 0; 1949 } 1950 1951 static int m88e1510_hwmon_probe(struct phy_device *phydev) 1952 { 1953 return 0; 1954 } 1955 1956 static int m88e6390_hwmon_probe(struct phy_device *phydev) 1957 { 1958 return 0; 1959 } 1960 #endif 1961 1962 static int marvell_probe(struct phy_device *phydev) 1963 { 1964 struct marvell_priv *priv; 1965 1966 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 1967 if (!priv) 1968 return -ENOMEM; 1969 1970 phydev->priv = priv; 1971 1972 return 0; 1973 } 1974 1975 static int m88e1121_probe(struct phy_device *phydev) 1976 { 1977 int err; 1978 1979 err = marvell_probe(phydev); 1980 if (err) 1981 return err; 1982 1983 return m88e1121_hwmon_probe(phydev); 1984 } 1985 1986 static int m88e1510_probe(struct phy_device *phydev) 1987 { 1988 int err; 1989 1990 err = marvell_probe(phydev); 1991 if (err) 1992 return err; 1993 1994 return m88e1510_hwmon_probe(phydev); 1995 } 1996 1997 static int m88e6390_probe(struct phy_device *phydev) 1998 { 1999 int err; 2000 2001 err = marvell_probe(phydev); 2002 if (err) 2003 return err; 2004 2005 return m88e6390_hwmon_probe(phydev); 2006 } 2007 2008 static struct phy_driver marvell_drivers[] = { 2009 { 2010 .phy_id = MARVELL_PHY_ID_88E1101, 2011 .phy_id_mask = MARVELL_PHY_ID_MASK, 2012 .name = "Marvell 88E1101", 2013 .features = PHY_GBIT_FEATURES, 2014 .flags = PHY_HAS_INTERRUPT, 2015 .probe = marvell_probe, 2016 .config_init = &marvell_config_init, 2017 .config_aneg = &m88e1101_config_aneg, 2018 .ack_interrupt = &marvell_ack_interrupt, 2019 .config_intr = &marvell_config_intr, 2020 .resume = &genphy_resume, 2021 .suspend = &genphy_suspend, 2022 .read_page = marvell_read_page, 2023 .write_page = marvell_write_page, 2024 .get_sset_count = marvell_get_sset_count, 2025 .get_strings = marvell_get_strings, 2026 .get_stats = marvell_get_stats, 2027 }, 2028 { 2029 .phy_id = MARVELL_PHY_ID_88E1112, 2030 .phy_id_mask = MARVELL_PHY_ID_MASK, 2031 .name = "Marvell 88E1112", 2032 .features = PHY_GBIT_FEATURES, 2033 .flags = PHY_HAS_INTERRUPT, 2034 .probe = marvell_probe, 2035 .config_init = &m88e1111_config_init, 2036 .config_aneg = &marvell_config_aneg, 2037 .ack_interrupt = &marvell_ack_interrupt, 2038 .config_intr = &marvell_config_intr, 2039 .resume = &genphy_resume, 2040 .suspend = &genphy_suspend, 2041 .read_page = marvell_read_page, 2042 .write_page = marvell_write_page, 2043 .get_sset_count = marvell_get_sset_count, 2044 .get_strings = marvell_get_strings, 2045 .get_stats = marvell_get_stats, 2046 }, 2047 { 2048 .phy_id = MARVELL_PHY_ID_88E1111, 2049 .phy_id_mask = MARVELL_PHY_ID_MASK, 2050 .name = "Marvell 88E1111", 2051 .features = PHY_GBIT_FEATURES, 2052 .flags = PHY_HAS_INTERRUPT, 2053 .probe = marvell_probe, 2054 .config_init = &m88e1111_config_init, 2055 .config_aneg = &m88e1111_config_aneg, 2056 .read_status = &marvell_read_status, 2057 .ack_interrupt = &marvell_ack_interrupt, 2058 .config_intr = &marvell_config_intr, 2059 .resume = &genphy_resume, 2060 .suspend = &genphy_suspend, 2061 .read_page = marvell_read_page, 2062 .write_page = marvell_write_page, 2063 .get_sset_count = marvell_get_sset_count, 2064 .get_strings = marvell_get_strings, 2065 .get_stats = marvell_get_stats, 2066 }, 2067 { 2068 .phy_id = MARVELL_PHY_ID_88E1118, 2069 .phy_id_mask = MARVELL_PHY_ID_MASK, 2070 .name = "Marvell 88E1118", 2071 .features = PHY_GBIT_FEATURES, 2072 .flags = PHY_HAS_INTERRUPT, 2073 .probe = marvell_probe, 2074 .config_init = &m88e1118_config_init, 2075 .config_aneg = &m88e1118_config_aneg, 2076 .ack_interrupt = &marvell_ack_interrupt, 2077 .config_intr = &marvell_config_intr, 2078 .resume = &genphy_resume, 2079 .suspend = &genphy_suspend, 2080 .read_page = marvell_read_page, 2081 .write_page = marvell_write_page, 2082 .get_sset_count = marvell_get_sset_count, 2083 .get_strings = marvell_get_strings, 2084 .get_stats = marvell_get_stats, 2085 }, 2086 { 2087 .phy_id = MARVELL_PHY_ID_88E1121R, 2088 .phy_id_mask = MARVELL_PHY_ID_MASK, 2089 .name = "Marvell 88E1121R", 2090 .features = PHY_GBIT_FEATURES, 2091 .flags = PHY_HAS_INTERRUPT, 2092 .probe = &m88e1121_probe, 2093 .config_init = &m88e1121_config_init, 2094 .config_aneg = &m88e1121_config_aneg, 2095 .read_status = &marvell_read_status, 2096 .ack_interrupt = &marvell_ack_interrupt, 2097 .config_intr = &marvell_config_intr, 2098 .did_interrupt = &m88e1121_did_interrupt, 2099 .resume = &genphy_resume, 2100 .suspend = &genphy_suspend, 2101 .read_page = marvell_read_page, 2102 .write_page = marvell_write_page, 2103 .get_sset_count = marvell_get_sset_count, 2104 .get_strings = marvell_get_strings, 2105 .get_stats = marvell_get_stats, 2106 }, 2107 { 2108 .phy_id = MARVELL_PHY_ID_88E1318S, 2109 .phy_id_mask = MARVELL_PHY_ID_MASK, 2110 .name = "Marvell 88E1318S", 2111 .features = PHY_GBIT_FEATURES, 2112 .flags = PHY_HAS_INTERRUPT, 2113 .probe = marvell_probe, 2114 .config_init = &m88e1318_config_init, 2115 .config_aneg = &m88e1318_config_aneg, 2116 .read_status = &marvell_read_status, 2117 .ack_interrupt = &marvell_ack_interrupt, 2118 .config_intr = &marvell_config_intr, 2119 .did_interrupt = &m88e1121_did_interrupt, 2120 .get_wol = &m88e1318_get_wol, 2121 .set_wol = &m88e1318_set_wol, 2122 .resume = &genphy_resume, 2123 .suspend = &genphy_suspend, 2124 .read_page = marvell_read_page, 2125 .write_page = marvell_write_page, 2126 .get_sset_count = marvell_get_sset_count, 2127 .get_strings = marvell_get_strings, 2128 .get_stats = marvell_get_stats, 2129 }, 2130 { 2131 .phy_id = MARVELL_PHY_ID_88E1145, 2132 .phy_id_mask = MARVELL_PHY_ID_MASK, 2133 .name = "Marvell 88E1145", 2134 .features = PHY_GBIT_FEATURES, 2135 .flags = PHY_HAS_INTERRUPT, 2136 .probe = marvell_probe, 2137 .config_init = &m88e1145_config_init, 2138 .config_aneg = &m88e1101_config_aneg, 2139 .read_status = &genphy_read_status, 2140 .ack_interrupt = &marvell_ack_interrupt, 2141 .config_intr = &marvell_config_intr, 2142 .resume = &genphy_resume, 2143 .suspend = &genphy_suspend, 2144 .read_page = marvell_read_page, 2145 .write_page = marvell_write_page, 2146 .get_sset_count = marvell_get_sset_count, 2147 .get_strings = marvell_get_strings, 2148 .get_stats = marvell_get_stats, 2149 }, 2150 { 2151 .phy_id = MARVELL_PHY_ID_88E1149R, 2152 .phy_id_mask = MARVELL_PHY_ID_MASK, 2153 .name = "Marvell 88E1149R", 2154 .features = PHY_GBIT_FEATURES, 2155 .flags = PHY_HAS_INTERRUPT, 2156 .probe = marvell_probe, 2157 .config_init = &m88e1149_config_init, 2158 .config_aneg = &m88e1118_config_aneg, 2159 .ack_interrupt = &marvell_ack_interrupt, 2160 .config_intr = &marvell_config_intr, 2161 .resume = &genphy_resume, 2162 .suspend = &genphy_suspend, 2163 .read_page = marvell_read_page, 2164 .write_page = marvell_write_page, 2165 .get_sset_count = marvell_get_sset_count, 2166 .get_strings = marvell_get_strings, 2167 .get_stats = marvell_get_stats, 2168 }, 2169 { 2170 .phy_id = MARVELL_PHY_ID_88E1240, 2171 .phy_id_mask = MARVELL_PHY_ID_MASK, 2172 .name = "Marvell 88E1240", 2173 .features = PHY_GBIT_FEATURES, 2174 .flags = PHY_HAS_INTERRUPT, 2175 .probe = marvell_probe, 2176 .config_init = &m88e1111_config_init, 2177 .config_aneg = &marvell_config_aneg, 2178 .ack_interrupt = &marvell_ack_interrupt, 2179 .config_intr = &marvell_config_intr, 2180 .resume = &genphy_resume, 2181 .suspend = &genphy_suspend, 2182 .read_page = marvell_read_page, 2183 .write_page = marvell_write_page, 2184 .get_sset_count = marvell_get_sset_count, 2185 .get_strings = marvell_get_strings, 2186 .get_stats = marvell_get_stats, 2187 }, 2188 { 2189 .phy_id = MARVELL_PHY_ID_88E1116R, 2190 .phy_id_mask = MARVELL_PHY_ID_MASK, 2191 .name = "Marvell 88E1116R", 2192 .features = PHY_GBIT_FEATURES, 2193 .flags = PHY_HAS_INTERRUPT, 2194 .probe = marvell_probe, 2195 .config_init = &m88e1116r_config_init, 2196 .ack_interrupt = &marvell_ack_interrupt, 2197 .config_intr = &marvell_config_intr, 2198 .resume = &genphy_resume, 2199 .suspend = &genphy_suspend, 2200 .read_page = marvell_read_page, 2201 .write_page = marvell_write_page, 2202 .get_sset_count = marvell_get_sset_count, 2203 .get_strings = marvell_get_strings, 2204 .get_stats = marvell_get_stats, 2205 }, 2206 { 2207 .phy_id = MARVELL_PHY_ID_88E1510, 2208 .phy_id_mask = MARVELL_PHY_ID_MASK, 2209 .name = "Marvell 88E1510", 2210 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE, 2211 .flags = PHY_HAS_INTERRUPT, 2212 .probe = &m88e1510_probe, 2213 .config_init = &m88e1510_config_init, 2214 .config_aneg = &m88e1510_config_aneg, 2215 .read_status = &marvell_read_status, 2216 .ack_interrupt = &marvell_ack_interrupt, 2217 .config_intr = &marvell_config_intr, 2218 .did_interrupt = &m88e1121_did_interrupt, 2219 .get_wol = &m88e1318_get_wol, 2220 .set_wol = &m88e1318_set_wol, 2221 .resume = &marvell_resume, 2222 .suspend = &marvell_suspend, 2223 .read_page = marvell_read_page, 2224 .write_page = marvell_write_page, 2225 .get_sset_count = marvell_get_sset_count, 2226 .get_strings = marvell_get_strings, 2227 .get_stats = marvell_get_stats, 2228 .set_loopback = genphy_loopback, 2229 }, 2230 { 2231 .phy_id = MARVELL_PHY_ID_88E1540, 2232 .phy_id_mask = MARVELL_PHY_ID_MASK, 2233 .name = "Marvell 88E1540", 2234 .features = PHY_GBIT_FEATURES, 2235 .flags = PHY_HAS_INTERRUPT, 2236 .probe = m88e1510_probe, 2237 .config_init = &marvell_config_init, 2238 .config_aneg = &m88e1510_config_aneg, 2239 .read_status = &marvell_read_status, 2240 .ack_interrupt = &marvell_ack_interrupt, 2241 .config_intr = &marvell_config_intr, 2242 .did_interrupt = &m88e1121_did_interrupt, 2243 .resume = &genphy_resume, 2244 .suspend = &genphy_suspend, 2245 .read_page = marvell_read_page, 2246 .write_page = marvell_write_page, 2247 .get_sset_count = marvell_get_sset_count, 2248 .get_strings = marvell_get_strings, 2249 .get_stats = marvell_get_stats, 2250 }, 2251 { 2252 .phy_id = MARVELL_PHY_ID_88E1545, 2253 .phy_id_mask = MARVELL_PHY_ID_MASK, 2254 .name = "Marvell 88E1545", 2255 .probe = m88e1510_probe, 2256 .features = PHY_GBIT_FEATURES, 2257 .flags = PHY_HAS_INTERRUPT, 2258 .config_init = &marvell_config_init, 2259 .config_aneg = &m88e1510_config_aneg, 2260 .read_status = &marvell_read_status, 2261 .ack_interrupt = &marvell_ack_interrupt, 2262 .config_intr = &marvell_config_intr, 2263 .did_interrupt = &m88e1121_did_interrupt, 2264 .resume = &genphy_resume, 2265 .suspend = &genphy_suspend, 2266 .read_page = marvell_read_page, 2267 .write_page = marvell_write_page, 2268 .get_sset_count = marvell_get_sset_count, 2269 .get_strings = marvell_get_strings, 2270 .get_stats = marvell_get_stats, 2271 }, 2272 { 2273 .phy_id = MARVELL_PHY_ID_88E3016, 2274 .phy_id_mask = MARVELL_PHY_ID_MASK, 2275 .name = "Marvell 88E3016", 2276 .features = PHY_BASIC_FEATURES, 2277 .flags = PHY_HAS_INTERRUPT, 2278 .probe = marvell_probe, 2279 .config_init = &m88e3016_config_init, 2280 .aneg_done = &marvell_aneg_done, 2281 .read_status = &marvell_read_status, 2282 .ack_interrupt = &marvell_ack_interrupt, 2283 .config_intr = &marvell_config_intr, 2284 .did_interrupt = &m88e1121_did_interrupt, 2285 .resume = &genphy_resume, 2286 .suspend = &genphy_suspend, 2287 .read_page = marvell_read_page, 2288 .write_page = marvell_write_page, 2289 .get_sset_count = marvell_get_sset_count, 2290 .get_strings = marvell_get_strings, 2291 .get_stats = marvell_get_stats, 2292 }, 2293 { 2294 .phy_id = MARVELL_PHY_ID_88E6390, 2295 .phy_id_mask = MARVELL_PHY_ID_MASK, 2296 .name = "Marvell 88E6390", 2297 .features = PHY_GBIT_FEATURES, 2298 .flags = PHY_HAS_INTERRUPT, 2299 .probe = m88e6390_probe, 2300 .config_init = &marvell_config_init, 2301 .config_aneg = &m88e1510_config_aneg, 2302 .read_status = &marvell_read_status, 2303 .ack_interrupt = &marvell_ack_interrupt, 2304 .config_intr = &marvell_config_intr, 2305 .did_interrupt = &m88e1121_did_interrupt, 2306 .resume = &genphy_resume, 2307 .suspend = &genphy_suspend, 2308 .read_page = marvell_read_page, 2309 .write_page = marvell_write_page, 2310 .get_sset_count = marvell_get_sset_count, 2311 .get_strings = marvell_get_strings, 2312 .get_stats = marvell_get_stats, 2313 }, 2314 }; 2315 2316 module_phy_driver(marvell_drivers); 2317 2318 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2319 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2320 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2321 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2322 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2323 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2324 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2325 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2326 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2327 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2328 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2329 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2330 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2331 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2332 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2333 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2334 { } 2335 }; 2336 2337 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2338