1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13 #include <linux/kernel.h> 14 #include <linux/string.h> 15 #include <linux/ctype.h> 16 #include <linux/errno.h> 17 #include <linux/unistd.h> 18 #include <linux/hwmon.h> 19 #include <linux/interrupt.h> 20 #include <linux/init.h> 21 #include <linux/delay.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/skbuff.h> 25 #include <linux/spinlock.h> 26 #include <linux/mm.h> 27 #include <linux/module.h> 28 #include <linux/mii.h> 29 #include <linux/ethtool.h> 30 #include <linux/phy.h> 31 #include <linux/marvell_phy.h> 32 #include <linux/bitfield.h> 33 #include <linux/of.h> 34 35 #include <linux/io.h> 36 #include <asm/irq.h> 37 #include <linux/uaccess.h> 38 39 #define MII_MARVELL_PHY_PAGE 22 40 #define MII_MARVELL_COPPER_PAGE 0x00 41 #define MII_MARVELL_FIBER_PAGE 0x01 42 #define MII_MARVELL_MSCR_PAGE 0x02 43 #define MII_MARVELL_LED_PAGE 0x03 44 #define MII_MARVELL_MISC_TEST_PAGE 0x06 45 #define MII_MARVELL_WOL_PAGE 0x11 46 47 #define MII_M1011_IEVENT 0x13 48 #define MII_M1011_IEVENT_CLEAR 0x0000 49 50 #define MII_M1011_IMASK 0x12 51 #define MII_M1011_IMASK_INIT 0x6400 52 #define MII_M1011_IMASK_CLEAR 0x0000 53 54 #define MII_M1011_PHY_SCR 0x10 55 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 56 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12 57 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800 58 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 59 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 60 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 61 62 #define MII_M1111_PHY_LED_CONTROL 0x18 63 #define MII_M1111_PHY_LED_DIRECT 0x4100 64 #define MII_M1111_PHY_LED_COMBINE 0x411c 65 #define MII_M1111_PHY_EXT_CR 0x14 66 #define MII_M1111_RGMII_RX_DELAY BIT(7) 67 #define MII_M1111_RGMII_TX_DELAY BIT(1) 68 #define MII_M1111_PHY_EXT_SR 0x1b 69 70 #define MII_M1111_HWCFG_MODE_MASK 0xf 71 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 72 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 73 #define MII_M1111_HWCFG_MODE_RTBI 0x7 74 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 75 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 76 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 77 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 78 79 #define MII_88E1121_PHY_MSCR_REG 21 80 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 81 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 82 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 83 84 #define MII_88E1121_MISC_TEST 0x1a 85 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 86 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 87 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 88 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 89 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 90 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 91 92 #define MII_88E1510_TEMP_SENSOR 0x1b 93 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 94 95 #define MII_88E1540_COPPER_CTRL3 0x1a 96 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) 97 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 98 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 99 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 100 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 101 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) 102 103 #define MII_88E6390_MISC_TEST 0x1b 104 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 105 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 106 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 107 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 108 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 109 110 #define MII_88E6390_TEMP_SENSOR 0x1c 111 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 112 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 113 114 #define MII_88E1318S_PHY_MSCR1_REG 16 115 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 116 117 /* Copper Specific Interrupt Enable Register */ 118 #define MII_88E1318S_PHY_CSIER 0x12 119 /* WOL Event Interrupt Enable */ 120 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 121 122 /* LED Timer Control Register */ 123 #define MII_88E1318S_PHY_LED_TCR 0x12 124 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 125 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 126 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 127 128 /* Magic Packet MAC address registers */ 129 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 130 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 131 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 132 133 #define MII_88E1318S_PHY_WOL_CTRL 0x10 134 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 135 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 136 137 #define MII_PHY_LED_CTRL 16 138 #define MII_88E1121_PHY_LED_DEF 0x0030 139 #define MII_88E1510_PHY_LED_DEF 0x1177 140 141 #define MII_M1011_PHY_STATUS 0x11 142 #define MII_M1011_PHY_STATUS_1000 0x8000 143 #define MII_M1011_PHY_STATUS_100 0x4000 144 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 145 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 146 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 147 #define MII_M1011_PHY_STATUS_LINK 0x0400 148 149 #define MII_88E3016_PHY_SPEC_CTRL 0x10 150 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 151 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 152 153 #define MII_88E1510_GEN_CTRL_REG_1 0x14 154 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 155 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 156 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 157 158 #define LPA_FIBER_1000HALF 0x40 159 #define LPA_FIBER_1000FULL 0x20 160 161 #define LPA_PAUSE_FIBER 0x180 162 #define LPA_PAUSE_ASYM_FIBER 0x100 163 164 #define ADVERTISE_FIBER_1000HALF 0x40 165 #define ADVERTISE_FIBER_1000FULL 0x20 166 167 #define ADVERTISE_PAUSE_FIBER 0x180 168 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 169 170 #define REGISTER_LINK_STATUS 0x400 171 #define NB_FIBER_STATS 1 172 173 MODULE_DESCRIPTION("Marvell PHY driver"); 174 MODULE_AUTHOR("Andy Fleming"); 175 MODULE_LICENSE("GPL"); 176 177 struct marvell_hw_stat { 178 const char *string; 179 u8 page; 180 u8 reg; 181 u8 bits; 182 }; 183 184 static struct marvell_hw_stat marvell_hw_stats[] = { 185 { "phy_receive_errors_copper", 0, 21, 16}, 186 { "phy_idle_errors", 0, 10, 8 }, 187 { "phy_receive_errors_fiber", 1, 21, 16}, 188 }; 189 190 struct marvell_priv { 191 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 192 char *hwmon_name; 193 struct device *hwmon_dev; 194 }; 195 196 static int marvell_read_page(struct phy_device *phydev) 197 { 198 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 199 } 200 201 static int marvell_write_page(struct phy_device *phydev, int page) 202 { 203 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 204 } 205 206 static int marvell_set_page(struct phy_device *phydev, int page) 207 { 208 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 209 } 210 211 static int marvell_ack_interrupt(struct phy_device *phydev) 212 { 213 int err; 214 215 /* Clear the interrupts by reading the reg */ 216 err = phy_read(phydev, MII_M1011_IEVENT); 217 218 if (err < 0) 219 return err; 220 221 return 0; 222 } 223 224 static int marvell_config_intr(struct phy_device *phydev) 225 { 226 int err; 227 228 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 229 err = phy_write(phydev, MII_M1011_IMASK, 230 MII_M1011_IMASK_INIT); 231 else 232 err = phy_write(phydev, MII_M1011_IMASK, 233 MII_M1011_IMASK_CLEAR); 234 235 return err; 236 } 237 238 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 239 { 240 int reg; 241 int err; 242 int val; 243 244 /* get the current settings */ 245 reg = phy_read(phydev, MII_M1011_PHY_SCR); 246 if (reg < 0) 247 return reg; 248 249 val = reg; 250 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 251 switch (polarity) { 252 case ETH_TP_MDI: 253 val |= MII_M1011_PHY_SCR_MDI; 254 break; 255 case ETH_TP_MDI_X: 256 val |= MII_M1011_PHY_SCR_MDI_X; 257 break; 258 case ETH_TP_MDI_AUTO: 259 case ETH_TP_MDI_INVALID: 260 default: 261 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 262 break; 263 } 264 265 if (val != reg) { 266 /* Set the new polarity value in the register */ 267 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 268 if (err) 269 return err; 270 } 271 272 return val != reg; 273 } 274 275 static int marvell_set_downshift(struct phy_device *phydev, bool enable, 276 u8 retries) 277 { 278 int reg; 279 280 reg = phy_read(phydev, MII_M1011_PHY_SCR); 281 if (reg < 0) 282 return reg; 283 284 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK; 285 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT); 286 if (enable) 287 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN; 288 289 return phy_write(phydev, MII_M1011_PHY_SCR, reg); 290 } 291 292 static int marvell_config_aneg(struct phy_device *phydev) 293 { 294 int changed = 0; 295 int err; 296 297 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 298 if (err < 0) 299 return err; 300 301 changed = err; 302 303 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 304 MII_M1111_PHY_LED_DIRECT); 305 if (err < 0) 306 return err; 307 308 err = genphy_config_aneg(phydev); 309 if (err < 0) 310 return err; 311 312 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 313 /* A write to speed/duplex bits (that is performed by 314 * genphy_config_aneg() call above) must be followed by 315 * a software reset. Otherwise, the write has no effect. 316 */ 317 err = genphy_soft_reset(phydev); 318 if (err < 0) 319 return err; 320 } 321 322 return 0; 323 } 324 325 static int m88e1101_config_aneg(struct phy_device *phydev) 326 { 327 int err; 328 329 /* This Marvell PHY has an errata which requires 330 * that certain registers get written in order 331 * to restart autonegotiation 332 */ 333 err = genphy_soft_reset(phydev); 334 if (err < 0) 335 return err; 336 337 err = phy_write(phydev, 0x1d, 0x1f); 338 if (err < 0) 339 return err; 340 341 err = phy_write(phydev, 0x1e, 0x200c); 342 if (err < 0) 343 return err; 344 345 err = phy_write(phydev, 0x1d, 0x5); 346 if (err < 0) 347 return err; 348 349 err = phy_write(phydev, 0x1e, 0); 350 if (err < 0) 351 return err; 352 353 err = phy_write(phydev, 0x1e, 0x100); 354 if (err < 0) 355 return err; 356 357 return marvell_config_aneg(phydev); 358 } 359 360 #ifdef CONFIG_OF_MDIO 361 /* Set and/or override some configuration registers based on the 362 * marvell,reg-init property stored in the of_node for the phydev. 363 * 364 * marvell,reg-init = <reg-page reg mask value>,...; 365 * 366 * There may be one or more sets of <reg-page reg mask value>: 367 * 368 * reg-page: which register bank to use. 369 * reg: the register. 370 * mask: if non-zero, ANDed with existing register value. 371 * value: ORed with the masked value and written to the regiser. 372 * 373 */ 374 static int marvell_of_reg_init(struct phy_device *phydev) 375 { 376 const __be32 *paddr; 377 int len, i, saved_page, current_page, ret = 0; 378 379 if (!phydev->mdio.dev.of_node) 380 return 0; 381 382 paddr = of_get_property(phydev->mdio.dev.of_node, 383 "marvell,reg-init", &len); 384 if (!paddr || len < (4 * sizeof(*paddr))) 385 return 0; 386 387 saved_page = phy_save_page(phydev); 388 if (saved_page < 0) 389 goto err; 390 current_page = saved_page; 391 392 len /= sizeof(*paddr); 393 for (i = 0; i < len - 3; i += 4) { 394 u16 page = be32_to_cpup(paddr + i); 395 u16 reg = be32_to_cpup(paddr + i + 1); 396 u16 mask = be32_to_cpup(paddr + i + 2); 397 u16 val_bits = be32_to_cpup(paddr + i + 3); 398 int val; 399 400 if (page != current_page) { 401 current_page = page; 402 ret = marvell_write_page(phydev, page); 403 if (ret < 0) 404 goto err; 405 } 406 407 val = 0; 408 if (mask) { 409 val = __phy_read(phydev, reg); 410 if (val < 0) { 411 ret = val; 412 goto err; 413 } 414 val &= mask; 415 } 416 val |= val_bits; 417 418 ret = __phy_write(phydev, reg, val); 419 if (ret < 0) 420 goto err; 421 } 422 err: 423 return phy_restore_page(phydev, saved_page, ret); 424 } 425 #else 426 static int marvell_of_reg_init(struct phy_device *phydev) 427 { 428 return 0; 429 } 430 #endif /* CONFIG_OF_MDIO */ 431 432 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 433 { 434 int mscr; 435 436 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 437 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 438 MII_88E1121_PHY_MSCR_TX_DELAY; 439 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 440 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 441 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 442 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 443 else 444 mscr = 0; 445 446 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 447 MII_88E1121_PHY_MSCR_REG, 448 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 449 } 450 451 static int m88e1121_config_aneg(struct phy_device *phydev) 452 { 453 int changed = 0; 454 int err = 0; 455 456 if (phy_interface_is_rgmii(phydev)) { 457 err = m88e1121_config_aneg_rgmii_delays(phydev); 458 if (err < 0) 459 return err; 460 } 461 462 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 463 if (err < 0) 464 return err; 465 466 changed = err; 467 468 err = genphy_config_aneg(phydev); 469 if (err < 0) 470 return err; 471 472 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 473 /* A software reset is used to ensure a "commit" of the 474 * changes is done. 475 */ 476 err = genphy_soft_reset(phydev); 477 if (err < 0) 478 return err; 479 } 480 481 return 0; 482 } 483 484 static int m88e1318_config_aneg(struct phy_device *phydev) 485 { 486 int err; 487 488 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 489 MII_88E1318S_PHY_MSCR1_REG, 490 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 491 if (err < 0) 492 return err; 493 494 return m88e1121_config_aneg(phydev); 495 } 496 497 /** 498 * linkmode_adv_to_fiber_adv_t 499 * @advertise: the linkmode advertisement settings 500 * 501 * A small helper function that translates linkmode advertisement 502 * settings to phy autonegotiation advertisements for the MII_ADV 503 * register for fiber link. 504 */ 505 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 506 { 507 u32 result = 0; 508 509 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 510 result |= ADVERTISE_FIBER_1000HALF; 511 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 512 result |= ADVERTISE_FIBER_1000FULL; 513 514 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 515 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 516 result |= LPA_PAUSE_ASYM_FIBER; 517 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 518 result |= (ADVERTISE_PAUSE_FIBER 519 & (~ADVERTISE_PAUSE_ASYM_FIBER)); 520 521 return result; 522 } 523 524 /** 525 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 526 * @phydev: target phy_device struct 527 * 528 * Description: If auto-negotiation is enabled, we configure the 529 * advertising, and then restart auto-negotiation. If it is not 530 * enabled, then we write the BMCR. Adapted for fiber link in 531 * some Marvell's devices. 532 */ 533 static int marvell_config_aneg_fiber(struct phy_device *phydev) 534 { 535 int changed = 0; 536 int err; 537 int adv, oldadv; 538 539 if (phydev->autoneg != AUTONEG_ENABLE) 540 return genphy_setup_forced(phydev); 541 542 /* Only allow advertising what this PHY supports */ 543 linkmode_and(phydev->advertising, phydev->advertising, 544 phydev->supported); 545 546 /* Setup fiber advertisement */ 547 adv = phy_read(phydev, MII_ADVERTISE); 548 if (adv < 0) 549 return adv; 550 551 oldadv = adv; 552 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL 553 | LPA_PAUSE_FIBER); 554 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising); 555 556 if (adv != oldadv) { 557 err = phy_write(phydev, MII_ADVERTISE, adv); 558 if (err < 0) 559 return err; 560 561 changed = 1; 562 } 563 564 if (changed == 0) { 565 /* Advertisement hasn't changed, but maybe aneg was never on to 566 * begin with? Or maybe phy was isolated? 567 */ 568 int ctl = phy_read(phydev, MII_BMCR); 569 570 if (ctl < 0) 571 return ctl; 572 573 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 574 changed = 1; /* do restart aneg */ 575 } 576 577 /* Only restart aneg if we are advertising something different 578 * than we were before. 579 */ 580 if (changed > 0) 581 changed = genphy_restart_aneg(phydev); 582 583 return changed; 584 } 585 586 static int m88e1510_config_aneg(struct phy_device *phydev) 587 { 588 int err; 589 590 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 591 if (err < 0) 592 goto error; 593 594 /* Configure the copper link first */ 595 err = m88e1318_config_aneg(phydev); 596 if (err < 0) 597 goto error; 598 599 /* Do not touch the fiber page if we're in copper->sgmii mode */ 600 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 601 return 0; 602 603 /* Then the fiber link */ 604 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 605 if (err < 0) 606 goto error; 607 608 err = marvell_config_aneg_fiber(phydev); 609 if (err < 0) 610 goto error; 611 612 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 613 614 error: 615 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 616 return err; 617 } 618 619 static void marvell_config_led(struct phy_device *phydev) 620 { 621 u16 def_config; 622 int err; 623 624 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 625 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 626 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 627 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 628 def_config = MII_88E1121_PHY_LED_DEF; 629 break; 630 /* Default PHY LED config: 631 * LED[0] .. 1000Mbps Link 632 * LED[1] .. 100Mbps Link 633 * LED[2] .. Blink, Activity 634 */ 635 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 636 def_config = MII_88E1510_PHY_LED_DEF; 637 break; 638 default: 639 return; 640 } 641 642 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 643 def_config); 644 if (err < 0) 645 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 646 } 647 648 static int marvell_config_init(struct phy_device *phydev) 649 { 650 /* Set defalut LED */ 651 marvell_config_led(phydev); 652 653 /* Set registers from marvell,reg-init DT property */ 654 return marvell_of_reg_init(phydev); 655 } 656 657 static int m88e1116r_config_init(struct phy_device *phydev) 658 { 659 int err; 660 661 err = genphy_soft_reset(phydev); 662 if (err < 0) 663 return err; 664 665 msleep(500); 666 667 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 668 if (err < 0) 669 return err; 670 671 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 672 if (err < 0) 673 return err; 674 675 err = marvell_set_downshift(phydev, true, 8); 676 if (err < 0) 677 return err; 678 679 if (phy_interface_is_rgmii(phydev)) { 680 err = m88e1121_config_aneg_rgmii_delays(phydev); 681 if (err < 0) 682 return err; 683 } 684 685 err = genphy_soft_reset(phydev); 686 if (err < 0) 687 return err; 688 689 return marvell_config_init(phydev); 690 } 691 692 static int m88e3016_config_init(struct phy_device *phydev) 693 { 694 int ret; 695 696 /* Enable Scrambler and Auto-Crossover */ 697 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 698 MII_88E3016_DISABLE_SCRAMBLER, 699 MII_88E3016_AUTO_MDIX_CROSSOVER); 700 if (ret < 0) 701 return ret; 702 703 return marvell_config_init(phydev); 704 } 705 706 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 707 u16 mode, 708 int fibre_copper_auto) 709 { 710 if (fibre_copper_auto) 711 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 712 713 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 714 MII_M1111_HWCFG_MODE_MASK | 715 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 716 MII_M1111_HWCFG_FIBER_COPPER_RES, 717 mode); 718 } 719 720 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 721 { 722 int delay; 723 724 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 725 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 726 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 727 delay = MII_M1111_RGMII_RX_DELAY; 728 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 729 delay = MII_M1111_RGMII_TX_DELAY; 730 } else { 731 delay = 0; 732 } 733 734 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 735 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 736 delay); 737 } 738 739 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 740 { 741 int temp; 742 int err; 743 744 err = m88e1111_config_init_rgmii_delays(phydev); 745 if (err < 0) 746 return err; 747 748 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 749 if (temp < 0) 750 return temp; 751 752 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 753 754 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 755 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 756 else 757 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 758 759 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 760 } 761 762 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 763 { 764 int err; 765 766 err = m88e1111_config_init_hwcfg_mode( 767 phydev, 768 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 769 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 770 if (err < 0) 771 return err; 772 773 /* make sure copper is selected */ 774 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 775 } 776 777 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 778 { 779 int err; 780 781 err = m88e1111_config_init_rgmii_delays(phydev); 782 if (err < 0) 783 return err; 784 785 err = m88e1111_config_init_hwcfg_mode( 786 phydev, 787 MII_M1111_HWCFG_MODE_RTBI, 788 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 789 if (err < 0) 790 return err; 791 792 /* soft reset */ 793 err = genphy_soft_reset(phydev); 794 if (err < 0) 795 return err; 796 797 return m88e1111_config_init_hwcfg_mode( 798 phydev, 799 MII_M1111_HWCFG_MODE_RTBI, 800 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 801 } 802 803 static int m88e1111_config_init(struct phy_device *phydev) 804 { 805 int err; 806 807 if (phy_interface_is_rgmii(phydev)) { 808 err = m88e1111_config_init_rgmii(phydev); 809 if (err < 0) 810 return err; 811 } 812 813 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 814 err = m88e1111_config_init_sgmii(phydev); 815 if (err < 0) 816 return err; 817 } 818 819 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 820 err = m88e1111_config_init_rtbi(phydev); 821 if (err < 0) 822 return err; 823 } 824 825 err = marvell_of_reg_init(phydev); 826 if (err < 0) 827 return err; 828 829 return genphy_soft_reset(phydev); 830 } 831 832 static int m88e1318_config_init(struct phy_device *phydev) 833 { 834 if (phy_interrupt_is_valid(phydev)) { 835 int err = phy_modify_paged( 836 phydev, MII_MARVELL_LED_PAGE, 837 MII_88E1318S_PHY_LED_TCR, 838 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 839 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 840 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 841 if (err < 0) 842 return err; 843 } 844 845 return marvell_config_init(phydev); 846 } 847 848 static int m88e1510_config_init(struct phy_device *phydev) 849 { 850 int err; 851 852 /* SGMII-to-Copper mode initialization */ 853 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 854 /* Select page 18 */ 855 err = marvell_set_page(phydev, 18); 856 if (err < 0) 857 return err; 858 859 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 860 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 861 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 862 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 863 if (err < 0) 864 return err; 865 866 /* PHY reset is necessary after changing MODE[2:0] */ 867 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 868 MII_88E1510_GEN_CTRL_REG_1_RESET); 869 if (err < 0) 870 return err; 871 872 /* Reset page selection */ 873 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 874 if (err < 0) 875 return err; 876 } 877 878 return m88e1318_config_init(phydev); 879 } 880 881 static int m88e1118_config_aneg(struct phy_device *phydev) 882 { 883 int err; 884 885 err = genphy_soft_reset(phydev); 886 if (err < 0) 887 return err; 888 889 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 890 if (err < 0) 891 return err; 892 893 err = genphy_config_aneg(phydev); 894 return 0; 895 } 896 897 static int m88e1118_config_init(struct phy_device *phydev) 898 { 899 int err; 900 901 /* Change address */ 902 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 903 if (err < 0) 904 return err; 905 906 /* Enable 1000 Mbit */ 907 err = phy_write(phydev, 0x15, 0x1070); 908 if (err < 0) 909 return err; 910 911 /* Change address */ 912 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 913 if (err < 0) 914 return err; 915 916 /* Adjust LED Control */ 917 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 918 err = phy_write(phydev, 0x10, 0x1100); 919 else 920 err = phy_write(phydev, 0x10, 0x021e); 921 if (err < 0) 922 return err; 923 924 err = marvell_of_reg_init(phydev); 925 if (err < 0) 926 return err; 927 928 /* Reset address */ 929 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 930 if (err < 0) 931 return err; 932 933 return genphy_soft_reset(phydev); 934 } 935 936 static int m88e1149_config_init(struct phy_device *phydev) 937 { 938 int err; 939 940 /* Change address */ 941 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 942 if (err < 0) 943 return err; 944 945 /* Enable 1000 Mbit */ 946 err = phy_write(phydev, 0x15, 0x1048); 947 if (err < 0) 948 return err; 949 950 err = marvell_of_reg_init(phydev); 951 if (err < 0) 952 return err; 953 954 /* Reset address */ 955 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 956 if (err < 0) 957 return err; 958 959 return genphy_soft_reset(phydev); 960 } 961 962 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 963 { 964 int err; 965 966 err = m88e1111_config_init_rgmii_delays(phydev); 967 if (err < 0) 968 return err; 969 970 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 971 err = phy_write(phydev, 0x1d, 0x0012); 972 if (err < 0) 973 return err; 974 975 err = phy_modify(phydev, 0x1e, 0x0fc0, 976 2 << 9 | /* 36 ohm */ 977 2 << 6); /* 39 ohm */ 978 if (err < 0) 979 return err; 980 981 err = phy_write(phydev, 0x1d, 0x3); 982 if (err < 0) 983 return err; 984 985 err = phy_write(phydev, 0x1e, 0x8000); 986 } 987 return err; 988 } 989 990 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 991 { 992 return m88e1111_config_init_hwcfg_mode( 993 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 994 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 995 } 996 997 static int m88e1145_config_init(struct phy_device *phydev) 998 { 999 int err; 1000 1001 /* Take care of errata E0 & E1 */ 1002 err = phy_write(phydev, 0x1d, 0x001b); 1003 if (err < 0) 1004 return err; 1005 1006 err = phy_write(phydev, 0x1e, 0x418f); 1007 if (err < 0) 1008 return err; 1009 1010 err = phy_write(phydev, 0x1d, 0x0016); 1011 if (err < 0) 1012 return err; 1013 1014 err = phy_write(phydev, 0x1e, 0xa2da); 1015 if (err < 0) 1016 return err; 1017 1018 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1019 err = m88e1145_config_init_rgmii(phydev); 1020 if (err < 0) 1021 return err; 1022 } 1023 1024 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1025 err = m88e1145_config_init_sgmii(phydev); 1026 if (err < 0) 1027 return err; 1028 } 1029 1030 err = marvell_of_reg_init(phydev); 1031 if (err < 0) 1032 return err; 1033 1034 return 0; 1035 } 1036 1037 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) 1038 { 1039 int val; 1040 1041 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); 1042 if (val < 0) 1043 return val; 1044 1045 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { 1046 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; 1047 return 0; 1048 } 1049 1050 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1051 1052 switch (val) { 1053 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: 1054 *msecs = 0; 1055 break; 1056 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: 1057 *msecs = 10; 1058 break; 1059 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: 1060 *msecs = 20; 1061 break; 1062 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: 1063 *msecs = 40; 1064 break; 1065 default: 1066 return -EINVAL; 1067 } 1068 1069 return 0; 1070 } 1071 1072 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) 1073 { 1074 struct ethtool_eee eee; 1075 int val, ret; 1076 1077 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) 1078 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, 1079 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1080 1081 /* According to the Marvell data sheet EEE must be disabled for 1082 * Fast Link Down detection to work properly 1083 */ 1084 ret = phy_ethtool_get_eee(phydev, &eee); 1085 if (!ret && eee.eee_enabled) { 1086 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); 1087 return -EBUSY; 1088 } 1089 1090 if (*msecs <= 5) 1091 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; 1092 else if (*msecs <= 15) 1093 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; 1094 else if (*msecs <= 30) 1095 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; 1096 else 1097 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; 1098 1099 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1100 1101 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, 1102 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1103 if (ret) 1104 return ret; 1105 1106 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, 1107 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1108 } 1109 1110 static int m88e1540_get_tunable(struct phy_device *phydev, 1111 struct ethtool_tunable *tuna, void *data) 1112 { 1113 switch (tuna->id) { 1114 case ETHTOOL_PHY_FAST_LINK_DOWN: 1115 return m88e1540_get_fld(phydev, data); 1116 default: 1117 return -EOPNOTSUPP; 1118 } 1119 } 1120 1121 static int m88e1540_set_tunable(struct phy_device *phydev, 1122 struct ethtool_tunable *tuna, const void *data) 1123 { 1124 switch (tuna->id) { 1125 case ETHTOOL_PHY_FAST_LINK_DOWN: 1126 return m88e1540_set_fld(phydev, data); 1127 default: 1128 return -EOPNOTSUPP; 1129 } 1130 } 1131 1132 /* The VOD can be out of specification on link up. Poke an 1133 * undocumented register, in an undocumented page, with a magic value 1134 * to fix this. 1135 */ 1136 static int m88e6390_errata(struct phy_device *phydev) 1137 { 1138 int err; 1139 1140 err = phy_write(phydev, MII_BMCR, 1141 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1142 if (err) 1143 return err; 1144 1145 usleep_range(300, 400); 1146 1147 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1148 if (err) 1149 return err; 1150 1151 return genphy_soft_reset(phydev); 1152 } 1153 1154 static int m88e6390_config_aneg(struct phy_device *phydev) 1155 { 1156 int err; 1157 1158 err = m88e6390_errata(phydev); 1159 if (err) 1160 return err; 1161 1162 return m88e1510_config_aneg(phydev); 1163 } 1164 1165 /** 1166 * fiber_lpa_mod_linkmode_lpa_t 1167 * @advertising: the linkmode advertisement settings 1168 * @lpa: value of the MII_LPA register for fiber link 1169 * 1170 * A small helper function that translates MII_LPA bits to linkmode LP 1171 * advertisement settings. Other bits in advertising are left 1172 * unchanged. 1173 */ 1174 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1175 { 1176 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1177 advertising, lpa & LPA_FIBER_1000HALF); 1178 1179 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1180 advertising, lpa & LPA_FIBER_1000FULL); 1181 } 1182 1183 /** 1184 * marvell_update_link - update link status in real time in @phydev 1185 * @phydev: target phy_device struct 1186 * 1187 * Description: Update the value in phydev->link to reflect the 1188 * current link value. 1189 */ 1190 static int marvell_update_link(struct phy_device *phydev, int fiber) 1191 { 1192 int status; 1193 1194 /* Use the generic register for copper link, or specific 1195 * register for fiber case 1196 */ 1197 if (fiber) { 1198 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1199 if (status < 0) 1200 return status; 1201 1202 if ((status & REGISTER_LINK_STATUS) == 0) 1203 phydev->link = 0; 1204 else 1205 phydev->link = 1; 1206 } else { 1207 return genphy_update_link(phydev); 1208 } 1209 1210 return 0; 1211 } 1212 1213 static int marvell_read_status_page_an(struct phy_device *phydev, 1214 int fiber) 1215 { 1216 int status; 1217 int lpa; 1218 int lpagb; 1219 1220 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1221 if (status < 0) 1222 return status; 1223 1224 lpa = phy_read(phydev, MII_LPA); 1225 if (lpa < 0) 1226 return lpa; 1227 1228 lpagb = phy_read(phydev, MII_STAT1000); 1229 if (lpagb < 0) 1230 return lpagb; 1231 1232 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1233 phydev->duplex = DUPLEX_FULL; 1234 else 1235 phydev->duplex = DUPLEX_HALF; 1236 1237 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 1238 phydev->pause = 0; 1239 phydev->asym_pause = 0; 1240 1241 switch (status) { 1242 case MII_M1011_PHY_STATUS_1000: 1243 phydev->speed = SPEED_1000; 1244 break; 1245 1246 case MII_M1011_PHY_STATUS_100: 1247 phydev->speed = SPEED_100; 1248 break; 1249 1250 default: 1251 phydev->speed = SPEED_10; 1252 break; 1253 } 1254 1255 if (!fiber) { 1256 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa); 1257 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb); 1258 1259 if (phydev->duplex == DUPLEX_FULL) { 1260 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 1261 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 1262 } 1263 } else { 1264 /* The fiber link is only 1000M capable */ 1265 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1266 1267 if (phydev->duplex == DUPLEX_FULL) { 1268 if (!(lpa & LPA_PAUSE_FIBER)) { 1269 phydev->pause = 0; 1270 phydev->asym_pause = 0; 1271 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1272 phydev->pause = 1; 1273 phydev->asym_pause = 1; 1274 } else { 1275 phydev->pause = 1; 1276 phydev->asym_pause = 0; 1277 } 1278 } 1279 } 1280 return 0; 1281 } 1282 1283 static int marvell_read_status_page_fixed(struct phy_device *phydev) 1284 { 1285 int bmcr = phy_read(phydev, MII_BMCR); 1286 1287 if (bmcr < 0) 1288 return bmcr; 1289 1290 if (bmcr & BMCR_FULLDPLX) 1291 phydev->duplex = DUPLEX_FULL; 1292 else 1293 phydev->duplex = DUPLEX_HALF; 1294 1295 if (bmcr & BMCR_SPEED1000) 1296 phydev->speed = SPEED_1000; 1297 else if (bmcr & BMCR_SPEED100) 1298 phydev->speed = SPEED_100; 1299 else 1300 phydev->speed = SPEED_10; 1301 1302 phydev->pause = 0; 1303 phydev->asym_pause = 0; 1304 linkmode_zero(phydev->lp_advertising); 1305 1306 return 0; 1307 } 1308 1309 /* marvell_read_status_page 1310 * 1311 * Description: 1312 * Check the link, then figure out the current state 1313 * by comparing what we advertise with what the link partner 1314 * advertises. Start by checking the gigabit possibilities, 1315 * then move on to 10/100. 1316 */ 1317 static int marvell_read_status_page(struct phy_device *phydev, int page) 1318 { 1319 int fiber; 1320 int err; 1321 1322 /* Detect and update the link, but return if there 1323 * was an error 1324 */ 1325 if (page == MII_MARVELL_FIBER_PAGE) 1326 fiber = 1; 1327 else 1328 fiber = 0; 1329 1330 err = marvell_update_link(phydev, fiber); 1331 if (err) 1332 return err; 1333 1334 if (phydev->autoneg == AUTONEG_ENABLE) 1335 err = marvell_read_status_page_an(phydev, fiber); 1336 else 1337 err = marvell_read_status_page_fixed(phydev); 1338 1339 return err; 1340 } 1341 1342 /* marvell_read_status 1343 * 1344 * Some Marvell's phys have two modes: fiber and copper. 1345 * Both need status checked. 1346 * Description: 1347 * First, check the fiber link and status. 1348 * If the fiber link is down, check the copper link and status which 1349 * will be the default value if both link are down. 1350 */ 1351 static int marvell_read_status(struct phy_device *phydev) 1352 { 1353 int err; 1354 1355 /* Check the fiber mode first */ 1356 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1357 phydev->supported) && 1358 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1359 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1360 if (err < 0) 1361 goto error; 1362 1363 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1364 if (err < 0) 1365 goto error; 1366 1367 /* If the fiber link is up, it is the selected and 1368 * used link. In this case, we need to stay in the 1369 * fiber page. Please to be careful about that, avoid 1370 * to restore Copper page in other functions which 1371 * could break the behaviour for some fiber phy like 1372 * 88E1512. 1373 */ 1374 if (phydev->link) 1375 return 0; 1376 1377 /* If fiber link is down, check and save copper mode state */ 1378 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1379 if (err < 0) 1380 goto error; 1381 } 1382 1383 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1384 1385 error: 1386 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1387 return err; 1388 } 1389 1390 /* marvell_suspend 1391 * 1392 * Some Marvell's phys have two modes: fiber and copper. 1393 * Both need to be suspended 1394 */ 1395 static int marvell_suspend(struct phy_device *phydev) 1396 { 1397 int err; 1398 1399 /* Suspend the fiber mode first */ 1400 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1401 phydev->supported)) { 1402 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1403 if (err < 0) 1404 goto error; 1405 1406 /* With the page set, use the generic suspend */ 1407 err = genphy_suspend(phydev); 1408 if (err < 0) 1409 goto error; 1410 1411 /* Then, the copper link */ 1412 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1413 if (err < 0) 1414 goto error; 1415 } 1416 1417 /* With the page set, use the generic suspend */ 1418 return genphy_suspend(phydev); 1419 1420 error: 1421 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1422 return err; 1423 } 1424 1425 /* marvell_resume 1426 * 1427 * Some Marvell's phys have two modes: fiber and copper. 1428 * Both need to be resumed 1429 */ 1430 static int marvell_resume(struct phy_device *phydev) 1431 { 1432 int err; 1433 1434 /* Resume the fiber mode first */ 1435 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1436 phydev->supported)) { 1437 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1438 if (err < 0) 1439 goto error; 1440 1441 /* With the page set, use the generic resume */ 1442 err = genphy_resume(phydev); 1443 if (err < 0) 1444 goto error; 1445 1446 /* Then, the copper link */ 1447 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1448 if (err < 0) 1449 goto error; 1450 } 1451 1452 /* With the page set, use the generic resume */ 1453 return genphy_resume(phydev); 1454 1455 error: 1456 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1457 return err; 1458 } 1459 1460 static int marvell_aneg_done(struct phy_device *phydev) 1461 { 1462 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1463 1464 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1465 } 1466 1467 static int m88e1121_did_interrupt(struct phy_device *phydev) 1468 { 1469 int imask; 1470 1471 imask = phy_read(phydev, MII_M1011_IEVENT); 1472 1473 if (imask & MII_M1011_IMASK_INIT) 1474 return 1; 1475 1476 return 0; 1477 } 1478 1479 static void m88e1318_get_wol(struct phy_device *phydev, 1480 struct ethtool_wolinfo *wol) 1481 { 1482 int oldpage, ret = 0; 1483 1484 wol->supported = WAKE_MAGIC; 1485 wol->wolopts = 0; 1486 1487 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1488 if (oldpage < 0) 1489 goto error; 1490 1491 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1492 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1493 wol->wolopts |= WAKE_MAGIC; 1494 1495 error: 1496 phy_restore_page(phydev, oldpage, ret); 1497 } 1498 1499 static int m88e1318_set_wol(struct phy_device *phydev, 1500 struct ethtool_wolinfo *wol) 1501 { 1502 int err = 0, oldpage; 1503 1504 oldpage = phy_save_page(phydev); 1505 if (oldpage < 0) 1506 goto error; 1507 1508 if (wol->wolopts & WAKE_MAGIC) { 1509 /* Explicitly switch to page 0x00, just to be sure */ 1510 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1511 if (err < 0) 1512 goto error; 1513 1514 /* If WOL event happened once, the LED[2] interrupt pin 1515 * will not be cleared unless we reading the interrupt status 1516 * register. If interrupts are in use, the normal interrupt 1517 * handling will clear the WOL event. Clear the WOL event 1518 * before enabling it if !phy_interrupt_is_valid() 1519 */ 1520 if (!phy_interrupt_is_valid(phydev)) 1521 __phy_read(phydev, MII_M1011_IEVENT); 1522 1523 /* Enable the WOL interrupt */ 1524 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1525 MII_88E1318S_PHY_CSIER_WOL_EIE); 1526 if (err < 0) 1527 goto error; 1528 1529 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1530 if (err < 0) 1531 goto error; 1532 1533 /* Setup LED[2] as interrupt pin (active low) */ 1534 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1535 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1536 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1537 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1538 if (err < 0) 1539 goto error; 1540 1541 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1542 if (err < 0) 1543 goto error; 1544 1545 /* Store the device address for the magic packet */ 1546 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1547 ((phydev->attached_dev->dev_addr[5] << 8) | 1548 phydev->attached_dev->dev_addr[4])); 1549 if (err < 0) 1550 goto error; 1551 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1552 ((phydev->attached_dev->dev_addr[3] << 8) | 1553 phydev->attached_dev->dev_addr[2])); 1554 if (err < 0) 1555 goto error; 1556 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1557 ((phydev->attached_dev->dev_addr[1] << 8) | 1558 phydev->attached_dev->dev_addr[0])); 1559 if (err < 0) 1560 goto error; 1561 1562 /* Clear WOL status and enable magic packet matching */ 1563 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1564 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1565 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1566 if (err < 0) 1567 goto error; 1568 } else { 1569 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1570 if (err < 0) 1571 goto error; 1572 1573 /* Clear WOL status and disable magic packet matching */ 1574 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1575 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1576 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1577 if (err < 0) 1578 goto error; 1579 } 1580 1581 error: 1582 return phy_restore_page(phydev, oldpage, err); 1583 } 1584 1585 static int marvell_get_sset_count(struct phy_device *phydev) 1586 { 1587 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1588 phydev->supported)) 1589 return ARRAY_SIZE(marvell_hw_stats); 1590 else 1591 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1592 } 1593 1594 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1595 { 1596 int i; 1597 1598 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) { 1599 strlcpy(data + i * ETH_GSTRING_LEN, 1600 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1601 } 1602 } 1603 1604 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1605 { 1606 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1607 struct marvell_priv *priv = phydev->priv; 1608 int val; 1609 u64 ret; 1610 1611 val = phy_read_paged(phydev, stat.page, stat.reg); 1612 if (val < 0) { 1613 ret = U64_MAX; 1614 } else { 1615 val = val & ((1 << stat.bits) - 1); 1616 priv->stats[i] += val; 1617 ret = priv->stats[i]; 1618 } 1619 1620 return ret; 1621 } 1622 1623 static void marvell_get_stats(struct phy_device *phydev, 1624 struct ethtool_stats *stats, u64 *data) 1625 { 1626 int i; 1627 1628 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) 1629 data[i] = marvell_get_stat(phydev, i); 1630 } 1631 1632 #ifdef CONFIG_HWMON 1633 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1634 { 1635 int oldpage; 1636 int ret = 0; 1637 int val; 1638 1639 *temp = 0; 1640 1641 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1642 if (oldpage < 0) 1643 goto error; 1644 1645 /* Enable temperature sensor */ 1646 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1647 if (ret < 0) 1648 goto error; 1649 1650 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1651 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1652 if (ret < 0) 1653 goto error; 1654 1655 /* Wait for temperature to stabilize */ 1656 usleep_range(10000, 12000); 1657 1658 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1659 if (val < 0) { 1660 ret = val; 1661 goto error; 1662 } 1663 1664 /* Disable temperature sensor */ 1665 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1666 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1667 if (ret < 0) 1668 goto error; 1669 1670 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1671 1672 error: 1673 return phy_restore_page(phydev, oldpage, ret); 1674 } 1675 1676 static int m88e1121_hwmon_read(struct device *dev, 1677 enum hwmon_sensor_types type, 1678 u32 attr, int channel, long *temp) 1679 { 1680 struct phy_device *phydev = dev_get_drvdata(dev); 1681 int err; 1682 1683 switch (attr) { 1684 case hwmon_temp_input: 1685 err = m88e1121_get_temp(phydev, temp); 1686 break; 1687 default: 1688 return -EOPNOTSUPP; 1689 } 1690 1691 return err; 1692 } 1693 1694 static umode_t m88e1121_hwmon_is_visible(const void *data, 1695 enum hwmon_sensor_types type, 1696 u32 attr, int channel) 1697 { 1698 if (type != hwmon_temp) 1699 return 0; 1700 1701 switch (attr) { 1702 case hwmon_temp_input: 1703 return 0444; 1704 default: 1705 return 0; 1706 } 1707 } 1708 1709 static u32 m88e1121_hwmon_chip_config[] = { 1710 HWMON_C_REGISTER_TZ, 1711 0 1712 }; 1713 1714 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1715 .type = hwmon_chip, 1716 .config = m88e1121_hwmon_chip_config, 1717 }; 1718 1719 static u32 m88e1121_hwmon_temp_config[] = { 1720 HWMON_T_INPUT, 1721 0 1722 }; 1723 1724 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1725 .type = hwmon_temp, 1726 .config = m88e1121_hwmon_temp_config, 1727 }; 1728 1729 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1730 &m88e1121_hwmon_chip, 1731 &m88e1121_hwmon_temp, 1732 NULL 1733 }; 1734 1735 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1736 .is_visible = m88e1121_hwmon_is_visible, 1737 .read = m88e1121_hwmon_read, 1738 }; 1739 1740 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1741 .ops = &m88e1121_hwmon_hwmon_ops, 1742 .info = m88e1121_hwmon_info, 1743 }; 1744 1745 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1746 { 1747 int ret; 1748 1749 *temp = 0; 1750 1751 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1752 MII_88E1510_TEMP_SENSOR); 1753 if (ret < 0) 1754 return ret; 1755 1756 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1757 1758 return 0; 1759 } 1760 1761 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1762 { 1763 int ret; 1764 1765 *temp = 0; 1766 1767 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1768 MII_88E1121_MISC_TEST); 1769 if (ret < 0) 1770 return ret; 1771 1772 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1773 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1774 /* convert to mC */ 1775 *temp *= 1000; 1776 1777 return 0; 1778 } 1779 1780 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1781 { 1782 temp = temp / 1000; 1783 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1784 1785 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1786 MII_88E1121_MISC_TEST, 1787 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1788 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1789 } 1790 1791 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1792 { 1793 int ret; 1794 1795 *alarm = false; 1796 1797 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1798 MII_88E1121_MISC_TEST); 1799 if (ret < 0) 1800 return ret; 1801 1802 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1803 1804 return 0; 1805 } 1806 1807 static int m88e1510_hwmon_read(struct device *dev, 1808 enum hwmon_sensor_types type, 1809 u32 attr, int channel, long *temp) 1810 { 1811 struct phy_device *phydev = dev_get_drvdata(dev); 1812 int err; 1813 1814 switch (attr) { 1815 case hwmon_temp_input: 1816 err = m88e1510_get_temp(phydev, temp); 1817 break; 1818 case hwmon_temp_crit: 1819 err = m88e1510_get_temp_critical(phydev, temp); 1820 break; 1821 case hwmon_temp_max_alarm: 1822 err = m88e1510_get_temp_alarm(phydev, temp); 1823 break; 1824 default: 1825 return -EOPNOTSUPP; 1826 } 1827 1828 return err; 1829 } 1830 1831 static int m88e1510_hwmon_write(struct device *dev, 1832 enum hwmon_sensor_types type, 1833 u32 attr, int channel, long temp) 1834 { 1835 struct phy_device *phydev = dev_get_drvdata(dev); 1836 int err; 1837 1838 switch (attr) { 1839 case hwmon_temp_crit: 1840 err = m88e1510_set_temp_critical(phydev, temp); 1841 break; 1842 default: 1843 return -EOPNOTSUPP; 1844 } 1845 return err; 1846 } 1847 1848 static umode_t m88e1510_hwmon_is_visible(const void *data, 1849 enum hwmon_sensor_types type, 1850 u32 attr, int channel) 1851 { 1852 if (type != hwmon_temp) 1853 return 0; 1854 1855 switch (attr) { 1856 case hwmon_temp_input: 1857 case hwmon_temp_max_alarm: 1858 return 0444; 1859 case hwmon_temp_crit: 1860 return 0644; 1861 default: 1862 return 0; 1863 } 1864 } 1865 1866 static u32 m88e1510_hwmon_temp_config[] = { 1867 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1868 0 1869 }; 1870 1871 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1872 .type = hwmon_temp, 1873 .config = m88e1510_hwmon_temp_config, 1874 }; 1875 1876 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1877 &m88e1121_hwmon_chip, 1878 &m88e1510_hwmon_temp, 1879 NULL 1880 }; 1881 1882 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1883 .is_visible = m88e1510_hwmon_is_visible, 1884 .read = m88e1510_hwmon_read, 1885 .write = m88e1510_hwmon_write, 1886 }; 1887 1888 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1889 .ops = &m88e1510_hwmon_hwmon_ops, 1890 .info = m88e1510_hwmon_info, 1891 }; 1892 1893 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 1894 { 1895 int sum = 0; 1896 int oldpage; 1897 int ret = 0; 1898 int i; 1899 1900 *temp = 0; 1901 1902 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1903 if (oldpage < 0) 1904 goto error; 1905 1906 /* Enable temperature sensor */ 1907 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1908 if (ret < 0) 1909 goto error; 1910 1911 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1912 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 1913 MII_88E6390_MISC_TEST_SAMPLE_1S; 1914 1915 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1916 if (ret < 0) 1917 goto error; 1918 1919 /* Wait for temperature to stabilize */ 1920 usleep_range(10000, 12000); 1921 1922 /* Reading the temperature sense has an errata. You need to read 1923 * a number of times and take an average. 1924 */ 1925 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 1926 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 1927 if (ret < 0) 1928 goto error; 1929 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 1930 } 1931 1932 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 1933 *temp = (sum - 75) * 1000; 1934 1935 /* Disable temperature sensor */ 1936 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1937 if (ret < 0) 1938 goto error; 1939 1940 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1941 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 1942 1943 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1944 1945 error: 1946 phy_restore_page(phydev, oldpage, ret); 1947 1948 return ret; 1949 } 1950 1951 static int m88e6390_hwmon_read(struct device *dev, 1952 enum hwmon_sensor_types type, 1953 u32 attr, int channel, long *temp) 1954 { 1955 struct phy_device *phydev = dev_get_drvdata(dev); 1956 int err; 1957 1958 switch (attr) { 1959 case hwmon_temp_input: 1960 err = m88e6390_get_temp(phydev, temp); 1961 break; 1962 default: 1963 return -EOPNOTSUPP; 1964 } 1965 1966 return err; 1967 } 1968 1969 static umode_t m88e6390_hwmon_is_visible(const void *data, 1970 enum hwmon_sensor_types type, 1971 u32 attr, int channel) 1972 { 1973 if (type != hwmon_temp) 1974 return 0; 1975 1976 switch (attr) { 1977 case hwmon_temp_input: 1978 return 0444; 1979 default: 1980 return 0; 1981 } 1982 } 1983 1984 static u32 m88e6390_hwmon_temp_config[] = { 1985 HWMON_T_INPUT, 1986 0 1987 }; 1988 1989 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 1990 .type = hwmon_temp, 1991 .config = m88e6390_hwmon_temp_config, 1992 }; 1993 1994 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 1995 &m88e1121_hwmon_chip, 1996 &m88e6390_hwmon_temp, 1997 NULL 1998 }; 1999 2000 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 2001 .is_visible = m88e6390_hwmon_is_visible, 2002 .read = m88e6390_hwmon_read, 2003 }; 2004 2005 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 2006 .ops = &m88e6390_hwmon_hwmon_ops, 2007 .info = m88e6390_hwmon_info, 2008 }; 2009 2010 static int marvell_hwmon_name(struct phy_device *phydev) 2011 { 2012 struct marvell_priv *priv = phydev->priv; 2013 struct device *dev = &phydev->mdio.dev; 2014 const char *devname = dev_name(dev); 2015 size_t len = strlen(devname); 2016 int i, j; 2017 2018 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 2019 if (!priv->hwmon_name) 2020 return -ENOMEM; 2021 2022 for (i = j = 0; i < len && devname[i]; i++) { 2023 if (isalnum(devname[i])) 2024 priv->hwmon_name[j++] = devname[i]; 2025 } 2026 2027 return 0; 2028 } 2029 2030 static int marvell_hwmon_probe(struct phy_device *phydev, 2031 const struct hwmon_chip_info *chip) 2032 { 2033 struct marvell_priv *priv = phydev->priv; 2034 struct device *dev = &phydev->mdio.dev; 2035 int err; 2036 2037 err = marvell_hwmon_name(phydev); 2038 if (err) 2039 return err; 2040 2041 priv->hwmon_dev = devm_hwmon_device_register_with_info( 2042 dev, priv->hwmon_name, phydev, chip, NULL); 2043 2044 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 2045 } 2046 2047 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2048 { 2049 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 2050 } 2051 2052 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2053 { 2054 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 2055 } 2056 2057 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2058 { 2059 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 2060 } 2061 #else 2062 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2063 { 2064 return 0; 2065 } 2066 2067 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2068 { 2069 return 0; 2070 } 2071 2072 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2073 { 2074 return 0; 2075 } 2076 #endif 2077 2078 static int marvell_probe(struct phy_device *phydev) 2079 { 2080 struct marvell_priv *priv; 2081 2082 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 2083 if (!priv) 2084 return -ENOMEM; 2085 2086 phydev->priv = priv; 2087 2088 return 0; 2089 } 2090 2091 static int m88e1121_probe(struct phy_device *phydev) 2092 { 2093 int err; 2094 2095 err = marvell_probe(phydev); 2096 if (err) 2097 return err; 2098 2099 return m88e1121_hwmon_probe(phydev); 2100 } 2101 2102 static int m88e1510_probe(struct phy_device *phydev) 2103 { 2104 int err; 2105 2106 err = marvell_probe(phydev); 2107 if (err) 2108 return err; 2109 2110 return m88e1510_hwmon_probe(phydev); 2111 } 2112 2113 static int m88e6390_probe(struct phy_device *phydev) 2114 { 2115 int err; 2116 2117 err = marvell_probe(phydev); 2118 if (err) 2119 return err; 2120 2121 return m88e6390_hwmon_probe(phydev); 2122 } 2123 2124 static struct phy_driver marvell_drivers[] = { 2125 { 2126 .phy_id = MARVELL_PHY_ID_88E1101, 2127 .phy_id_mask = MARVELL_PHY_ID_MASK, 2128 .name = "Marvell 88E1101", 2129 /* PHY_GBIT_FEATURES */ 2130 .probe = marvell_probe, 2131 .config_init = &marvell_config_init, 2132 .config_aneg = &m88e1101_config_aneg, 2133 .ack_interrupt = &marvell_ack_interrupt, 2134 .config_intr = &marvell_config_intr, 2135 .resume = &genphy_resume, 2136 .suspend = &genphy_suspend, 2137 .read_page = marvell_read_page, 2138 .write_page = marvell_write_page, 2139 .get_sset_count = marvell_get_sset_count, 2140 .get_strings = marvell_get_strings, 2141 .get_stats = marvell_get_stats, 2142 }, 2143 { 2144 .phy_id = MARVELL_PHY_ID_88E1112, 2145 .phy_id_mask = MARVELL_PHY_ID_MASK, 2146 .name = "Marvell 88E1112", 2147 /* PHY_GBIT_FEATURES */ 2148 .probe = marvell_probe, 2149 .config_init = &m88e1111_config_init, 2150 .config_aneg = &marvell_config_aneg, 2151 .ack_interrupt = &marvell_ack_interrupt, 2152 .config_intr = &marvell_config_intr, 2153 .resume = &genphy_resume, 2154 .suspend = &genphy_suspend, 2155 .read_page = marvell_read_page, 2156 .write_page = marvell_write_page, 2157 .get_sset_count = marvell_get_sset_count, 2158 .get_strings = marvell_get_strings, 2159 .get_stats = marvell_get_stats, 2160 }, 2161 { 2162 .phy_id = MARVELL_PHY_ID_88E1111, 2163 .phy_id_mask = MARVELL_PHY_ID_MASK, 2164 .name = "Marvell 88E1111", 2165 /* PHY_GBIT_FEATURES */ 2166 .probe = marvell_probe, 2167 .config_init = &m88e1111_config_init, 2168 .config_aneg = &marvell_config_aneg, 2169 .read_status = &marvell_read_status, 2170 .ack_interrupt = &marvell_ack_interrupt, 2171 .config_intr = &marvell_config_intr, 2172 .resume = &genphy_resume, 2173 .suspend = &genphy_suspend, 2174 .read_page = marvell_read_page, 2175 .write_page = marvell_write_page, 2176 .get_sset_count = marvell_get_sset_count, 2177 .get_strings = marvell_get_strings, 2178 .get_stats = marvell_get_stats, 2179 }, 2180 { 2181 .phy_id = MARVELL_PHY_ID_88E1118, 2182 .phy_id_mask = MARVELL_PHY_ID_MASK, 2183 .name = "Marvell 88E1118", 2184 /* PHY_GBIT_FEATURES */ 2185 .probe = marvell_probe, 2186 .config_init = &m88e1118_config_init, 2187 .config_aneg = &m88e1118_config_aneg, 2188 .ack_interrupt = &marvell_ack_interrupt, 2189 .config_intr = &marvell_config_intr, 2190 .resume = &genphy_resume, 2191 .suspend = &genphy_suspend, 2192 .read_page = marvell_read_page, 2193 .write_page = marvell_write_page, 2194 .get_sset_count = marvell_get_sset_count, 2195 .get_strings = marvell_get_strings, 2196 .get_stats = marvell_get_stats, 2197 }, 2198 { 2199 .phy_id = MARVELL_PHY_ID_88E1121R, 2200 .phy_id_mask = MARVELL_PHY_ID_MASK, 2201 .name = "Marvell 88E1121R", 2202 /* PHY_GBIT_FEATURES */ 2203 .probe = &m88e1121_probe, 2204 .config_init = &marvell_config_init, 2205 .config_aneg = &m88e1121_config_aneg, 2206 .read_status = &marvell_read_status, 2207 .ack_interrupt = &marvell_ack_interrupt, 2208 .config_intr = &marvell_config_intr, 2209 .did_interrupt = &m88e1121_did_interrupt, 2210 .resume = &genphy_resume, 2211 .suspend = &genphy_suspend, 2212 .read_page = marvell_read_page, 2213 .write_page = marvell_write_page, 2214 .get_sset_count = marvell_get_sset_count, 2215 .get_strings = marvell_get_strings, 2216 .get_stats = marvell_get_stats, 2217 }, 2218 { 2219 .phy_id = MARVELL_PHY_ID_88E1318S, 2220 .phy_id_mask = MARVELL_PHY_ID_MASK, 2221 .name = "Marvell 88E1318S", 2222 /* PHY_GBIT_FEATURES */ 2223 .probe = marvell_probe, 2224 .config_init = &m88e1318_config_init, 2225 .config_aneg = &m88e1318_config_aneg, 2226 .read_status = &marvell_read_status, 2227 .ack_interrupt = &marvell_ack_interrupt, 2228 .config_intr = &marvell_config_intr, 2229 .did_interrupt = &m88e1121_did_interrupt, 2230 .get_wol = &m88e1318_get_wol, 2231 .set_wol = &m88e1318_set_wol, 2232 .resume = &genphy_resume, 2233 .suspend = &genphy_suspend, 2234 .read_page = marvell_read_page, 2235 .write_page = marvell_write_page, 2236 .get_sset_count = marvell_get_sset_count, 2237 .get_strings = marvell_get_strings, 2238 .get_stats = marvell_get_stats, 2239 }, 2240 { 2241 .phy_id = MARVELL_PHY_ID_88E1145, 2242 .phy_id_mask = MARVELL_PHY_ID_MASK, 2243 .name = "Marvell 88E1145", 2244 /* PHY_GBIT_FEATURES */ 2245 .probe = marvell_probe, 2246 .config_init = &m88e1145_config_init, 2247 .config_aneg = &m88e1101_config_aneg, 2248 .read_status = &genphy_read_status, 2249 .ack_interrupt = &marvell_ack_interrupt, 2250 .config_intr = &marvell_config_intr, 2251 .resume = &genphy_resume, 2252 .suspend = &genphy_suspend, 2253 .read_page = marvell_read_page, 2254 .write_page = marvell_write_page, 2255 .get_sset_count = marvell_get_sset_count, 2256 .get_strings = marvell_get_strings, 2257 .get_stats = marvell_get_stats, 2258 }, 2259 { 2260 .phy_id = MARVELL_PHY_ID_88E1149R, 2261 .phy_id_mask = MARVELL_PHY_ID_MASK, 2262 .name = "Marvell 88E1149R", 2263 /* PHY_GBIT_FEATURES */ 2264 .probe = marvell_probe, 2265 .config_init = &m88e1149_config_init, 2266 .config_aneg = &m88e1118_config_aneg, 2267 .ack_interrupt = &marvell_ack_interrupt, 2268 .config_intr = &marvell_config_intr, 2269 .resume = &genphy_resume, 2270 .suspend = &genphy_suspend, 2271 .read_page = marvell_read_page, 2272 .write_page = marvell_write_page, 2273 .get_sset_count = marvell_get_sset_count, 2274 .get_strings = marvell_get_strings, 2275 .get_stats = marvell_get_stats, 2276 }, 2277 { 2278 .phy_id = MARVELL_PHY_ID_88E1240, 2279 .phy_id_mask = MARVELL_PHY_ID_MASK, 2280 .name = "Marvell 88E1240", 2281 /* PHY_GBIT_FEATURES */ 2282 .probe = marvell_probe, 2283 .config_init = &m88e1111_config_init, 2284 .config_aneg = &marvell_config_aneg, 2285 .ack_interrupt = &marvell_ack_interrupt, 2286 .config_intr = &marvell_config_intr, 2287 .resume = &genphy_resume, 2288 .suspend = &genphy_suspend, 2289 .read_page = marvell_read_page, 2290 .write_page = marvell_write_page, 2291 .get_sset_count = marvell_get_sset_count, 2292 .get_strings = marvell_get_strings, 2293 .get_stats = marvell_get_stats, 2294 }, 2295 { 2296 .phy_id = MARVELL_PHY_ID_88E1116R, 2297 .phy_id_mask = MARVELL_PHY_ID_MASK, 2298 .name = "Marvell 88E1116R", 2299 /* PHY_GBIT_FEATURES */ 2300 .probe = marvell_probe, 2301 .config_init = &m88e1116r_config_init, 2302 .ack_interrupt = &marvell_ack_interrupt, 2303 .config_intr = &marvell_config_intr, 2304 .resume = &genphy_resume, 2305 .suspend = &genphy_suspend, 2306 .read_page = marvell_read_page, 2307 .write_page = marvell_write_page, 2308 .get_sset_count = marvell_get_sset_count, 2309 .get_strings = marvell_get_strings, 2310 .get_stats = marvell_get_stats, 2311 }, 2312 { 2313 .phy_id = MARVELL_PHY_ID_88E1510, 2314 .phy_id_mask = MARVELL_PHY_ID_MASK, 2315 .name = "Marvell 88E1510", 2316 .features = PHY_GBIT_FIBRE_FEATURES, 2317 .probe = &m88e1510_probe, 2318 .config_init = &m88e1510_config_init, 2319 .config_aneg = &m88e1510_config_aneg, 2320 .read_status = &marvell_read_status, 2321 .ack_interrupt = &marvell_ack_interrupt, 2322 .config_intr = &marvell_config_intr, 2323 .did_interrupt = &m88e1121_did_interrupt, 2324 .get_wol = &m88e1318_get_wol, 2325 .set_wol = &m88e1318_set_wol, 2326 .resume = &marvell_resume, 2327 .suspend = &marvell_suspend, 2328 .read_page = marvell_read_page, 2329 .write_page = marvell_write_page, 2330 .get_sset_count = marvell_get_sset_count, 2331 .get_strings = marvell_get_strings, 2332 .get_stats = marvell_get_stats, 2333 .set_loopback = genphy_loopback, 2334 }, 2335 { 2336 .phy_id = MARVELL_PHY_ID_88E1540, 2337 .phy_id_mask = MARVELL_PHY_ID_MASK, 2338 .name = "Marvell 88E1540", 2339 /* PHY_GBIT_FEATURES */ 2340 .probe = m88e1510_probe, 2341 .config_init = &marvell_config_init, 2342 .config_aneg = &m88e1510_config_aneg, 2343 .read_status = &marvell_read_status, 2344 .ack_interrupt = &marvell_ack_interrupt, 2345 .config_intr = &marvell_config_intr, 2346 .did_interrupt = &m88e1121_did_interrupt, 2347 .resume = &genphy_resume, 2348 .suspend = &genphy_suspend, 2349 .read_page = marvell_read_page, 2350 .write_page = marvell_write_page, 2351 .get_sset_count = marvell_get_sset_count, 2352 .get_strings = marvell_get_strings, 2353 .get_stats = marvell_get_stats, 2354 .get_tunable = m88e1540_get_tunable, 2355 .set_tunable = m88e1540_set_tunable, 2356 }, 2357 { 2358 .phy_id = MARVELL_PHY_ID_88E1545, 2359 .phy_id_mask = MARVELL_PHY_ID_MASK, 2360 .name = "Marvell 88E1545", 2361 .probe = m88e1510_probe, 2362 /* PHY_GBIT_FEATURES */ 2363 .config_init = &marvell_config_init, 2364 .config_aneg = &m88e1510_config_aneg, 2365 .read_status = &marvell_read_status, 2366 .ack_interrupt = &marvell_ack_interrupt, 2367 .config_intr = &marvell_config_intr, 2368 .did_interrupt = &m88e1121_did_interrupt, 2369 .resume = &genphy_resume, 2370 .suspend = &genphy_suspend, 2371 .read_page = marvell_read_page, 2372 .write_page = marvell_write_page, 2373 .get_sset_count = marvell_get_sset_count, 2374 .get_strings = marvell_get_strings, 2375 .get_stats = marvell_get_stats, 2376 }, 2377 { 2378 .phy_id = MARVELL_PHY_ID_88E3016, 2379 .phy_id_mask = MARVELL_PHY_ID_MASK, 2380 .name = "Marvell 88E3016", 2381 /* PHY_BASIC_FEATURES */ 2382 .probe = marvell_probe, 2383 .config_init = &m88e3016_config_init, 2384 .aneg_done = &marvell_aneg_done, 2385 .read_status = &marvell_read_status, 2386 .ack_interrupt = &marvell_ack_interrupt, 2387 .config_intr = &marvell_config_intr, 2388 .did_interrupt = &m88e1121_did_interrupt, 2389 .resume = &genphy_resume, 2390 .suspend = &genphy_suspend, 2391 .read_page = marvell_read_page, 2392 .write_page = marvell_write_page, 2393 .get_sset_count = marvell_get_sset_count, 2394 .get_strings = marvell_get_strings, 2395 .get_stats = marvell_get_stats, 2396 }, 2397 { 2398 .phy_id = MARVELL_PHY_ID_88E6390, 2399 .phy_id_mask = MARVELL_PHY_ID_MASK, 2400 .name = "Marvell 88E6390", 2401 /* PHY_GBIT_FEATURES */ 2402 .probe = m88e6390_probe, 2403 .config_init = &marvell_config_init, 2404 .config_aneg = &m88e6390_config_aneg, 2405 .read_status = &marvell_read_status, 2406 .ack_interrupt = &marvell_ack_interrupt, 2407 .config_intr = &marvell_config_intr, 2408 .did_interrupt = &m88e1121_did_interrupt, 2409 .resume = &genphy_resume, 2410 .suspend = &genphy_suspend, 2411 .read_page = marvell_read_page, 2412 .write_page = marvell_write_page, 2413 .get_sset_count = marvell_get_sset_count, 2414 .get_strings = marvell_get_strings, 2415 .get_stats = marvell_get_stats, 2416 .get_tunable = m88e1540_get_tunable, 2417 .set_tunable = m88e1540_set_tunable, 2418 }, 2419 }; 2420 2421 module_phy_driver(marvell_drivers); 2422 2423 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2424 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2425 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2426 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2427 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2428 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2429 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2430 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2431 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2432 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2433 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2434 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2435 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2436 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2437 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2438 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2439 { } 2440 }; 2441 2442 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2443