xref: /openbmc/linux/drivers/net/phy/marvell.c (revision 35267cea)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * drivers/net/phy/marvell.c
4  *
5  * Driver for Marvell PHYs
6  *
7  * Author: Andy Fleming
8  *
9  * Copyright (c) 2004 Freescale Semiconductor, Inc.
10  *
11  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12  */
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
26 #include <linux/mm.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/ethtool_netlink.h>
31 #include <linux/phy.h>
32 #include <linux/marvell_phy.h>
33 #include <linux/bitfield.h>
34 #include <linux/of.h>
35 
36 #include <linux/io.h>
37 #include <asm/irq.h>
38 #include <linux/uaccess.h>
39 
40 #define MII_MARVELL_PHY_PAGE		22
41 #define MII_MARVELL_COPPER_PAGE		0x00
42 #define MII_MARVELL_FIBER_PAGE		0x01
43 #define MII_MARVELL_MSCR_PAGE		0x02
44 #define MII_MARVELL_LED_PAGE		0x03
45 #define MII_MARVELL_VCT5_PAGE		0x05
46 #define MII_MARVELL_MISC_TEST_PAGE	0x06
47 #define MII_MARVELL_VCT7_PAGE		0x07
48 #define MII_MARVELL_WOL_PAGE		0x11
49 
50 #define MII_M1011_IEVENT		0x13
51 #define MII_M1011_IEVENT_CLEAR		0x0000
52 
53 #define MII_M1011_IMASK			0x12
54 #define MII_M1011_IMASK_INIT		0x6400
55 #define MII_M1011_IMASK_CLEAR		0x0000
56 
57 #define MII_M1011_PHY_SCR			0x10
58 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN		BIT(11)
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK	GENMASK(14, 12)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX		8
61 #define MII_M1011_PHY_SCR_MDI			(0x0 << 5)
62 #define MII_M1011_PHY_SCR_MDI_X			(0x1 << 5)
63 #define MII_M1011_PHY_SCR_AUTO_CROSS		(0x3 << 5)
64 
65 #define MII_M1011_PHY_SSR			0x11
66 #define MII_M1011_PHY_SSR_DOWNSHIFT		BIT(5)
67 
68 #define MII_M1111_PHY_LED_CONTROL	0x18
69 #define MII_M1111_PHY_LED_DIRECT	0x4100
70 #define MII_M1111_PHY_LED_COMBINE	0x411c
71 #define MII_M1111_PHY_EXT_CR		0x14
72 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK	GENMASK(11, 9)
73 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX	8
74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN	BIT(8)
75 #define MII_M1111_RGMII_RX_DELAY	BIT(7)
76 #define MII_M1111_RGMII_TX_DELAY	BIT(1)
77 #define MII_M1111_PHY_EXT_SR		0x1b
78 
79 #define MII_M1111_HWCFG_MODE_MASK		0xf
80 #define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
81 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
82 #define MII_M1111_HWCFG_MODE_RTBI		0x7
83 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN	0x8
84 #define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
85 #define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
86 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN	0xc
87 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS	BIT(12)
88 #define MII_M1111_HWCFG_FIBER_COPPER_RES	BIT(13)
89 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO	BIT(15)
90 
91 #define MII_88E1121_PHY_MSCR_REG	21
92 #define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
93 #define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
94 #define MII_88E1121_PHY_MSCR_DELAY_MASK	(BIT(5) | BIT(4))
95 
96 #define MII_88E1121_MISC_TEST				0x1a
97 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
98 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
99 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
100 #define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
101 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
102 #define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f
103 
104 #define MII_88E1510_TEMP_SENSOR		0x1b
105 #define MII_88E1510_TEMP_SENSOR_MASK	0xff
106 
107 #define MII_88E1540_COPPER_CTRL3	0x1a
108 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK	GENMASK(11, 10)
109 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS	0
110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS	1
111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS	2
112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS	3
113 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN		BIT(9)
114 
115 #define MII_88E6390_MISC_TEST		0x1b
116 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S	(0x0 << 14)
117 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE		(0x1 << 14)
118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT	(0x2 << 14)
119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE		(0x3 << 14)
120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK			(0x3 << 14)
121 #define MII_88E6393_MISC_TEST_SAMPLES_2048	(0x0 << 11)
122 #define MII_88E6393_MISC_TEST_SAMPLES_4096	(0x1 << 11)
123 #define MII_88E6393_MISC_TEST_SAMPLES_8192	(0x2 << 11)
124 #define MII_88E6393_MISC_TEST_SAMPLES_16384	(0x3 << 11)
125 #define MII_88E6393_MISC_TEST_SAMPLES_MASK	(0x3 << 11)
126 #define MII_88E6393_MISC_TEST_RATE_2_3MS	(0x5 << 8)
127 #define MII_88E6393_MISC_TEST_RATE_6_4MS	(0x6 << 8)
128 #define MII_88E6393_MISC_TEST_RATE_11_9MS	(0x7 << 8)
129 #define MII_88E6393_MISC_TEST_RATE_MASK		(0x7 << 8)
130 
131 #define MII_88E6390_TEMP_SENSOR		0x1c
132 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK	0xff00
133 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT	8
134 #define MII_88E6390_TEMP_SENSOR_MASK		0xff
135 #define MII_88E6390_TEMP_SENSOR_SAMPLES		10
136 
137 #define MII_88E1318S_PHY_MSCR1_REG	16
138 #define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
139 
140 /* Copper Specific Interrupt Enable Register */
141 #define MII_88E1318S_PHY_CSIER				0x12
142 /* WOL Event Interrupt Enable */
143 #define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
144 
145 /* LED Timer Control Register */
146 #define MII_88E1318S_PHY_LED_TCR			0x12
147 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT		BIT(15)
148 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE		BIT(7)
149 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW		BIT(11)
150 
151 /* Magic Packet MAC address registers */
152 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2		0x17
153 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1		0x18
154 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0		0x19
155 
156 #define MII_88E1318S_PHY_WOL_CTRL				0x10
157 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS		BIT(12)
158 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE	BIT(14)
159 
160 #define MII_PHY_LED_CTRL	        16
161 #define MII_88E1121_PHY_LED_DEF		0x0030
162 #define MII_88E1510_PHY_LED_DEF		0x1177
163 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE	0x1040
164 
165 #define MII_M1011_PHY_STATUS		0x11
166 #define MII_M1011_PHY_STATUS_1000	0x8000
167 #define MII_M1011_PHY_STATUS_100	0x4000
168 #define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
169 #define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
170 #define MII_M1011_PHY_STATUS_RESOLVED	0x0800
171 #define MII_M1011_PHY_STATUS_LINK	0x0400
172 
173 #define MII_88E3016_PHY_SPEC_CTRL	0x10
174 #define MII_88E3016_DISABLE_SCRAMBLER	0x0200
175 #define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
176 
177 #define MII_88E1510_GEN_CTRL_REG_1		0x14
178 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
179 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
180 #define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */
181 
182 #define MII_VCT5_TX_RX_MDI0_COUPLING	0x10
183 #define MII_VCT5_TX_RX_MDI1_COUPLING	0x11
184 #define MII_VCT5_TX_RX_MDI2_COUPLING	0x12
185 #define MII_VCT5_TX_RX_MDI3_COUPLING	0x13
186 #define MII_VCT5_TX_RX_AMPLITUDE_MASK	0x7f00
187 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT	8
188 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION	BIT(15)
189 
190 #define MII_VCT5_CTRL				0x17
191 #define MII_VCT5_CTRL_ENABLE				BIT(15)
192 #define MII_VCT5_CTRL_COMPLETE				BIT(14)
193 #define MII_VCT5_CTRL_TX_SAME_CHANNEL			(0x0 << 11)
194 #define MII_VCT5_CTRL_TX0_CHANNEL			(0x4 << 11)
195 #define MII_VCT5_CTRL_TX1_CHANNEL			(0x5 << 11)
196 #define MII_VCT5_CTRL_TX2_CHANNEL			(0x6 << 11)
197 #define MII_VCT5_CTRL_TX3_CHANNEL			(0x7 << 11)
198 #define MII_VCT5_CTRL_SAMPLES_2				(0x0 << 8)
199 #define MII_VCT5_CTRL_SAMPLES_4				(0x1 << 8)
200 #define MII_VCT5_CTRL_SAMPLES_8				(0x2 << 8)
201 #define MII_VCT5_CTRL_SAMPLES_16			(0x3 << 8)
202 #define MII_VCT5_CTRL_SAMPLES_32			(0x4 << 8)
203 #define MII_VCT5_CTRL_SAMPLES_64			(0x5 << 8)
204 #define MII_VCT5_CTRL_SAMPLES_128			(0x6 << 8)
205 #define MII_VCT5_CTRL_SAMPLES_DEFAULT			(0x6 << 8)
206 #define MII_VCT5_CTRL_SAMPLES_256			(0x7 << 8)
207 #define MII_VCT5_CTRL_SAMPLES_SHIFT			8
208 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK			(0x0 << 6)
209 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK		(0x1 << 6)
210 #define MII_VCT5_CTRL_MODE_OFFSET			(0x2 << 6)
211 #define MII_VCT5_CTRL_SAMPLE_POINT			(0x3 << 6)
212 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT			3
213 
214 #define MII_VCT5_SAMPLE_POINT_DISTANCE		0x18
215 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX	511
216 #define MII_VCT5_TX_PULSE_CTRL			0x1c
217 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN	BIT(12)
218 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS	(0x0 << 10)
219 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS		(0x1 << 10)
220 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS		(0x2 << 10)
221 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS		(0x3 << 10)
222 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT	10
223 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV	(0x0 << 8)
224 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV	(0x1 << 8)
225 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV	(0x2 << 8)
226 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV	(0x3 << 8)
227 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT	8
228 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP			BIT(7)
229 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV		(0x6 << 0)
230 
231 /* For TDR measurements less than 11 meters, a short pulse should be
232  * used.
233  */
234 #define TDR_SHORT_CABLE_LENGTH	11
235 
236 #define MII_VCT7_PAIR_0_DISTANCE	0x10
237 #define MII_VCT7_PAIR_1_DISTANCE	0x11
238 #define MII_VCT7_PAIR_2_DISTANCE	0x12
239 #define MII_VCT7_PAIR_3_DISTANCE	0x13
240 
241 #define MII_VCT7_RESULTS	0x14
242 #define MII_VCT7_RESULTS_PAIR3_MASK	0xf000
243 #define MII_VCT7_RESULTS_PAIR2_MASK	0x0f00
244 #define MII_VCT7_RESULTS_PAIR1_MASK	0x00f0
245 #define MII_VCT7_RESULTS_PAIR0_MASK	0x000f
246 #define MII_VCT7_RESULTS_PAIR3_SHIFT	12
247 #define MII_VCT7_RESULTS_PAIR2_SHIFT	8
248 #define MII_VCT7_RESULTS_PAIR1_SHIFT	4
249 #define MII_VCT7_RESULTS_PAIR0_SHIFT	0
250 #define MII_VCT7_RESULTS_INVALID	0
251 #define MII_VCT7_RESULTS_OK		1
252 #define MII_VCT7_RESULTS_OPEN		2
253 #define MII_VCT7_RESULTS_SAME_SHORT	3
254 #define MII_VCT7_RESULTS_CROSS_SHORT	4
255 #define MII_VCT7_RESULTS_BUSY		9
256 
257 #define MII_VCT7_CTRL		0x15
258 #define MII_VCT7_CTRL_RUN_NOW			BIT(15)
259 #define MII_VCT7_CTRL_RUN_ANEG			BIT(14)
260 #define MII_VCT7_CTRL_DISABLE_CROSS		BIT(13)
261 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK	BIT(12)
262 #define MII_VCT7_CTRL_IN_PROGRESS		BIT(11)
263 #define MII_VCT7_CTRL_METERS			BIT(10)
264 #define MII_VCT7_CTRL_CENTIMETERS		0
265 
266 #define LPA_PAUSE_FIBER		0x180
267 #define LPA_PAUSE_ASYM_FIBER	0x100
268 
269 #define NB_FIBER_STATS	1
270 
271 MODULE_DESCRIPTION("Marvell PHY driver");
272 MODULE_AUTHOR("Andy Fleming");
273 MODULE_LICENSE("GPL");
274 
275 struct marvell_hw_stat {
276 	const char *string;
277 	u8 page;
278 	u8 reg;
279 	u8 bits;
280 };
281 
282 static struct marvell_hw_stat marvell_hw_stats[] = {
283 	{ "phy_receive_errors_copper", 0, 21, 16},
284 	{ "phy_idle_errors", 0, 10, 8 },
285 	{ "phy_receive_errors_fiber", 1, 21, 16},
286 };
287 
288 struct marvell_priv {
289 	u64 stats[ARRAY_SIZE(marvell_hw_stats)];
290 	char *hwmon_name;
291 	struct device *hwmon_dev;
292 	bool cable_test_tdr;
293 	u32 first;
294 	u32 last;
295 	u32 step;
296 	s8 pair;
297 };
298 
299 static int marvell_read_page(struct phy_device *phydev)
300 {
301 	return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
302 }
303 
304 static int marvell_write_page(struct phy_device *phydev, int page)
305 {
306 	return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
307 }
308 
309 static int marvell_set_page(struct phy_device *phydev, int page)
310 {
311 	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
312 }
313 
314 static int marvell_ack_interrupt(struct phy_device *phydev)
315 {
316 	int err;
317 
318 	/* Clear the interrupts by reading the reg */
319 	err = phy_read(phydev, MII_M1011_IEVENT);
320 
321 	if (err < 0)
322 		return err;
323 
324 	return 0;
325 }
326 
327 static int marvell_config_intr(struct phy_device *phydev)
328 {
329 	int err;
330 
331 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
332 		err = marvell_ack_interrupt(phydev);
333 		if (err)
334 			return err;
335 
336 		err = phy_write(phydev, MII_M1011_IMASK,
337 				MII_M1011_IMASK_INIT);
338 	} else {
339 		err = phy_write(phydev, MII_M1011_IMASK,
340 				MII_M1011_IMASK_CLEAR);
341 		if (err)
342 			return err;
343 
344 		err = marvell_ack_interrupt(phydev);
345 	}
346 
347 	return err;
348 }
349 
350 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
351 {
352 	int irq_status;
353 
354 	irq_status = phy_read(phydev, MII_M1011_IEVENT);
355 	if (irq_status < 0) {
356 		phy_error(phydev);
357 		return IRQ_NONE;
358 	}
359 
360 	if (!(irq_status & MII_M1011_IMASK_INIT))
361 		return IRQ_NONE;
362 
363 	phy_trigger_machine(phydev);
364 
365 	return IRQ_HANDLED;
366 }
367 
368 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
369 {
370 	u16 val;
371 
372 	switch (polarity) {
373 	case ETH_TP_MDI:
374 		val = MII_M1011_PHY_SCR_MDI;
375 		break;
376 	case ETH_TP_MDI_X:
377 		val = MII_M1011_PHY_SCR_MDI_X;
378 		break;
379 	case ETH_TP_MDI_AUTO:
380 	case ETH_TP_MDI_INVALID:
381 	default:
382 		val = MII_M1011_PHY_SCR_AUTO_CROSS;
383 		break;
384 	}
385 
386 	return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
387 				  MII_M1011_PHY_SCR_AUTO_CROSS, val);
388 }
389 
390 static int marvell_config_aneg(struct phy_device *phydev)
391 {
392 	int changed = 0;
393 	int err;
394 
395 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
396 	if (err < 0)
397 		return err;
398 
399 	changed = err;
400 
401 	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
402 			MII_M1111_PHY_LED_DIRECT);
403 	if (err < 0)
404 		return err;
405 
406 	err = genphy_config_aneg(phydev);
407 	if (err < 0)
408 		return err;
409 
410 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
411 		/* A write to speed/duplex bits (that is performed by
412 		 * genphy_config_aneg() call above) must be followed by
413 		 * a software reset. Otherwise, the write has no effect.
414 		 */
415 		err = genphy_soft_reset(phydev);
416 		if (err < 0)
417 			return err;
418 	}
419 
420 	return 0;
421 }
422 
423 static int m88e1101_config_aneg(struct phy_device *phydev)
424 {
425 	int err;
426 
427 	/* This Marvell PHY has an errata which requires
428 	 * that certain registers get written in order
429 	 * to restart autonegotiation
430 	 */
431 	err = genphy_soft_reset(phydev);
432 	if (err < 0)
433 		return err;
434 
435 	err = phy_write(phydev, 0x1d, 0x1f);
436 	if (err < 0)
437 		return err;
438 
439 	err = phy_write(phydev, 0x1e, 0x200c);
440 	if (err < 0)
441 		return err;
442 
443 	err = phy_write(phydev, 0x1d, 0x5);
444 	if (err < 0)
445 		return err;
446 
447 	err = phy_write(phydev, 0x1e, 0);
448 	if (err < 0)
449 		return err;
450 
451 	err = phy_write(phydev, 0x1e, 0x100);
452 	if (err < 0)
453 		return err;
454 
455 	return marvell_config_aneg(phydev);
456 }
457 
458 #if IS_ENABLED(CONFIG_OF_MDIO)
459 /* Set and/or override some configuration registers based on the
460  * marvell,reg-init property stored in the of_node for the phydev.
461  *
462  * marvell,reg-init = <reg-page reg mask value>,...;
463  *
464  * There may be one or more sets of <reg-page reg mask value>:
465  *
466  * reg-page: which register bank to use.
467  * reg: the register.
468  * mask: if non-zero, ANDed with existing register value.
469  * value: ORed with the masked value and written to the regiser.
470  *
471  */
472 static int marvell_of_reg_init(struct phy_device *phydev)
473 {
474 	const __be32 *paddr;
475 	int len, i, saved_page, current_page, ret = 0;
476 
477 	if (!phydev->mdio.dev.of_node)
478 		return 0;
479 
480 	paddr = of_get_property(phydev->mdio.dev.of_node,
481 				"marvell,reg-init", &len);
482 	if (!paddr || len < (4 * sizeof(*paddr)))
483 		return 0;
484 
485 	saved_page = phy_save_page(phydev);
486 	if (saved_page < 0)
487 		goto err;
488 	current_page = saved_page;
489 
490 	len /= sizeof(*paddr);
491 	for (i = 0; i < len - 3; i += 4) {
492 		u16 page = be32_to_cpup(paddr + i);
493 		u16 reg = be32_to_cpup(paddr + i + 1);
494 		u16 mask = be32_to_cpup(paddr + i + 2);
495 		u16 val_bits = be32_to_cpup(paddr + i + 3);
496 		int val;
497 
498 		if (page != current_page) {
499 			current_page = page;
500 			ret = marvell_write_page(phydev, page);
501 			if (ret < 0)
502 				goto err;
503 		}
504 
505 		val = 0;
506 		if (mask) {
507 			val = __phy_read(phydev, reg);
508 			if (val < 0) {
509 				ret = val;
510 				goto err;
511 			}
512 			val &= mask;
513 		}
514 		val |= val_bits;
515 
516 		ret = __phy_write(phydev, reg, val);
517 		if (ret < 0)
518 			goto err;
519 	}
520 err:
521 	return phy_restore_page(phydev, saved_page, ret);
522 }
523 #else
524 static int marvell_of_reg_init(struct phy_device *phydev)
525 {
526 	return 0;
527 }
528 #endif /* CONFIG_OF_MDIO */
529 
530 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
531 {
532 	int mscr;
533 
534 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
535 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
536 		       MII_88E1121_PHY_MSCR_TX_DELAY;
537 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
538 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
539 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
540 		mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
541 	else
542 		mscr = 0;
543 
544 	return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
545 				MII_88E1121_PHY_MSCR_REG,
546 				MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
547 }
548 
549 static int m88e1121_config_aneg(struct phy_device *phydev)
550 {
551 	int changed = 0;
552 	int err = 0;
553 
554 	if (phy_interface_is_rgmii(phydev)) {
555 		err = m88e1121_config_aneg_rgmii_delays(phydev);
556 		if (err < 0)
557 			return err;
558 	}
559 
560 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
561 	if (err < 0)
562 		return err;
563 
564 	changed = err;
565 
566 	err = genphy_config_aneg(phydev);
567 	if (err < 0)
568 		return err;
569 
570 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
571 		/* A software reset is used to ensure a "commit" of the
572 		 * changes is done.
573 		 */
574 		err = genphy_soft_reset(phydev);
575 		if (err < 0)
576 			return err;
577 	}
578 
579 	return 0;
580 }
581 
582 static int m88e1318_config_aneg(struct phy_device *phydev)
583 {
584 	int err;
585 
586 	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
587 			       MII_88E1318S_PHY_MSCR1_REG,
588 			       0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
589 	if (err < 0)
590 		return err;
591 
592 	return m88e1121_config_aneg(phydev);
593 }
594 
595 /**
596  * linkmode_adv_to_fiber_adv_t
597  * @advertise: the linkmode advertisement settings
598  *
599  * A small helper function that translates linkmode advertisement
600  * settings to phy autonegotiation advertisements for the MII_ADV
601  * register for fiber link.
602  */
603 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
604 {
605 	u32 result = 0;
606 
607 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
608 		result |= ADVERTISE_1000XHALF;
609 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
610 		result |= ADVERTISE_1000XFULL;
611 
612 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
613 	    linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
614 		result |= ADVERTISE_1000XPSE_ASYM;
615 	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
616 		result |= ADVERTISE_1000XPAUSE;
617 
618 	return result;
619 }
620 
621 /**
622  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
623  * @phydev: target phy_device struct
624  *
625  * Description: If auto-negotiation is enabled, we configure the
626  *   advertising, and then restart auto-negotiation.  If it is not
627  *   enabled, then we write the BMCR. Adapted for fiber link in
628  *   some Marvell's devices.
629  */
630 static int marvell_config_aneg_fiber(struct phy_device *phydev)
631 {
632 	int changed = 0;
633 	int err;
634 	u16 adv;
635 
636 	if (phydev->autoneg != AUTONEG_ENABLE)
637 		return genphy_setup_forced(phydev);
638 
639 	/* Only allow advertising what this PHY supports */
640 	linkmode_and(phydev->advertising, phydev->advertising,
641 		     phydev->supported);
642 
643 	adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
644 
645 	/* Setup fiber advertisement */
646 	err = phy_modify_changed(phydev, MII_ADVERTISE,
647 				 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
648 				 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
649 				 adv);
650 	if (err < 0)
651 		return err;
652 	if (err > 0)
653 		changed = 1;
654 
655 	return genphy_check_and_restart_aneg(phydev, changed);
656 }
657 
658 static int m88e1111_config_aneg(struct phy_device *phydev)
659 {
660 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
661 	int err;
662 
663 	if (extsr < 0)
664 		return extsr;
665 
666 	/* If not using SGMII or copper 1000BaseX modes, use normal process.
667 	 * Steps below are only required for these modes.
668 	 */
669 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
670 	    (extsr & MII_M1111_HWCFG_MODE_MASK) !=
671 	    MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
672 		return marvell_config_aneg(phydev);
673 
674 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
675 	if (err < 0)
676 		goto error;
677 
678 	/* Configure the copper link first */
679 	err = marvell_config_aneg(phydev);
680 	if (err < 0)
681 		goto error;
682 
683 	/* Then the fiber link */
684 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
685 	if (err < 0)
686 		goto error;
687 
688 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
689 		/* Do not touch the fiber advertisement if we're in copper->sgmii mode.
690 		 * Just ensure that SGMII-side autonegotiation is enabled.
691 		 * If we switched from some other mode to SGMII it may not be.
692 		 */
693 		err = genphy_check_and_restart_aneg(phydev, false);
694 	else
695 		err = marvell_config_aneg_fiber(phydev);
696 	if (err < 0)
697 		goto error;
698 
699 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
700 
701 error:
702 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
703 	return err;
704 }
705 
706 static int m88e1510_config_aneg(struct phy_device *phydev)
707 {
708 	int err;
709 
710 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
711 	if (err < 0)
712 		goto error;
713 
714 	/* Configure the copper link first */
715 	err = m88e1318_config_aneg(phydev);
716 	if (err < 0)
717 		goto error;
718 
719 	/* Do not touch the fiber page if we're in copper->sgmii mode */
720 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
721 		return 0;
722 
723 	/* Then the fiber link */
724 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
725 	if (err < 0)
726 		goto error;
727 
728 	err = marvell_config_aneg_fiber(phydev);
729 	if (err < 0)
730 		goto error;
731 
732 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
733 
734 error:
735 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
736 	return err;
737 }
738 
739 static void marvell_config_led(struct phy_device *phydev)
740 {
741 	u16 def_config;
742 	int err;
743 
744 	switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
745 	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
746 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
747 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
748 		def_config = MII_88E1121_PHY_LED_DEF;
749 		break;
750 	/* Default PHY LED config:
751 	 * LED[0] .. 1000Mbps Link
752 	 * LED[1] .. 100Mbps Link
753 	 * LED[2] .. Blink, Activity
754 	 */
755 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
756 		if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
757 			def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
758 		else
759 			def_config = MII_88E1510_PHY_LED_DEF;
760 		break;
761 	default:
762 		return;
763 	}
764 
765 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
766 			      def_config);
767 	if (err < 0)
768 		phydev_warn(phydev, "Fail to config marvell phy LED.\n");
769 }
770 
771 static int marvell_config_init(struct phy_device *phydev)
772 {
773 	/* Set default LED */
774 	marvell_config_led(phydev);
775 
776 	/* Set registers from marvell,reg-init DT property */
777 	return marvell_of_reg_init(phydev);
778 }
779 
780 static int m88e3016_config_init(struct phy_device *phydev)
781 {
782 	int ret;
783 
784 	/* Enable Scrambler and Auto-Crossover */
785 	ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
786 			 MII_88E3016_DISABLE_SCRAMBLER,
787 			 MII_88E3016_AUTO_MDIX_CROSSOVER);
788 	if (ret < 0)
789 		return ret;
790 
791 	return marvell_config_init(phydev);
792 }
793 
794 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
795 					   u16 mode,
796 					   int fibre_copper_auto)
797 {
798 	if (fibre_copper_auto)
799 		mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
800 
801 	return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
802 			  MII_M1111_HWCFG_MODE_MASK |
803 			  MII_M1111_HWCFG_FIBER_COPPER_AUTO |
804 			  MII_M1111_HWCFG_FIBER_COPPER_RES,
805 			  mode);
806 }
807 
808 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
809 {
810 	int delay;
811 
812 	switch (phydev->interface) {
813 	case PHY_INTERFACE_MODE_RGMII_ID:
814 		delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
815 		break;
816 	case PHY_INTERFACE_MODE_RGMII_RXID:
817 		delay = MII_M1111_RGMII_RX_DELAY;
818 		break;
819 	case PHY_INTERFACE_MODE_RGMII_TXID:
820 		delay = MII_M1111_RGMII_TX_DELAY;
821 		break;
822 	default:
823 		delay = 0;
824 		break;
825 	}
826 
827 	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
828 			  MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
829 			  delay);
830 }
831 
832 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
833 {
834 	int temp;
835 	int err;
836 
837 	err = m88e1111_config_init_rgmii_delays(phydev);
838 	if (err < 0)
839 		return err;
840 
841 	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
842 	if (temp < 0)
843 		return temp;
844 
845 	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
846 
847 	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
848 		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
849 	else
850 		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
851 
852 	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
853 }
854 
855 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
856 {
857 	int err;
858 
859 	err = m88e1111_config_init_hwcfg_mode(
860 		phydev,
861 		MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
862 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
863 	if (err < 0)
864 		return err;
865 
866 	/* make sure copper is selected */
867 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
868 }
869 
870 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
871 {
872 	int err;
873 
874 	err = m88e1111_config_init_rgmii_delays(phydev);
875 	if (err < 0)
876 		return err;
877 
878 	err = m88e1111_config_init_hwcfg_mode(
879 		phydev,
880 		MII_M1111_HWCFG_MODE_RTBI,
881 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
882 	if (err < 0)
883 		return err;
884 
885 	/* soft reset */
886 	err = genphy_soft_reset(phydev);
887 	if (err < 0)
888 		return err;
889 
890 	return m88e1111_config_init_hwcfg_mode(
891 		phydev,
892 		MII_M1111_HWCFG_MODE_RTBI,
893 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
894 }
895 
896 static int m88e1111_config_init_1000basex(struct phy_device *phydev)
897 {
898 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
899 	int err, mode;
900 
901 	if (extsr < 0)
902 		return extsr;
903 
904 	/* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
905 	mode = extsr & MII_M1111_HWCFG_MODE_MASK;
906 	if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
907 		err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
908 				 MII_M1111_HWCFG_MODE_MASK |
909 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
910 				 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
911 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
912 		if (err < 0)
913 			return err;
914 	}
915 	return 0;
916 }
917 
918 static int m88e1111_config_init(struct phy_device *phydev)
919 {
920 	int err;
921 
922 	if (phy_interface_is_rgmii(phydev)) {
923 		err = m88e1111_config_init_rgmii(phydev);
924 		if (err < 0)
925 			return err;
926 	}
927 
928 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
929 		err = m88e1111_config_init_sgmii(phydev);
930 		if (err < 0)
931 			return err;
932 	}
933 
934 	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
935 		err = m88e1111_config_init_rtbi(phydev);
936 		if (err < 0)
937 			return err;
938 	}
939 
940 	if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
941 		err = m88e1111_config_init_1000basex(phydev);
942 		if (err < 0)
943 			return err;
944 	}
945 
946 	err = marvell_of_reg_init(phydev);
947 	if (err < 0)
948 		return err;
949 
950 	return genphy_soft_reset(phydev);
951 }
952 
953 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
954 {
955 	int val, cnt, enable;
956 
957 	val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
958 	if (val < 0)
959 		return val;
960 
961 	enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
962 	cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
963 
964 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
965 
966 	return 0;
967 }
968 
969 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
970 {
971 	int val, err;
972 
973 	if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
974 		return -E2BIG;
975 
976 	if (!cnt) {
977 		err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
978 				     MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
979 	} else {
980 		val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
981 		val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
982 
983 		err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
984 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
985 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
986 				 val);
987 	}
988 
989 	if (err < 0)
990 		return err;
991 
992 	return genphy_soft_reset(phydev);
993 }
994 
995 static int m88e1111_get_tunable(struct phy_device *phydev,
996 				struct ethtool_tunable *tuna, void *data)
997 {
998 	switch (tuna->id) {
999 	case ETHTOOL_PHY_DOWNSHIFT:
1000 		return m88e1111_get_downshift(phydev, data);
1001 	default:
1002 		return -EOPNOTSUPP;
1003 	}
1004 }
1005 
1006 static int m88e1111_set_tunable(struct phy_device *phydev,
1007 				struct ethtool_tunable *tuna, const void *data)
1008 {
1009 	switch (tuna->id) {
1010 	case ETHTOOL_PHY_DOWNSHIFT:
1011 		return m88e1111_set_downshift(phydev, *(const u8 *)data);
1012 	default:
1013 		return -EOPNOTSUPP;
1014 	}
1015 }
1016 
1017 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1018 {
1019 	int val, cnt, enable;
1020 
1021 	val = phy_read(phydev, MII_M1011_PHY_SCR);
1022 	if (val < 0)
1023 		return val;
1024 
1025 	enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1026 	cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1027 
1028 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1029 
1030 	return 0;
1031 }
1032 
1033 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1034 {
1035 	int val, err;
1036 
1037 	if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1038 		return -E2BIG;
1039 
1040 	if (!cnt) {
1041 		err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1042 				     MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1043 	} else {
1044 		val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1045 		val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1046 
1047 		err = phy_modify(phydev, MII_M1011_PHY_SCR,
1048 				 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1049 				 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1050 				 val);
1051 	}
1052 
1053 	if (err < 0)
1054 		return err;
1055 
1056 	return genphy_soft_reset(phydev);
1057 }
1058 
1059 static int m88e1011_get_tunable(struct phy_device *phydev,
1060 				struct ethtool_tunable *tuna, void *data)
1061 {
1062 	switch (tuna->id) {
1063 	case ETHTOOL_PHY_DOWNSHIFT:
1064 		return m88e1011_get_downshift(phydev, data);
1065 	default:
1066 		return -EOPNOTSUPP;
1067 	}
1068 }
1069 
1070 static int m88e1011_set_tunable(struct phy_device *phydev,
1071 				struct ethtool_tunable *tuna, const void *data)
1072 {
1073 	switch (tuna->id) {
1074 	case ETHTOOL_PHY_DOWNSHIFT:
1075 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1076 	default:
1077 		return -EOPNOTSUPP;
1078 	}
1079 }
1080 
1081 static int m88e1112_config_init(struct phy_device *phydev)
1082 {
1083 	int err;
1084 
1085 	err = m88e1011_set_downshift(phydev, 3);
1086 	if (err < 0)
1087 		return err;
1088 
1089 	return m88e1111_config_init(phydev);
1090 }
1091 
1092 static int m88e1111gbe_config_init(struct phy_device *phydev)
1093 {
1094 	int err;
1095 
1096 	err = m88e1111_set_downshift(phydev, 3);
1097 	if (err < 0)
1098 		return err;
1099 
1100 	return m88e1111_config_init(phydev);
1101 }
1102 
1103 static int marvell_1011gbe_config_init(struct phy_device *phydev)
1104 {
1105 	int err;
1106 
1107 	err = m88e1011_set_downshift(phydev, 3);
1108 	if (err < 0)
1109 		return err;
1110 
1111 	return marvell_config_init(phydev);
1112 }
1113 static int m88e1116r_config_init(struct phy_device *phydev)
1114 {
1115 	int err;
1116 
1117 	err = genphy_soft_reset(phydev);
1118 	if (err < 0)
1119 		return err;
1120 
1121 	msleep(500);
1122 
1123 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1124 	if (err < 0)
1125 		return err;
1126 
1127 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1128 	if (err < 0)
1129 		return err;
1130 
1131 	err = m88e1011_set_downshift(phydev, 8);
1132 	if (err < 0)
1133 		return err;
1134 
1135 	if (phy_interface_is_rgmii(phydev)) {
1136 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1137 		if (err < 0)
1138 			return err;
1139 	}
1140 
1141 	err = genphy_soft_reset(phydev);
1142 	if (err < 0)
1143 		return err;
1144 
1145 	return marvell_config_init(phydev);
1146 }
1147 
1148 static int m88e1318_config_init(struct phy_device *phydev)
1149 {
1150 	if (phy_interrupt_is_valid(phydev)) {
1151 		int err = phy_modify_paged(
1152 			phydev, MII_MARVELL_LED_PAGE,
1153 			MII_88E1318S_PHY_LED_TCR,
1154 			MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1155 			MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1156 			MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1157 		if (err < 0)
1158 			return err;
1159 	}
1160 
1161 	return marvell_config_init(phydev);
1162 }
1163 
1164 static int m88e1510_config_init(struct phy_device *phydev)
1165 {
1166 	int err;
1167 
1168 	/* SGMII-to-Copper mode initialization */
1169 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1170 		/* Select page 18 */
1171 		err = marvell_set_page(phydev, 18);
1172 		if (err < 0)
1173 			return err;
1174 
1175 		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1176 		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1177 				 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1178 				 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1179 		if (err < 0)
1180 			return err;
1181 
1182 		/* PHY reset is necessary after changing MODE[2:0] */
1183 		err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1184 				   MII_88E1510_GEN_CTRL_REG_1_RESET);
1185 		if (err < 0)
1186 			return err;
1187 
1188 		/* Reset page selection */
1189 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1190 		if (err < 0)
1191 			return err;
1192 	}
1193 	err = m88e1011_set_downshift(phydev, 3);
1194 	if (err < 0)
1195 		return err;
1196 
1197 	return m88e1318_config_init(phydev);
1198 }
1199 
1200 static int m88e1118_config_aneg(struct phy_device *phydev)
1201 {
1202 	int err;
1203 
1204 	err = genphy_soft_reset(phydev);
1205 	if (err < 0)
1206 		return err;
1207 
1208 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1209 	if (err < 0)
1210 		return err;
1211 
1212 	err = genphy_config_aneg(phydev);
1213 	return 0;
1214 }
1215 
1216 static int m88e1118_config_init(struct phy_device *phydev)
1217 {
1218 	int err;
1219 
1220 	/* Change address */
1221 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1222 	if (err < 0)
1223 		return err;
1224 
1225 	/* Enable 1000 Mbit */
1226 	err = phy_write(phydev, 0x15, 0x1070);
1227 	if (err < 0)
1228 		return err;
1229 
1230 	/* Change address */
1231 	err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1232 	if (err < 0)
1233 		return err;
1234 
1235 	/* Adjust LED Control */
1236 	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1237 		err = phy_write(phydev, 0x10, 0x1100);
1238 	else
1239 		err = phy_write(phydev, 0x10, 0x021e);
1240 	if (err < 0)
1241 		return err;
1242 
1243 	err = marvell_of_reg_init(phydev);
1244 	if (err < 0)
1245 		return err;
1246 
1247 	/* Reset address */
1248 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1249 	if (err < 0)
1250 		return err;
1251 
1252 	return genphy_soft_reset(phydev);
1253 }
1254 
1255 static int m88e1149_config_init(struct phy_device *phydev)
1256 {
1257 	int err;
1258 
1259 	/* Change address */
1260 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1261 	if (err < 0)
1262 		return err;
1263 
1264 	/* Enable 1000 Mbit */
1265 	err = phy_write(phydev, 0x15, 0x1048);
1266 	if (err < 0)
1267 		return err;
1268 
1269 	err = marvell_of_reg_init(phydev);
1270 	if (err < 0)
1271 		return err;
1272 
1273 	/* Reset address */
1274 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1275 	if (err < 0)
1276 		return err;
1277 
1278 	return genphy_soft_reset(phydev);
1279 }
1280 
1281 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1282 {
1283 	int err;
1284 
1285 	err = m88e1111_config_init_rgmii_delays(phydev);
1286 	if (err < 0)
1287 		return err;
1288 
1289 	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1290 		err = phy_write(phydev, 0x1d, 0x0012);
1291 		if (err < 0)
1292 			return err;
1293 
1294 		err = phy_modify(phydev, 0x1e, 0x0fc0,
1295 				 2 << 9 | /* 36 ohm */
1296 				 2 << 6); /* 39 ohm */
1297 		if (err < 0)
1298 			return err;
1299 
1300 		err = phy_write(phydev, 0x1d, 0x3);
1301 		if (err < 0)
1302 			return err;
1303 
1304 		err = phy_write(phydev, 0x1e, 0x8000);
1305 	}
1306 	return err;
1307 }
1308 
1309 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1310 {
1311 	return m88e1111_config_init_hwcfg_mode(
1312 		phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1313 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1314 }
1315 
1316 static int m88e1145_config_init(struct phy_device *phydev)
1317 {
1318 	int err;
1319 
1320 	/* Take care of errata E0 & E1 */
1321 	err = phy_write(phydev, 0x1d, 0x001b);
1322 	if (err < 0)
1323 		return err;
1324 
1325 	err = phy_write(phydev, 0x1e, 0x418f);
1326 	if (err < 0)
1327 		return err;
1328 
1329 	err = phy_write(phydev, 0x1d, 0x0016);
1330 	if (err < 0)
1331 		return err;
1332 
1333 	err = phy_write(phydev, 0x1e, 0xa2da);
1334 	if (err < 0)
1335 		return err;
1336 
1337 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1338 		err = m88e1145_config_init_rgmii(phydev);
1339 		if (err < 0)
1340 			return err;
1341 	}
1342 
1343 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1344 		err = m88e1145_config_init_sgmii(phydev);
1345 		if (err < 0)
1346 			return err;
1347 	}
1348 	err = m88e1111_set_downshift(phydev, 3);
1349 	if (err < 0)
1350 		return err;
1351 
1352 	err = marvell_of_reg_init(phydev);
1353 	if (err < 0)
1354 		return err;
1355 
1356 	return 0;
1357 }
1358 
1359 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1360 {
1361 	int val;
1362 
1363 	val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1364 	if (val < 0)
1365 		return val;
1366 
1367 	if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1368 		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1369 		return 0;
1370 	}
1371 
1372 	val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1373 
1374 	switch (val) {
1375 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1376 		*msecs = 0;
1377 		break;
1378 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1379 		*msecs = 10;
1380 		break;
1381 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1382 		*msecs = 20;
1383 		break;
1384 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1385 		*msecs = 40;
1386 		break;
1387 	default:
1388 		return -EINVAL;
1389 	}
1390 
1391 	return 0;
1392 }
1393 
1394 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1395 {
1396 	struct ethtool_eee eee;
1397 	int val, ret;
1398 
1399 	if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1400 		return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1401 				      MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1402 
1403 	/* According to the Marvell data sheet EEE must be disabled for
1404 	 * Fast Link Down detection to work properly
1405 	 */
1406 	ret = phy_ethtool_get_eee(phydev, &eee);
1407 	if (!ret && eee.eee_enabled) {
1408 		phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1409 		return -EBUSY;
1410 	}
1411 
1412 	if (*msecs <= 5)
1413 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1414 	else if (*msecs <= 15)
1415 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1416 	else if (*msecs <= 30)
1417 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1418 	else
1419 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1420 
1421 	val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1422 
1423 	ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1424 			 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1425 	if (ret)
1426 		return ret;
1427 
1428 	return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1429 			    MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1430 }
1431 
1432 static int m88e1540_get_tunable(struct phy_device *phydev,
1433 				struct ethtool_tunable *tuna, void *data)
1434 {
1435 	switch (tuna->id) {
1436 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1437 		return m88e1540_get_fld(phydev, data);
1438 	case ETHTOOL_PHY_DOWNSHIFT:
1439 		return m88e1011_get_downshift(phydev, data);
1440 	default:
1441 		return -EOPNOTSUPP;
1442 	}
1443 }
1444 
1445 static int m88e1540_set_tunable(struct phy_device *phydev,
1446 				struct ethtool_tunable *tuna, const void *data)
1447 {
1448 	switch (tuna->id) {
1449 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1450 		return m88e1540_set_fld(phydev, data);
1451 	case ETHTOOL_PHY_DOWNSHIFT:
1452 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1453 	default:
1454 		return -EOPNOTSUPP;
1455 	}
1456 }
1457 
1458 /* The VOD can be out of specification on link up. Poke an
1459  * undocumented register, in an undocumented page, with a magic value
1460  * to fix this.
1461  */
1462 static int m88e6390_errata(struct phy_device *phydev)
1463 {
1464 	int err;
1465 
1466 	err = phy_write(phydev, MII_BMCR,
1467 			BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1468 	if (err)
1469 		return err;
1470 
1471 	usleep_range(300, 400);
1472 
1473 	err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1474 	if (err)
1475 		return err;
1476 
1477 	return genphy_soft_reset(phydev);
1478 }
1479 
1480 static int m88e6390_config_aneg(struct phy_device *phydev)
1481 {
1482 	int err;
1483 
1484 	err = m88e6390_errata(phydev);
1485 	if (err)
1486 		return err;
1487 
1488 	return m88e1510_config_aneg(phydev);
1489 }
1490 
1491 /**
1492  * fiber_lpa_mod_linkmode_lpa_t
1493  * @advertising: the linkmode advertisement settings
1494  * @lpa: value of the MII_LPA register for fiber link
1495  *
1496  * A small helper function that translates MII_LPA bits to linkmode LP
1497  * advertisement settings. Other bits in advertising are left
1498  * unchanged.
1499  */
1500 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1501 {
1502 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1503 			 advertising, lpa & LPA_1000XHALF);
1504 
1505 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1506 			 advertising, lpa & LPA_1000XFULL);
1507 }
1508 
1509 static int marvell_read_status_page_an(struct phy_device *phydev,
1510 				       int fiber, int status)
1511 {
1512 	int lpa;
1513 	int err;
1514 
1515 	if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1516 		phydev->link = 0;
1517 		return 0;
1518 	}
1519 
1520 	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1521 		phydev->duplex = DUPLEX_FULL;
1522 	else
1523 		phydev->duplex = DUPLEX_HALF;
1524 
1525 	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1526 	case MII_M1011_PHY_STATUS_1000:
1527 		phydev->speed = SPEED_1000;
1528 		break;
1529 
1530 	case MII_M1011_PHY_STATUS_100:
1531 		phydev->speed = SPEED_100;
1532 		break;
1533 
1534 	default:
1535 		phydev->speed = SPEED_10;
1536 		break;
1537 	}
1538 
1539 	if (!fiber) {
1540 		err = genphy_read_lpa(phydev);
1541 		if (err < 0)
1542 			return err;
1543 
1544 		phy_resolve_aneg_pause(phydev);
1545 	} else {
1546 		lpa = phy_read(phydev, MII_LPA);
1547 		if (lpa < 0)
1548 			return lpa;
1549 
1550 		/* The fiber link is only 1000M capable */
1551 		fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1552 
1553 		if (phydev->duplex == DUPLEX_FULL) {
1554 			if (!(lpa & LPA_PAUSE_FIBER)) {
1555 				phydev->pause = 0;
1556 				phydev->asym_pause = 0;
1557 			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1558 				phydev->pause = 1;
1559 				phydev->asym_pause = 1;
1560 			} else {
1561 				phydev->pause = 1;
1562 				phydev->asym_pause = 0;
1563 			}
1564 		}
1565 	}
1566 
1567 	return 0;
1568 }
1569 
1570 /* marvell_read_status_page
1571  *
1572  * Description:
1573  *   Check the link, then figure out the current state
1574  *   by comparing what we advertise with what the link partner
1575  *   advertises.  Start by checking the gigabit possibilities,
1576  *   then move on to 10/100.
1577  */
1578 static int marvell_read_status_page(struct phy_device *phydev, int page)
1579 {
1580 	int status;
1581 	int fiber;
1582 	int err;
1583 
1584 	status = phy_read(phydev, MII_M1011_PHY_STATUS);
1585 	if (status < 0)
1586 		return status;
1587 
1588 	/* Use the generic register for copper link status,
1589 	 * and the PHY status register for fiber link status.
1590 	 */
1591 	if (page == MII_MARVELL_FIBER_PAGE) {
1592 		phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1593 	} else {
1594 		err = genphy_update_link(phydev);
1595 		if (err)
1596 			return err;
1597 	}
1598 
1599 	if (page == MII_MARVELL_FIBER_PAGE)
1600 		fiber = 1;
1601 	else
1602 		fiber = 0;
1603 
1604 	linkmode_zero(phydev->lp_advertising);
1605 	phydev->pause = 0;
1606 	phydev->asym_pause = 0;
1607 	phydev->speed = SPEED_UNKNOWN;
1608 	phydev->duplex = DUPLEX_UNKNOWN;
1609 	phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1610 
1611 	if (phydev->autoneg == AUTONEG_ENABLE)
1612 		err = marvell_read_status_page_an(phydev, fiber, status);
1613 	else
1614 		err = genphy_read_status_fixed(phydev);
1615 
1616 	return err;
1617 }
1618 
1619 /* marvell_read_status
1620  *
1621  * Some Marvell's phys have two modes: fiber and copper.
1622  * Both need status checked.
1623  * Description:
1624  *   First, check the fiber link and status.
1625  *   If the fiber link is down, check the copper link and status which
1626  *   will be the default value if both link are down.
1627  */
1628 static int marvell_read_status(struct phy_device *phydev)
1629 {
1630 	int err;
1631 
1632 	/* Check the fiber mode first */
1633 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1634 			      phydev->supported) &&
1635 	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1636 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1637 		if (err < 0)
1638 			goto error;
1639 
1640 		err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1641 		if (err < 0)
1642 			goto error;
1643 
1644 		/* If the fiber link is up, it is the selected and
1645 		 * used link. In this case, we need to stay in the
1646 		 * fiber page. Please to be careful about that, avoid
1647 		 * to restore Copper page in other functions which
1648 		 * could break the behaviour for some fiber phy like
1649 		 * 88E1512.
1650 		 */
1651 		if (phydev->link)
1652 			return 0;
1653 
1654 		/* If fiber link is down, check and save copper mode state */
1655 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1656 		if (err < 0)
1657 			goto error;
1658 	}
1659 
1660 	return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1661 
1662 error:
1663 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1664 	return err;
1665 }
1666 
1667 /* marvell_suspend
1668  *
1669  * Some Marvell's phys have two modes: fiber and copper.
1670  * Both need to be suspended
1671  */
1672 static int marvell_suspend(struct phy_device *phydev)
1673 {
1674 	int err;
1675 
1676 	/* Suspend the fiber mode first */
1677 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1678 			       phydev->supported)) {
1679 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1680 		if (err < 0)
1681 			goto error;
1682 
1683 		/* With the page set, use the generic suspend */
1684 		err = genphy_suspend(phydev);
1685 		if (err < 0)
1686 			goto error;
1687 
1688 		/* Then, the copper link */
1689 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1690 		if (err < 0)
1691 			goto error;
1692 	}
1693 
1694 	/* With the page set, use the generic suspend */
1695 	return genphy_suspend(phydev);
1696 
1697 error:
1698 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1699 	return err;
1700 }
1701 
1702 /* marvell_resume
1703  *
1704  * Some Marvell's phys have two modes: fiber and copper.
1705  * Both need to be resumed
1706  */
1707 static int marvell_resume(struct phy_device *phydev)
1708 {
1709 	int err;
1710 
1711 	/* Resume the fiber mode first */
1712 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1713 			       phydev->supported)) {
1714 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1715 		if (err < 0)
1716 			goto error;
1717 
1718 		/* With the page set, use the generic resume */
1719 		err = genphy_resume(phydev);
1720 		if (err < 0)
1721 			goto error;
1722 
1723 		/* Then, the copper link */
1724 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1725 		if (err < 0)
1726 			goto error;
1727 	}
1728 
1729 	/* With the page set, use the generic resume */
1730 	return genphy_resume(phydev);
1731 
1732 error:
1733 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1734 	return err;
1735 }
1736 
1737 static int marvell_aneg_done(struct phy_device *phydev)
1738 {
1739 	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1740 
1741 	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1742 }
1743 
1744 static void m88e1318_get_wol(struct phy_device *phydev,
1745 			     struct ethtool_wolinfo *wol)
1746 {
1747 	int ret;
1748 
1749 	wol->supported = WAKE_MAGIC;
1750 	wol->wolopts = 0;
1751 
1752 	ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1753 			     MII_88E1318S_PHY_WOL_CTRL);
1754 	if (ret >= 0 && ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1755 		wol->wolopts |= WAKE_MAGIC;
1756 }
1757 
1758 static int m88e1318_set_wol(struct phy_device *phydev,
1759 			    struct ethtool_wolinfo *wol)
1760 {
1761 	int err = 0, oldpage;
1762 
1763 	oldpage = phy_save_page(phydev);
1764 	if (oldpage < 0)
1765 		goto error;
1766 
1767 	if (wol->wolopts & WAKE_MAGIC) {
1768 		/* Explicitly switch to page 0x00, just to be sure */
1769 		err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1770 		if (err < 0)
1771 			goto error;
1772 
1773 		/* If WOL event happened once, the LED[2] interrupt pin
1774 		 * will not be cleared unless we reading the interrupt status
1775 		 * register. If interrupts are in use, the normal interrupt
1776 		 * handling will clear the WOL event. Clear the WOL event
1777 		 * before enabling it if !phy_interrupt_is_valid()
1778 		 */
1779 		if (!phy_interrupt_is_valid(phydev))
1780 			__phy_read(phydev, MII_M1011_IEVENT);
1781 
1782 		/* Enable the WOL interrupt */
1783 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1784 				     MII_88E1318S_PHY_CSIER_WOL_EIE);
1785 		if (err < 0)
1786 			goto error;
1787 
1788 		err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1789 		if (err < 0)
1790 			goto error;
1791 
1792 		/* Setup LED[2] as interrupt pin (active low) */
1793 		err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1794 				   MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1795 				   MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1796 				   MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1797 		if (err < 0)
1798 			goto error;
1799 
1800 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1801 		if (err < 0)
1802 			goto error;
1803 
1804 		/* Store the device address for the magic packet */
1805 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1806 				((phydev->attached_dev->dev_addr[5] << 8) |
1807 				 phydev->attached_dev->dev_addr[4]));
1808 		if (err < 0)
1809 			goto error;
1810 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1811 				((phydev->attached_dev->dev_addr[3] << 8) |
1812 				 phydev->attached_dev->dev_addr[2]));
1813 		if (err < 0)
1814 			goto error;
1815 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1816 				((phydev->attached_dev->dev_addr[1] << 8) |
1817 				 phydev->attached_dev->dev_addr[0]));
1818 		if (err < 0)
1819 			goto error;
1820 
1821 		/* Clear WOL status and enable magic packet matching */
1822 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1823 				     MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1824 				     MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1825 		if (err < 0)
1826 			goto error;
1827 	} else {
1828 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1829 		if (err < 0)
1830 			goto error;
1831 
1832 		/* Clear WOL status and disable magic packet matching */
1833 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1834 				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1835 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1836 		if (err < 0)
1837 			goto error;
1838 	}
1839 
1840 error:
1841 	return phy_restore_page(phydev, oldpage, err);
1842 }
1843 
1844 static int marvell_get_sset_count(struct phy_device *phydev)
1845 {
1846 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1847 			      phydev->supported))
1848 		return ARRAY_SIZE(marvell_hw_stats);
1849 	else
1850 		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1851 }
1852 
1853 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1854 {
1855 	int count = marvell_get_sset_count(phydev);
1856 	int i;
1857 
1858 	for (i = 0; i < count; i++) {
1859 		strlcpy(data + i * ETH_GSTRING_LEN,
1860 			marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1861 	}
1862 }
1863 
1864 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1865 {
1866 	struct marvell_hw_stat stat = marvell_hw_stats[i];
1867 	struct marvell_priv *priv = phydev->priv;
1868 	int val;
1869 	u64 ret;
1870 
1871 	val = phy_read_paged(phydev, stat.page, stat.reg);
1872 	if (val < 0) {
1873 		ret = U64_MAX;
1874 	} else {
1875 		val = val & ((1 << stat.bits) - 1);
1876 		priv->stats[i] += val;
1877 		ret = priv->stats[i];
1878 	}
1879 
1880 	return ret;
1881 }
1882 
1883 static void marvell_get_stats(struct phy_device *phydev,
1884 			      struct ethtool_stats *stats, u64 *data)
1885 {
1886 	int count = marvell_get_sset_count(phydev);
1887 	int i;
1888 
1889 	for (i = 0; i < count; i++)
1890 		data[i] = marvell_get_stat(phydev, i);
1891 }
1892 
1893 static int marvell_vct5_wait_complete(struct phy_device *phydev)
1894 {
1895 	int i;
1896 	int val;
1897 
1898 	for (i = 0; i < 32; i++) {
1899 		val = __phy_read(phydev, MII_VCT5_CTRL);
1900 		if (val < 0)
1901 			return val;
1902 
1903 		if (val & MII_VCT5_CTRL_COMPLETE)
1904 			return 0;
1905 	}
1906 
1907 	phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
1908 	return -ETIMEDOUT;
1909 }
1910 
1911 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
1912 {
1913 	int amplitude;
1914 	int val;
1915 	int reg;
1916 
1917 	reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
1918 	val = __phy_read(phydev, reg);
1919 
1920 	if (val < 0)
1921 		return 0;
1922 
1923 	amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
1924 		MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
1925 
1926 	if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
1927 		amplitude = -amplitude;
1928 
1929 	return 1000 * amplitude / 128;
1930 }
1931 
1932 static u32 marvell_vct5_distance2cm(int distance)
1933 {
1934 	return distance * 805 / 10;
1935 }
1936 
1937 static u32 marvell_vct5_cm2distance(int cm)
1938 {
1939 	return cm * 10 / 805;
1940 }
1941 
1942 static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
1943 					   int distance, int pair)
1944 {
1945 	u16 reg;
1946 	int err;
1947 	int mV;
1948 	int i;
1949 
1950 	err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
1951 			  distance);
1952 	if (err)
1953 		return err;
1954 
1955 	reg = MII_VCT5_CTRL_ENABLE |
1956 		MII_VCT5_CTRL_TX_SAME_CHANNEL |
1957 		MII_VCT5_CTRL_SAMPLES_DEFAULT |
1958 		MII_VCT5_CTRL_SAMPLE_POINT |
1959 		MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
1960 	err = __phy_write(phydev, MII_VCT5_CTRL, reg);
1961 	if (err)
1962 		return err;
1963 
1964 	err = marvell_vct5_wait_complete(phydev);
1965 	if (err)
1966 		return err;
1967 
1968 	for (i = 0; i < 4; i++) {
1969 		if (pair != PHY_PAIR_ALL && i != pair)
1970 			continue;
1971 
1972 		mV = marvell_vct5_amplitude(phydev, i);
1973 		ethnl_cable_test_amplitude(phydev, i, mV);
1974 	}
1975 
1976 	return 0;
1977 }
1978 
1979 static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
1980 {
1981 	struct marvell_priv *priv = phydev->priv;
1982 	int distance;
1983 	u16 width;
1984 	int page;
1985 	int err;
1986 	u16 reg;
1987 
1988 	if (priv->first <= TDR_SHORT_CABLE_LENGTH)
1989 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
1990 	else
1991 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
1992 
1993 	reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
1994 		MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
1995 		MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
1996 
1997 	err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1998 			      MII_VCT5_TX_PULSE_CTRL, reg);
1999 	if (err)
2000 		return err;
2001 
2002 	/* Reading the TDR data is very MDIO heavy. We need to optimize
2003 	 * access to keep the time to a minimum. So lock the bus once,
2004 	 * and don't release it until complete. We can then avoid having
2005 	 * to change the page for every access, greatly speeding things
2006 	 * up.
2007 	 */
2008 	page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2009 	if (page < 0)
2010 		goto restore_page;
2011 
2012 	for (distance = priv->first;
2013 	     distance <= priv->last;
2014 	     distance += priv->step) {
2015 		err = marvell_vct5_amplitude_distance(phydev, distance,
2016 						      priv->pair);
2017 		if (err)
2018 			goto restore_page;
2019 
2020 		if (distance > TDR_SHORT_CABLE_LENGTH &&
2021 		    width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2022 			width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2023 			reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2024 				MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2025 				MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2026 			err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2027 			if (err)
2028 				goto restore_page;
2029 		}
2030 	}
2031 
2032 restore_page:
2033 	return phy_restore_page(phydev, page, err);
2034 }
2035 
2036 static int marvell_cable_test_start_common(struct phy_device *phydev)
2037 {
2038 	int bmcr, bmsr, ret;
2039 
2040 	/* If auto-negotiation is enabled, but not complete, the cable
2041 	 * test never completes. So disable auto-neg.
2042 	 */
2043 	bmcr = phy_read(phydev, MII_BMCR);
2044 	if (bmcr < 0)
2045 		return bmcr;
2046 
2047 	bmsr = phy_read(phydev, MII_BMSR);
2048 
2049 	if (bmsr < 0)
2050 		return bmsr;
2051 
2052 	if (bmcr & BMCR_ANENABLE) {
2053 		ret =  phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2054 		if (ret < 0)
2055 			return ret;
2056 		ret = genphy_soft_reset(phydev);
2057 		if (ret < 0)
2058 			return ret;
2059 	}
2060 
2061 	/* If the link is up, allow it some time to go down */
2062 	if (bmsr & BMSR_LSTATUS)
2063 		msleep(1500);
2064 
2065 	return 0;
2066 }
2067 
2068 static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2069 {
2070 	struct marvell_priv *priv = phydev->priv;
2071 	int ret;
2072 
2073 	ret = marvell_cable_test_start_common(phydev);
2074 	if (ret)
2075 		return ret;
2076 
2077 	priv->cable_test_tdr = false;
2078 
2079 	/* Reset the VCT5 API control to defaults, otherwise
2080 	 * VCT7 does not work correctly.
2081 	 */
2082 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2083 			      MII_VCT5_CTRL,
2084 			      MII_VCT5_CTRL_TX_SAME_CHANNEL |
2085 			      MII_VCT5_CTRL_SAMPLES_DEFAULT |
2086 			      MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2087 			      MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2088 	if (ret)
2089 		return ret;
2090 
2091 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2092 			      MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2093 	if (ret)
2094 		return ret;
2095 
2096 	return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2097 			       MII_VCT7_CTRL,
2098 			       MII_VCT7_CTRL_RUN_NOW |
2099 			       MII_VCT7_CTRL_CENTIMETERS);
2100 }
2101 
2102 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2103 					     const struct phy_tdr_config *cfg)
2104 {
2105 	struct marvell_priv *priv = phydev->priv;
2106 	int ret;
2107 
2108 	priv->cable_test_tdr = true;
2109 	priv->first = marvell_vct5_cm2distance(cfg->first);
2110 	priv->last = marvell_vct5_cm2distance(cfg->last);
2111 	priv->step = marvell_vct5_cm2distance(cfg->step);
2112 	priv->pair = cfg->pair;
2113 
2114 	if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2115 		return -EINVAL;
2116 
2117 	if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2118 		return -EINVAL;
2119 
2120 	/* Disable  VCT7 */
2121 	ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2122 			      MII_VCT7_CTRL, 0);
2123 	if (ret)
2124 		return ret;
2125 
2126 	ret = marvell_cable_test_start_common(phydev);
2127 	if (ret)
2128 		return ret;
2129 
2130 	ret = ethnl_cable_test_pulse(phydev, 1000);
2131 	if (ret)
2132 		return ret;
2133 
2134 	return ethnl_cable_test_step(phydev,
2135 				     marvell_vct5_distance2cm(priv->first),
2136 				     marvell_vct5_distance2cm(priv->last),
2137 				     marvell_vct5_distance2cm(priv->step));
2138 }
2139 
2140 static int marvell_vct7_distance_to_length(int distance, bool meter)
2141 {
2142 	if (meter)
2143 		distance *= 100;
2144 
2145 	return distance;
2146 }
2147 
2148 static bool marvell_vct7_distance_valid(int result)
2149 {
2150 	switch (result) {
2151 	case MII_VCT7_RESULTS_OPEN:
2152 	case MII_VCT7_RESULTS_SAME_SHORT:
2153 	case MII_VCT7_RESULTS_CROSS_SHORT:
2154 		return true;
2155 	}
2156 	return false;
2157 }
2158 
2159 static int marvell_vct7_report_length(struct phy_device *phydev,
2160 				      int pair, bool meter)
2161 {
2162 	int length;
2163 	int ret;
2164 
2165 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2166 			     MII_VCT7_PAIR_0_DISTANCE + pair);
2167 	if (ret < 0)
2168 		return ret;
2169 
2170 	length = marvell_vct7_distance_to_length(ret, meter);
2171 
2172 	ethnl_cable_test_fault_length(phydev, pair, length);
2173 
2174 	return 0;
2175 }
2176 
2177 static int marvell_vct7_cable_test_report_trans(int result)
2178 {
2179 	switch (result) {
2180 	case MII_VCT7_RESULTS_OK:
2181 		return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2182 	case MII_VCT7_RESULTS_OPEN:
2183 		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2184 	case MII_VCT7_RESULTS_SAME_SHORT:
2185 		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2186 	case MII_VCT7_RESULTS_CROSS_SHORT:
2187 		return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2188 	default:
2189 		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2190 	}
2191 }
2192 
2193 static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2194 {
2195 	int pair0, pair1, pair2, pair3;
2196 	bool meter;
2197 	int ret;
2198 
2199 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2200 			     MII_VCT7_RESULTS);
2201 	if (ret < 0)
2202 		return ret;
2203 
2204 	pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2205 		MII_VCT7_RESULTS_PAIR3_SHIFT;
2206 	pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2207 		MII_VCT7_RESULTS_PAIR2_SHIFT;
2208 	pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2209 		MII_VCT7_RESULTS_PAIR1_SHIFT;
2210 	pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2211 		MII_VCT7_RESULTS_PAIR0_SHIFT;
2212 
2213 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2214 				marvell_vct7_cable_test_report_trans(pair0));
2215 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2216 				marvell_vct7_cable_test_report_trans(pair1));
2217 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2218 				marvell_vct7_cable_test_report_trans(pair2));
2219 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2220 				marvell_vct7_cable_test_report_trans(pair3));
2221 
2222 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2223 	if (ret < 0)
2224 		return ret;
2225 
2226 	meter = ret & MII_VCT7_CTRL_METERS;
2227 
2228 	if (marvell_vct7_distance_valid(pair0))
2229 		marvell_vct7_report_length(phydev, 0, meter);
2230 	if (marvell_vct7_distance_valid(pair1))
2231 		marvell_vct7_report_length(phydev, 1, meter);
2232 	if (marvell_vct7_distance_valid(pair2))
2233 		marvell_vct7_report_length(phydev, 2, meter);
2234 	if (marvell_vct7_distance_valid(pair3))
2235 		marvell_vct7_report_length(phydev, 3, meter);
2236 
2237 	return 0;
2238 }
2239 
2240 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2241 					      bool *finished)
2242 {
2243 	struct marvell_priv *priv = phydev->priv;
2244 	int ret;
2245 
2246 	if (priv->cable_test_tdr) {
2247 		ret = marvell_vct5_amplitude_graph(phydev);
2248 		*finished = true;
2249 		return ret;
2250 	}
2251 
2252 	*finished = false;
2253 
2254 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2255 			     MII_VCT7_CTRL);
2256 
2257 	if (ret < 0)
2258 		return ret;
2259 
2260 	if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2261 		*finished = true;
2262 
2263 		return marvell_vct7_cable_test_report(phydev);
2264 	}
2265 
2266 	return 0;
2267 }
2268 
2269 #ifdef CONFIG_HWMON
2270 struct marvell_hwmon_ops {
2271 	int (*config)(struct phy_device *phydev);
2272 	int (*get_temp)(struct phy_device *phydev, long *temp);
2273 	int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2274 	int (*set_temp_critical)(struct phy_device *phydev, long temp);
2275 	int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2276 };
2277 
2278 static const struct marvell_hwmon_ops *
2279 to_marvell_hwmon_ops(const struct phy_device *phydev)
2280 {
2281 	return phydev->drv->driver_data;
2282 }
2283 
2284 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2285 {
2286 	int oldpage;
2287 	int ret = 0;
2288 	int val;
2289 
2290 	*temp = 0;
2291 
2292 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2293 	if (oldpage < 0)
2294 		goto error;
2295 
2296 	/* Enable temperature sensor */
2297 	ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2298 	if (ret < 0)
2299 		goto error;
2300 
2301 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2302 			  ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2303 	if (ret < 0)
2304 		goto error;
2305 
2306 	/* Wait for temperature to stabilize */
2307 	usleep_range(10000, 12000);
2308 
2309 	val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2310 	if (val < 0) {
2311 		ret = val;
2312 		goto error;
2313 	}
2314 
2315 	/* Disable temperature sensor */
2316 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2317 			  ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2318 	if (ret < 0)
2319 		goto error;
2320 
2321 	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2322 
2323 error:
2324 	return phy_restore_page(phydev, oldpage, ret);
2325 }
2326 
2327 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2328 {
2329 	int ret;
2330 
2331 	*temp = 0;
2332 
2333 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2334 			     MII_88E1510_TEMP_SENSOR);
2335 	if (ret < 0)
2336 		return ret;
2337 
2338 	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2339 
2340 	return 0;
2341 }
2342 
2343 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2344 {
2345 	int ret;
2346 
2347 	*temp = 0;
2348 
2349 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2350 			     MII_88E1121_MISC_TEST);
2351 	if (ret < 0)
2352 		return ret;
2353 
2354 	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2355 		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2356 	/* convert to mC */
2357 	*temp *= 1000;
2358 
2359 	return 0;
2360 }
2361 
2362 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2363 {
2364 	temp = temp / 1000;
2365 	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2366 
2367 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2368 				MII_88E1121_MISC_TEST,
2369 				MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2370 				temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2371 }
2372 
2373 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2374 {
2375 	int ret;
2376 
2377 	*alarm = false;
2378 
2379 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2380 			     MII_88E1121_MISC_TEST);
2381 	if (ret < 0)
2382 		return ret;
2383 
2384 	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2385 
2386 	return 0;
2387 }
2388 
2389 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2390 {
2391 	int sum = 0;
2392 	int oldpage;
2393 	int ret = 0;
2394 	int i;
2395 
2396 	*temp = 0;
2397 
2398 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2399 	if (oldpage < 0)
2400 		goto error;
2401 
2402 	/* Enable temperature sensor */
2403 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2404 	if (ret < 0)
2405 		goto error;
2406 
2407 	ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2408 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2409 
2410 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2411 	if (ret < 0)
2412 		goto error;
2413 
2414 	/* Wait for temperature to stabilize */
2415 	usleep_range(10000, 12000);
2416 
2417 	/* Reading the temperature sense has an errata. You need to read
2418 	 * a number of times and take an average.
2419 	 */
2420 	for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2421 		ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2422 		if (ret < 0)
2423 			goto error;
2424 		sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2425 	}
2426 
2427 	sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2428 	*temp = (sum  - 75) * 1000;
2429 
2430 	/* Disable temperature sensor */
2431 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2432 	if (ret < 0)
2433 		goto error;
2434 
2435 	ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2436 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2437 
2438 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2439 
2440 error:
2441 	phy_restore_page(phydev, oldpage, ret);
2442 
2443 	return ret;
2444 }
2445 
2446 static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2447 {
2448 	int err;
2449 
2450 	err = m88e1510_get_temp(phydev, temp);
2451 
2452 	/* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2453 	 * T + 75, so we have to subtract another 50
2454 	 */
2455 	*temp -= 50000;
2456 
2457 	return err;
2458 }
2459 
2460 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2461 {
2462 	int ret;
2463 
2464 	*temp = 0;
2465 
2466 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2467 			     MII_88E6390_TEMP_SENSOR);
2468 	if (ret < 0)
2469 		return ret;
2470 
2471 	*temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2472 		  MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2473 
2474 	return 0;
2475 }
2476 
2477 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2478 {
2479 	temp = (temp / 1000) + 75;
2480 
2481 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2482 				MII_88E6390_TEMP_SENSOR,
2483 				MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
2484 				temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
2485 }
2486 
2487 static int m88e6393_hwmon_config(struct phy_device *phydev)
2488 {
2489 	int err;
2490 
2491 	err = m88e6393_set_temp_critical(phydev, 100000);
2492 	if (err)
2493 		return err;
2494 
2495 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2496 				MII_88E6390_MISC_TEST,
2497 				MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
2498 				MII_88E6393_MISC_TEST_SAMPLES_MASK |
2499 				MII_88E6393_MISC_TEST_RATE_MASK,
2500 				MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
2501 				MII_88E6393_MISC_TEST_SAMPLES_2048 |
2502 				MII_88E6393_MISC_TEST_RATE_2_3MS);
2503 }
2504 
2505 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
2506 			      u32 attr, int channel, long *temp)
2507 {
2508 	struct phy_device *phydev = dev_get_drvdata(dev);
2509 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2510 	int err = -EOPNOTSUPP;
2511 
2512 	switch (attr) {
2513 	case hwmon_temp_input:
2514 		if (ops->get_temp)
2515 			err = ops->get_temp(phydev, temp);
2516 		break;
2517 	case hwmon_temp_crit:
2518 		if (ops->get_temp_critical)
2519 			err = ops->get_temp_critical(phydev, temp);
2520 		break;
2521 	case hwmon_temp_max_alarm:
2522 		if (ops->get_temp_alarm)
2523 			err = ops->get_temp_alarm(phydev, temp);
2524 		break;
2525 	}
2526 
2527 	return err;
2528 }
2529 
2530 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
2531 			       u32 attr, int channel, long temp)
2532 {
2533 	struct phy_device *phydev = dev_get_drvdata(dev);
2534 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2535 	int err = -EOPNOTSUPP;
2536 
2537 	switch (attr) {
2538 	case hwmon_temp_crit:
2539 		if (ops->set_temp_critical)
2540 			err = ops->set_temp_critical(phydev, temp);
2541 		break;
2542 	}
2543 
2544 	return err;
2545 }
2546 
2547 static umode_t marvell_hwmon_is_visible(const void *data,
2548 					enum hwmon_sensor_types type,
2549 					u32 attr, int channel)
2550 {
2551 	const struct phy_device *phydev = data;
2552 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2553 
2554 	if (type != hwmon_temp)
2555 		return 0;
2556 
2557 	switch (attr) {
2558 	case hwmon_temp_input:
2559 		return ops->get_temp ? 0444 : 0;
2560 	case hwmon_temp_max_alarm:
2561 		return ops->get_temp_alarm ? 0444 : 0;
2562 	case hwmon_temp_crit:
2563 		return (ops->get_temp_critical ? 0444 : 0) |
2564 		       (ops->set_temp_critical ? 0200 : 0);
2565 	default:
2566 		return 0;
2567 	}
2568 }
2569 
2570 static u32 marvell_hwmon_chip_config[] = {
2571 	HWMON_C_REGISTER_TZ,
2572 	0
2573 };
2574 
2575 static const struct hwmon_channel_info marvell_hwmon_chip = {
2576 	.type = hwmon_chip,
2577 	.config = marvell_hwmon_chip_config,
2578 };
2579 
2580 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
2581  * defined for all PHYs, because the hwmon code checks whether the attributes
2582  * exists via the .is_visible method
2583  */
2584 static u32 marvell_hwmon_temp_config[] = {
2585 	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2586 	0
2587 };
2588 
2589 static const struct hwmon_channel_info marvell_hwmon_temp = {
2590 	.type = hwmon_temp,
2591 	.config = marvell_hwmon_temp_config,
2592 };
2593 
2594 static const struct hwmon_channel_info *marvell_hwmon_info[] = {
2595 	&marvell_hwmon_chip,
2596 	&marvell_hwmon_temp,
2597 	NULL
2598 };
2599 
2600 static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
2601 	.is_visible = marvell_hwmon_is_visible,
2602 	.read = marvell_hwmon_read,
2603 	.write = marvell_hwmon_write,
2604 };
2605 
2606 static const struct hwmon_chip_info marvell_hwmon_chip_info = {
2607 	.ops = &marvell_hwmon_hwmon_ops,
2608 	.info = marvell_hwmon_info,
2609 };
2610 
2611 static int marvell_hwmon_name(struct phy_device *phydev)
2612 {
2613 	struct marvell_priv *priv = phydev->priv;
2614 	struct device *dev = &phydev->mdio.dev;
2615 	const char *devname = dev_name(dev);
2616 	size_t len = strlen(devname);
2617 	int i, j;
2618 
2619 	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2620 	if (!priv->hwmon_name)
2621 		return -ENOMEM;
2622 
2623 	for (i = j = 0; i < len && devname[i]; i++) {
2624 		if (isalnum(devname[i]))
2625 			priv->hwmon_name[j++] = devname[i];
2626 	}
2627 
2628 	return 0;
2629 }
2630 
2631 static int marvell_hwmon_probe(struct phy_device *phydev)
2632 {
2633 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2634 	struct marvell_priv *priv = phydev->priv;
2635 	struct device *dev = &phydev->mdio.dev;
2636 	int err;
2637 
2638 	if (!ops)
2639 		return 0;
2640 
2641 	err = marvell_hwmon_name(phydev);
2642 	if (err)
2643 		return err;
2644 
2645 	priv->hwmon_dev = devm_hwmon_device_register_with_info(
2646 		dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
2647 	if (IS_ERR(priv->hwmon_dev))
2648 		return PTR_ERR(priv->hwmon_dev);
2649 
2650 	if (ops->config)
2651 		err = ops->config(phydev);
2652 
2653 	return err;
2654 }
2655 
2656 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
2657 	.get_temp = m88e1121_get_temp,
2658 };
2659 
2660 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
2661 	.get_temp = m88e1510_get_temp,
2662 	.get_temp_critical = m88e1510_get_temp_critical,
2663 	.set_temp_critical = m88e1510_set_temp_critical,
2664 	.get_temp_alarm = m88e1510_get_temp_alarm,
2665 };
2666 
2667 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
2668 	.get_temp = m88e6390_get_temp,
2669 };
2670 
2671 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
2672 	.config = m88e6393_hwmon_config,
2673 	.get_temp = m88e6393_get_temp,
2674 	.get_temp_critical = m88e6393_get_temp_critical,
2675 	.set_temp_critical = m88e6393_set_temp_critical,
2676 	.get_temp_alarm = m88e1510_get_temp_alarm,
2677 };
2678 
2679 #define DEF_MARVELL_HWMON_OPS(s) (&(s))
2680 
2681 #else
2682 
2683 #define DEF_MARVELL_HWMON_OPS(s) NULL
2684 
2685 static int marvell_hwmon_probe(struct phy_device *phydev)
2686 {
2687 	return 0;
2688 }
2689 #endif
2690 
2691 static int marvell_probe(struct phy_device *phydev)
2692 {
2693 	struct marvell_priv *priv;
2694 
2695 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2696 	if (!priv)
2697 		return -ENOMEM;
2698 
2699 	phydev->priv = priv;
2700 
2701 	return marvell_hwmon_probe(phydev);
2702 }
2703 
2704 static struct phy_driver marvell_drivers[] = {
2705 	{
2706 		.phy_id = MARVELL_PHY_ID_88E1101,
2707 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2708 		.name = "Marvell 88E1101",
2709 		/* PHY_GBIT_FEATURES */
2710 		.probe = marvell_probe,
2711 		.config_init = marvell_config_init,
2712 		.config_aneg = m88e1101_config_aneg,
2713 		.config_intr = marvell_config_intr,
2714 		.handle_interrupt = marvell_handle_interrupt,
2715 		.resume = genphy_resume,
2716 		.suspend = genphy_suspend,
2717 		.read_page = marvell_read_page,
2718 		.write_page = marvell_write_page,
2719 		.get_sset_count = marvell_get_sset_count,
2720 		.get_strings = marvell_get_strings,
2721 		.get_stats = marvell_get_stats,
2722 	},
2723 	{
2724 		.phy_id = MARVELL_PHY_ID_88E1112,
2725 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2726 		.name = "Marvell 88E1112",
2727 		/* PHY_GBIT_FEATURES */
2728 		.probe = marvell_probe,
2729 		.config_init = m88e1112_config_init,
2730 		.config_aneg = marvell_config_aneg,
2731 		.config_intr = marvell_config_intr,
2732 		.handle_interrupt = marvell_handle_interrupt,
2733 		.resume = genphy_resume,
2734 		.suspend = genphy_suspend,
2735 		.read_page = marvell_read_page,
2736 		.write_page = marvell_write_page,
2737 		.get_sset_count = marvell_get_sset_count,
2738 		.get_strings = marvell_get_strings,
2739 		.get_stats = marvell_get_stats,
2740 		.get_tunable = m88e1011_get_tunable,
2741 		.set_tunable = m88e1011_set_tunable,
2742 	},
2743 	{
2744 		.phy_id = MARVELL_PHY_ID_88E1111,
2745 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2746 		.name = "Marvell 88E1111",
2747 		/* PHY_GBIT_FEATURES */
2748 		.probe = marvell_probe,
2749 		.config_init = m88e1111gbe_config_init,
2750 		.config_aneg = m88e1111_config_aneg,
2751 		.read_status = marvell_read_status,
2752 		.config_intr = marvell_config_intr,
2753 		.handle_interrupt = marvell_handle_interrupt,
2754 		.resume = genphy_resume,
2755 		.suspend = genphy_suspend,
2756 		.read_page = marvell_read_page,
2757 		.write_page = marvell_write_page,
2758 		.get_sset_count = marvell_get_sset_count,
2759 		.get_strings = marvell_get_strings,
2760 		.get_stats = marvell_get_stats,
2761 		.get_tunable = m88e1111_get_tunable,
2762 		.set_tunable = m88e1111_set_tunable,
2763 	},
2764 	{
2765 		.phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
2766 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2767 		.name = "Marvell 88E1111 (Finisar)",
2768 		/* PHY_GBIT_FEATURES */
2769 		.probe = marvell_probe,
2770 		.config_init = m88e1111gbe_config_init,
2771 		.config_aneg = m88e1111_config_aneg,
2772 		.read_status = marvell_read_status,
2773 		.config_intr = marvell_config_intr,
2774 		.handle_interrupt = marvell_handle_interrupt,
2775 		.resume = genphy_resume,
2776 		.suspend = genphy_suspend,
2777 		.read_page = marvell_read_page,
2778 		.write_page = marvell_write_page,
2779 		.get_sset_count = marvell_get_sset_count,
2780 		.get_strings = marvell_get_strings,
2781 		.get_stats = marvell_get_stats,
2782 		.get_tunable = m88e1111_get_tunable,
2783 		.set_tunable = m88e1111_set_tunable,
2784 	},
2785 	{
2786 		.phy_id = MARVELL_PHY_ID_88E1118,
2787 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2788 		.name = "Marvell 88E1118",
2789 		/* PHY_GBIT_FEATURES */
2790 		.probe = marvell_probe,
2791 		.config_init = m88e1118_config_init,
2792 		.config_aneg = m88e1118_config_aneg,
2793 		.config_intr = marvell_config_intr,
2794 		.handle_interrupt = marvell_handle_interrupt,
2795 		.resume = genphy_resume,
2796 		.suspend = genphy_suspend,
2797 		.read_page = marvell_read_page,
2798 		.write_page = marvell_write_page,
2799 		.get_sset_count = marvell_get_sset_count,
2800 		.get_strings = marvell_get_strings,
2801 		.get_stats = marvell_get_stats,
2802 	},
2803 	{
2804 		.phy_id = MARVELL_PHY_ID_88E1121R,
2805 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2806 		.name = "Marvell 88E1121R",
2807 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
2808 		/* PHY_GBIT_FEATURES */
2809 		.probe = marvell_probe,
2810 		.config_init = marvell_1011gbe_config_init,
2811 		.config_aneg = m88e1121_config_aneg,
2812 		.read_status = marvell_read_status,
2813 		.config_intr = marvell_config_intr,
2814 		.handle_interrupt = marvell_handle_interrupt,
2815 		.resume = genphy_resume,
2816 		.suspend = genphy_suspend,
2817 		.read_page = marvell_read_page,
2818 		.write_page = marvell_write_page,
2819 		.get_sset_count = marvell_get_sset_count,
2820 		.get_strings = marvell_get_strings,
2821 		.get_stats = marvell_get_stats,
2822 		.get_tunable = m88e1011_get_tunable,
2823 		.set_tunable = m88e1011_set_tunable,
2824 	},
2825 	{
2826 		.phy_id = MARVELL_PHY_ID_88E1318S,
2827 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2828 		.name = "Marvell 88E1318S",
2829 		/* PHY_GBIT_FEATURES */
2830 		.probe = marvell_probe,
2831 		.config_init = m88e1318_config_init,
2832 		.config_aneg = m88e1318_config_aneg,
2833 		.read_status = marvell_read_status,
2834 		.config_intr = marvell_config_intr,
2835 		.handle_interrupt = marvell_handle_interrupt,
2836 		.get_wol = m88e1318_get_wol,
2837 		.set_wol = m88e1318_set_wol,
2838 		.resume = genphy_resume,
2839 		.suspend = genphy_suspend,
2840 		.read_page = marvell_read_page,
2841 		.write_page = marvell_write_page,
2842 		.get_sset_count = marvell_get_sset_count,
2843 		.get_strings = marvell_get_strings,
2844 		.get_stats = marvell_get_stats,
2845 	},
2846 	{
2847 		.phy_id = MARVELL_PHY_ID_88E1145,
2848 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2849 		.name = "Marvell 88E1145",
2850 		/* PHY_GBIT_FEATURES */
2851 		.probe = marvell_probe,
2852 		.config_init = m88e1145_config_init,
2853 		.config_aneg = m88e1101_config_aneg,
2854 		.config_intr = marvell_config_intr,
2855 		.handle_interrupt = marvell_handle_interrupt,
2856 		.resume = genphy_resume,
2857 		.suspend = genphy_suspend,
2858 		.read_page = marvell_read_page,
2859 		.write_page = marvell_write_page,
2860 		.get_sset_count = marvell_get_sset_count,
2861 		.get_strings = marvell_get_strings,
2862 		.get_stats = marvell_get_stats,
2863 		.get_tunable = m88e1111_get_tunable,
2864 		.set_tunable = m88e1111_set_tunable,
2865 	},
2866 	{
2867 		.phy_id = MARVELL_PHY_ID_88E1149R,
2868 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2869 		.name = "Marvell 88E1149R",
2870 		/* PHY_GBIT_FEATURES */
2871 		.probe = marvell_probe,
2872 		.config_init = m88e1149_config_init,
2873 		.config_aneg = m88e1118_config_aneg,
2874 		.config_intr = marvell_config_intr,
2875 		.handle_interrupt = marvell_handle_interrupt,
2876 		.resume = genphy_resume,
2877 		.suspend = genphy_suspend,
2878 		.read_page = marvell_read_page,
2879 		.write_page = marvell_write_page,
2880 		.get_sset_count = marvell_get_sset_count,
2881 		.get_strings = marvell_get_strings,
2882 		.get_stats = marvell_get_stats,
2883 	},
2884 	{
2885 		.phy_id = MARVELL_PHY_ID_88E1240,
2886 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2887 		.name = "Marvell 88E1240",
2888 		/* PHY_GBIT_FEATURES */
2889 		.probe = marvell_probe,
2890 		.config_init = m88e1112_config_init,
2891 		.config_aneg = marvell_config_aneg,
2892 		.config_intr = marvell_config_intr,
2893 		.handle_interrupt = marvell_handle_interrupt,
2894 		.resume = genphy_resume,
2895 		.suspend = genphy_suspend,
2896 		.read_page = marvell_read_page,
2897 		.write_page = marvell_write_page,
2898 		.get_sset_count = marvell_get_sset_count,
2899 		.get_strings = marvell_get_strings,
2900 		.get_stats = marvell_get_stats,
2901 		.get_tunable = m88e1011_get_tunable,
2902 		.set_tunable = m88e1011_set_tunable,
2903 	},
2904 	{
2905 		.phy_id = MARVELL_PHY_ID_88E1116R,
2906 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2907 		.name = "Marvell 88E1116R",
2908 		/* PHY_GBIT_FEATURES */
2909 		.probe = marvell_probe,
2910 		.config_init = m88e1116r_config_init,
2911 		.config_intr = marvell_config_intr,
2912 		.handle_interrupt = marvell_handle_interrupt,
2913 		.resume = genphy_resume,
2914 		.suspend = genphy_suspend,
2915 		.read_page = marvell_read_page,
2916 		.write_page = marvell_write_page,
2917 		.get_sset_count = marvell_get_sset_count,
2918 		.get_strings = marvell_get_strings,
2919 		.get_stats = marvell_get_stats,
2920 		.get_tunable = m88e1011_get_tunable,
2921 		.set_tunable = m88e1011_set_tunable,
2922 	},
2923 	{
2924 		.phy_id = MARVELL_PHY_ID_88E1510,
2925 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2926 		.name = "Marvell 88E1510",
2927 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2928 		.features = PHY_GBIT_FIBRE_FEATURES,
2929 		.flags = PHY_POLL_CABLE_TEST,
2930 		.probe = marvell_probe,
2931 		.config_init = m88e1510_config_init,
2932 		.config_aneg = m88e1510_config_aneg,
2933 		.read_status = marvell_read_status,
2934 		.config_intr = marvell_config_intr,
2935 		.handle_interrupt = marvell_handle_interrupt,
2936 		.get_wol = m88e1318_get_wol,
2937 		.set_wol = m88e1318_set_wol,
2938 		.resume = marvell_resume,
2939 		.suspend = marvell_suspend,
2940 		.read_page = marvell_read_page,
2941 		.write_page = marvell_write_page,
2942 		.get_sset_count = marvell_get_sset_count,
2943 		.get_strings = marvell_get_strings,
2944 		.get_stats = marvell_get_stats,
2945 		.set_loopback = genphy_loopback,
2946 		.get_tunable = m88e1011_get_tunable,
2947 		.set_tunable = m88e1011_set_tunable,
2948 		.cable_test_start = marvell_vct7_cable_test_start,
2949 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2950 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
2951 	},
2952 	{
2953 		.phy_id = MARVELL_PHY_ID_88E1540,
2954 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2955 		.name = "Marvell 88E1540",
2956 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2957 		/* PHY_GBIT_FEATURES */
2958 		.flags = PHY_POLL_CABLE_TEST,
2959 		.probe = marvell_probe,
2960 		.config_init = marvell_1011gbe_config_init,
2961 		.config_aneg = m88e1510_config_aneg,
2962 		.read_status = marvell_read_status,
2963 		.config_intr = marvell_config_intr,
2964 		.handle_interrupt = marvell_handle_interrupt,
2965 		.resume = genphy_resume,
2966 		.suspend = genphy_suspend,
2967 		.read_page = marvell_read_page,
2968 		.write_page = marvell_write_page,
2969 		.get_sset_count = marvell_get_sset_count,
2970 		.get_strings = marvell_get_strings,
2971 		.get_stats = marvell_get_stats,
2972 		.get_tunable = m88e1540_get_tunable,
2973 		.set_tunable = m88e1540_set_tunable,
2974 		.cable_test_start = marvell_vct7_cable_test_start,
2975 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2976 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
2977 	},
2978 	{
2979 		.phy_id = MARVELL_PHY_ID_88E1545,
2980 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2981 		.name = "Marvell 88E1545",
2982 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2983 		.probe = marvell_probe,
2984 		/* PHY_GBIT_FEATURES */
2985 		.flags = PHY_POLL_CABLE_TEST,
2986 		.config_init = marvell_1011gbe_config_init,
2987 		.config_aneg = m88e1510_config_aneg,
2988 		.read_status = marvell_read_status,
2989 		.config_intr = marvell_config_intr,
2990 		.handle_interrupt = marvell_handle_interrupt,
2991 		.resume = genphy_resume,
2992 		.suspend = genphy_suspend,
2993 		.read_page = marvell_read_page,
2994 		.write_page = marvell_write_page,
2995 		.get_sset_count = marvell_get_sset_count,
2996 		.get_strings = marvell_get_strings,
2997 		.get_stats = marvell_get_stats,
2998 		.get_tunable = m88e1540_get_tunable,
2999 		.set_tunable = m88e1540_set_tunable,
3000 		.cable_test_start = marvell_vct7_cable_test_start,
3001 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3002 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3003 	},
3004 	{
3005 		.phy_id = MARVELL_PHY_ID_88E3016,
3006 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3007 		.name = "Marvell 88E3016",
3008 		/* PHY_BASIC_FEATURES */
3009 		.probe = marvell_probe,
3010 		.config_init = m88e3016_config_init,
3011 		.aneg_done = marvell_aneg_done,
3012 		.read_status = marvell_read_status,
3013 		.config_intr = marvell_config_intr,
3014 		.handle_interrupt = marvell_handle_interrupt,
3015 		.resume = genphy_resume,
3016 		.suspend = genphy_suspend,
3017 		.read_page = marvell_read_page,
3018 		.write_page = marvell_write_page,
3019 		.get_sset_count = marvell_get_sset_count,
3020 		.get_strings = marvell_get_strings,
3021 		.get_stats = marvell_get_stats,
3022 	},
3023 	{
3024 		.phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
3025 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3026 		.name = "Marvell 88E6341 Family",
3027 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3028 		/* PHY_GBIT_FEATURES */
3029 		.flags = PHY_POLL_CABLE_TEST,
3030 		.probe = marvell_probe,
3031 		.config_init = marvell_1011gbe_config_init,
3032 		.config_aneg = m88e6390_config_aneg,
3033 		.read_status = marvell_read_status,
3034 		.config_intr = marvell_config_intr,
3035 		.handle_interrupt = marvell_handle_interrupt,
3036 		.resume = genphy_resume,
3037 		.suspend = genphy_suspend,
3038 		.read_page = marvell_read_page,
3039 		.write_page = marvell_write_page,
3040 		.get_sset_count = marvell_get_sset_count,
3041 		.get_strings = marvell_get_strings,
3042 		.get_stats = marvell_get_stats,
3043 		.get_tunable = m88e1540_get_tunable,
3044 		.set_tunable = m88e1540_set_tunable,
3045 		.cable_test_start = marvell_vct7_cable_test_start,
3046 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3047 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3048 	},
3049 	{
3050 		.phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
3051 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3052 		.name = "Marvell 88E6390 Family",
3053 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
3054 		/* PHY_GBIT_FEATURES */
3055 		.flags = PHY_POLL_CABLE_TEST,
3056 		.probe = marvell_probe,
3057 		.config_init = marvell_1011gbe_config_init,
3058 		.config_aneg = m88e6390_config_aneg,
3059 		.read_status = marvell_read_status,
3060 		.config_intr = marvell_config_intr,
3061 		.handle_interrupt = marvell_handle_interrupt,
3062 		.resume = genphy_resume,
3063 		.suspend = genphy_suspend,
3064 		.read_page = marvell_read_page,
3065 		.write_page = marvell_write_page,
3066 		.get_sset_count = marvell_get_sset_count,
3067 		.get_strings = marvell_get_strings,
3068 		.get_stats = marvell_get_stats,
3069 		.get_tunable = m88e1540_get_tunable,
3070 		.set_tunable = m88e1540_set_tunable,
3071 		.cable_test_start = marvell_vct7_cable_test_start,
3072 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3073 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3074 	},
3075 	{
3076 		.phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
3077 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3078 		.name = "Marvell 88E6393 Family",
3079 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
3080 		/* PHY_GBIT_FEATURES */
3081 		.flags = PHY_POLL_CABLE_TEST,
3082 		.probe = marvell_probe,
3083 		.config_init = marvell_1011gbe_config_init,
3084 		.config_aneg = m88e1510_config_aneg,
3085 		.read_status = marvell_read_status,
3086 		.config_intr = marvell_config_intr,
3087 		.handle_interrupt = marvell_handle_interrupt,
3088 		.resume = genphy_resume,
3089 		.suspend = genphy_suspend,
3090 		.read_page = marvell_read_page,
3091 		.write_page = marvell_write_page,
3092 		.get_sset_count = marvell_get_sset_count,
3093 		.get_strings = marvell_get_strings,
3094 		.get_stats = marvell_get_stats,
3095 		.get_tunable = m88e1540_get_tunable,
3096 		.set_tunable = m88e1540_set_tunable,
3097 		.cable_test_start = marvell_vct7_cable_test_start,
3098 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3099 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3100 	},
3101 	{
3102 		.phy_id = MARVELL_PHY_ID_88E1340S,
3103 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3104 		.name = "Marvell 88E1340S",
3105 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3106 		.probe = marvell_probe,
3107 		/* PHY_GBIT_FEATURES */
3108 		.config_init = marvell_1011gbe_config_init,
3109 		.config_aneg = m88e1510_config_aneg,
3110 		.read_status = marvell_read_status,
3111 		.config_intr = marvell_config_intr,
3112 		.handle_interrupt = marvell_handle_interrupt,
3113 		.resume = genphy_resume,
3114 		.suspend = genphy_suspend,
3115 		.read_page = marvell_read_page,
3116 		.write_page = marvell_write_page,
3117 		.get_sset_count = marvell_get_sset_count,
3118 		.get_strings = marvell_get_strings,
3119 		.get_stats = marvell_get_stats,
3120 		.get_tunable = m88e1540_get_tunable,
3121 		.set_tunable = m88e1540_set_tunable,
3122 	},
3123 	{
3124 		.phy_id = MARVELL_PHY_ID_88E1548P,
3125 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3126 		.name = "Marvell 88E1548P",
3127 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3128 		.probe = marvell_probe,
3129 		.features = PHY_GBIT_FIBRE_FEATURES,
3130 		.config_init = marvell_1011gbe_config_init,
3131 		.config_aneg = m88e1510_config_aneg,
3132 		.read_status = marvell_read_status,
3133 		.config_intr = marvell_config_intr,
3134 		.handle_interrupt = marvell_handle_interrupt,
3135 		.resume = genphy_resume,
3136 		.suspend = genphy_suspend,
3137 		.read_page = marvell_read_page,
3138 		.write_page = marvell_write_page,
3139 		.get_sset_count = marvell_get_sset_count,
3140 		.get_strings = marvell_get_strings,
3141 		.get_stats = marvell_get_stats,
3142 		.get_tunable = m88e1540_get_tunable,
3143 		.set_tunable = m88e1540_set_tunable,
3144 	},
3145 };
3146 
3147 module_phy_driver(marvell_drivers);
3148 
3149 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
3150 	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
3151 	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
3152 	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
3153 	{ MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
3154 	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
3155 	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3156 	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3157 	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3158 	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3159 	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3160 	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3161 	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3162 	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3163 	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3164 	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3165 	{ MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
3166 	{ MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
3167 	{ MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
3168 	{ MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3169 	{ MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3170 	{ }
3171 };
3172 
3173 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
3174