1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13 #include <linux/kernel.h> 14 #include <linux/string.h> 15 #include <linux/ctype.h> 16 #include <linux/errno.h> 17 #include <linux/unistd.h> 18 #include <linux/hwmon.h> 19 #include <linux/interrupt.h> 20 #include <linux/init.h> 21 #include <linux/delay.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/skbuff.h> 25 #include <linux/spinlock.h> 26 #include <linux/mm.h> 27 #include <linux/module.h> 28 #include <linux/mii.h> 29 #include <linux/ethtool.h> 30 #include <linux/phy.h> 31 #include <linux/marvell_phy.h> 32 #include <linux/bitfield.h> 33 #include <linux/of.h> 34 35 #include <linux/io.h> 36 #include <asm/irq.h> 37 #include <linux/uaccess.h> 38 39 #define MII_MARVELL_PHY_PAGE 22 40 #define MII_MARVELL_COPPER_PAGE 0x00 41 #define MII_MARVELL_FIBER_PAGE 0x01 42 #define MII_MARVELL_MSCR_PAGE 0x02 43 #define MII_MARVELL_LED_PAGE 0x03 44 #define MII_MARVELL_MISC_TEST_PAGE 0x06 45 #define MII_MARVELL_WOL_PAGE 0x11 46 47 #define MII_M1011_IEVENT 0x13 48 #define MII_M1011_IEVENT_CLEAR 0x0000 49 50 #define MII_M1011_IMASK 0x12 51 #define MII_M1011_IMASK_INIT 0x6400 52 #define MII_M1011_IMASK_CLEAR 0x0000 53 54 #define MII_M1011_PHY_SCR 0x10 55 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 56 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12) 57 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8 58 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 59 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 60 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 61 62 #define MII_M1011_PHY_SSR 0x11 63 #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5) 64 65 #define MII_M1111_PHY_LED_CONTROL 0x18 66 #define MII_M1111_PHY_LED_DIRECT 0x4100 67 #define MII_M1111_PHY_LED_COMBINE 0x411c 68 #define MII_M1111_PHY_EXT_CR 0x14 69 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9) 70 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8 71 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8) 72 #define MII_M1111_RGMII_RX_DELAY BIT(7) 73 #define MII_M1111_RGMII_TX_DELAY BIT(1) 74 #define MII_M1111_PHY_EXT_SR 0x1b 75 76 #define MII_M1111_HWCFG_MODE_MASK 0xf 77 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 78 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 79 #define MII_M1111_HWCFG_MODE_RTBI 0x7 80 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 81 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 82 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 83 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 84 85 #define MII_88E1121_PHY_MSCR_REG 21 86 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 87 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 88 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 89 90 #define MII_88E1121_MISC_TEST 0x1a 91 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 92 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 93 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 94 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 95 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 96 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 97 98 #define MII_88E1510_TEMP_SENSOR 0x1b 99 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 100 101 #define MII_88E1540_COPPER_CTRL3 0x1a 102 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) 103 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 104 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 105 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 106 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 107 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) 108 109 #define MII_88E6390_MISC_TEST 0x1b 110 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 111 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 112 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 113 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 114 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 115 116 #define MII_88E6390_TEMP_SENSOR 0x1c 117 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 118 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 119 120 #define MII_88E1318S_PHY_MSCR1_REG 16 121 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 122 123 /* Copper Specific Interrupt Enable Register */ 124 #define MII_88E1318S_PHY_CSIER 0x12 125 /* WOL Event Interrupt Enable */ 126 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 127 128 /* LED Timer Control Register */ 129 #define MII_88E1318S_PHY_LED_TCR 0x12 130 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 131 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 132 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 133 134 /* Magic Packet MAC address registers */ 135 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 136 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 137 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 138 139 #define MII_88E1318S_PHY_WOL_CTRL 0x10 140 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 141 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 142 143 #define MII_PHY_LED_CTRL 16 144 #define MII_88E1121_PHY_LED_DEF 0x0030 145 #define MII_88E1510_PHY_LED_DEF 0x1177 146 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040 147 148 #define MII_M1011_PHY_STATUS 0x11 149 #define MII_M1011_PHY_STATUS_1000 0x8000 150 #define MII_M1011_PHY_STATUS_100 0x4000 151 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 152 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 153 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 154 #define MII_M1011_PHY_STATUS_LINK 0x0400 155 156 #define MII_88E3016_PHY_SPEC_CTRL 0x10 157 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 158 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 159 160 #define MII_88E1510_GEN_CTRL_REG_1 0x14 161 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 162 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 163 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 164 165 #define LPA_PAUSE_FIBER 0x180 166 #define LPA_PAUSE_ASYM_FIBER 0x100 167 168 #define NB_FIBER_STATS 1 169 170 MODULE_DESCRIPTION("Marvell PHY driver"); 171 MODULE_AUTHOR("Andy Fleming"); 172 MODULE_LICENSE("GPL"); 173 174 struct marvell_hw_stat { 175 const char *string; 176 u8 page; 177 u8 reg; 178 u8 bits; 179 }; 180 181 static struct marvell_hw_stat marvell_hw_stats[] = { 182 { "phy_receive_errors_copper", 0, 21, 16}, 183 { "phy_idle_errors", 0, 10, 8 }, 184 { "phy_receive_errors_fiber", 1, 21, 16}, 185 }; 186 187 struct marvell_priv { 188 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 189 char *hwmon_name; 190 struct device *hwmon_dev; 191 }; 192 193 static int marvell_read_page(struct phy_device *phydev) 194 { 195 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 196 } 197 198 static int marvell_write_page(struct phy_device *phydev, int page) 199 { 200 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 201 } 202 203 static int marvell_set_page(struct phy_device *phydev, int page) 204 { 205 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 206 } 207 208 static int marvell_ack_interrupt(struct phy_device *phydev) 209 { 210 int err; 211 212 /* Clear the interrupts by reading the reg */ 213 err = phy_read(phydev, MII_M1011_IEVENT); 214 215 if (err < 0) 216 return err; 217 218 return 0; 219 } 220 221 static int marvell_config_intr(struct phy_device *phydev) 222 { 223 int err; 224 225 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 226 err = phy_write(phydev, MII_M1011_IMASK, 227 MII_M1011_IMASK_INIT); 228 else 229 err = phy_write(phydev, MII_M1011_IMASK, 230 MII_M1011_IMASK_CLEAR); 231 232 return err; 233 } 234 235 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 236 { 237 int reg; 238 int err; 239 int val; 240 241 /* get the current settings */ 242 reg = phy_read(phydev, MII_M1011_PHY_SCR); 243 if (reg < 0) 244 return reg; 245 246 val = reg; 247 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 248 switch (polarity) { 249 case ETH_TP_MDI: 250 val |= MII_M1011_PHY_SCR_MDI; 251 break; 252 case ETH_TP_MDI_X: 253 val |= MII_M1011_PHY_SCR_MDI_X; 254 break; 255 case ETH_TP_MDI_AUTO: 256 case ETH_TP_MDI_INVALID: 257 default: 258 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 259 break; 260 } 261 262 if (val != reg) { 263 /* Set the new polarity value in the register */ 264 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 265 if (err) 266 return err; 267 } 268 269 return val != reg; 270 } 271 272 static int marvell_config_aneg(struct phy_device *phydev) 273 { 274 int changed = 0; 275 int err; 276 277 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 278 if (err < 0) 279 return err; 280 281 changed = err; 282 283 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 284 MII_M1111_PHY_LED_DIRECT); 285 if (err < 0) 286 return err; 287 288 err = genphy_config_aneg(phydev); 289 if (err < 0) 290 return err; 291 292 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 293 /* A write to speed/duplex bits (that is performed by 294 * genphy_config_aneg() call above) must be followed by 295 * a software reset. Otherwise, the write has no effect. 296 */ 297 err = genphy_soft_reset(phydev); 298 if (err < 0) 299 return err; 300 } 301 302 return 0; 303 } 304 305 static int m88e1101_config_aneg(struct phy_device *phydev) 306 { 307 int err; 308 309 /* This Marvell PHY has an errata which requires 310 * that certain registers get written in order 311 * to restart autonegotiation 312 */ 313 err = genphy_soft_reset(phydev); 314 if (err < 0) 315 return err; 316 317 err = phy_write(phydev, 0x1d, 0x1f); 318 if (err < 0) 319 return err; 320 321 err = phy_write(phydev, 0x1e, 0x200c); 322 if (err < 0) 323 return err; 324 325 err = phy_write(phydev, 0x1d, 0x5); 326 if (err < 0) 327 return err; 328 329 err = phy_write(phydev, 0x1e, 0); 330 if (err < 0) 331 return err; 332 333 err = phy_write(phydev, 0x1e, 0x100); 334 if (err < 0) 335 return err; 336 337 return marvell_config_aneg(phydev); 338 } 339 340 #ifdef CONFIG_OF_MDIO 341 /* Set and/or override some configuration registers based on the 342 * marvell,reg-init property stored in the of_node for the phydev. 343 * 344 * marvell,reg-init = <reg-page reg mask value>,...; 345 * 346 * There may be one or more sets of <reg-page reg mask value>: 347 * 348 * reg-page: which register bank to use. 349 * reg: the register. 350 * mask: if non-zero, ANDed with existing register value. 351 * value: ORed with the masked value and written to the regiser. 352 * 353 */ 354 static int marvell_of_reg_init(struct phy_device *phydev) 355 { 356 const __be32 *paddr; 357 int len, i, saved_page, current_page, ret = 0; 358 359 if (!phydev->mdio.dev.of_node) 360 return 0; 361 362 paddr = of_get_property(phydev->mdio.dev.of_node, 363 "marvell,reg-init", &len); 364 if (!paddr || len < (4 * sizeof(*paddr))) 365 return 0; 366 367 saved_page = phy_save_page(phydev); 368 if (saved_page < 0) 369 goto err; 370 current_page = saved_page; 371 372 len /= sizeof(*paddr); 373 for (i = 0; i < len - 3; i += 4) { 374 u16 page = be32_to_cpup(paddr + i); 375 u16 reg = be32_to_cpup(paddr + i + 1); 376 u16 mask = be32_to_cpup(paddr + i + 2); 377 u16 val_bits = be32_to_cpup(paddr + i + 3); 378 int val; 379 380 if (page != current_page) { 381 current_page = page; 382 ret = marvell_write_page(phydev, page); 383 if (ret < 0) 384 goto err; 385 } 386 387 val = 0; 388 if (mask) { 389 val = __phy_read(phydev, reg); 390 if (val < 0) { 391 ret = val; 392 goto err; 393 } 394 val &= mask; 395 } 396 val |= val_bits; 397 398 ret = __phy_write(phydev, reg, val); 399 if (ret < 0) 400 goto err; 401 } 402 err: 403 return phy_restore_page(phydev, saved_page, ret); 404 } 405 #else 406 static int marvell_of_reg_init(struct phy_device *phydev) 407 { 408 return 0; 409 } 410 #endif /* CONFIG_OF_MDIO */ 411 412 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 413 { 414 int mscr; 415 416 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 417 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 418 MII_88E1121_PHY_MSCR_TX_DELAY; 419 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 420 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 421 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 422 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 423 else 424 mscr = 0; 425 426 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 427 MII_88E1121_PHY_MSCR_REG, 428 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 429 } 430 431 static int m88e1121_config_aneg(struct phy_device *phydev) 432 { 433 int changed = 0; 434 int err = 0; 435 436 if (phy_interface_is_rgmii(phydev)) { 437 err = m88e1121_config_aneg_rgmii_delays(phydev); 438 if (err < 0) 439 return err; 440 } 441 442 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 443 if (err < 0) 444 return err; 445 446 changed = err; 447 448 err = genphy_config_aneg(phydev); 449 if (err < 0) 450 return err; 451 452 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 453 /* A software reset is used to ensure a "commit" of the 454 * changes is done. 455 */ 456 err = genphy_soft_reset(phydev); 457 if (err < 0) 458 return err; 459 } 460 461 return 0; 462 } 463 464 static int m88e1318_config_aneg(struct phy_device *phydev) 465 { 466 int err; 467 468 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 469 MII_88E1318S_PHY_MSCR1_REG, 470 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 471 if (err < 0) 472 return err; 473 474 return m88e1121_config_aneg(phydev); 475 } 476 477 /** 478 * linkmode_adv_to_fiber_adv_t 479 * @advertise: the linkmode advertisement settings 480 * 481 * A small helper function that translates linkmode advertisement 482 * settings to phy autonegotiation advertisements for the MII_ADV 483 * register for fiber link. 484 */ 485 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 486 { 487 u32 result = 0; 488 489 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 490 result |= ADVERTISE_1000XHALF; 491 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 492 result |= ADVERTISE_1000XFULL; 493 494 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 495 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 496 result |= ADVERTISE_1000XPSE_ASYM; 497 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 498 result |= ADVERTISE_1000XPAUSE; 499 500 return result; 501 } 502 503 /** 504 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 505 * @phydev: target phy_device struct 506 * 507 * Description: If auto-negotiation is enabled, we configure the 508 * advertising, and then restart auto-negotiation. If it is not 509 * enabled, then we write the BMCR. Adapted for fiber link in 510 * some Marvell's devices. 511 */ 512 static int marvell_config_aneg_fiber(struct phy_device *phydev) 513 { 514 int changed = 0; 515 int err; 516 u16 adv; 517 518 if (phydev->autoneg != AUTONEG_ENABLE) 519 return genphy_setup_forced(phydev); 520 521 /* Only allow advertising what this PHY supports */ 522 linkmode_and(phydev->advertising, phydev->advertising, 523 phydev->supported); 524 525 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising); 526 527 /* Setup fiber advertisement */ 528 err = phy_modify_changed(phydev, MII_ADVERTISE, 529 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL | 530 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM, 531 adv); 532 if (err < 0) 533 return err; 534 if (err > 0) 535 changed = 1; 536 537 return genphy_check_and_restart_aneg(phydev, changed); 538 } 539 540 static int m88e1510_config_aneg(struct phy_device *phydev) 541 { 542 int err; 543 544 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 545 if (err < 0) 546 goto error; 547 548 /* Configure the copper link first */ 549 err = m88e1318_config_aneg(phydev); 550 if (err < 0) 551 goto error; 552 553 /* Do not touch the fiber page if we're in copper->sgmii mode */ 554 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 555 return 0; 556 557 /* Then the fiber link */ 558 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 559 if (err < 0) 560 goto error; 561 562 err = marvell_config_aneg_fiber(phydev); 563 if (err < 0) 564 goto error; 565 566 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 567 568 error: 569 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 570 return err; 571 } 572 573 static void marvell_config_led(struct phy_device *phydev) 574 { 575 u16 def_config; 576 int err; 577 578 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 579 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 580 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 581 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 582 def_config = MII_88E1121_PHY_LED_DEF; 583 break; 584 /* Default PHY LED config: 585 * LED[0] .. 1000Mbps Link 586 * LED[1] .. 100Mbps Link 587 * LED[2] .. Blink, Activity 588 */ 589 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 590 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE) 591 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE; 592 else 593 def_config = MII_88E1510_PHY_LED_DEF; 594 break; 595 default: 596 return; 597 } 598 599 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 600 def_config); 601 if (err < 0) 602 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 603 } 604 605 static int marvell_config_init(struct phy_device *phydev) 606 { 607 /* Set defalut LED */ 608 marvell_config_led(phydev); 609 610 /* Set registers from marvell,reg-init DT property */ 611 return marvell_of_reg_init(phydev); 612 } 613 614 static int m88e3016_config_init(struct phy_device *phydev) 615 { 616 int ret; 617 618 /* Enable Scrambler and Auto-Crossover */ 619 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 620 MII_88E3016_DISABLE_SCRAMBLER, 621 MII_88E3016_AUTO_MDIX_CROSSOVER); 622 if (ret < 0) 623 return ret; 624 625 return marvell_config_init(phydev); 626 } 627 628 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 629 u16 mode, 630 int fibre_copper_auto) 631 { 632 if (fibre_copper_auto) 633 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 634 635 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 636 MII_M1111_HWCFG_MODE_MASK | 637 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 638 MII_M1111_HWCFG_FIBER_COPPER_RES, 639 mode); 640 } 641 642 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 643 { 644 int delay; 645 646 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 647 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 648 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 649 delay = MII_M1111_RGMII_RX_DELAY; 650 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 651 delay = MII_M1111_RGMII_TX_DELAY; 652 } else { 653 delay = 0; 654 } 655 656 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 657 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 658 delay); 659 } 660 661 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 662 { 663 int temp; 664 int err; 665 666 err = m88e1111_config_init_rgmii_delays(phydev); 667 if (err < 0) 668 return err; 669 670 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 671 if (temp < 0) 672 return temp; 673 674 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 675 676 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 677 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 678 else 679 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 680 681 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 682 } 683 684 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 685 { 686 int err; 687 688 err = m88e1111_config_init_hwcfg_mode( 689 phydev, 690 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 691 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 692 if (err < 0) 693 return err; 694 695 /* make sure copper is selected */ 696 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 697 } 698 699 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 700 { 701 int err; 702 703 err = m88e1111_config_init_rgmii_delays(phydev); 704 if (err < 0) 705 return err; 706 707 err = m88e1111_config_init_hwcfg_mode( 708 phydev, 709 MII_M1111_HWCFG_MODE_RTBI, 710 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 711 if (err < 0) 712 return err; 713 714 /* soft reset */ 715 err = genphy_soft_reset(phydev); 716 if (err < 0) 717 return err; 718 719 return m88e1111_config_init_hwcfg_mode( 720 phydev, 721 MII_M1111_HWCFG_MODE_RTBI, 722 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 723 } 724 725 static int m88e1111_config_init(struct phy_device *phydev) 726 { 727 int err; 728 729 if (phy_interface_is_rgmii(phydev)) { 730 err = m88e1111_config_init_rgmii(phydev); 731 if (err < 0) 732 return err; 733 } 734 735 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 736 err = m88e1111_config_init_sgmii(phydev); 737 if (err < 0) 738 return err; 739 } 740 741 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 742 err = m88e1111_config_init_rtbi(phydev); 743 if (err < 0) 744 return err; 745 } 746 747 err = marvell_of_reg_init(phydev); 748 if (err < 0) 749 return err; 750 751 return genphy_soft_reset(phydev); 752 } 753 754 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data) 755 { 756 int val, cnt, enable; 757 758 val = phy_read(phydev, MII_M1111_PHY_EXT_CR); 759 if (val < 0) 760 return val; 761 762 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val); 763 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1; 764 765 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 766 767 return 0; 768 } 769 770 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt) 771 { 772 int val; 773 774 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX) 775 return -E2BIG; 776 777 if (!cnt) 778 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, 779 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); 780 781 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; 782 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); 783 784 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 785 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | 786 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, 787 val); 788 } 789 790 static int m88e1111_get_tunable(struct phy_device *phydev, 791 struct ethtool_tunable *tuna, void *data) 792 { 793 switch (tuna->id) { 794 case ETHTOOL_PHY_DOWNSHIFT: 795 return m88e1111_get_downshift(phydev, data); 796 default: 797 return -EOPNOTSUPP; 798 } 799 } 800 801 static int m88e1111_set_tunable(struct phy_device *phydev, 802 struct ethtool_tunable *tuna, const void *data) 803 { 804 switch (tuna->id) { 805 case ETHTOOL_PHY_DOWNSHIFT: 806 return m88e1111_set_downshift(phydev, *(const u8 *)data); 807 default: 808 return -EOPNOTSUPP; 809 } 810 } 811 812 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data) 813 { 814 int val, cnt, enable; 815 816 val = phy_read(phydev, MII_M1011_PHY_SCR); 817 if (val < 0) 818 return val; 819 820 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val); 821 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1; 822 823 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 824 825 return 0; 826 } 827 828 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt) 829 { 830 int val; 831 832 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX) 833 return -E2BIG; 834 835 if (!cnt) 836 return phy_clear_bits(phydev, MII_M1011_PHY_SCR, 837 MII_M1011_PHY_SCR_DOWNSHIFT_EN); 838 839 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; 840 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); 841 842 return phy_modify(phydev, MII_M1011_PHY_SCR, 843 MII_M1011_PHY_SCR_DOWNSHIFT_EN | 844 MII_M1011_PHY_SCR_DOWNSHIFT_MASK, 845 val); 846 } 847 848 static int m88e1011_get_tunable(struct phy_device *phydev, 849 struct ethtool_tunable *tuna, void *data) 850 { 851 switch (tuna->id) { 852 case ETHTOOL_PHY_DOWNSHIFT: 853 return m88e1011_get_downshift(phydev, data); 854 default: 855 return -EOPNOTSUPP; 856 } 857 } 858 859 static int m88e1011_set_tunable(struct phy_device *phydev, 860 struct ethtool_tunable *tuna, const void *data) 861 { 862 switch (tuna->id) { 863 case ETHTOOL_PHY_DOWNSHIFT: 864 return m88e1011_set_downshift(phydev, *(const u8 *)data); 865 default: 866 return -EOPNOTSUPP; 867 } 868 } 869 870 static void m88e1011_link_change_notify(struct phy_device *phydev) 871 { 872 int status; 873 874 if (phydev->state != PHY_RUNNING) 875 return; 876 877 /* we may be on fiber page currently */ 878 status = phy_read_paged(phydev, MII_MARVELL_COPPER_PAGE, 879 MII_M1011_PHY_SSR); 880 881 if (status > 0 && status & MII_M1011_PHY_SSR_DOWNSHIFT) 882 phydev_warn(phydev, "Downshift occurred! Cabling may be defective.\n"); 883 } 884 885 static int m88e1116r_config_init(struct phy_device *phydev) 886 { 887 int err; 888 889 err = genphy_soft_reset(phydev); 890 if (err < 0) 891 return err; 892 893 msleep(500); 894 895 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 896 if (err < 0) 897 return err; 898 899 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 900 if (err < 0) 901 return err; 902 903 err = m88e1011_set_downshift(phydev, 8); 904 if (err < 0) 905 return err; 906 907 if (phy_interface_is_rgmii(phydev)) { 908 err = m88e1121_config_aneg_rgmii_delays(phydev); 909 if (err < 0) 910 return err; 911 } 912 913 err = genphy_soft_reset(phydev); 914 if (err < 0) 915 return err; 916 917 return marvell_config_init(phydev); 918 } 919 920 static int m88e1318_config_init(struct phy_device *phydev) 921 { 922 if (phy_interrupt_is_valid(phydev)) { 923 int err = phy_modify_paged( 924 phydev, MII_MARVELL_LED_PAGE, 925 MII_88E1318S_PHY_LED_TCR, 926 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 927 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 928 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 929 if (err < 0) 930 return err; 931 } 932 933 return marvell_config_init(phydev); 934 } 935 936 static int m88e1510_config_init(struct phy_device *phydev) 937 { 938 int err; 939 940 /* SGMII-to-Copper mode initialization */ 941 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 942 /* Select page 18 */ 943 err = marvell_set_page(phydev, 18); 944 if (err < 0) 945 return err; 946 947 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 948 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 949 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 950 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 951 if (err < 0) 952 return err; 953 954 /* PHY reset is necessary after changing MODE[2:0] */ 955 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 956 MII_88E1510_GEN_CTRL_REG_1_RESET); 957 if (err < 0) 958 return err; 959 960 /* Reset page selection */ 961 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 962 if (err < 0) 963 return err; 964 } 965 966 return m88e1318_config_init(phydev); 967 } 968 969 static int m88e1118_config_aneg(struct phy_device *phydev) 970 { 971 int err; 972 973 err = genphy_soft_reset(phydev); 974 if (err < 0) 975 return err; 976 977 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 978 if (err < 0) 979 return err; 980 981 err = genphy_config_aneg(phydev); 982 return 0; 983 } 984 985 static int m88e1118_config_init(struct phy_device *phydev) 986 { 987 int err; 988 989 /* Change address */ 990 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 991 if (err < 0) 992 return err; 993 994 /* Enable 1000 Mbit */ 995 err = phy_write(phydev, 0x15, 0x1070); 996 if (err < 0) 997 return err; 998 999 /* Change address */ 1000 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 1001 if (err < 0) 1002 return err; 1003 1004 /* Adjust LED Control */ 1005 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 1006 err = phy_write(phydev, 0x10, 0x1100); 1007 else 1008 err = phy_write(phydev, 0x10, 0x021e); 1009 if (err < 0) 1010 return err; 1011 1012 err = marvell_of_reg_init(phydev); 1013 if (err < 0) 1014 return err; 1015 1016 /* Reset address */ 1017 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1018 if (err < 0) 1019 return err; 1020 1021 return genphy_soft_reset(phydev); 1022 } 1023 1024 static int m88e1149_config_init(struct phy_device *phydev) 1025 { 1026 int err; 1027 1028 /* Change address */ 1029 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1030 if (err < 0) 1031 return err; 1032 1033 /* Enable 1000 Mbit */ 1034 err = phy_write(phydev, 0x15, 0x1048); 1035 if (err < 0) 1036 return err; 1037 1038 err = marvell_of_reg_init(phydev); 1039 if (err < 0) 1040 return err; 1041 1042 /* Reset address */ 1043 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1044 if (err < 0) 1045 return err; 1046 1047 return genphy_soft_reset(phydev); 1048 } 1049 1050 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 1051 { 1052 int err; 1053 1054 err = m88e1111_config_init_rgmii_delays(phydev); 1055 if (err < 0) 1056 return err; 1057 1058 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 1059 err = phy_write(phydev, 0x1d, 0x0012); 1060 if (err < 0) 1061 return err; 1062 1063 err = phy_modify(phydev, 0x1e, 0x0fc0, 1064 2 << 9 | /* 36 ohm */ 1065 2 << 6); /* 39 ohm */ 1066 if (err < 0) 1067 return err; 1068 1069 err = phy_write(phydev, 0x1d, 0x3); 1070 if (err < 0) 1071 return err; 1072 1073 err = phy_write(phydev, 0x1e, 0x8000); 1074 } 1075 return err; 1076 } 1077 1078 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1079 { 1080 return m88e1111_config_init_hwcfg_mode( 1081 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1082 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1083 } 1084 1085 static int m88e1145_config_init(struct phy_device *phydev) 1086 { 1087 int err; 1088 1089 /* Take care of errata E0 & E1 */ 1090 err = phy_write(phydev, 0x1d, 0x001b); 1091 if (err < 0) 1092 return err; 1093 1094 err = phy_write(phydev, 0x1e, 0x418f); 1095 if (err < 0) 1096 return err; 1097 1098 err = phy_write(phydev, 0x1d, 0x0016); 1099 if (err < 0) 1100 return err; 1101 1102 err = phy_write(phydev, 0x1e, 0xa2da); 1103 if (err < 0) 1104 return err; 1105 1106 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1107 err = m88e1145_config_init_rgmii(phydev); 1108 if (err < 0) 1109 return err; 1110 } 1111 1112 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1113 err = m88e1145_config_init_sgmii(phydev); 1114 if (err < 0) 1115 return err; 1116 } 1117 1118 err = marvell_of_reg_init(phydev); 1119 if (err < 0) 1120 return err; 1121 1122 return 0; 1123 } 1124 1125 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) 1126 { 1127 int val; 1128 1129 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); 1130 if (val < 0) 1131 return val; 1132 1133 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { 1134 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; 1135 return 0; 1136 } 1137 1138 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1139 1140 switch (val) { 1141 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: 1142 *msecs = 0; 1143 break; 1144 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: 1145 *msecs = 10; 1146 break; 1147 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: 1148 *msecs = 20; 1149 break; 1150 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: 1151 *msecs = 40; 1152 break; 1153 default: 1154 return -EINVAL; 1155 } 1156 1157 return 0; 1158 } 1159 1160 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) 1161 { 1162 struct ethtool_eee eee; 1163 int val, ret; 1164 1165 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) 1166 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, 1167 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1168 1169 /* According to the Marvell data sheet EEE must be disabled for 1170 * Fast Link Down detection to work properly 1171 */ 1172 ret = phy_ethtool_get_eee(phydev, &eee); 1173 if (!ret && eee.eee_enabled) { 1174 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); 1175 return -EBUSY; 1176 } 1177 1178 if (*msecs <= 5) 1179 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; 1180 else if (*msecs <= 15) 1181 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; 1182 else if (*msecs <= 30) 1183 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; 1184 else 1185 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; 1186 1187 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1188 1189 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, 1190 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1191 if (ret) 1192 return ret; 1193 1194 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, 1195 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1196 } 1197 1198 static int m88e1540_get_tunable(struct phy_device *phydev, 1199 struct ethtool_tunable *tuna, void *data) 1200 { 1201 switch (tuna->id) { 1202 case ETHTOOL_PHY_FAST_LINK_DOWN: 1203 return m88e1540_get_fld(phydev, data); 1204 case ETHTOOL_PHY_DOWNSHIFT: 1205 return m88e1011_get_downshift(phydev, data); 1206 default: 1207 return -EOPNOTSUPP; 1208 } 1209 } 1210 1211 static int m88e1540_set_tunable(struct phy_device *phydev, 1212 struct ethtool_tunable *tuna, const void *data) 1213 { 1214 switch (tuna->id) { 1215 case ETHTOOL_PHY_FAST_LINK_DOWN: 1216 return m88e1540_set_fld(phydev, data); 1217 case ETHTOOL_PHY_DOWNSHIFT: 1218 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1219 default: 1220 return -EOPNOTSUPP; 1221 } 1222 } 1223 1224 /* The VOD can be out of specification on link up. Poke an 1225 * undocumented register, in an undocumented page, with a magic value 1226 * to fix this. 1227 */ 1228 static int m88e6390_errata(struct phy_device *phydev) 1229 { 1230 int err; 1231 1232 err = phy_write(phydev, MII_BMCR, 1233 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1234 if (err) 1235 return err; 1236 1237 usleep_range(300, 400); 1238 1239 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1240 if (err) 1241 return err; 1242 1243 return genphy_soft_reset(phydev); 1244 } 1245 1246 static int m88e6390_config_aneg(struct phy_device *phydev) 1247 { 1248 int err; 1249 1250 err = m88e6390_errata(phydev); 1251 if (err) 1252 return err; 1253 1254 return m88e1510_config_aneg(phydev); 1255 } 1256 1257 /** 1258 * fiber_lpa_mod_linkmode_lpa_t 1259 * @advertising: the linkmode advertisement settings 1260 * @lpa: value of the MII_LPA register for fiber link 1261 * 1262 * A small helper function that translates MII_LPA bits to linkmode LP 1263 * advertisement settings. Other bits in advertising are left 1264 * unchanged. 1265 */ 1266 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1267 { 1268 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1269 advertising, lpa & LPA_1000XHALF); 1270 1271 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1272 advertising, lpa & LPA_1000XFULL); 1273 } 1274 1275 static int marvell_read_status_page_an(struct phy_device *phydev, 1276 int fiber, int status) 1277 { 1278 int lpa; 1279 int err; 1280 1281 if (!fiber) { 1282 err = genphy_read_lpa(phydev); 1283 if (err < 0) 1284 return err; 1285 1286 phy_resolve_aneg_pause(phydev); 1287 } else { 1288 lpa = phy_read(phydev, MII_LPA); 1289 if (lpa < 0) 1290 return lpa; 1291 1292 /* The fiber link is only 1000M capable */ 1293 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1294 1295 if (phydev->duplex == DUPLEX_FULL) { 1296 if (!(lpa & LPA_PAUSE_FIBER)) { 1297 phydev->pause = 0; 1298 phydev->asym_pause = 0; 1299 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1300 phydev->pause = 1; 1301 phydev->asym_pause = 1; 1302 } else { 1303 phydev->pause = 1; 1304 phydev->asym_pause = 0; 1305 } 1306 } 1307 } 1308 1309 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1310 phydev->duplex = DUPLEX_FULL; 1311 else 1312 phydev->duplex = DUPLEX_HALF; 1313 1314 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) { 1315 case MII_M1011_PHY_STATUS_1000: 1316 phydev->speed = SPEED_1000; 1317 break; 1318 1319 case MII_M1011_PHY_STATUS_100: 1320 phydev->speed = SPEED_100; 1321 break; 1322 1323 default: 1324 phydev->speed = SPEED_10; 1325 break; 1326 } 1327 1328 return 0; 1329 } 1330 1331 /* marvell_read_status_page 1332 * 1333 * Description: 1334 * Check the link, then figure out the current state 1335 * by comparing what we advertise with what the link partner 1336 * advertises. Start by checking the gigabit possibilities, 1337 * then move on to 10/100. 1338 */ 1339 static int marvell_read_status_page(struct phy_device *phydev, int page) 1340 { 1341 int status; 1342 int fiber; 1343 int err; 1344 1345 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1346 if (status < 0) 1347 return status; 1348 1349 /* Use the generic register for copper link status, 1350 * and the PHY status register for fiber link status. 1351 */ 1352 if (page == MII_MARVELL_FIBER_PAGE) { 1353 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK); 1354 } else { 1355 err = genphy_update_link(phydev); 1356 if (err) 1357 return err; 1358 } 1359 1360 if (page == MII_MARVELL_FIBER_PAGE) 1361 fiber = 1; 1362 else 1363 fiber = 0; 1364 1365 linkmode_zero(phydev->lp_advertising); 1366 phydev->pause = 0; 1367 phydev->asym_pause = 0; 1368 1369 if (phydev->autoneg == AUTONEG_ENABLE) 1370 err = marvell_read_status_page_an(phydev, fiber, status); 1371 else 1372 err = genphy_read_status_fixed(phydev); 1373 1374 return err; 1375 } 1376 1377 /* marvell_read_status 1378 * 1379 * Some Marvell's phys have two modes: fiber and copper. 1380 * Both need status checked. 1381 * Description: 1382 * First, check the fiber link and status. 1383 * If the fiber link is down, check the copper link and status which 1384 * will be the default value if both link are down. 1385 */ 1386 static int marvell_read_status(struct phy_device *phydev) 1387 { 1388 int err; 1389 1390 /* Check the fiber mode first */ 1391 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1392 phydev->supported) && 1393 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1394 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1395 if (err < 0) 1396 goto error; 1397 1398 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1399 if (err < 0) 1400 goto error; 1401 1402 /* If the fiber link is up, it is the selected and 1403 * used link. In this case, we need to stay in the 1404 * fiber page. Please to be careful about that, avoid 1405 * to restore Copper page in other functions which 1406 * could break the behaviour for some fiber phy like 1407 * 88E1512. 1408 */ 1409 if (phydev->link) 1410 return 0; 1411 1412 /* If fiber link is down, check and save copper mode state */ 1413 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1414 if (err < 0) 1415 goto error; 1416 } 1417 1418 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1419 1420 error: 1421 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1422 return err; 1423 } 1424 1425 /* marvell_suspend 1426 * 1427 * Some Marvell's phys have two modes: fiber and copper. 1428 * Both need to be suspended 1429 */ 1430 static int marvell_suspend(struct phy_device *phydev) 1431 { 1432 int err; 1433 1434 /* Suspend the fiber mode first */ 1435 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1436 phydev->supported)) { 1437 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1438 if (err < 0) 1439 goto error; 1440 1441 /* With the page set, use the generic suspend */ 1442 err = genphy_suspend(phydev); 1443 if (err < 0) 1444 goto error; 1445 1446 /* Then, the copper link */ 1447 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1448 if (err < 0) 1449 goto error; 1450 } 1451 1452 /* With the page set, use the generic suspend */ 1453 return genphy_suspend(phydev); 1454 1455 error: 1456 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1457 return err; 1458 } 1459 1460 /* marvell_resume 1461 * 1462 * Some Marvell's phys have two modes: fiber and copper. 1463 * Both need to be resumed 1464 */ 1465 static int marvell_resume(struct phy_device *phydev) 1466 { 1467 int err; 1468 1469 /* Resume the fiber mode first */ 1470 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1471 phydev->supported)) { 1472 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1473 if (err < 0) 1474 goto error; 1475 1476 /* With the page set, use the generic resume */ 1477 err = genphy_resume(phydev); 1478 if (err < 0) 1479 goto error; 1480 1481 /* Then, the copper link */ 1482 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1483 if (err < 0) 1484 goto error; 1485 } 1486 1487 /* With the page set, use the generic resume */ 1488 return genphy_resume(phydev); 1489 1490 error: 1491 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1492 return err; 1493 } 1494 1495 static int marvell_aneg_done(struct phy_device *phydev) 1496 { 1497 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1498 1499 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1500 } 1501 1502 static int m88e1121_did_interrupt(struct phy_device *phydev) 1503 { 1504 int imask; 1505 1506 imask = phy_read(phydev, MII_M1011_IEVENT); 1507 1508 if (imask & MII_M1011_IMASK_INIT) 1509 return 1; 1510 1511 return 0; 1512 } 1513 1514 static void m88e1318_get_wol(struct phy_device *phydev, 1515 struct ethtool_wolinfo *wol) 1516 { 1517 int oldpage, ret = 0; 1518 1519 wol->supported = WAKE_MAGIC; 1520 wol->wolopts = 0; 1521 1522 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); 1523 if (oldpage < 0) 1524 goto error; 1525 1526 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); 1527 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1528 wol->wolopts |= WAKE_MAGIC; 1529 1530 error: 1531 phy_restore_page(phydev, oldpage, ret); 1532 } 1533 1534 static int m88e1318_set_wol(struct phy_device *phydev, 1535 struct ethtool_wolinfo *wol) 1536 { 1537 int err = 0, oldpage; 1538 1539 oldpage = phy_save_page(phydev); 1540 if (oldpage < 0) 1541 goto error; 1542 1543 if (wol->wolopts & WAKE_MAGIC) { 1544 /* Explicitly switch to page 0x00, just to be sure */ 1545 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1546 if (err < 0) 1547 goto error; 1548 1549 /* If WOL event happened once, the LED[2] interrupt pin 1550 * will not be cleared unless we reading the interrupt status 1551 * register. If interrupts are in use, the normal interrupt 1552 * handling will clear the WOL event. Clear the WOL event 1553 * before enabling it if !phy_interrupt_is_valid() 1554 */ 1555 if (!phy_interrupt_is_valid(phydev)) 1556 __phy_read(phydev, MII_M1011_IEVENT); 1557 1558 /* Enable the WOL interrupt */ 1559 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1560 MII_88E1318S_PHY_CSIER_WOL_EIE); 1561 if (err < 0) 1562 goto error; 1563 1564 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1565 if (err < 0) 1566 goto error; 1567 1568 /* Setup LED[2] as interrupt pin (active low) */ 1569 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1570 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1571 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1572 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1573 if (err < 0) 1574 goto error; 1575 1576 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1577 if (err < 0) 1578 goto error; 1579 1580 /* Store the device address for the magic packet */ 1581 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1582 ((phydev->attached_dev->dev_addr[5] << 8) | 1583 phydev->attached_dev->dev_addr[4])); 1584 if (err < 0) 1585 goto error; 1586 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1587 ((phydev->attached_dev->dev_addr[3] << 8) | 1588 phydev->attached_dev->dev_addr[2])); 1589 if (err < 0) 1590 goto error; 1591 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1592 ((phydev->attached_dev->dev_addr[1] << 8) | 1593 phydev->attached_dev->dev_addr[0])); 1594 if (err < 0) 1595 goto error; 1596 1597 /* Clear WOL status and enable magic packet matching */ 1598 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1599 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1600 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1601 if (err < 0) 1602 goto error; 1603 } else { 1604 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1605 if (err < 0) 1606 goto error; 1607 1608 /* Clear WOL status and disable magic packet matching */ 1609 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1610 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1611 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1612 if (err < 0) 1613 goto error; 1614 } 1615 1616 error: 1617 return phy_restore_page(phydev, oldpage, err); 1618 } 1619 1620 static int marvell_get_sset_count(struct phy_device *phydev) 1621 { 1622 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1623 phydev->supported)) 1624 return ARRAY_SIZE(marvell_hw_stats); 1625 else 1626 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1627 } 1628 1629 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1630 { 1631 int count = marvell_get_sset_count(phydev); 1632 int i; 1633 1634 for (i = 0; i < count; i++) { 1635 strlcpy(data + i * ETH_GSTRING_LEN, 1636 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1637 } 1638 } 1639 1640 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1641 { 1642 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1643 struct marvell_priv *priv = phydev->priv; 1644 int val; 1645 u64 ret; 1646 1647 val = phy_read_paged(phydev, stat.page, stat.reg); 1648 if (val < 0) { 1649 ret = U64_MAX; 1650 } else { 1651 val = val & ((1 << stat.bits) - 1); 1652 priv->stats[i] += val; 1653 ret = priv->stats[i]; 1654 } 1655 1656 return ret; 1657 } 1658 1659 static void marvell_get_stats(struct phy_device *phydev, 1660 struct ethtool_stats *stats, u64 *data) 1661 { 1662 int count = marvell_get_sset_count(phydev); 1663 int i; 1664 1665 for (i = 0; i < count; i++) 1666 data[i] = marvell_get_stat(phydev, i); 1667 } 1668 1669 #ifdef CONFIG_HWMON 1670 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 1671 { 1672 int oldpage; 1673 int ret = 0; 1674 int val; 1675 1676 *temp = 0; 1677 1678 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1679 if (oldpage < 0) 1680 goto error; 1681 1682 /* Enable temperature sensor */ 1683 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 1684 if (ret < 0) 1685 goto error; 1686 1687 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1688 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1689 if (ret < 0) 1690 goto error; 1691 1692 /* Wait for temperature to stabilize */ 1693 usleep_range(10000, 12000); 1694 1695 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 1696 if (val < 0) { 1697 ret = val; 1698 goto error; 1699 } 1700 1701 /* Disable temperature sensor */ 1702 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 1703 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 1704 if (ret < 0) 1705 goto error; 1706 1707 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 1708 1709 error: 1710 return phy_restore_page(phydev, oldpage, ret); 1711 } 1712 1713 static int m88e1121_hwmon_read(struct device *dev, 1714 enum hwmon_sensor_types type, 1715 u32 attr, int channel, long *temp) 1716 { 1717 struct phy_device *phydev = dev_get_drvdata(dev); 1718 int err; 1719 1720 switch (attr) { 1721 case hwmon_temp_input: 1722 err = m88e1121_get_temp(phydev, temp); 1723 break; 1724 default: 1725 return -EOPNOTSUPP; 1726 } 1727 1728 return err; 1729 } 1730 1731 static umode_t m88e1121_hwmon_is_visible(const void *data, 1732 enum hwmon_sensor_types type, 1733 u32 attr, int channel) 1734 { 1735 if (type != hwmon_temp) 1736 return 0; 1737 1738 switch (attr) { 1739 case hwmon_temp_input: 1740 return 0444; 1741 default: 1742 return 0; 1743 } 1744 } 1745 1746 static u32 m88e1121_hwmon_chip_config[] = { 1747 HWMON_C_REGISTER_TZ, 1748 0 1749 }; 1750 1751 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 1752 .type = hwmon_chip, 1753 .config = m88e1121_hwmon_chip_config, 1754 }; 1755 1756 static u32 m88e1121_hwmon_temp_config[] = { 1757 HWMON_T_INPUT, 1758 0 1759 }; 1760 1761 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 1762 .type = hwmon_temp, 1763 .config = m88e1121_hwmon_temp_config, 1764 }; 1765 1766 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 1767 &m88e1121_hwmon_chip, 1768 &m88e1121_hwmon_temp, 1769 NULL 1770 }; 1771 1772 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 1773 .is_visible = m88e1121_hwmon_is_visible, 1774 .read = m88e1121_hwmon_read, 1775 }; 1776 1777 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 1778 .ops = &m88e1121_hwmon_hwmon_ops, 1779 .info = m88e1121_hwmon_info, 1780 }; 1781 1782 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 1783 { 1784 int ret; 1785 1786 *temp = 0; 1787 1788 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1789 MII_88E1510_TEMP_SENSOR); 1790 if (ret < 0) 1791 return ret; 1792 1793 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 1794 1795 return 0; 1796 } 1797 1798 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 1799 { 1800 int ret; 1801 1802 *temp = 0; 1803 1804 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1805 MII_88E1121_MISC_TEST); 1806 if (ret < 0) 1807 return ret; 1808 1809 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 1810 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 1811 /* convert to mC */ 1812 *temp *= 1000; 1813 1814 return 0; 1815 } 1816 1817 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 1818 { 1819 temp = temp / 1000; 1820 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 1821 1822 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1823 MII_88E1121_MISC_TEST, 1824 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 1825 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 1826 } 1827 1828 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 1829 { 1830 int ret; 1831 1832 *alarm = false; 1833 1834 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 1835 MII_88E1121_MISC_TEST); 1836 if (ret < 0) 1837 return ret; 1838 1839 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 1840 1841 return 0; 1842 } 1843 1844 static int m88e1510_hwmon_read(struct device *dev, 1845 enum hwmon_sensor_types type, 1846 u32 attr, int channel, long *temp) 1847 { 1848 struct phy_device *phydev = dev_get_drvdata(dev); 1849 int err; 1850 1851 switch (attr) { 1852 case hwmon_temp_input: 1853 err = m88e1510_get_temp(phydev, temp); 1854 break; 1855 case hwmon_temp_crit: 1856 err = m88e1510_get_temp_critical(phydev, temp); 1857 break; 1858 case hwmon_temp_max_alarm: 1859 err = m88e1510_get_temp_alarm(phydev, temp); 1860 break; 1861 default: 1862 return -EOPNOTSUPP; 1863 } 1864 1865 return err; 1866 } 1867 1868 static int m88e1510_hwmon_write(struct device *dev, 1869 enum hwmon_sensor_types type, 1870 u32 attr, int channel, long temp) 1871 { 1872 struct phy_device *phydev = dev_get_drvdata(dev); 1873 int err; 1874 1875 switch (attr) { 1876 case hwmon_temp_crit: 1877 err = m88e1510_set_temp_critical(phydev, temp); 1878 break; 1879 default: 1880 return -EOPNOTSUPP; 1881 } 1882 return err; 1883 } 1884 1885 static umode_t m88e1510_hwmon_is_visible(const void *data, 1886 enum hwmon_sensor_types type, 1887 u32 attr, int channel) 1888 { 1889 if (type != hwmon_temp) 1890 return 0; 1891 1892 switch (attr) { 1893 case hwmon_temp_input: 1894 case hwmon_temp_max_alarm: 1895 return 0444; 1896 case hwmon_temp_crit: 1897 return 0644; 1898 default: 1899 return 0; 1900 } 1901 } 1902 1903 static u32 m88e1510_hwmon_temp_config[] = { 1904 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 1905 0 1906 }; 1907 1908 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 1909 .type = hwmon_temp, 1910 .config = m88e1510_hwmon_temp_config, 1911 }; 1912 1913 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 1914 &m88e1121_hwmon_chip, 1915 &m88e1510_hwmon_temp, 1916 NULL 1917 }; 1918 1919 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 1920 .is_visible = m88e1510_hwmon_is_visible, 1921 .read = m88e1510_hwmon_read, 1922 .write = m88e1510_hwmon_write, 1923 }; 1924 1925 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 1926 .ops = &m88e1510_hwmon_hwmon_ops, 1927 .info = m88e1510_hwmon_info, 1928 }; 1929 1930 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 1931 { 1932 int sum = 0; 1933 int oldpage; 1934 int ret = 0; 1935 int i; 1936 1937 *temp = 0; 1938 1939 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 1940 if (oldpage < 0) 1941 goto error; 1942 1943 /* Enable temperature sensor */ 1944 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1945 if (ret < 0) 1946 goto error; 1947 1948 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1949 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 1950 MII_88E6390_MISC_TEST_SAMPLE_1S; 1951 1952 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1953 if (ret < 0) 1954 goto error; 1955 1956 /* Wait for temperature to stabilize */ 1957 usleep_range(10000, 12000); 1958 1959 /* Reading the temperature sense has an errata. You need to read 1960 * a number of times and take an average. 1961 */ 1962 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 1963 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 1964 if (ret < 0) 1965 goto error; 1966 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 1967 } 1968 1969 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 1970 *temp = (sum - 75) * 1000; 1971 1972 /* Disable temperature sensor */ 1973 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 1974 if (ret < 0) 1975 goto error; 1976 1977 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 1978 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 1979 1980 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 1981 1982 error: 1983 phy_restore_page(phydev, oldpage, ret); 1984 1985 return ret; 1986 } 1987 1988 static int m88e6390_hwmon_read(struct device *dev, 1989 enum hwmon_sensor_types type, 1990 u32 attr, int channel, long *temp) 1991 { 1992 struct phy_device *phydev = dev_get_drvdata(dev); 1993 int err; 1994 1995 switch (attr) { 1996 case hwmon_temp_input: 1997 err = m88e6390_get_temp(phydev, temp); 1998 break; 1999 default: 2000 return -EOPNOTSUPP; 2001 } 2002 2003 return err; 2004 } 2005 2006 static umode_t m88e6390_hwmon_is_visible(const void *data, 2007 enum hwmon_sensor_types type, 2008 u32 attr, int channel) 2009 { 2010 if (type != hwmon_temp) 2011 return 0; 2012 2013 switch (attr) { 2014 case hwmon_temp_input: 2015 return 0444; 2016 default: 2017 return 0; 2018 } 2019 } 2020 2021 static u32 m88e6390_hwmon_temp_config[] = { 2022 HWMON_T_INPUT, 2023 0 2024 }; 2025 2026 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 2027 .type = hwmon_temp, 2028 .config = m88e6390_hwmon_temp_config, 2029 }; 2030 2031 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 2032 &m88e1121_hwmon_chip, 2033 &m88e6390_hwmon_temp, 2034 NULL 2035 }; 2036 2037 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 2038 .is_visible = m88e6390_hwmon_is_visible, 2039 .read = m88e6390_hwmon_read, 2040 }; 2041 2042 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 2043 .ops = &m88e6390_hwmon_hwmon_ops, 2044 .info = m88e6390_hwmon_info, 2045 }; 2046 2047 static int marvell_hwmon_name(struct phy_device *phydev) 2048 { 2049 struct marvell_priv *priv = phydev->priv; 2050 struct device *dev = &phydev->mdio.dev; 2051 const char *devname = dev_name(dev); 2052 size_t len = strlen(devname); 2053 int i, j; 2054 2055 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 2056 if (!priv->hwmon_name) 2057 return -ENOMEM; 2058 2059 for (i = j = 0; i < len && devname[i]; i++) { 2060 if (isalnum(devname[i])) 2061 priv->hwmon_name[j++] = devname[i]; 2062 } 2063 2064 return 0; 2065 } 2066 2067 static int marvell_hwmon_probe(struct phy_device *phydev, 2068 const struct hwmon_chip_info *chip) 2069 { 2070 struct marvell_priv *priv = phydev->priv; 2071 struct device *dev = &phydev->mdio.dev; 2072 int err; 2073 2074 err = marvell_hwmon_name(phydev); 2075 if (err) 2076 return err; 2077 2078 priv->hwmon_dev = devm_hwmon_device_register_with_info( 2079 dev, priv->hwmon_name, phydev, chip, NULL); 2080 2081 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 2082 } 2083 2084 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2085 { 2086 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 2087 } 2088 2089 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2090 { 2091 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 2092 } 2093 2094 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2095 { 2096 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 2097 } 2098 #else 2099 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2100 { 2101 return 0; 2102 } 2103 2104 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2105 { 2106 return 0; 2107 } 2108 2109 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2110 { 2111 return 0; 2112 } 2113 #endif 2114 2115 static int marvell_probe(struct phy_device *phydev) 2116 { 2117 struct marvell_priv *priv; 2118 2119 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 2120 if (!priv) 2121 return -ENOMEM; 2122 2123 phydev->priv = priv; 2124 2125 return 0; 2126 } 2127 2128 static int m88e1121_probe(struct phy_device *phydev) 2129 { 2130 int err; 2131 2132 err = marvell_probe(phydev); 2133 if (err) 2134 return err; 2135 2136 return m88e1121_hwmon_probe(phydev); 2137 } 2138 2139 static int m88e1510_probe(struct phy_device *phydev) 2140 { 2141 int err; 2142 2143 err = marvell_probe(phydev); 2144 if (err) 2145 return err; 2146 2147 return m88e1510_hwmon_probe(phydev); 2148 } 2149 2150 static int m88e6390_probe(struct phy_device *phydev) 2151 { 2152 int err; 2153 2154 err = marvell_probe(phydev); 2155 if (err) 2156 return err; 2157 2158 return m88e6390_hwmon_probe(phydev); 2159 } 2160 2161 static struct phy_driver marvell_drivers[] = { 2162 { 2163 .phy_id = MARVELL_PHY_ID_88E1101, 2164 .phy_id_mask = MARVELL_PHY_ID_MASK, 2165 .name = "Marvell 88E1101", 2166 /* PHY_GBIT_FEATURES */ 2167 .probe = marvell_probe, 2168 .config_init = &marvell_config_init, 2169 .config_aneg = &m88e1101_config_aneg, 2170 .ack_interrupt = &marvell_ack_interrupt, 2171 .config_intr = &marvell_config_intr, 2172 .resume = &genphy_resume, 2173 .suspend = &genphy_suspend, 2174 .read_page = marvell_read_page, 2175 .write_page = marvell_write_page, 2176 .get_sset_count = marvell_get_sset_count, 2177 .get_strings = marvell_get_strings, 2178 .get_stats = marvell_get_stats, 2179 }, 2180 { 2181 .phy_id = MARVELL_PHY_ID_88E1112, 2182 .phy_id_mask = MARVELL_PHY_ID_MASK, 2183 .name = "Marvell 88E1112", 2184 /* PHY_GBIT_FEATURES */ 2185 .probe = marvell_probe, 2186 .config_init = &m88e1111_config_init, 2187 .config_aneg = &marvell_config_aneg, 2188 .ack_interrupt = &marvell_ack_interrupt, 2189 .config_intr = &marvell_config_intr, 2190 .resume = &genphy_resume, 2191 .suspend = &genphy_suspend, 2192 .read_page = marvell_read_page, 2193 .write_page = marvell_write_page, 2194 .get_sset_count = marvell_get_sset_count, 2195 .get_strings = marvell_get_strings, 2196 .get_stats = marvell_get_stats, 2197 .get_tunable = m88e1011_get_tunable, 2198 .set_tunable = m88e1011_set_tunable, 2199 .link_change_notify = m88e1011_link_change_notify, 2200 }, 2201 { 2202 .phy_id = MARVELL_PHY_ID_88E1111, 2203 .phy_id_mask = MARVELL_PHY_ID_MASK, 2204 .name = "Marvell 88E1111", 2205 /* PHY_GBIT_FEATURES */ 2206 .probe = marvell_probe, 2207 .config_init = &m88e1111_config_init, 2208 .config_aneg = &marvell_config_aneg, 2209 .read_status = &marvell_read_status, 2210 .ack_interrupt = &marvell_ack_interrupt, 2211 .config_intr = &marvell_config_intr, 2212 .resume = &genphy_resume, 2213 .suspend = &genphy_suspend, 2214 .read_page = marvell_read_page, 2215 .write_page = marvell_write_page, 2216 .get_sset_count = marvell_get_sset_count, 2217 .get_strings = marvell_get_strings, 2218 .get_stats = marvell_get_stats, 2219 .get_tunable = m88e1111_get_tunable, 2220 .set_tunable = m88e1111_set_tunable, 2221 .link_change_notify = m88e1011_link_change_notify, 2222 }, 2223 { 2224 .phy_id = MARVELL_PHY_ID_88E1118, 2225 .phy_id_mask = MARVELL_PHY_ID_MASK, 2226 .name = "Marvell 88E1118", 2227 /* PHY_GBIT_FEATURES */ 2228 .probe = marvell_probe, 2229 .config_init = &m88e1118_config_init, 2230 .config_aneg = &m88e1118_config_aneg, 2231 .ack_interrupt = &marvell_ack_interrupt, 2232 .config_intr = &marvell_config_intr, 2233 .resume = &genphy_resume, 2234 .suspend = &genphy_suspend, 2235 .read_page = marvell_read_page, 2236 .write_page = marvell_write_page, 2237 .get_sset_count = marvell_get_sset_count, 2238 .get_strings = marvell_get_strings, 2239 .get_stats = marvell_get_stats, 2240 }, 2241 { 2242 .phy_id = MARVELL_PHY_ID_88E1121R, 2243 .phy_id_mask = MARVELL_PHY_ID_MASK, 2244 .name = "Marvell 88E1121R", 2245 /* PHY_GBIT_FEATURES */ 2246 .probe = &m88e1121_probe, 2247 .config_init = &marvell_config_init, 2248 .config_aneg = &m88e1121_config_aneg, 2249 .read_status = &marvell_read_status, 2250 .ack_interrupt = &marvell_ack_interrupt, 2251 .config_intr = &marvell_config_intr, 2252 .did_interrupt = &m88e1121_did_interrupt, 2253 .resume = &genphy_resume, 2254 .suspend = &genphy_suspend, 2255 .read_page = marvell_read_page, 2256 .write_page = marvell_write_page, 2257 .get_sset_count = marvell_get_sset_count, 2258 .get_strings = marvell_get_strings, 2259 .get_stats = marvell_get_stats, 2260 .get_tunable = m88e1011_get_tunable, 2261 .set_tunable = m88e1011_set_tunable, 2262 .link_change_notify = m88e1011_link_change_notify, 2263 }, 2264 { 2265 .phy_id = MARVELL_PHY_ID_88E1318S, 2266 .phy_id_mask = MARVELL_PHY_ID_MASK, 2267 .name = "Marvell 88E1318S", 2268 /* PHY_GBIT_FEATURES */ 2269 .probe = marvell_probe, 2270 .config_init = &m88e1318_config_init, 2271 .config_aneg = &m88e1318_config_aneg, 2272 .read_status = &marvell_read_status, 2273 .ack_interrupt = &marvell_ack_interrupt, 2274 .config_intr = &marvell_config_intr, 2275 .did_interrupt = &m88e1121_did_interrupt, 2276 .get_wol = &m88e1318_get_wol, 2277 .set_wol = &m88e1318_set_wol, 2278 .resume = &genphy_resume, 2279 .suspend = &genphy_suspend, 2280 .read_page = marvell_read_page, 2281 .write_page = marvell_write_page, 2282 .get_sset_count = marvell_get_sset_count, 2283 .get_strings = marvell_get_strings, 2284 .get_stats = marvell_get_stats, 2285 }, 2286 { 2287 .phy_id = MARVELL_PHY_ID_88E1145, 2288 .phy_id_mask = MARVELL_PHY_ID_MASK, 2289 .name = "Marvell 88E1145", 2290 /* PHY_GBIT_FEATURES */ 2291 .probe = marvell_probe, 2292 .config_init = &m88e1145_config_init, 2293 .config_aneg = &m88e1101_config_aneg, 2294 .read_status = &genphy_read_status, 2295 .ack_interrupt = &marvell_ack_interrupt, 2296 .config_intr = &marvell_config_intr, 2297 .resume = &genphy_resume, 2298 .suspend = &genphy_suspend, 2299 .read_page = marvell_read_page, 2300 .write_page = marvell_write_page, 2301 .get_sset_count = marvell_get_sset_count, 2302 .get_strings = marvell_get_strings, 2303 .get_stats = marvell_get_stats, 2304 .get_tunable = m88e1111_get_tunable, 2305 .set_tunable = m88e1111_set_tunable, 2306 .link_change_notify = m88e1011_link_change_notify, 2307 }, 2308 { 2309 .phy_id = MARVELL_PHY_ID_88E1149R, 2310 .phy_id_mask = MARVELL_PHY_ID_MASK, 2311 .name = "Marvell 88E1149R", 2312 /* PHY_GBIT_FEATURES */ 2313 .probe = marvell_probe, 2314 .config_init = &m88e1149_config_init, 2315 .config_aneg = &m88e1118_config_aneg, 2316 .ack_interrupt = &marvell_ack_interrupt, 2317 .config_intr = &marvell_config_intr, 2318 .resume = &genphy_resume, 2319 .suspend = &genphy_suspend, 2320 .read_page = marvell_read_page, 2321 .write_page = marvell_write_page, 2322 .get_sset_count = marvell_get_sset_count, 2323 .get_strings = marvell_get_strings, 2324 .get_stats = marvell_get_stats, 2325 }, 2326 { 2327 .phy_id = MARVELL_PHY_ID_88E1240, 2328 .phy_id_mask = MARVELL_PHY_ID_MASK, 2329 .name = "Marvell 88E1240", 2330 /* PHY_GBIT_FEATURES */ 2331 .probe = marvell_probe, 2332 .config_init = &m88e1111_config_init, 2333 .config_aneg = &marvell_config_aneg, 2334 .ack_interrupt = &marvell_ack_interrupt, 2335 .config_intr = &marvell_config_intr, 2336 .resume = &genphy_resume, 2337 .suspend = &genphy_suspend, 2338 .read_page = marvell_read_page, 2339 .write_page = marvell_write_page, 2340 .get_sset_count = marvell_get_sset_count, 2341 .get_strings = marvell_get_strings, 2342 .get_stats = marvell_get_stats, 2343 }, 2344 { 2345 .phy_id = MARVELL_PHY_ID_88E1116R, 2346 .phy_id_mask = MARVELL_PHY_ID_MASK, 2347 .name = "Marvell 88E1116R", 2348 /* PHY_GBIT_FEATURES */ 2349 .probe = marvell_probe, 2350 .config_init = &m88e1116r_config_init, 2351 .ack_interrupt = &marvell_ack_interrupt, 2352 .config_intr = &marvell_config_intr, 2353 .resume = &genphy_resume, 2354 .suspend = &genphy_suspend, 2355 .read_page = marvell_read_page, 2356 .write_page = marvell_write_page, 2357 .get_sset_count = marvell_get_sset_count, 2358 .get_strings = marvell_get_strings, 2359 .get_stats = marvell_get_stats, 2360 .get_tunable = m88e1011_get_tunable, 2361 .set_tunable = m88e1011_set_tunable, 2362 .link_change_notify = m88e1011_link_change_notify, 2363 }, 2364 { 2365 .phy_id = MARVELL_PHY_ID_88E1510, 2366 .phy_id_mask = MARVELL_PHY_ID_MASK, 2367 .name = "Marvell 88E1510", 2368 .features = PHY_GBIT_FIBRE_FEATURES, 2369 .probe = &m88e1510_probe, 2370 .config_init = &m88e1510_config_init, 2371 .config_aneg = &m88e1510_config_aneg, 2372 .read_status = &marvell_read_status, 2373 .ack_interrupt = &marvell_ack_interrupt, 2374 .config_intr = &marvell_config_intr, 2375 .did_interrupt = &m88e1121_did_interrupt, 2376 .get_wol = &m88e1318_get_wol, 2377 .set_wol = &m88e1318_set_wol, 2378 .resume = &marvell_resume, 2379 .suspend = &marvell_suspend, 2380 .read_page = marvell_read_page, 2381 .write_page = marvell_write_page, 2382 .get_sset_count = marvell_get_sset_count, 2383 .get_strings = marvell_get_strings, 2384 .get_stats = marvell_get_stats, 2385 .set_loopback = genphy_loopback, 2386 .get_tunable = m88e1011_get_tunable, 2387 .set_tunable = m88e1011_set_tunable, 2388 .link_change_notify = m88e1011_link_change_notify, 2389 }, 2390 { 2391 .phy_id = MARVELL_PHY_ID_88E1540, 2392 .phy_id_mask = MARVELL_PHY_ID_MASK, 2393 .name = "Marvell 88E1540", 2394 /* PHY_GBIT_FEATURES */ 2395 .probe = m88e1510_probe, 2396 .config_init = &marvell_config_init, 2397 .config_aneg = &m88e1510_config_aneg, 2398 .read_status = &marvell_read_status, 2399 .ack_interrupt = &marvell_ack_interrupt, 2400 .config_intr = &marvell_config_intr, 2401 .did_interrupt = &m88e1121_did_interrupt, 2402 .resume = &genphy_resume, 2403 .suspend = &genphy_suspend, 2404 .read_page = marvell_read_page, 2405 .write_page = marvell_write_page, 2406 .get_sset_count = marvell_get_sset_count, 2407 .get_strings = marvell_get_strings, 2408 .get_stats = marvell_get_stats, 2409 .get_tunable = m88e1540_get_tunable, 2410 .set_tunable = m88e1540_set_tunable, 2411 .link_change_notify = m88e1011_link_change_notify, 2412 }, 2413 { 2414 .phy_id = MARVELL_PHY_ID_88E1545, 2415 .phy_id_mask = MARVELL_PHY_ID_MASK, 2416 .name = "Marvell 88E1545", 2417 .probe = m88e1510_probe, 2418 /* PHY_GBIT_FEATURES */ 2419 .config_init = &marvell_config_init, 2420 .config_aneg = &m88e1510_config_aneg, 2421 .read_status = &marvell_read_status, 2422 .ack_interrupt = &marvell_ack_interrupt, 2423 .config_intr = &marvell_config_intr, 2424 .did_interrupt = &m88e1121_did_interrupt, 2425 .resume = &genphy_resume, 2426 .suspend = &genphy_suspend, 2427 .read_page = marvell_read_page, 2428 .write_page = marvell_write_page, 2429 .get_sset_count = marvell_get_sset_count, 2430 .get_strings = marvell_get_strings, 2431 .get_stats = marvell_get_stats, 2432 .get_tunable = m88e1540_get_tunable, 2433 .set_tunable = m88e1540_set_tunable, 2434 .link_change_notify = m88e1011_link_change_notify, 2435 }, 2436 { 2437 .phy_id = MARVELL_PHY_ID_88E3016, 2438 .phy_id_mask = MARVELL_PHY_ID_MASK, 2439 .name = "Marvell 88E3016", 2440 /* PHY_BASIC_FEATURES */ 2441 .probe = marvell_probe, 2442 .config_init = &m88e3016_config_init, 2443 .aneg_done = &marvell_aneg_done, 2444 .read_status = &marvell_read_status, 2445 .ack_interrupt = &marvell_ack_interrupt, 2446 .config_intr = &marvell_config_intr, 2447 .did_interrupt = &m88e1121_did_interrupt, 2448 .resume = &genphy_resume, 2449 .suspend = &genphy_suspend, 2450 .read_page = marvell_read_page, 2451 .write_page = marvell_write_page, 2452 .get_sset_count = marvell_get_sset_count, 2453 .get_strings = marvell_get_strings, 2454 .get_stats = marvell_get_stats, 2455 }, 2456 { 2457 .phy_id = MARVELL_PHY_ID_88E6390, 2458 .phy_id_mask = MARVELL_PHY_ID_MASK, 2459 .name = "Marvell 88E6390", 2460 /* PHY_GBIT_FEATURES */ 2461 .probe = m88e6390_probe, 2462 .config_init = &marvell_config_init, 2463 .config_aneg = &m88e6390_config_aneg, 2464 .read_status = &marvell_read_status, 2465 .ack_interrupt = &marvell_ack_interrupt, 2466 .config_intr = &marvell_config_intr, 2467 .did_interrupt = &m88e1121_did_interrupt, 2468 .resume = &genphy_resume, 2469 .suspend = &genphy_suspend, 2470 .read_page = marvell_read_page, 2471 .write_page = marvell_write_page, 2472 .get_sset_count = marvell_get_sset_count, 2473 .get_strings = marvell_get_strings, 2474 .get_stats = marvell_get_stats, 2475 .get_tunable = m88e1540_get_tunable, 2476 .set_tunable = m88e1540_set_tunable, 2477 .link_change_notify = m88e1011_link_change_notify, 2478 }, 2479 }; 2480 2481 module_phy_driver(marvell_drivers); 2482 2483 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 2484 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 2485 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 2486 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 2487 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 2488 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 2489 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 2490 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 2491 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 2492 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 2493 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 2494 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 2495 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 2496 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 2497 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 2498 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 2499 { } 2500 }; 2501 2502 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 2503