xref: /openbmc/linux/drivers/net/phy/marvell.c (revision 176f011b)
1 /*
2  * drivers/net/phy/marvell.c
3  *
4  * Driver for Marvell PHYs
5  *
6  * Author: Andy Fleming
7  *
8  * Copyright (c) 2004 Freescale Semiconductor, Inc.
9  *
10  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11  *
12  * This program is free software; you can redistribute  it and/or modify it
13  * under  the terms of  the GNU General  Public License as published by the
14  * Free Software Foundation;  either version 2 of the  License, or (at your
15  * option) any later version.
16  *
17  */
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
31 #include <linux/mm.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
37 #include <linux/of.h>
38 
39 #include <linux/io.h>
40 #include <asm/irq.h>
41 #include <linux/uaccess.h>
42 
43 #define MII_MARVELL_PHY_PAGE		22
44 #define MII_MARVELL_COPPER_PAGE		0x00
45 #define MII_MARVELL_FIBER_PAGE		0x01
46 #define MII_MARVELL_MSCR_PAGE		0x02
47 #define MII_MARVELL_LED_PAGE		0x03
48 #define MII_MARVELL_MISC_TEST_PAGE	0x06
49 #define MII_MARVELL_WOL_PAGE		0x11
50 
51 #define MII_M1011_IEVENT		0x13
52 #define MII_M1011_IEVENT_CLEAR		0x0000
53 
54 #define MII_M1011_IMASK			0x12
55 #define MII_M1011_IMASK_INIT		0x6400
56 #define MII_M1011_IMASK_CLEAR		0x0000
57 
58 #define MII_M1011_PHY_SCR			0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN		BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT	12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK	0x7800
62 #define MII_M1011_PHY_SCR_MDI			(0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X			(0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS		(0x3 << 5)
65 
66 #define MII_M1111_PHY_LED_CONTROL	0x18
67 #define MII_M1111_PHY_LED_DIRECT	0x4100
68 #define MII_M1111_PHY_LED_COMBINE	0x411c
69 #define MII_M1111_PHY_EXT_CR		0x14
70 #define MII_M1111_RGMII_RX_DELAY	BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY	BIT(1)
72 #define MII_M1111_PHY_EXT_SR		0x1b
73 
74 #define MII_M1111_HWCFG_MODE_MASK		0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
77 #define MII_M1111_HWCFG_MODE_RTBI		0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES	BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO	BIT(15)
82 
83 #define MII_88E1121_PHY_MSCR_REG	21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK	(BIT(5) | BIT(4))
87 
88 #define MII_88E1121_MISC_TEST				0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f
95 
96 #define MII_88E1510_TEMP_SENSOR		0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK	0xff
98 
99 #define MII_88E6390_MISC_TEST		0x1b
100 #define MII_88E6390_MISC_TEST_SAMPLE_1S		0
101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS	BIT(14)
102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE	BIT(15)
103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE	0
104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK	(0x3 << 14)
105 
106 #define MII_88E6390_TEMP_SENSOR		0x1c
107 #define MII_88E6390_TEMP_SENSOR_MASK	0xff
108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
109 
110 #define MII_88E1318S_PHY_MSCR1_REG	16
111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
112 
113 /* Copper Specific Interrupt Enable Register */
114 #define MII_88E1318S_PHY_CSIER				0x12
115 /* WOL Event Interrupt Enable */
116 #define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
117 
118 /* LED Timer Control Register */
119 #define MII_88E1318S_PHY_LED_TCR			0x12
120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT		BIT(15)
121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE		BIT(7)
122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW		BIT(11)
123 
124 /* Magic Packet MAC address registers */
125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2		0x17
126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1		0x18
127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0		0x19
128 
129 #define MII_88E1318S_PHY_WOL_CTRL				0x10
130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS		BIT(12)
131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE	BIT(14)
132 
133 #define MII_PHY_LED_CTRL	        16
134 #define MII_88E1121_PHY_LED_DEF		0x0030
135 #define MII_88E1510_PHY_LED_DEF		0x1177
136 
137 #define MII_M1011_PHY_STATUS		0x11
138 #define MII_M1011_PHY_STATUS_1000	0x8000
139 #define MII_M1011_PHY_STATUS_100	0x4000
140 #define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
141 #define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
142 #define MII_M1011_PHY_STATUS_RESOLVED	0x0800
143 #define MII_M1011_PHY_STATUS_LINK	0x0400
144 
145 #define MII_88E3016_PHY_SPEC_CTRL	0x10
146 #define MII_88E3016_DISABLE_SCRAMBLER	0x0200
147 #define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
148 
149 #define MII_88E1510_GEN_CTRL_REG_1		0x14
150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
152 #define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */
153 
154 #define LPA_FIBER_1000HALF	0x40
155 #define LPA_FIBER_1000FULL	0x20
156 
157 #define LPA_PAUSE_FIBER		0x180
158 #define LPA_PAUSE_ASYM_FIBER	0x100
159 
160 #define ADVERTISE_FIBER_1000HALF	0x40
161 #define ADVERTISE_FIBER_1000FULL	0x20
162 
163 #define ADVERTISE_PAUSE_FIBER		0x180
164 #define ADVERTISE_PAUSE_ASYM_FIBER	0x100
165 
166 #define REGISTER_LINK_STATUS	0x400
167 #define NB_FIBER_STATS	1
168 
169 MODULE_DESCRIPTION("Marvell PHY driver");
170 MODULE_AUTHOR("Andy Fleming");
171 MODULE_LICENSE("GPL");
172 
173 struct marvell_hw_stat {
174 	const char *string;
175 	u8 page;
176 	u8 reg;
177 	u8 bits;
178 };
179 
180 static struct marvell_hw_stat marvell_hw_stats[] = {
181 	{ "phy_receive_errors_copper", 0, 21, 16},
182 	{ "phy_idle_errors", 0, 10, 8 },
183 	{ "phy_receive_errors_fiber", 1, 21, 16},
184 };
185 
186 struct marvell_priv {
187 	u64 stats[ARRAY_SIZE(marvell_hw_stats)];
188 	char *hwmon_name;
189 	struct device *hwmon_dev;
190 };
191 
192 static int marvell_read_page(struct phy_device *phydev)
193 {
194 	return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
195 }
196 
197 static int marvell_write_page(struct phy_device *phydev, int page)
198 {
199 	return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
200 }
201 
202 static int marvell_set_page(struct phy_device *phydev, int page)
203 {
204 	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
205 }
206 
207 static int marvell_ack_interrupt(struct phy_device *phydev)
208 {
209 	int err;
210 
211 	/* Clear the interrupts by reading the reg */
212 	err = phy_read(phydev, MII_M1011_IEVENT);
213 
214 	if (err < 0)
215 		return err;
216 
217 	return 0;
218 }
219 
220 static int marvell_config_intr(struct phy_device *phydev)
221 {
222 	int err;
223 
224 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
225 		err = phy_write(phydev, MII_M1011_IMASK,
226 				MII_M1011_IMASK_INIT);
227 	else
228 		err = phy_write(phydev, MII_M1011_IMASK,
229 				MII_M1011_IMASK_CLEAR);
230 
231 	return err;
232 }
233 
234 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
235 {
236 	int reg;
237 	int err;
238 	int val;
239 
240 	/* get the current settings */
241 	reg = phy_read(phydev, MII_M1011_PHY_SCR);
242 	if (reg < 0)
243 		return reg;
244 
245 	val = reg;
246 	val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
247 	switch (polarity) {
248 	case ETH_TP_MDI:
249 		val |= MII_M1011_PHY_SCR_MDI;
250 		break;
251 	case ETH_TP_MDI_X:
252 		val |= MII_M1011_PHY_SCR_MDI_X;
253 		break;
254 	case ETH_TP_MDI_AUTO:
255 	case ETH_TP_MDI_INVALID:
256 	default:
257 		val |= MII_M1011_PHY_SCR_AUTO_CROSS;
258 		break;
259 	}
260 
261 	if (val != reg) {
262 		/* Set the new polarity value in the register */
263 		err = phy_write(phydev, MII_M1011_PHY_SCR, val);
264 		if (err)
265 			return err;
266 	}
267 
268 	return val != reg;
269 }
270 
271 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
272 				 u8 retries)
273 {
274 	int reg;
275 
276 	reg = phy_read(phydev, MII_M1011_PHY_SCR);
277 	if (reg < 0)
278 		return reg;
279 
280 	reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
281 	reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
282 	if (enable)
283 		reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
284 
285 	return phy_write(phydev, MII_M1011_PHY_SCR, reg);
286 }
287 
288 static int marvell_config_aneg(struct phy_device *phydev)
289 {
290 	int changed = 0;
291 	int err;
292 
293 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
294 	if (err < 0)
295 		return err;
296 
297 	changed = err;
298 
299 	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
300 			MII_M1111_PHY_LED_DIRECT);
301 	if (err < 0)
302 		return err;
303 
304 	err = genphy_config_aneg(phydev);
305 	if (err < 0)
306 		return err;
307 
308 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
309 		/* A write to speed/duplex bits (that is performed by
310 		 * genphy_config_aneg() call above) must be followed by
311 		 * a software reset. Otherwise, the write has no effect.
312 		 */
313 		err = genphy_soft_reset(phydev);
314 		if (err < 0)
315 			return err;
316 	}
317 
318 	return 0;
319 }
320 
321 static int m88e1101_config_aneg(struct phy_device *phydev)
322 {
323 	int err;
324 
325 	/* This Marvell PHY has an errata which requires
326 	 * that certain registers get written in order
327 	 * to restart autonegotiation
328 	 */
329 	err = genphy_soft_reset(phydev);
330 	if (err < 0)
331 		return err;
332 
333 	err = phy_write(phydev, 0x1d, 0x1f);
334 	if (err < 0)
335 		return err;
336 
337 	err = phy_write(phydev, 0x1e, 0x200c);
338 	if (err < 0)
339 		return err;
340 
341 	err = phy_write(phydev, 0x1d, 0x5);
342 	if (err < 0)
343 		return err;
344 
345 	err = phy_write(phydev, 0x1e, 0);
346 	if (err < 0)
347 		return err;
348 
349 	err = phy_write(phydev, 0x1e, 0x100);
350 	if (err < 0)
351 		return err;
352 
353 	return marvell_config_aneg(phydev);
354 }
355 
356 #ifdef CONFIG_OF_MDIO
357 /* Set and/or override some configuration registers based on the
358  * marvell,reg-init property stored in the of_node for the phydev.
359  *
360  * marvell,reg-init = <reg-page reg mask value>,...;
361  *
362  * There may be one or more sets of <reg-page reg mask value>:
363  *
364  * reg-page: which register bank to use.
365  * reg: the register.
366  * mask: if non-zero, ANDed with existing register value.
367  * value: ORed with the masked value and written to the regiser.
368  *
369  */
370 static int marvell_of_reg_init(struct phy_device *phydev)
371 {
372 	const __be32 *paddr;
373 	int len, i, saved_page, current_page, ret = 0;
374 
375 	if (!phydev->mdio.dev.of_node)
376 		return 0;
377 
378 	paddr = of_get_property(phydev->mdio.dev.of_node,
379 				"marvell,reg-init", &len);
380 	if (!paddr || len < (4 * sizeof(*paddr)))
381 		return 0;
382 
383 	saved_page = phy_save_page(phydev);
384 	if (saved_page < 0)
385 		goto err;
386 	current_page = saved_page;
387 
388 	len /= sizeof(*paddr);
389 	for (i = 0; i < len - 3; i += 4) {
390 		u16 page = be32_to_cpup(paddr + i);
391 		u16 reg = be32_to_cpup(paddr + i + 1);
392 		u16 mask = be32_to_cpup(paddr + i + 2);
393 		u16 val_bits = be32_to_cpup(paddr + i + 3);
394 		int val;
395 
396 		if (page != current_page) {
397 			current_page = page;
398 			ret = marvell_write_page(phydev, page);
399 			if (ret < 0)
400 				goto err;
401 		}
402 
403 		val = 0;
404 		if (mask) {
405 			val = __phy_read(phydev, reg);
406 			if (val < 0) {
407 				ret = val;
408 				goto err;
409 			}
410 			val &= mask;
411 		}
412 		val |= val_bits;
413 
414 		ret = __phy_write(phydev, reg, val);
415 		if (ret < 0)
416 			goto err;
417 	}
418 err:
419 	return phy_restore_page(phydev, saved_page, ret);
420 }
421 #else
422 static int marvell_of_reg_init(struct phy_device *phydev)
423 {
424 	return 0;
425 }
426 #endif /* CONFIG_OF_MDIO */
427 
428 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
429 {
430 	int mscr;
431 
432 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
433 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
434 		       MII_88E1121_PHY_MSCR_TX_DELAY;
435 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
436 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
437 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
438 		mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
439 	else
440 		mscr = 0;
441 
442 	return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
443 				MII_88E1121_PHY_MSCR_REG,
444 				MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
445 }
446 
447 static int m88e1121_config_aneg(struct phy_device *phydev)
448 {
449 	int changed = 0;
450 	int err = 0;
451 
452 	if (phy_interface_is_rgmii(phydev)) {
453 		err = m88e1121_config_aneg_rgmii_delays(phydev);
454 		if (err < 0)
455 			return err;
456 	}
457 
458 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
459 	if (err < 0)
460 		return err;
461 
462 	changed = err;
463 
464 	err = genphy_config_aneg(phydev);
465 	if (err < 0)
466 		return err;
467 
468 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
469 		/* A software reset is used to ensure a "commit" of the
470 		 * changes is done.
471 		 */
472 		err = genphy_soft_reset(phydev);
473 		if (err < 0)
474 			return err;
475 	}
476 
477 	return 0;
478 }
479 
480 static int m88e1318_config_aneg(struct phy_device *phydev)
481 {
482 	int err;
483 
484 	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
485 			       MII_88E1318S_PHY_MSCR1_REG,
486 			       0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
487 	if (err < 0)
488 		return err;
489 
490 	return m88e1121_config_aneg(phydev);
491 }
492 
493 /**
494  * linkmode_adv_to_fiber_adv_t
495  * @advertise: the linkmode advertisement settings
496  *
497  * A small helper function that translates linkmode advertisement
498  * settings to phy autonegotiation advertisements for the MII_ADV
499  * register for fiber link.
500  */
501 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
502 {
503 	u32 result = 0;
504 
505 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
506 		result |= ADVERTISE_FIBER_1000HALF;
507 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
508 		result |= ADVERTISE_FIBER_1000FULL;
509 
510 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
511 	    linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
512 		result |= LPA_PAUSE_ASYM_FIBER;
513 	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
514 		result |= (ADVERTISE_PAUSE_FIBER
515 			   & (~ADVERTISE_PAUSE_ASYM_FIBER));
516 
517 	return result;
518 }
519 
520 /**
521  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
522  * @phydev: target phy_device struct
523  *
524  * Description: If auto-negotiation is enabled, we configure the
525  *   advertising, and then restart auto-negotiation.  If it is not
526  *   enabled, then we write the BMCR. Adapted for fiber link in
527  *   some Marvell's devices.
528  */
529 static int marvell_config_aneg_fiber(struct phy_device *phydev)
530 {
531 	int changed = 0;
532 	int err;
533 	int adv, oldadv;
534 
535 	if (phydev->autoneg != AUTONEG_ENABLE)
536 		return genphy_setup_forced(phydev);
537 
538 	/* Only allow advertising what this PHY supports */
539 	linkmode_and(phydev->advertising, phydev->advertising,
540 		     phydev->supported);
541 
542 	/* Setup fiber advertisement */
543 	adv = phy_read(phydev, MII_ADVERTISE);
544 	if (adv < 0)
545 		return adv;
546 
547 	oldadv = adv;
548 	adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
549 		| LPA_PAUSE_FIBER);
550 	adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising);
551 
552 	if (adv != oldadv) {
553 		err = phy_write(phydev, MII_ADVERTISE, adv);
554 		if (err < 0)
555 			return err;
556 
557 		changed = 1;
558 	}
559 
560 	if (changed == 0) {
561 		/* Advertisement hasn't changed, but maybe aneg was never on to
562 		 * begin with?	Or maybe phy was isolated?
563 		 */
564 		int ctl = phy_read(phydev, MII_BMCR);
565 
566 		if (ctl < 0)
567 			return ctl;
568 
569 		if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
570 			changed = 1; /* do restart aneg */
571 	}
572 
573 	/* Only restart aneg if we are advertising something different
574 	 * than we were before.
575 	 */
576 	if (changed > 0)
577 		changed = genphy_restart_aneg(phydev);
578 
579 	return changed;
580 }
581 
582 static int m88e1510_config_aneg(struct phy_device *phydev)
583 {
584 	int err;
585 
586 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
587 	if (err < 0)
588 		goto error;
589 
590 	/* Configure the copper link first */
591 	err = m88e1318_config_aneg(phydev);
592 	if (err < 0)
593 		goto error;
594 
595 	/* Do not touch the fiber page if we're in copper->sgmii mode */
596 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
597 		return 0;
598 
599 	/* Then the fiber link */
600 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
601 	if (err < 0)
602 		goto error;
603 
604 	err = marvell_config_aneg_fiber(phydev);
605 	if (err < 0)
606 		goto error;
607 
608 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
609 
610 error:
611 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
612 	return err;
613 }
614 
615 static void marvell_config_led(struct phy_device *phydev)
616 {
617 	u16 def_config;
618 	int err;
619 
620 	switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
621 	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
622 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
623 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
624 		def_config = MII_88E1121_PHY_LED_DEF;
625 		break;
626 	/* Default PHY LED config:
627 	 * LED[0] .. 1000Mbps Link
628 	 * LED[1] .. 100Mbps Link
629 	 * LED[2] .. Blink, Activity
630 	 */
631 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
632 		def_config = MII_88E1510_PHY_LED_DEF;
633 		break;
634 	default:
635 		return;
636 	}
637 
638 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
639 			      def_config);
640 	if (err < 0)
641 		phydev_warn(phydev, "Fail to config marvell phy LED.\n");
642 }
643 
644 static int marvell_config_init(struct phy_device *phydev)
645 {
646 	/* Set defalut LED */
647 	marvell_config_led(phydev);
648 
649 	/* Set registers from marvell,reg-init DT property */
650 	return marvell_of_reg_init(phydev);
651 }
652 
653 static int m88e1116r_config_init(struct phy_device *phydev)
654 {
655 	int err;
656 
657 	err = genphy_soft_reset(phydev);
658 	if (err < 0)
659 		return err;
660 
661 	msleep(500);
662 
663 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
664 	if (err < 0)
665 		return err;
666 
667 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
668 	if (err < 0)
669 		return err;
670 
671 	err = marvell_set_downshift(phydev, true, 8);
672 	if (err < 0)
673 		return err;
674 
675 	if (phy_interface_is_rgmii(phydev)) {
676 		err = m88e1121_config_aneg_rgmii_delays(phydev);
677 		if (err < 0)
678 			return err;
679 	}
680 
681 	err = genphy_soft_reset(phydev);
682 	if (err < 0)
683 		return err;
684 
685 	return marvell_config_init(phydev);
686 }
687 
688 static int m88e3016_config_init(struct phy_device *phydev)
689 {
690 	int ret;
691 
692 	/* Enable Scrambler and Auto-Crossover */
693 	ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
694 			 MII_88E3016_DISABLE_SCRAMBLER,
695 			 MII_88E3016_AUTO_MDIX_CROSSOVER);
696 	if (ret < 0)
697 		return ret;
698 
699 	return marvell_config_init(phydev);
700 }
701 
702 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
703 					   u16 mode,
704 					   int fibre_copper_auto)
705 {
706 	if (fibre_copper_auto)
707 		mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
708 
709 	return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
710 			  MII_M1111_HWCFG_MODE_MASK |
711 			  MII_M1111_HWCFG_FIBER_COPPER_AUTO |
712 			  MII_M1111_HWCFG_FIBER_COPPER_RES,
713 			  mode);
714 }
715 
716 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
717 {
718 	int delay;
719 
720 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
721 		delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
722 	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
723 		delay = MII_M1111_RGMII_RX_DELAY;
724 	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
725 		delay = MII_M1111_RGMII_TX_DELAY;
726 	} else {
727 		delay = 0;
728 	}
729 
730 	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
731 			  MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
732 			  delay);
733 }
734 
735 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
736 {
737 	int temp;
738 	int err;
739 
740 	err = m88e1111_config_init_rgmii_delays(phydev);
741 	if (err < 0)
742 		return err;
743 
744 	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
745 	if (temp < 0)
746 		return temp;
747 
748 	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
749 
750 	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
751 		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
752 	else
753 		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
754 
755 	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
756 }
757 
758 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
759 {
760 	int err;
761 
762 	err = m88e1111_config_init_hwcfg_mode(
763 		phydev,
764 		MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
765 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
766 	if (err < 0)
767 		return err;
768 
769 	/* make sure copper is selected */
770 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
771 }
772 
773 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
774 {
775 	int err;
776 
777 	err = m88e1111_config_init_rgmii_delays(phydev);
778 	if (err < 0)
779 		return err;
780 
781 	err = m88e1111_config_init_hwcfg_mode(
782 		phydev,
783 		MII_M1111_HWCFG_MODE_RTBI,
784 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
785 	if (err < 0)
786 		return err;
787 
788 	/* soft reset */
789 	err = genphy_soft_reset(phydev);
790 	if (err < 0)
791 		return err;
792 
793 	return m88e1111_config_init_hwcfg_mode(
794 		phydev,
795 		MII_M1111_HWCFG_MODE_RTBI,
796 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
797 }
798 
799 static int m88e1111_config_init(struct phy_device *phydev)
800 {
801 	int err;
802 
803 	if (phy_interface_is_rgmii(phydev)) {
804 		err = m88e1111_config_init_rgmii(phydev);
805 		if (err < 0)
806 			return err;
807 	}
808 
809 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
810 		err = m88e1111_config_init_sgmii(phydev);
811 		if (err < 0)
812 			return err;
813 	}
814 
815 	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
816 		err = m88e1111_config_init_rtbi(phydev);
817 		if (err < 0)
818 			return err;
819 	}
820 
821 	err = marvell_of_reg_init(phydev);
822 	if (err < 0)
823 		return err;
824 
825 	return genphy_soft_reset(phydev);
826 }
827 
828 static int m88e1318_config_init(struct phy_device *phydev)
829 {
830 	if (phy_interrupt_is_valid(phydev)) {
831 		int err = phy_modify_paged(
832 			phydev, MII_MARVELL_LED_PAGE,
833 			MII_88E1318S_PHY_LED_TCR,
834 			MII_88E1318S_PHY_LED_TCR_FORCE_INT,
835 			MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
836 			MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
837 		if (err < 0)
838 			return err;
839 	}
840 
841 	return marvell_config_init(phydev);
842 }
843 
844 static int m88e1510_config_init(struct phy_device *phydev)
845 {
846 	int err;
847 
848 	/* SGMII-to-Copper mode initialization */
849 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
850 
851 		/* Select page 18 */
852 		err = marvell_set_page(phydev, 18);
853 		if (err < 0)
854 			return err;
855 
856 		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
857 		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
858 				 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
859 				 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
860 		if (err < 0)
861 			return err;
862 
863 		/* PHY reset is necessary after changing MODE[2:0] */
864 		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
865 				 MII_88E1510_GEN_CTRL_REG_1_RESET);
866 		if (err < 0)
867 			return err;
868 
869 		/* Reset page selection */
870 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
871 		if (err < 0)
872 			return err;
873 
874 		/* There appears to be a bug in the 88e1512 when used in
875 		 * SGMII to copper mode, where the AN advertisement register
876 		 * clears the pause bits each time a negotiation occurs.
877 		 * This means we can never be truely sure what was advertised,
878 		 * so disable Pause support.
879 		 */
880 		linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
881 				   phydev->supported);
882 		linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
883 				   phydev->supported);
884 		linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
885 				   phydev->advertising);
886 		linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
887 				   phydev->advertising);
888 	}
889 
890 	return m88e1318_config_init(phydev);
891 }
892 
893 static int m88e1118_config_aneg(struct phy_device *phydev)
894 {
895 	int err;
896 
897 	err = genphy_soft_reset(phydev);
898 	if (err < 0)
899 		return err;
900 
901 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
902 	if (err < 0)
903 		return err;
904 
905 	err = genphy_config_aneg(phydev);
906 	return 0;
907 }
908 
909 static int m88e1118_config_init(struct phy_device *phydev)
910 {
911 	int err;
912 
913 	/* Change address */
914 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
915 	if (err < 0)
916 		return err;
917 
918 	/* Enable 1000 Mbit */
919 	err = phy_write(phydev, 0x15, 0x1070);
920 	if (err < 0)
921 		return err;
922 
923 	/* Change address */
924 	err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
925 	if (err < 0)
926 		return err;
927 
928 	/* Adjust LED Control */
929 	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
930 		err = phy_write(phydev, 0x10, 0x1100);
931 	else
932 		err = phy_write(phydev, 0x10, 0x021e);
933 	if (err < 0)
934 		return err;
935 
936 	err = marvell_of_reg_init(phydev);
937 	if (err < 0)
938 		return err;
939 
940 	/* Reset address */
941 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
942 	if (err < 0)
943 		return err;
944 
945 	return genphy_soft_reset(phydev);
946 }
947 
948 static int m88e1149_config_init(struct phy_device *phydev)
949 {
950 	int err;
951 
952 	/* Change address */
953 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
954 	if (err < 0)
955 		return err;
956 
957 	/* Enable 1000 Mbit */
958 	err = phy_write(phydev, 0x15, 0x1048);
959 	if (err < 0)
960 		return err;
961 
962 	err = marvell_of_reg_init(phydev);
963 	if (err < 0)
964 		return err;
965 
966 	/* Reset address */
967 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
968 	if (err < 0)
969 		return err;
970 
971 	return genphy_soft_reset(phydev);
972 }
973 
974 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
975 {
976 	int err;
977 
978 	err = m88e1111_config_init_rgmii_delays(phydev);
979 	if (err < 0)
980 		return err;
981 
982 	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
983 		err = phy_write(phydev, 0x1d, 0x0012);
984 		if (err < 0)
985 			return err;
986 
987 		err = phy_modify(phydev, 0x1e, 0x0fc0,
988 				 2 << 9 | /* 36 ohm */
989 				 2 << 6); /* 39 ohm */
990 		if (err < 0)
991 			return err;
992 
993 		err = phy_write(phydev, 0x1d, 0x3);
994 		if (err < 0)
995 			return err;
996 
997 		err = phy_write(phydev, 0x1e, 0x8000);
998 	}
999 	return err;
1000 }
1001 
1002 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1003 {
1004 	return m88e1111_config_init_hwcfg_mode(
1005 		phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1006 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1007 }
1008 
1009 static int m88e1145_config_init(struct phy_device *phydev)
1010 {
1011 	int err;
1012 
1013 	/* Take care of errata E0 & E1 */
1014 	err = phy_write(phydev, 0x1d, 0x001b);
1015 	if (err < 0)
1016 		return err;
1017 
1018 	err = phy_write(phydev, 0x1e, 0x418f);
1019 	if (err < 0)
1020 		return err;
1021 
1022 	err = phy_write(phydev, 0x1d, 0x0016);
1023 	if (err < 0)
1024 		return err;
1025 
1026 	err = phy_write(phydev, 0x1e, 0xa2da);
1027 	if (err < 0)
1028 		return err;
1029 
1030 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1031 		err = m88e1145_config_init_rgmii(phydev);
1032 		if (err < 0)
1033 			return err;
1034 	}
1035 
1036 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1037 		err = m88e1145_config_init_sgmii(phydev);
1038 		if (err < 0)
1039 			return err;
1040 	}
1041 
1042 	err = marvell_of_reg_init(phydev);
1043 	if (err < 0)
1044 		return err;
1045 
1046 	return 0;
1047 }
1048 
1049 /* The VOD can be out of specification on link up. Poke an
1050  * undocumented register, in an undocumented page, with a magic value
1051  * to fix this.
1052  */
1053 static int m88e6390_errata(struct phy_device *phydev)
1054 {
1055 	int err;
1056 
1057 	err = phy_write(phydev, MII_BMCR,
1058 			BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1059 	if (err)
1060 		return err;
1061 
1062 	usleep_range(300, 400);
1063 
1064 	err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1065 	if (err)
1066 		return err;
1067 
1068 	return genphy_soft_reset(phydev);
1069 }
1070 
1071 static int m88e6390_config_aneg(struct phy_device *phydev)
1072 {
1073 	int err;
1074 
1075 	err = m88e6390_errata(phydev);
1076 	if (err)
1077 		return err;
1078 
1079 	return m88e1510_config_aneg(phydev);
1080 }
1081 
1082 /**
1083  * fiber_lpa_mod_linkmode_lpa_t
1084  * @advertising: the linkmode advertisement settings
1085  * @lpa: value of the MII_LPA register for fiber link
1086  *
1087  * A small helper function that translates MII_LPA bits to linkmode LP
1088  * advertisement settings. Other bits in advertising are left
1089  * unchanged.
1090  */
1091 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1092 {
1093 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1094 			 advertising, lpa & LPA_FIBER_1000HALF);
1095 
1096 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1097 			 advertising, lpa & LPA_FIBER_1000FULL);
1098 }
1099 
1100 /**
1101  * marvell_update_link - update link status in real time in @phydev
1102  * @phydev: target phy_device struct
1103  *
1104  * Description: Update the value in phydev->link to reflect the
1105  *   current link value.
1106  */
1107 static int marvell_update_link(struct phy_device *phydev, int fiber)
1108 {
1109 	int status;
1110 
1111 	/* Use the generic register for copper link, or specific
1112 	 * register for fiber case
1113 	 */
1114 	if (fiber) {
1115 		status = phy_read(phydev, MII_M1011_PHY_STATUS);
1116 		if (status < 0)
1117 			return status;
1118 
1119 		if ((status & REGISTER_LINK_STATUS) == 0)
1120 			phydev->link = 0;
1121 		else
1122 			phydev->link = 1;
1123 	} else {
1124 		return genphy_update_link(phydev);
1125 	}
1126 
1127 	return 0;
1128 }
1129 
1130 static int marvell_read_status_page_an(struct phy_device *phydev,
1131 				       int fiber)
1132 {
1133 	int status;
1134 	int lpa;
1135 	int lpagb;
1136 
1137 	status = phy_read(phydev, MII_M1011_PHY_STATUS);
1138 	if (status < 0)
1139 		return status;
1140 
1141 	lpa = phy_read(phydev, MII_LPA);
1142 	if (lpa < 0)
1143 		return lpa;
1144 
1145 	lpagb = phy_read(phydev, MII_STAT1000);
1146 	if (lpagb < 0)
1147 		return lpagb;
1148 
1149 	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1150 		phydev->duplex = DUPLEX_FULL;
1151 	else
1152 		phydev->duplex = DUPLEX_HALF;
1153 
1154 	status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1155 	phydev->pause = 0;
1156 	phydev->asym_pause = 0;
1157 
1158 	switch (status) {
1159 	case MII_M1011_PHY_STATUS_1000:
1160 		phydev->speed = SPEED_1000;
1161 		break;
1162 
1163 	case MII_M1011_PHY_STATUS_100:
1164 		phydev->speed = SPEED_100;
1165 		break;
1166 
1167 	default:
1168 		phydev->speed = SPEED_10;
1169 		break;
1170 	}
1171 
1172 	if (!fiber) {
1173 		mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa);
1174 		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb);
1175 
1176 		if (phydev->duplex == DUPLEX_FULL) {
1177 			phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1178 			phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1179 		}
1180 	} else {
1181 		/* The fiber link is only 1000M capable */
1182 		fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1183 
1184 		if (phydev->duplex == DUPLEX_FULL) {
1185 			if (!(lpa & LPA_PAUSE_FIBER)) {
1186 				phydev->pause = 0;
1187 				phydev->asym_pause = 0;
1188 			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1189 				phydev->pause = 1;
1190 				phydev->asym_pause = 1;
1191 			} else {
1192 				phydev->pause = 1;
1193 				phydev->asym_pause = 0;
1194 			}
1195 		}
1196 	}
1197 	return 0;
1198 }
1199 
1200 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1201 {
1202 	int bmcr = phy_read(phydev, MII_BMCR);
1203 
1204 	if (bmcr < 0)
1205 		return bmcr;
1206 
1207 	if (bmcr & BMCR_FULLDPLX)
1208 		phydev->duplex = DUPLEX_FULL;
1209 	else
1210 		phydev->duplex = DUPLEX_HALF;
1211 
1212 	if (bmcr & BMCR_SPEED1000)
1213 		phydev->speed = SPEED_1000;
1214 	else if (bmcr & BMCR_SPEED100)
1215 		phydev->speed = SPEED_100;
1216 	else
1217 		phydev->speed = SPEED_10;
1218 
1219 	phydev->pause = 0;
1220 	phydev->asym_pause = 0;
1221 	linkmode_zero(phydev->lp_advertising);
1222 
1223 	return 0;
1224 }
1225 
1226 /* marvell_read_status_page
1227  *
1228  * Description:
1229  *   Check the link, then figure out the current state
1230  *   by comparing what we advertise with what the link partner
1231  *   advertises.  Start by checking the gigabit possibilities,
1232  *   then move on to 10/100.
1233  */
1234 static int marvell_read_status_page(struct phy_device *phydev, int page)
1235 {
1236 	int fiber;
1237 	int err;
1238 
1239 	/* Detect and update the link, but return if there
1240 	 * was an error
1241 	 */
1242 	if (page == MII_MARVELL_FIBER_PAGE)
1243 		fiber = 1;
1244 	else
1245 		fiber = 0;
1246 
1247 	err = marvell_update_link(phydev, fiber);
1248 	if (err)
1249 		return err;
1250 
1251 	if (phydev->autoneg == AUTONEG_ENABLE)
1252 		err = marvell_read_status_page_an(phydev, fiber);
1253 	else
1254 		err = marvell_read_status_page_fixed(phydev);
1255 
1256 	return err;
1257 }
1258 
1259 /* marvell_read_status
1260  *
1261  * Some Marvell's phys have two modes: fiber and copper.
1262  * Both need status checked.
1263  * Description:
1264  *   First, check the fiber link and status.
1265  *   If the fiber link is down, check the copper link and status which
1266  *   will be the default value if both link are down.
1267  */
1268 static int marvell_read_status(struct phy_device *phydev)
1269 {
1270 	int err;
1271 
1272 	/* Check the fiber mode first */
1273 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1274 			      phydev->supported) &&
1275 	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1276 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1277 		if (err < 0)
1278 			goto error;
1279 
1280 		err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1281 		if (err < 0)
1282 			goto error;
1283 
1284 		/* If the fiber link is up, it is the selected and
1285 		 * used link. In this case, we need to stay in the
1286 		 * fiber page. Please to be careful about that, avoid
1287 		 * to restore Copper page in other functions which
1288 		 * could break the behaviour for some fiber phy like
1289 		 * 88E1512.
1290 		 */
1291 		if (phydev->link)
1292 			return 0;
1293 
1294 		/* If fiber link is down, check and save copper mode state */
1295 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1296 		if (err < 0)
1297 			goto error;
1298 	}
1299 
1300 	return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1301 
1302 error:
1303 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1304 	return err;
1305 }
1306 
1307 /* marvell_suspend
1308  *
1309  * Some Marvell's phys have two modes: fiber and copper.
1310  * Both need to be suspended
1311  */
1312 static int marvell_suspend(struct phy_device *phydev)
1313 {
1314 	int err;
1315 
1316 	/* Suspend the fiber mode first */
1317 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1318 			       phydev->supported)) {
1319 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1320 		if (err < 0)
1321 			goto error;
1322 
1323 		/* With the page set, use the generic suspend */
1324 		err = genphy_suspend(phydev);
1325 		if (err < 0)
1326 			goto error;
1327 
1328 		/* Then, the copper link */
1329 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1330 		if (err < 0)
1331 			goto error;
1332 	}
1333 
1334 	/* With the page set, use the generic suspend */
1335 	return genphy_suspend(phydev);
1336 
1337 error:
1338 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1339 	return err;
1340 }
1341 
1342 /* marvell_resume
1343  *
1344  * Some Marvell's phys have two modes: fiber and copper.
1345  * Both need to be resumed
1346  */
1347 static int marvell_resume(struct phy_device *phydev)
1348 {
1349 	int err;
1350 
1351 	/* Resume the fiber mode first */
1352 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1353 			       phydev->supported)) {
1354 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1355 		if (err < 0)
1356 			goto error;
1357 
1358 		/* With the page set, use the generic resume */
1359 		err = genphy_resume(phydev);
1360 		if (err < 0)
1361 			goto error;
1362 
1363 		/* Then, the copper link */
1364 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1365 		if (err < 0)
1366 			goto error;
1367 	}
1368 
1369 	/* With the page set, use the generic resume */
1370 	return genphy_resume(phydev);
1371 
1372 error:
1373 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1374 	return err;
1375 }
1376 
1377 static int marvell_aneg_done(struct phy_device *phydev)
1378 {
1379 	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1380 
1381 	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1382 }
1383 
1384 static int m88e1121_did_interrupt(struct phy_device *phydev)
1385 {
1386 	int imask;
1387 
1388 	imask = phy_read(phydev, MII_M1011_IEVENT);
1389 
1390 	if (imask & MII_M1011_IMASK_INIT)
1391 		return 1;
1392 
1393 	return 0;
1394 }
1395 
1396 static void m88e1318_get_wol(struct phy_device *phydev,
1397 			     struct ethtool_wolinfo *wol)
1398 {
1399 	int oldpage, ret = 0;
1400 
1401 	wol->supported = WAKE_MAGIC;
1402 	wol->wolopts = 0;
1403 
1404 	oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1405 	if (oldpage < 0)
1406 		goto error;
1407 
1408 	ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1409 	if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1410 		wol->wolopts |= WAKE_MAGIC;
1411 
1412 error:
1413 	phy_restore_page(phydev, oldpage, ret);
1414 }
1415 
1416 static int m88e1318_set_wol(struct phy_device *phydev,
1417 			    struct ethtool_wolinfo *wol)
1418 {
1419 	int err = 0, oldpage;
1420 
1421 	oldpage = phy_save_page(phydev);
1422 	if (oldpage < 0)
1423 		goto error;
1424 
1425 	if (wol->wolopts & WAKE_MAGIC) {
1426 		/* Explicitly switch to page 0x00, just to be sure */
1427 		err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1428 		if (err < 0)
1429 			goto error;
1430 
1431 		/* If WOL event happened once, the LED[2] interrupt pin
1432 		 * will not be cleared unless we reading the interrupt status
1433 		 * register. If interrupts are in use, the normal interrupt
1434 		 * handling will clear the WOL event. Clear the WOL event
1435 		 * before enabling it if !phy_interrupt_is_valid()
1436 		 */
1437 		if (!phy_interrupt_is_valid(phydev))
1438 			__phy_read(phydev, MII_M1011_IEVENT);
1439 
1440 		/* Enable the WOL interrupt */
1441 		err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1442 				   MII_88E1318S_PHY_CSIER_WOL_EIE);
1443 		if (err < 0)
1444 			goto error;
1445 
1446 		err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1447 		if (err < 0)
1448 			goto error;
1449 
1450 		/* Setup LED[2] as interrupt pin (active low) */
1451 		err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1452 				   MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1453 				   MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1454 				   MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1455 		if (err < 0)
1456 			goto error;
1457 
1458 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1459 		if (err < 0)
1460 			goto error;
1461 
1462 		/* Store the device address for the magic packet */
1463 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1464 				((phydev->attached_dev->dev_addr[5] << 8) |
1465 				 phydev->attached_dev->dev_addr[4]));
1466 		if (err < 0)
1467 			goto error;
1468 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1469 				((phydev->attached_dev->dev_addr[3] << 8) |
1470 				 phydev->attached_dev->dev_addr[2]));
1471 		if (err < 0)
1472 			goto error;
1473 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1474 				((phydev->attached_dev->dev_addr[1] << 8) |
1475 				 phydev->attached_dev->dev_addr[0]));
1476 		if (err < 0)
1477 			goto error;
1478 
1479 		/* Clear WOL status and enable magic packet matching */
1480 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1481 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1482 				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1483 		if (err < 0)
1484 			goto error;
1485 	} else {
1486 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1487 		if (err < 0)
1488 			goto error;
1489 
1490 		/* Clear WOL status and disable magic packet matching */
1491 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1492 				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1493 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1494 		if (err < 0)
1495 			goto error;
1496 	}
1497 
1498 error:
1499 	return phy_restore_page(phydev, oldpage, err);
1500 }
1501 
1502 static int marvell_get_sset_count(struct phy_device *phydev)
1503 {
1504 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1505 			      phydev->supported))
1506 		return ARRAY_SIZE(marvell_hw_stats);
1507 	else
1508 		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1509 }
1510 
1511 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1512 {
1513 	int i;
1514 
1515 	for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1516 		strlcpy(data + i * ETH_GSTRING_LEN,
1517 			marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1518 	}
1519 }
1520 
1521 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1522 {
1523 	struct marvell_hw_stat stat = marvell_hw_stats[i];
1524 	struct marvell_priv *priv = phydev->priv;
1525 	int val;
1526 	u64 ret;
1527 
1528 	val = phy_read_paged(phydev, stat.page, stat.reg);
1529 	if (val < 0) {
1530 		ret = U64_MAX;
1531 	} else {
1532 		val = val & ((1 << stat.bits) - 1);
1533 		priv->stats[i] += val;
1534 		ret = priv->stats[i];
1535 	}
1536 
1537 	return ret;
1538 }
1539 
1540 static void marvell_get_stats(struct phy_device *phydev,
1541 			      struct ethtool_stats *stats, u64 *data)
1542 {
1543 	int i;
1544 
1545 	for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1546 		data[i] = marvell_get_stat(phydev, i);
1547 }
1548 
1549 #ifdef CONFIG_HWMON
1550 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1551 {
1552 	int oldpage;
1553 	int ret = 0;
1554 	int val;
1555 
1556 	*temp = 0;
1557 
1558 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1559 	if (oldpage < 0)
1560 		goto error;
1561 
1562 	/* Enable temperature sensor */
1563 	ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1564 	if (ret < 0)
1565 		goto error;
1566 
1567 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1568 			  ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1569 	if (ret < 0)
1570 		goto error;
1571 
1572 	/* Wait for temperature to stabilize */
1573 	usleep_range(10000, 12000);
1574 
1575 	val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1576 	if (val < 0) {
1577 		ret = val;
1578 		goto error;
1579 	}
1580 
1581 	/* Disable temperature sensor */
1582 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1583 			  ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1584 	if (ret < 0)
1585 		goto error;
1586 
1587 	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1588 
1589 error:
1590 	return phy_restore_page(phydev, oldpage, ret);
1591 }
1592 
1593 static int m88e1121_hwmon_read(struct device *dev,
1594 			       enum hwmon_sensor_types type,
1595 			       u32 attr, int channel, long *temp)
1596 {
1597 	struct phy_device *phydev = dev_get_drvdata(dev);
1598 	int err;
1599 
1600 	switch (attr) {
1601 	case hwmon_temp_input:
1602 		err = m88e1121_get_temp(phydev, temp);
1603 		break;
1604 	default:
1605 		return -EOPNOTSUPP;
1606 	}
1607 
1608 	return err;
1609 }
1610 
1611 static umode_t m88e1121_hwmon_is_visible(const void *data,
1612 					 enum hwmon_sensor_types type,
1613 					 u32 attr, int channel)
1614 {
1615 	if (type != hwmon_temp)
1616 		return 0;
1617 
1618 	switch (attr) {
1619 	case hwmon_temp_input:
1620 		return 0444;
1621 	default:
1622 		return 0;
1623 	}
1624 }
1625 
1626 static u32 m88e1121_hwmon_chip_config[] = {
1627 	HWMON_C_REGISTER_TZ,
1628 	0
1629 };
1630 
1631 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1632 	.type = hwmon_chip,
1633 	.config = m88e1121_hwmon_chip_config,
1634 };
1635 
1636 static u32 m88e1121_hwmon_temp_config[] = {
1637 	HWMON_T_INPUT,
1638 	0
1639 };
1640 
1641 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1642 	.type = hwmon_temp,
1643 	.config = m88e1121_hwmon_temp_config,
1644 };
1645 
1646 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1647 	&m88e1121_hwmon_chip,
1648 	&m88e1121_hwmon_temp,
1649 	NULL
1650 };
1651 
1652 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1653 	.is_visible = m88e1121_hwmon_is_visible,
1654 	.read = m88e1121_hwmon_read,
1655 };
1656 
1657 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1658 	.ops = &m88e1121_hwmon_hwmon_ops,
1659 	.info = m88e1121_hwmon_info,
1660 };
1661 
1662 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1663 {
1664 	int ret;
1665 
1666 	*temp = 0;
1667 
1668 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1669 			     MII_88E1510_TEMP_SENSOR);
1670 	if (ret < 0)
1671 		return ret;
1672 
1673 	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1674 
1675 	return 0;
1676 }
1677 
1678 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1679 {
1680 	int ret;
1681 
1682 	*temp = 0;
1683 
1684 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1685 			     MII_88E1121_MISC_TEST);
1686 	if (ret < 0)
1687 		return ret;
1688 
1689 	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1690 		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1691 	/* convert to mC */
1692 	*temp *= 1000;
1693 
1694 	return 0;
1695 }
1696 
1697 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1698 {
1699 	temp = temp / 1000;
1700 	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1701 
1702 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1703 				MII_88E1121_MISC_TEST,
1704 				MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1705 				temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1706 }
1707 
1708 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1709 {
1710 	int ret;
1711 
1712 	*alarm = false;
1713 
1714 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1715 			     MII_88E1121_MISC_TEST);
1716 	if (ret < 0)
1717 		return ret;
1718 
1719 	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1720 
1721 	return 0;
1722 }
1723 
1724 static int m88e1510_hwmon_read(struct device *dev,
1725 			       enum hwmon_sensor_types type,
1726 			       u32 attr, int channel, long *temp)
1727 {
1728 	struct phy_device *phydev = dev_get_drvdata(dev);
1729 	int err;
1730 
1731 	switch (attr) {
1732 	case hwmon_temp_input:
1733 		err = m88e1510_get_temp(phydev, temp);
1734 		break;
1735 	case hwmon_temp_crit:
1736 		err = m88e1510_get_temp_critical(phydev, temp);
1737 		break;
1738 	case hwmon_temp_max_alarm:
1739 		err = m88e1510_get_temp_alarm(phydev, temp);
1740 		break;
1741 	default:
1742 		return -EOPNOTSUPP;
1743 	}
1744 
1745 	return err;
1746 }
1747 
1748 static int m88e1510_hwmon_write(struct device *dev,
1749 				enum hwmon_sensor_types type,
1750 				u32 attr, int channel, long temp)
1751 {
1752 	struct phy_device *phydev = dev_get_drvdata(dev);
1753 	int err;
1754 
1755 	switch (attr) {
1756 	case hwmon_temp_crit:
1757 		err = m88e1510_set_temp_critical(phydev, temp);
1758 		break;
1759 	default:
1760 		return -EOPNOTSUPP;
1761 	}
1762 	return err;
1763 }
1764 
1765 static umode_t m88e1510_hwmon_is_visible(const void *data,
1766 					 enum hwmon_sensor_types type,
1767 					 u32 attr, int channel)
1768 {
1769 	if (type != hwmon_temp)
1770 		return 0;
1771 
1772 	switch (attr) {
1773 	case hwmon_temp_input:
1774 	case hwmon_temp_max_alarm:
1775 		return 0444;
1776 	case hwmon_temp_crit:
1777 		return 0644;
1778 	default:
1779 		return 0;
1780 	}
1781 }
1782 
1783 static u32 m88e1510_hwmon_temp_config[] = {
1784 	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1785 	0
1786 };
1787 
1788 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1789 	.type = hwmon_temp,
1790 	.config = m88e1510_hwmon_temp_config,
1791 };
1792 
1793 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1794 	&m88e1121_hwmon_chip,
1795 	&m88e1510_hwmon_temp,
1796 	NULL
1797 };
1798 
1799 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1800 	.is_visible = m88e1510_hwmon_is_visible,
1801 	.read = m88e1510_hwmon_read,
1802 	.write = m88e1510_hwmon_write,
1803 };
1804 
1805 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1806 	.ops = &m88e1510_hwmon_hwmon_ops,
1807 	.info = m88e1510_hwmon_info,
1808 };
1809 
1810 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1811 {
1812 	int sum = 0;
1813 	int oldpage;
1814 	int ret = 0;
1815 	int i;
1816 
1817 	*temp = 0;
1818 
1819 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1820 	if (oldpage < 0)
1821 		goto error;
1822 
1823 	/* Enable temperature sensor */
1824 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1825 	if (ret < 0)
1826 		goto error;
1827 
1828 	ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1829 	ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1830 		MII_88E6390_MISC_TEST_SAMPLE_1S;
1831 
1832 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1833 	if (ret < 0)
1834 		goto error;
1835 
1836 	/* Wait for temperature to stabilize */
1837 	usleep_range(10000, 12000);
1838 
1839 	/* Reading the temperature sense has an errata. You need to read
1840 	 * a number of times and take an average.
1841 	 */
1842 	for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1843 		ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1844 		if (ret < 0)
1845 			goto error;
1846 		sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1847 	}
1848 
1849 	sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1850 	*temp = (sum  - 75) * 1000;
1851 
1852 	/* Disable temperature sensor */
1853 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1854 	if (ret < 0)
1855 		goto error;
1856 
1857 	ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1858 	ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1859 
1860 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1861 
1862 error:
1863 	phy_restore_page(phydev, oldpage, ret);
1864 
1865 	return ret;
1866 }
1867 
1868 static int m88e6390_hwmon_read(struct device *dev,
1869 			       enum hwmon_sensor_types type,
1870 			       u32 attr, int channel, long *temp)
1871 {
1872 	struct phy_device *phydev = dev_get_drvdata(dev);
1873 	int err;
1874 
1875 	switch (attr) {
1876 	case hwmon_temp_input:
1877 		err = m88e6390_get_temp(phydev, temp);
1878 		break;
1879 	default:
1880 		return -EOPNOTSUPP;
1881 	}
1882 
1883 	return err;
1884 }
1885 
1886 static umode_t m88e6390_hwmon_is_visible(const void *data,
1887 					 enum hwmon_sensor_types type,
1888 					 u32 attr, int channel)
1889 {
1890 	if (type != hwmon_temp)
1891 		return 0;
1892 
1893 	switch (attr) {
1894 	case hwmon_temp_input:
1895 		return 0444;
1896 	default:
1897 		return 0;
1898 	}
1899 }
1900 
1901 static u32 m88e6390_hwmon_temp_config[] = {
1902 	HWMON_T_INPUT,
1903 	0
1904 };
1905 
1906 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1907 	.type = hwmon_temp,
1908 	.config = m88e6390_hwmon_temp_config,
1909 };
1910 
1911 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1912 	&m88e1121_hwmon_chip,
1913 	&m88e6390_hwmon_temp,
1914 	NULL
1915 };
1916 
1917 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
1918 	.is_visible = m88e6390_hwmon_is_visible,
1919 	.read = m88e6390_hwmon_read,
1920 };
1921 
1922 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
1923 	.ops = &m88e6390_hwmon_hwmon_ops,
1924 	.info = m88e6390_hwmon_info,
1925 };
1926 
1927 static int marvell_hwmon_name(struct phy_device *phydev)
1928 {
1929 	struct marvell_priv *priv = phydev->priv;
1930 	struct device *dev = &phydev->mdio.dev;
1931 	const char *devname = dev_name(dev);
1932 	size_t len = strlen(devname);
1933 	int i, j;
1934 
1935 	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1936 	if (!priv->hwmon_name)
1937 		return -ENOMEM;
1938 
1939 	for (i = j = 0; i < len && devname[i]; i++) {
1940 		if (isalnum(devname[i]))
1941 			priv->hwmon_name[j++] = devname[i];
1942 	}
1943 
1944 	return 0;
1945 }
1946 
1947 static int marvell_hwmon_probe(struct phy_device *phydev,
1948 			       const struct hwmon_chip_info *chip)
1949 {
1950 	struct marvell_priv *priv = phydev->priv;
1951 	struct device *dev = &phydev->mdio.dev;
1952 	int err;
1953 
1954 	err = marvell_hwmon_name(phydev);
1955 	if (err)
1956 		return err;
1957 
1958 	priv->hwmon_dev = devm_hwmon_device_register_with_info(
1959 		dev, priv->hwmon_name, phydev, chip, NULL);
1960 
1961 	return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1962 }
1963 
1964 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1965 {
1966 	return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1967 }
1968 
1969 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1970 {
1971 	return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1972 }
1973 
1974 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1975 {
1976 	return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
1977 }
1978 #else
1979 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1980 {
1981 	return 0;
1982 }
1983 
1984 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1985 {
1986 	return 0;
1987 }
1988 
1989 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1990 {
1991 	return 0;
1992 }
1993 #endif
1994 
1995 static int marvell_probe(struct phy_device *phydev)
1996 {
1997 	struct marvell_priv *priv;
1998 
1999 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2000 	if (!priv)
2001 		return -ENOMEM;
2002 
2003 	phydev->priv = priv;
2004 
2005 	return 0;
2006 }
2007 
2008 static int m88e1121_probe(struct phy_device *phydev)
2009 {
2010 	int err;
2011 
2012 	err = marvell_probe(phydev);
2013 	if (err)
2014 		return err;
2015 
2016 	return m88e1121_hwmon_probe(phydev);
2017 }
2018 
2019 static int m88e1510_probe(struct phy_device *phydev)
2020 {
2021 	int err;
2022 
2023 	err = marvell_probe(phydev);
2024 	if (err)
2025 		return err;
2026 
2027 	return m88e1510_hwmon_probe(phydev);
2028 }
2029 
2030 static int m88e6390_probe(struct phy_device *phydev)
2031 {
2032 	int err;
2033 
2034 	err = marvell_probe(phydev);
2035 	if (err)
2036 		return err;
2037 
2038 	return m88e6390_hwmon_probe(phydev);
2039 }
2040 
2041 static struct phy_driver marvell_drivers[] = {
2042 	{
2043 		.phy_id = MARVELL_PHY_ID_88E1101,
2044 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2045 		.name = "Marvell 88E1101",
2046 		.features = PHY_GBIT_FEATURES,
2047 		.probe = marvell_probe,
2048 		.config_init = &marvell_config_init,
2049 		.config_aneg = &m88e1101_config_aneg,
2050 		.ack_interrupt = &marvell_ack_interrupt,
2051 		.config_intr = &marvell_config_intr,
2052 		.resume = &genphy_resume,
2053 		.suspend = &genphy_suspend,
2054 		.read_page = marvell_read_page,
2055 		.write_page = marvell_write_page,
2056 		.get_sset_count = marvell_get_sset_count,
2057 		.get_strings = marvell_get_strings,
2058 		.get_stats = marvell_get_stats,
2059 	},
2060 	{
2061 		.phy_id = MARVELL_PHY_ID_88E1112,
2062 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2063 		.name = "Marvell 88E1112",
2064 		.features = PHY_GBIT_FEATURES,
2065 		.probe = marvell_probe,
2066 		.config_init = &m88e1111_config_init,
2067 		.config_aneg = &marvell_config_aneg,
2068 		.ack_interrupt = &marvell_ack_interrupt,
2069 		.config_intr = &marvell_config_intr,
2070 		.resume = &genphy_resume,
2071 		.suspend = &genphy_suspend,
2072 		.read_page = marvell_read_page,
2073 		.write_page = marvell_write_page,
2074 		.get_sset_count = marvell_get_sset_count,
2075 		.get_strings = marvell_get_strings,
2076 		.get_stats = marvell_get_stats,
2077 	},
2078 	{
2079 		.phy_id = MARVELL_PHY_ID_88E1111,
2080 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2081 		.name = "Marvell 88E1111",
2082 		.features = PHY_GBIT_FEATURES,
2083 		.probe = marvell_probe,
2084 		.config_init = &m88e1111_config_init,
2085 		.config_aneg = &marvell_config_aneg,
2086 		.read_status = &marvell_read_status,
2087 		.ack_interrupt = &marvell_ack_interrupt,
2088 		.config_intr = &marvell_config_intr,
2089 		.resume = &genphy_resume,
2090 		.suspend = &genphy_suspend,
2091 		.read_page = marvell_read_page,
2092 		.write_page = marvell_write_page,
2093 		.get_sset_count = marvell_get_sset_count,
2094 		.get_strings = marvell_get_strings,
2095 		.get_stats = marvell_get_stats,
2096 	},
2097 	{
2098 		.phy_id = MARVELL_PHY_ID_88E1118,
2099 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2100 		.name = "Marvell 88E1118",
2101 		.features = PHY_GBIT_FEATURES,
2102 		.probe = marvell_probe,
2103 		.config_init = &m88e1118_config_init,
2104 		.config_aneg = &m88e1118_config_aneg,
2105 		.ack_interrupt = &marvell_ack_interrupt,
2106 		.config_intr = &marvell_config_intr,
2107 		.resume = &genphy_resume,
2108 		.suspend = &genphy_suspend,
2109 		.read_page = marvell_read_page,
2110 		.write_page = marvell_write_page,
2111 		.get_sset_count = marvell_get_sset_count,
2112 		.get_strings = marvell_get_strings,
2113 		.get_stats = marvell_get_stats,
2114 	},
2115 	{
2116 		.phy_id = MARVELL_PHY_ID_88E1121R,
2117 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2118 		.name = "Marvell 88E1121R",
2119 		.features = PHY_GBIT_FEATURES,
2120 		.probe = &m88e1121_probe,
2121 		.config_init = &marvell_config_init,
2122 		.config_aneg = &m88e1121_config_aneg,
2123 		.read_status = &marvell_read_status,
2124 		.ack_interrupt = &marvell_ack_interrupt,
2125 		.config_intr = &marvell_config_intr,
2126 		.did_interrupt = &m88e1121_did_interrupt,
2127 		.resume = &genphy_resume,
2128 		.suspend = &genphy_suspend,
2129 		.read_page = marvell_read_page,
2130 		.write_page = marvell_write_page,
2131 		.get_sset_count = marvell_get_sset_count,
2132 		.get_strings = marvell_get_strings,
2133 		.get_stats = marvell_get_stats,
2134 	},
2135 	{
2136 		.phy_id = MARVELL_PHY_ID_88E1318S,
2137 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2138 		.name = "Marvell 88E1318S",
2139 		.features = PHY_GBIT_FEATURES,
2140 		.probe = marvell_probe,
2141 		.config_init = &m88e1318_config_init,
2142 		.config_aneg = &m88e1318_config_aneg,
2143 		.read_status = &marvell_read_status,
2144 		.ack_interrupt = &marvell_ack_interrupt,
2145 		.config_intr = &marvell_config_intr,
2146 		.did_interrupt = &m88e1121_did_interrupt,
2147 		.get_wol = &m88e1318_get_wol,
2148 		.set_wol = &m88e1318_set_wol,
2149 		.resume = &genphy_resume,
2150 		.suspend = &genphy_suspend,
2151 		.read_page = marvell_read_page,
2152 		.write_page = marvell_write_page,
2153 		.get_sset_count = marvell_get_sset_count,
2154 		.get_strings = marvell_get_strings,
2155 		.get_stats = marvell_get_stats,
2156 	},
2157 	{
2158 		.phy_id = MARVELL_PHY_ID_88E1145,
2159 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2160 		.name = "Marvell 88E1145",
2161 		.features = PHY_GBIT_FEATURES,
2162 		.probe = marvell_probe,
2163 		.config_init = &m88e1145_config_init,
2164 		.config_aneg = &m88e1101_config_aneg,
2165 		.read_status = &genphy_read_status,
2166 		.ack_interrupt = &marvell_ack_interrupt,
2167 		.config_intr = &marvell_config_intr,
2168 		.resume = &genphy_resume,
2169 		.suspend = &genphy_suspend,
2170 		.read_page = marvell_read_page,
2171 		.write_page = marvell_write_page,
2172 		.get_sset_count = marvell_get_sset_count,
2173 		.get_strings = marvell_get_strings,
2174 		.get_stats = marvell_get_stats,
2175 	},
2176 	{
2177 		.phy_id = MARVELL_PHY_ID_88E1149R,
2178 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2179 		.name = "Marvell 88E1149R",
2180 		.features = PHY_GBIT_FEATURES,
2181 		.probe = marvell_probe,
2182 		.config_init = &m88e1149_config_init,
2183 		.config_aneg = &m88e1118_config_aneg,
2184 		.ack_interrupt = &marvell_ack_interrupt,
2185 		.config_intr = &marvell_config_intr,
2186 		.resume = &genphy_resume,
2187 		.suspend = &genphy_suspend,
2188 		.read_page = marvell_read_page,
2189 		.write_page = marvell_write_page,
2190 		.get_sset_count = marvell_get_sset_count,
2191 		.get_strings = marvell_get_strings,
2192 		.get_stats = marvell_get_stats,
2193 	},
2194 	{
2195 		.phy_id = MARVELL_PHY_ID_88E1240,
2196 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2197 		.name = "Marvell 88E1240",
2198 		.features = PHY_GBIT_FEATURES,
2199 		.probe = marvell_probe,
2200 		.config_init = &m88e1111_config_init,
2201 		.config_aneg = &marvell_config_aneg,
2202 		.ack_interrupt = &marvell_ack_interrupt,
2203 		.config_intr = &marvell_config_intr,
2204 		.resume = &genphy_resume,
2205 		.suspend = &genphy_suspend,
2206 		.read_page = marvell_read_page,
2207 		.write_page = marvell_write_page,
2208 		.get_sset_count = marvell_get_sset_count,
2209 		.get_strings = marvell_get_strings,
2210 		.get_stats = marvell_get_stats,
2211 	},
2212 	{
2213 		.phy_id = MARVELL_PHY_ID_88E1116R,
2214 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2215 		.name = "Marvell 88E1116R",
2216 		.features = PHY_GBIT_FEATURES,
2217 		.probe = marvell_probe,
2218 		.config_init = &m88e1116r_config_init,
2219 		.ack_interrupt = &marvell_ack_interrupt,
2220 		.config_intr = &marvell_config_intr,
2221 		.resume = &genphy_resume,
2222 		.suspend = &genphy_suspend,
2223 		.read_page = marvell_read_page,
2224 		.write_page = marvell_write_page,
2225 		.get_sset_count = marvell_get_sset_count,
2226 		.get_strings = marvell_get_strings,
2227 		.get_stats = marvell_get_stats,
2228 	},
2229 	{
2230 		.phy_id = MARVELL_PHY_ID_88E1510,
2231 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2232 		.name = "Marvell 88E1510",
2233 		.features = PHY_GBIT_FIBRE_FEATURES,
2234 		.probe = &m88e1510_probe,
2235 		.config_init = &m88e1510_config_init,
2236 		.config_aneg = &m88e1510_config_aneg,
2237 		.read_status = &marvell_read_status,
2238 		.ack_interrupt = &marvell_ack_interrupt,
2239 		.config_intr = &marvell_config_intr,
2240 		.did_interrupt = &m88e1121_did_interrupt,
2241 		.get_wol = &m88e1318_get_wol,
2242 		.set_wol = &m88e1318_set_wol,
2243 		.resume = &marvell_resume,
2244 		.suspend = &marvell_suspend,
2245 		.read_page = marvell_read_page,
2246 		.write_page = marvell_write_page,
2247 		.get_sset_count = marvell_get_sset_count,
2248 		.get_strings = marvell_get_strings,
2249 		.get_stats = marvell_get_stats,
2250 		.set_loopback = genphy_loopback,
2251 	},
2252 	{
2253 		.phy_id = MARVELL_PHY_ID_88E1540,
2254 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2255 		.name = "Marvell 88E1540",
2256 		.features = PHY_GBIT_FEATURES,
2257 		.probe = m88e1510_probe,
2258 		.config_init = &marvell_config_init,
2259 		.config_aneg = &m88e1510_config_aneg,
2260 		.read_status = &marvell_read_status,
2261 		.ack_interrupt = &marvell_ack_interrupt,
2262 		.config_intr = &marvell_config_intr,
2263 		.did_interrupt = &m88e1121_did_interrupt,
2264 		.resume = &genphy_resume,
2265 		.suspend = &genphy_suspend,
2266 		.read_page = marvell_read_page,
2267 		.write_page = marvell_write_page,
2268 		.get_sset_count = marvell_get_sset_count,
2269 		.get_strings = marvell_get_strings,
2270 		.get_stats = marvell_get_stats,
2271 	},
2272 	{
2273 		.phy_id = MARVELL_PHY_ID_88E1545,
2274 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2275 		.name = "Marvell 88E1545",
2276 		.probe = m88e1510_probe,
2277 		.features = PHY_GBIT_FEATURES,
2278 		.config_init = &marvell_config_init,
2279 		.config_aneg = &m88e1510_config_aneg,
2280 		.read_status = &marvell_read_status,
2281 		.ack_interrupt = &marvell_ack_interrupt,
2282 		.config_intr = &marvell_config_intr,
2283 		.did_interrupt = &m88e1121_did_interrupt,
2284 		.resume = &genphy_resume,
2285 		.suspend = &genphy_suspend,
2286 		.read_page = marvell_read_page,
2287 		.write_page = marvell_write_page,
2288 		.get_sset_count = marvell_get_sset_count,
2289 		.get_strings = marvell_get_strings,
2290 		.get_stats = marvell_get_stats,
2291 	},
2292 	{
2293 		.phy_id = MARVELL_PHY_ID_88E3016,
2294 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2295 		.name = "Marvell 88E3016",
2296 		.features = PHY_BASIC_FEATURES,
2297 		.probe = marvell_probe,
2298 		.config_init = &m88e3016_config_init,
2299 		.aneg_done = &marvell_aneg_done,
2300 		.read_status = &marvell_read_status,
2301 		.ack_interrupt = &marvell_ack_interrupt,
2302 		.config_intr = &marvell_config_intr,
2303 		.did_interrupt = &m88e1121_did_interrupt,
2304 		.resume = &genphy_resume,
2305 		.suspend = &genphy_suspend,
2306 		.read_page = marvell_read_page,
2307 		.write_page = marvell_write_page,
2308 		.get_sset_count = marvell_get_sset_count,
2309 		.get_strings = marvell_get_strings,
2310 		.get_stats = marvell_get_stats,
2311 	},
2312 	{
2313 		.phy_id = MARVELL_PHY_ID_88E6390,
2314 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2315 		.name = "Marvell 88E6390",
2316 		.features = PHY_GBIT_FEATURES,
2317 		.probe = m88e6390_probe,
2318 		.config_init = &marvell_config_init,
2319 		.config_aneg = &m88e6390_config_aneg,
2320 		.read_status = &marvell_read_status,
2321 		.ack_interrupt = &marvell_ack_interrupt,
2322 		.config_intr = &marvell_config_intr,
2323 		.did_interrupt = &m88e1121_did_interrupt,
2324 		.resume = &genphy_resume,
2325 		.suspend = &genphy_suspend,
2326 		.read_page = marvell_read_page,
2327 		.write_page = marvell_write_page,
2328 		.get_sset_count = marvell_get_sset_count,
2329 		.get_strings = marvell_get_strings,
2330 		.get_stats = marvell_get_stats,
2331 	},
2332 };
2333 
2334 module_phy_driver(marvell_drivers);
2335 
2336 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2337 	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2338 	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2339 	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2340 	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2341 	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2342 	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2343 	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2344 	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2345 	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2346 	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2347 	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2348 	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2349 	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2350 	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2351 	{ MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2352 	{ }
2353 };
2354 
2355 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
2356