1a2443fd1SAndrew Lunn // SPDX-License-Identifier: GPL-2.0+ 200db8189SAndy Fleming /* 300db8189SAndy Fleming * drivers/net/phy/marvell.c 400db8189SAndy Fleming * 500db8189SAndy Fleming * Driver for Marvell PHYs 600db8189SAndy Fleming * 700db8189SAndy Fleming * Author: Andy Fleming 800db8189SAndy Fleming * 900db8189SAndy Fleming * Copyright (c) 2004 Freescale Semiconductor, Inc. 1000db8189SAndy Fleming * 113871c387SMichael Stapelberg * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 1200db8189SAndy Fleming */ 1300db8189SAndy Fleming #include <linux/kernel.h> 1400db8189SAndy Fleming #include <linux/string.h> 150b04680fSAndrew Lunn #include <linux/ctype.h> 1600db8189SAndy Fleming #include <linux/errno.h> 1700db8189SAndy Fleming #include <linux/unistd.h> 180b04680fSAndrew Lunn #include <linux/hwmon.h> 1900db8189SAndy Fleming #include <linux/interrupt.h> 2000db8189SAndy Fleming #include <linux/init.h> 2100db8189SAndy Fleming #include <linux/delay.h> 2200db8189SAndy Fleming #include <linux/netdevice.h> 2300db8189SAndy Fleming #include <linux/etherdevice.h> 2400db8189SAndy Fleming #include <linux/skbuff.h> 2500db8189SAndy Fleming #include <linux/spinlock.h> 2600db8189SAndy Fleming #include <linux/mm.h> 2700db8189SAndy Fleming #include <linux/module.h> 2800db8189SAndy Fleming #include <linux/mii.h> 2900db8189SAndy Fleming #include <linux/ethtool.h> 30fc879f72SAndrew Lunn #include <linux/ethtool_netlink.h> 3100db8189SAndy Fleming #include <linux/phy.h> 322f495c39SBenjamin Herrenschmidt #include <linux/marvell_phy.h> 3369f42be8SHeiner Kallweit #include <linux/bitfield.h> 34cf41a51dSDavid Daney #include <linux/of.h> 35b697d9d3SIvan Bornyakov #include <linux/sfp.h> 3600db8189SAndy Fleming 37eea3b201SAvinash Kumar #include <linux/io.h> 3800db8189SAndy Fleming #include <asm/irq.h> 39eea3b201SAvinash Kumar #include <linux/uaccess.h> 4000db8189SAndy Fleming 4127d916d6SDavid Daney #define MII_MARVELL_PHY_PAGE 22 4252295666SAndrew Lunn #define MII_MARVELL_COPPER_PAGE 0x00 4352295666SAndrew Lunn #define MII_MARVELL_FIBER_PAGE 0x01 4452295666SAndrew Lunn #define MII_MARVELL_MSCR_PAGE 0x02 4552295666SAndrew Lunn #define MII_MARVELL_LED_PAGE 0x03 460c9bcc1dSAndrew Lunn #define MII_MARVELL_VCT5_PAGE 0x05 4752295666SAndrew Lunn #define MII_MARVELL_MISC_TEST_PAGE 0x06 48fc879f72SAndrew Lunn #define MII_MARVELL_VCT7_PAGE 0x07 4952295666SAndrew Lunn #define MII_MARVELL_WOL_PAGE 0x11 50b697d9d3SIvan Bornyakov #define MII_MARVELL_MODE_PAGE 0x12 5127d916d6SDavid Daney 5200db8189SAndy Fleming #define MII_M1011_IEVENT 0x13 5300db8189SAndy Fleming #define MII_M1011_IEVENT_CLEAR 0x0000 5400db8189SAndy Fleming 5500db8189SAndy Fleming #define MII_M1011_IMASK 0x12 5600db8189SAndy Fleming #define MII_M1011_IMASK_INIT 0x6400 5700db8189SAndy Fleming #define MII_M1011_IMASK_CLEAR 0x0000 5800db8189SAndy Fleming 5976884679SAndy Fleming #define MII_M1011_PHY_SCR 0x10 60fecd5e91SAndrew Lunn #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 61f8d975beSHeiner Kallweit #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12) 62a3bdfce7SHeiner Kallweit #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8 63fecd5e91SAndrew Lunn #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 64fecd5e91SAndrew Lunn #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 65fecd5e91SAndrew Lunn #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 6676884679SAndy Fleming 67a3bdfce7SHeiner Kallweit #define MII_M1011_PHY_SSR 0x11 68a3bdfce7SHeiner Kallweit #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5) 69a3bdfce7SHeiner Kallweit 7076884679SAndy Fleming #define MII_M1111_PHY_LED_CONTROL 0x18 7176884679SAndy Fleming #define MII_M1111_PHY_LED_DIRECT 0x4100 7276884679SAndy Fleming #define MII_M1111_PHY_LED_COMBINE 0x411c 73895ee682SKim Phillips #define MII_M1111_PHY_EXT_CR 0x14 745c6bc519SHeiner Kallweit #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9) 755c6bc519SHeiner Kallweit #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8 765c6bc519SHeiner Kallweit #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8) 7761111598SAndrew Lunn #define MII_M1111_RGMII_RX_DELAY BIT(7) 7861111598SAndrew Lunn #define MII_M1111_RGMII_TX_DELAY BIT(1) 79895ee682SKim Phillips #define MII_M1111_PHY_EXT_SR 0x1b 80be937f1fSAlexandr Smirnov 81895ee682SKim Phillips #define MII_M1111_HWCFG_MODE_MASK 0xf 82be937f1fSAlexandr Smirnov #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 834117b5beSKapil Juneja #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 84865b813aSAndrew Lunn #define MII_M1111_HWCFG_MODE_RTBI 0x7 851887023aSRobert Hancock #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8 865f8cbc13SLiu Yu-B13201 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 87865b813aSAndrew Lunn #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 881887023aSRobert Hancock #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc 891887023aSRobert Hancock #define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12) 90865b813aSAndrew Lunn #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 91865b813aSAndrew Lunn #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 92be937f1fSAlexandr Smirnov 93c477d044SCyril Chemparathy #define MII_88E1121_PHY_MSCR_REG 21 94c477d044SCyril Chemparathy #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 95c477d044SCyril Chemparathy #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 96424ca4c5SRussell King #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 97c477d044SCyril Chemparathy 980b04680fSAndrew Lunn #define MII_88E1121_MISC_TEST 0x1a 990b04680fSAndrew Lunn #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 1000b04680fSAndrew Lunn #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 1010b04680fSAndrew Lunn #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 1020b04680fSAndrew Lunn #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 1030b04680fSAndrew Lunn #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 1040b04680fSAndrew Lunn #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 1050b04680fSAndrew Lunn 1060b04680fSAndrew Lunn #define MII_88E1510_TEMP_SENSOR 0x1b 1070b04680fSAndrew Lunn #define MII_88E1510_TEMP_SENSOR_MASK 0xff 1080b04680fSAndrew Lunn 10969f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3 0x1a 11069f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) 11169f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 11269f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 11369f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 11469f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 11569f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) 11669f42be8SHeiner Kallweit 117fee2d546SAndrew Lunn #define MII_88E6390_MISC_TEST 0x1b 1184f920c29SMarek Behún #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14) 1194f920c29SMarek Behún #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14) 1204f920c29SMarek Behún #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14) 1214f920c29SMarek Behún #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14) 1224f920c29SMarek Behún #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14) 123a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11) 124a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11) 125a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11) 126a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11) 127a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11) 128a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8) 129a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8) 130a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8) 131a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8) 132fee2d546SAndrew Lunn 133fee2d546SAndrew Lunn #define MII_88E6390_TEMP_SENSOR 0x1c 134a978f7c4SMarek Behún #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00 135a978f7c4SMarek Behún #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8 136fee2d546SAndrew Lunn #define MII_88E6390_TEMP_SENSOR_MASK 0xff 137fee2d546SAndrew Lunn #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 138fee2d546SAndrew Lunn 139337ac9d5SCyril Chemparathy #define MII_88E1318S_PHY_MSCR1_REG 16 140337ac9d5SCyril Chemparathy #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 1413ff1c259SCyril Chemparathy 1423871c387SMichael Stapelberg /* Copper Specific Interrupt Enable Register */ 1433871c387SMichael Stapelberg #define MII_88E1318S_PHY_CSIER 0x12 1443871c387SMichael Stapelberg /* WOL Event Interrupt Enable */ 1453871c387SMichael Stapelberg #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 1463871c387SMichael Stapelberg 1473871c387SMichael Stapelberg /* LED Timer Control Register */ 1483871c387SMichael Stapelberg #define MII_88E1318S_PHY_LED_TCR 0x12 1493871c387SMichael Stapelberg #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 1503871c387SMichael Stapelberg #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 1513871c387SMichael Stapelberg #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 1523871c387SMichael Stapelberg 1533871c387SMichael Stapelberg /* Magic Packet MAC address registers */ 1543871c387SMichael Stapelberg #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 1553871c387SMichael Stapelberg #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 1563871c387SMichael Stapelberg #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 1573871c387SMichael Stapelberg 1583871c387SMichael Stapelberg #define MII_88E1318S_PHY_WOL_CTRL 0x10 1593871c387SMichael Stapelberg #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 1606164659fSSong Yoong Siang #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE BIT(13) 1613871c387SMichael Stapelberg #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 1623871c387SMichael Stapelberg 16307777246SWang Dongsheng #define MII_PHY_LED_CTRL 16 164140bc929SSergei Poselenov #define MII_88E1121_PHY_LED_DEF 0x0030 16507777246SWang Dongsheng #define MII_88E1510_PHY_LED_DEF 0x1177 166a93f7fe1SJian Shen #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040 167140bc929SSergei Poselenov 168be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS 0x11 169be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_1000 0x8000 170be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_100 0x4000 171be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 172be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 173be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 174be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_LINK 0x0400 175be937f1fSAlexandr Smirnov 1766b358aedSSebastian Hesselbarth #define MII_88E3016_PHY_SPEC_CTRL 0x10 1776b358aedSSebastian Hesselbarth #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 1786b358aedSSebastian Hesselbarth #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 17976884679SAndy Fleming 180930b37eeSStefan Roese #define MII_88E1510_GEN_CTRL_REG_1 0x14 181930b37eeSStefan Roese #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 182b697d9d3SIvan Bornyakov #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */ 183930b37eeSStefan Roese #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 184b697d9d3SIvan Bornyakov /* RGMII to 1000BASE-X */ 185b697d9d3SIvan Bornyakov #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2 186b697d9d3SIvan Bornyakov /* RGMII to 100BASE-FX */ 187b697d9d3SIvan Bornyakov #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3 188b697d9d3SIvan Bornyakov /* RGMII to SGMII */ 189b697d9d3SIvan Bornyakov #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4 190930b37eeSStefan Roese #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 191930b37eeSStefan Roese 192020a45afSMohammad Athari Bin Ismail #define MII_88E1510_MSCR_2 0x15 193020a45afSMohammad Athari Bin Ismail 1940c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10 1950c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11 1960c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12 1970c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13 1980c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00 1990c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8 2000c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15) 2010c9bcc1dSAndrew Lunn 2020c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL 0x17 2030c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_ENABLE BIT(15) 2040c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_COMPLETE BIT(14) 2050c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11) 2060c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11) 2070c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11) 2080c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11) 2090c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11) 2100c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8) 2110c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8) 2120c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8) 2130c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8) 2140c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8) 2150c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8) 2160c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8) 2170c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8) 2180c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8) 2190c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_SHIFT 8 2200c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6) 2210c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6) 2220c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6) 2230c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6) 2240c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3 2250c9bcc1dSAndrew Lunn 2260c9bcc1dSAndrew Lunn #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18 227f2bc8ad3SAndrew Lunn #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511 2280c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL 0x1c 2290c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12) 2300c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10) 2310c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10) 2320c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10) 2330c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10) 2340c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10 2350c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8) 2360c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8) 2370c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8) 2380c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8) 2390c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8 2400c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7) 2410c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0) 2420c9bcc1dSAndrew Lunn 243db8668a1SAndrew Lunn /* For TDR measurements less than 11 meters, a short pulse should be 244db8668a1SAndrew Lunn * used. 245db8668a1SAndrew Lunn */ 246db8668a1SAndrew Lunn #define TDR_SHORT_CABLE_LENGTH 11 247db8668a1SAndrew Lunn 248fc879f72SAndrew Lunn #define MII_VCT7_PAIR_0_DISTANCE 0x10 249fc879f72SAndrew Lunn #define MII_VCT7_PAIR_1_DISTANCE 0x11 250fc879f72SAndrew Lunn #define MII_VCT7_PAIR_2_DISTANCE 0x12 251fc879f72SAndrew Lunn #define MII_VCT7_PAIR_3_DISTANCE 0x13 252fc879f72SAndrew Lunn 253fc879f72SAndrew Lunn #define MII_VCT7_RESULTS 0x14 254fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000 255fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00 256fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0 257fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f 258fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR3_SHIFT 12 259fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR2_SHIFT 8 260fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR1_SHIFT 4 261fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR0_SHIFT 0 262fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_INVALID 0 263fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_OK 1 264fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_OPEN 2 265fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_SAME_SHORT 3 266fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_CROSS_SHORT 4 267fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_BUSY 9 268fc879f72SAndrew Lunn 269fc879f72SAndrew Lunn #define MII_VCT7_CTRL 0x15 270fc879f72SAndrew Lunn #define MII_VCT7_CTRL_RUN_NOW BIT(15) 271fc879f72SAndrew Lunn #define MII_VCT7_CTRL_RUN_ANEG BIT(14) 272fc879f72SAndrew Lunn #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13) 273fc879f72SAndrew Lunn #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12) 274fc879f72SAndrew Lunn #define MII_VCT7_CTRL_IN_PROGRESS BIT(11) 275fc879f72SAndrew Lunn #define MII_VCT7_CTRL_METERS BIT(10) 276fc879f72SAndrew Lunn #define MII_VCT7_CTRL_CENTIMETERS 0 277fc879f72SAndrew Lunn 2786cfb3bccSCharles-Antoine Couret #define LPA_PAUSE_FIBER 0x180 2796cfb3bccSCharles-Antoine Couret #define LPA_PAUSE_ASYM_FIBER 0x100 2806cfb3bccSCharles-Antoine Couret 2812170fef7SCharles-Antoine Couret #define NB_FIBER_STATS 1 2826cfb3bccSCharles-Antoine Couret 28300db8189SAndy Fleming MODULE_DESCRIPTION("Marvell PHY driver"); 28400db8189SAndy Fleming MODULE_AUTHOR("Andy Fleming"); 28500db8189SAndy Fleming MODULE_LICENSE("GPL"); 28600db8189SAndy Fleming 287d2fa47d9SAndrew Lunn struct marvell_hw_stat { 288d2fa47d9SAndrew Lunn const char *string; 289d2fa47d9SAndrew Lunn u8 page; 290d2fa47d9SAndrew Lunn u8 reg; 291d2fa47d9SAndrew Lunn u8 bits; 292d2fa47d9SAndrew Lunn }; 293d2fa47d9SAndrew Lunn 294d2fa47d9SAndrew Lunn static struct marvell_hw_stat marvell_hw_stats[] = { 2952170fef7SCharles-Antoine Couret { "phy_receive_errors_copper", 0, 21, 16}, 296d2fa47d9SAndrew Lunn { "phy_idle_errors", 0, 10, 8 }, 2972170fef7SCharles-Antoine Couret { "phy_receive_errors_fiber", 1, 21, 16}, 298d2fa47d9SAndrew Lunn }; 299d2fa47d9SAndrew Lunn 300d2fa47d9SAndrew Lunn struct marvell_priv { 301d2fa47d9SAndrew Lunn u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 3020b04680fSAndrew Lunn char *hwmon_name; 3030b04680fSAndrew Lunn struct device *hwmon_dev; 3040c9bcc1dSAndrew Lunn bool cable_test_tdr; 305f2bc8ad3SAndrew Lunn u32 first; 306f2bc8ad3SAndrew Lunn u32 last; 307f2bc8ad3SAndrew Lunn u32 step; 308f2bc8ad3SAndrew Lunn s8 pair; 309d2fa47d9SAndrew Lunn }; 310d2fa47d9SAndrew Lunn 311424ca4c5SRussell King static int marvell_read_page(struct phy_device *phydev) 3126427bb2dSAndrew Lunn { 313424ca4c5SRussell King return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 314424ca4c5SRussell King } 315424ca4c5SRussell King 316424ca4c5SRussell King static int marvell_write_page(struct phy_device *phydev, int page) 317424ca4c5SRussell King { 318424ca4c5SRussell King return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 3196427bb2dSAndrew Lunn } 3206427bb2dSAndrew Lunn 3216427bb2dSAndrew Lunn static int marvell_set_page(struct phy_device *phydev, int page) 3226427bb2dSAndrew Lunn { 3236427bb2dSAndrew Lunn return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 3246427bb2dSAndrew Lunn } 3256427bb2dSAndrew Lunn 32600db8189SAndy Fleming static int marvell_ack_interrupt(struct phy_device *phydev) 32700db8189SAndy Fleming { 32800db8189SAndy Fleming int err; 32900db8189SAndy Fleming 33000db8189SAndy Fleming /* Clear the interrupts by reading the reg */ 33100db8189SAndy Fleming err = phy_read(phydev, MII_M1011_IEVENT); 33200db8189SAndy Fleming 33300db8189SAndy Fleming if (err < 0) 33400db8189SAndy Fleming return err; 33500db8189SAndy Fleming 33600db8189SAndy Fleming return 0; 33700db8189SAndy Fleming } 33800db8189SAndy Fleming 33900db8189SAndy Fleming static int marvell_config_intr(struct phy_device *phydev) 34000db8189SAndy Fleming { 34100db8189SAndy Fleming int err; 34200db8189SAndy Fleming 3431f6d0f26SIoana Ciornei if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { 3441f6d0f26SIoana Ciornei err = marvell_ack_interrupt(phydev); 3451f6d0f26SIoana Ciornei if (err) 3461f6d0f26SIoana Ciornei return err; 3471f6d0f26SIoana Ciornei 34823beb38fSAndrew Lunn err = phy_write(phydev, MII_M1011_IMASK, 34923beb38fSAndrew Lunn MII_M1011_IMASK_INIT); 3501f6d0f26SIoana Ciornei } else { 35123beb38fSAndrew Lunn err = phy_write(phydev, MII_M1011_IMASK, 35223beb38fSAndrew Lunn MII_M1011_IMASK_CLEAR); 3531f6d0f26SIoana Ciornei if (err) 3541f6d0f26SIoana Ciornei return err; 3551f6d0f26SIoana Ciornei 3561f6d0f26SIoana Ciornei err = marvell_ack_interrupt(phydev); 3571f6d0f26SIoana Ciornei } 35800db8189SAndy Fleming 35900db8189SAndy Fleming return err; 36000db8189SAndy Fleming } 36100db8189SAndy Fleming 362a0723b37SIoana Ciornei static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev) 363a0723b37SIoana Ciornei { 364a0723b37SIoana Ciornei int irq_status; 365a0723b37SIoana Ciornei 366a0723b37SIoana Ciornei irq_status = phy_read(phydev, MII_M1011_IEVENT); 367a0723b37SIoana Ciornei if (irq_status < 0) { 368a0723b37SIoana Ciornei phy_error(phydev); 369a0723b37SIoana Ciornei return IRQ_NONE; 370a0723b37SIoana Ciornei } 371a0723b37SIoana Ciornei 372a0723b37SIoana Ciornei if (!(irq_status & MII_M1011_IMASK_INIT)) 373a0723b37SIoana Ciornei return IRQ_NONE; 374a0723b37SIoana Ciornei 375a0723b37SIoana Ciornei phy_trigger_machine(phydev); 376a0723b37SIoana Ciornei 377a0723b37SIoana Ciornei return IRQ_HANDLED; 378a0723b37SIoana Ciornei } 379a0723b37SIoana Ciornei 380239aa55bSDavid Thomson static int marvell_set_polarity(struct phy_device *phydev, int polarity) 381239aa55bSDavid Thomson { 382feb938faSRussell King u16 val; 383239aa55bSDavid Thomson 384239aa55bSDavid Thomson switch (polarity) { 385239aa55bSDavid Thomson case ETH_TP_MDI: 386feb938faSRussell King val = MII_M1011_PHY_SCR_MDI; 387239aa55bSDavid Thomson break; 388239aa55bSDavid Thomson case ETH_TP_MDI_X: 389feb938faSRussell King val = MII_M1011_PHY_SCR_MDI_X; 390239aa55bSDavid Thomson break; 391239aa55bSDavid Thomson case ETH_TP_MDI_AUTO: 392239aa55bSDavid Thomson case ETH_TP_MDI_INVALID: 393239aa55bSDavid Thomson default: 394feb938faSRussell King val = MII_M1011_PHY_SCR_AUTO_CROSS; 395239aa55bSDavid Thomson break; 396239aa55bSDavid Thomson } 397239aa55bSDavid Thomson 398feb938faSRussell King return phy_modify_changed(phydev, MII_M1011_PHY_SCR, 399feb938faSRussell King MII_M1011_PHY_SCR_AUTO_CROSS, val); 400239aa55bSDavid Thomson } 401239aa55bSDavid Thomson 40200db8189SAndy Fleming static int marvell_config_aneg(struct phy_device *phydev) 40300db8189SAndy Fleming { 404d6ab9336SFlorian Fainelli int changed = 0; 40500db8189SAndy Fleming int err; 40600db8189SAndy Fleming 4074e26c5c3SRaju Lakkaraju err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 40876884679SAndy Fleming if (err < 0) 40976884679SAndy Fleming return err; 41076884679SAndy Fleming 411d6ab9336SFlorian Fainelli changed = err; 412d6ab9336SFlorian Fainelli 41376884679SAndy Fleming err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 41476884679SAndy Fleming MII_M1111_PHY_LED_DIRECT); 41576884679SAndy Fleming if (err < 0) 41676884679SAndy Fleming return err; 41700db8189SAndy Fleming 41800db8189SAndy Fleming err = genphy_config_aneg(phydev); 4198ff44985SAnton Vorontsov if (err < 0) 42000db8189SAndy Fleming return err; 4218ff44985SAnton Vorontsov 422d6ab9336SFlorian Fainelli if (phydev->autoneg != AUTONEG_ENABLE || changed) { 4230c3439bcSAndrew Lunn /* A write to speed/duplex bits (that is performed by 4248ff44985SAnton Vorontsov * genphy_config_aneg() call above) must be followed by 4258ff44985SAnton Vorontsov * a software reset. Otherwise, the write has no effect. 4268ff44985SAnton Vorontsov */ 42734386344SAndrew Lunn err = genphy_soft_reset(phydev); 4288ff44985SAnton Vorontsov if (err < 0) 4298ff44985SAnton Vorontsov return err; 4308ff44985SAnton Vorontsov } 4318ff44985SAnton Vorontsov 4328ff44985SAnton Vorontsov return 0; 43300db8189SAndy Fleming } 43400db8189SAndy Fleming 435f2899788SAndrew Lunn static int m88e1101_config_aneg(struct phy_device *phydev) 436f2899788SAndrew Lunn { 437f2899788SAndrew Lunn int err; 438f2899788SAndrew Lunn 439f2899788SAndrew Lunn /* This Marvell PHY has an errata which requires 440f2899788SAndrew Lunn * that certain registers get written in order 441f2899788SAndrew Lunn * to restart autonegotiation 442f2899788SAndrew Lunn */ 44334386344SAndrew Lunn err = genphy_soft_reset(phydev); 444f2899788SAndrew Lunn if (err < 0) 445f2899788SAndrew Lunn return err; 446f2899788SAndrew Lunn 447f2899788SAndrew Lunn err = phy_write(phydev, 0x1d, 0x1f); 448f2899788SAndrew Lunn if (err < 0) 449f2899788SAndrew Lunn return err; 450f2899788SAndrew Lunn 451f2899788SAndrew Lunn err = phy_write(phydev, 0x1e, 0x200c); 452f2899788SAndrew Lunn if (err < 0) 453f2899788SAndrew Lunn return err; 454f2899788SAndrew Lunn 455f2899788SAndrew Lunn err = phy_write(phydev, 0x1d, 0x5); 456f2899788SAndrew Lunn if (err < 0) 457f2899788SAndrew Lunn return err; 458f2899788SAndrew Lunn 459f2899788SAndrew Lunn err = phy_write(phydev, 0x1e, 0); 460f2899788SAndrew Lunn if (err < 0) 461f2899788SAndrew Lunn return err; 462f2899788SAndrew Lunn 463f2899788SAndrew Lunn err = phy_write(phydev, 0x1e, 0x100); 464f2899788SAndrew Lunn if (err < 0) 465f2899788SAndrew Lunn return err; 466f2899788SAndrew Lunn 467f2899788SAndrew Lunn return marvell_config_aneg(phydev); 468f2899788SAndrew Lunn } 469f2899788SAndrew Lunn 4705cd119d9SDan Murphy #if IS_ENABLED(CONFIG_OF_MDIO) 4710c3439bcSAndrew Lunn /* Set and/or override some configuration registers based on the 472cf41a51dSDavid Daney * marvell,reg-init property stored in the of_node for the phydev. 473cf41a51dSDavid Daney * 474cf41a51dSDavid Daney * marvell,reg-init = <reg-page reg mask value>,...; 475cf41a51dSDavid Daney * 476cf41a51dSDavid Daney * There may be one or more sets of <reg-page reg mask value>: 477cf41a51dSDavid Daney * 478cf41a51dSDavid Daney * reg-page: which register bank to use. 479cf41a51dSDavid Daney * reg: the register. 480cf41a51dSDavid Daney * mask: if non-zero, ANDed with existing register value. 481cf41a51dSDavid Daney * value: ORed with the masked value and written to the regiser. 482cf41a51dSDavid Daney * 483cf41a51dSDavid Daney */ 484cf41a51dSDavid Daney static int marvell_of_reg_init(struct phy_device *phydev) 485cf41a51dSDavid Daney { 486cf41a51dSDavid Daney const __be32 *paddr; 487424ca4c5SRussell King int len, i, saved_page, current_page, ret = 0; 488cf41a51dSDavid Daney 489e5a03bfdSAndrew Lunn if (!phydev->mdio.dev.of_node) 490cf41a51dSDavid Daney return 0; 491cf41a51dSDavid Daney 492e5a03bfdSAndrew Lunn paddr = of_get_property(phydev->mdio.dev.of_node, 493e5a03bfdSAndrew Lunn "marvell,reg-init", &len); 494cf41a51dSDavid Daney if (!paddr || len < (4 * sizeof(*paddr))) 495cf41a51dSDavid Daney return 0; 496cf41a51dSDavid Daney 497424ca4c5SRussell King saved_page = phy_save_page(phydev); 498cf41a51dSDavid Daney if (saved_page < 0) 499424ca4c5SRussell King goto err; 500cf41a51dSDavid Daney current_page = saved_page; 501cf41a51dSDavid Daney 502cf41a51dSDavid Daney len /= sizeof(*paddr); 503cf41a51dSDavid Daney for (i = 0; i < len - 3; i += 4) { 5046427bb2dSAndrew Lunn u16 page = be32_to_cpup(paddr + i); 505cf41a51dSDavid Daney u16 reg = be32_to_cpup(paddr + i + 1); 506cf41a51dSDavid Daney u16 mask = be32_to_cpup(paddr + i + 2); 507cf41a51dSDavid Daney u16 val_bits = be32_to_cpup(paddr + i + 3); 508cf41a51dSDavid Daney int val; 509cf41a51dSDavid Daney 5106427bb2dSAndrew Lunn if (page != current_page) { 5116427bb2dSAndrew Lunn current_page = page; 512424ca4c5SRussell King ret = marvell_write_page(phydev, page); 513cf41a51dSDavid Daney if (ret < 0) 514cf41a51dSDavid Daney goto err; 515cf41a51dSDavid Daney } 516cf41a51dSDavid Daney 517cf41a51dSDavid Daney val = 0; 518cf41a51dSDavid Daney if (mask) { 519424ca4c5SRussell King val = __phy_read(phydev, reg); 520cf41a51dSDavid Daney if (val < 0) { 521cf41a51dSDavid Daney ret = val; 522cf41a51dSDavid Daney goto err; 523cf41a51dSDavid Daney } 524cf41a51dSDavid Daney val &= mask; 525cf41a51dSDavid Daney } 526cf41a51dSDavid Daney val |= val_bits; 527cf41a51dSDavid Daney 528424ca4c5SRussell King ret = __phy_write(phydev, reg, val); 529cf41a51dSDavid Daney if (ret < 0) 530cf41a51dSDavid Daney goto err; 531cf41a51dSDavid Daney } 532cf41a51dSDavid Daney err: 533424ca4c5SRussell King return phy_restore_page(phydev, saved_page, ret); 534cf41a51dSDavid Daney } 535cf41a51dSDavid Daney #else 536cf41a51dSDavid Daney static int marvell_of_reg_init(struct phy_device *phydev) 537cf41a51dSDavid Daney { 538cf41a51dSDavid Daney return 0; 539cf41a51dSDavid Daney } 540cf41a51dSDavid Daney #endif /* CONFIG_OF_MDIO */ 541cf41a51dSDavid Daney 542864dc729SAndrew Lunn static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 543140bc929SSergei Poselenov { 544424ca4c5SRussell King int mscr; 545c477d044SCyril Chemparathy 546c477d044SCyril Chemparathy if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 547424ca4c5SRussell King mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 548424ca4c5SRussell King MII_88E1121_PHY_MSCR_TX_DELAY; 549c477d044SCyril Chemparathy else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 550424ca4c5SRussell King mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 551c477d044SCyril Chemparathy else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 552424ca4c5SRussell King mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 553424ca4c5SRussell King else 554424ca4c5SRussell King mscr = 0; 555c477d044SCyril Chemparathy 556fe4f57bfSPavel Parkhomenko return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE, 557424ca4c5SRussell King MII_88E1121_PHY_MSCR_REG, 558424ca4c5SRussell King MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 559be8c6480SArnaud Patard } 560c477d044SCyril Chemparathy 561864dc729SAndrew Lunn static int m88e1121_config_aneg(struct phy_device *phydev) 562864dc729SAndrew Lunn { 563d6ab9336SFlorian Fainelli int changed = 0; 564864dc729SAndrew Lunn int err = 0; 565864dc729SAndrew Lunn 566864dc729SAndrew Lunn if (phy_interface_is_rgmii(phydev)) { 567864dc729SAndrew Lunn err = m88e1121_config_aneg_rgmii_delays(phydev); 568fea23fb5SRussell King if (err < 0) 569864dc729SAndrew Lunn return err; 570864dc729SAndrew Lunn } 571140bc929SSergei Poselenov 572fe4f57bfSPavel Parkhomenko changed = err; 573fe4f57bfSPavel Parkhomenko 574fecd5e91SAndrew Lunn err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 575140bc929SSergei Poselenov if (err < 0) 576140bc929SSergei Poselenov return err; 577140bc929SSergei Poselenov 578fe4f57bfSPavel Parkhomenko changed |= err; 579d6ab9336SFlorian Fainelli 580d6ab9336SFlorian Fainelli err = genphy_config_aneg(phydev); 581d6ab9336SFlorian Fainelli if (err < 0) 582d6ab9336SFlorian Fainelli return err; 583d6ab9336SFlorian Fainelli 5844b1bd697SDavid S. Miller if (phydev->autoneg != AUTONEG_ENABLE || changed) { 585d6ab9336SFlorian Fainelli /* A software reset is used to ensure a "commit" of the 586d6ab9336SFlorian Fainelli * changes is done. 587d6ab9336SFlorian Fainelli */ 588d6ab9336SFlorian Fainelli err = genphy_soft_reset(phydev); 589d6ab9336SFlorian Fainelli if (err < 0) 590d6ab9336SFlorian Fainelli return err; 591d6ab9336SFlorian Fainelli } 592d6ab9336SFlorian Fainelli 593d6ab9336SFlorian Fainelli return 0; 594140bc929SSergei Poselenov } 595140bc929SSergei Poselenov 596337ac9d5SCyril Chemparathy static int m88e1318_config_aneg(struct phy_device *phydev) 5973ff1c259SCyril Chemparathy { 598424ca4c5SRussell King int err; 5993ff1c259SCyril Chemparathy 600424ca4c5SRussell King err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 601424ca4c5SRussell King MII_88E1318S_PHY_MSCR1_REG, 602424ca4c5SRussell King 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 6033ff1c259SCyril Chemparathy if (err < 0) 6043ff1c259SCyril Chemparathy return err; 6053ff1c259SCyril Chemparathy 6063ff1c259SCyril Chemparathy return m88e1121_config_aneg(phydev); 6073ff1c259SCyril Chemparathy } 6083ff1c259SCyril Chemparathy 60978301ebeSCharles-Antoine Couret /** 6103c1bcc86SAndrew Lunn * linkmode_adv_to_fiber_adv_t 6113c1bcc86SAndrew Lunn * @advertise: the linkmode advertisement settings 61278301ebeSCharles-Antoine Couret * 6133c1bcc86SAndrew Lunn * A small helper function that translates linkmode advertisement 6143c1bcc86SAndrew Lunn * settings to phy autonegotiation advertisements for the MII_ADV 6153c1bcc86SAndrew Lunn * register for fiber link. 61678301ebeSCharles-Antoine Couret */ 6173c1bcc86SAndrew Lunn static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 61878301ebeSCharles-Antoine Couret { 61978301ebeSCharles-Antoine Couret u32 result = 0; 62078301ebeSCharles-Antoine Couret 6213c1bcc86SAndrew Lunn if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 62220ecf424SRussell King result |= ADVERTISE_1000XHALF; 6233c1bcc86SAndrew Lunn if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 62420ecf424SRussell King result |= ADVERTISE_1000XFULL; 62578301ebeSCharles-Antoine Couret 6263c1bcc86SAndrew Lunn if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 6273c1bcc86SAndrew Lunn linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 62820ecf424SRussell King result |= ADVERTISE_1000XPSE_ASYM; 6293c1bcc86SAndrew Lunn else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 63020ecf424SRussell King result |= ADVERTISE_1000XPAUSE; 63178301ebeSCharles-Antoine Couret 63278301ebeSCharles-Antoine Couret return result; 63378301ebeSCharles-Antoine Couret } 63478301ebeSCharles-Antoine Couret 63578301ebeSCharles-Antoine Couret /** 63678301ebeSCharles-Antoine Couret * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 63778301ebeSCharles-Antoine Couret * @phydev: target phy_device struct 63878301ebeSCharles-Antoine Couret * 63978301ebeSCharles-Antoine Couret * Description: If auto-negotiation is enabled, we configure the 64078301ebeSCharles-Antoine Couret * advertising, and then restart auto-negotiation. If it is not 64178301ebeSCharles-Antoine Couret * enabled, then we write the BMCR. Adapted for fiber link in 64278301ebeSCharles-Antoine Couret * some Marvell's devices. 64378301ebeSCharles-Antoine Couret */ 64478301ebeSCharles-Antoine Couret static int marvell_config_aneg_fiber(struct phy_device *phydev) 64578301ebeSCharles-Antoine Couret { 64678301ebeSCharles-Antoine Couret int changed = 0; 64778301ebeSCharles-Antoine Couret int err; 6489f4bae70SRussell King u16 adv; 64978301ebeSCharles-Antoine Couret 65078301ebeSCharles-Antoine Couret if (phydev->autoneg != AUTONEG_ENABLE) 65178301ebeSCharles-Antoine Couret return genphy_setup_forced(phydev); 65278301ebeSCharles-Antoine Couret 65378301ebeSCharles-Antoine Couret /* Only allow advertising what this PHY supports */ 6543c1bcc86SAndrew Lunn linkmode_and(phydev->advertising, phydev->advertising, 6553c1bcc86SAndrew Lunn phydev->supported); 65678301ebeSCharles-Antoine Couret 6579f4bae70SRussell King adv = linkmode_adv_to_fiber_adv_t(phydev->advertising); 6589f4bae70SRussell King 65978301ebeSCharles-Antoine Couret /* Setup fiber advertisement */ 6609f4bae70SRussell King err = phy_modify_changed(phydev, MII_ADVERTISE, 6619f4bae70SRussell King ADVERTISE_1000XHALF | ADVERTISE_1000XFULL | 6629f4bae70SRussell King ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM, 6639f4bae70SRussell King adv); 66478301ebeSCharles-Antoine Couret if (err < 0) 66578301ebeSCharles-Antoine Couret return err; 6669f4bae70SRussell King if (err > 0) 66778301ebeSCharles-Antoine Couret changed = 1; 66878301ebeSCharles-Antoine Couret 669b5abac2dSRussell King return genphy_check_and_restart_aneg(phydev, changed); 67078301ebeSCharles-Antoine Couret } 67178301ebeSCharles-Antoine Couret 6721887023aSRobert Hancock static int m88e1111_config_aneg(struct phy_device *phydev) 6731887023aSRobert Hancock { 6741887023aSRobert Hancock int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); 6751887023aSRobert Hancock int err; 6761887023aSRobert Hancock 6771887023aSRobert Hancock if (extsr < 0) 6781887023aSRobert Hancock return extsr; 6791887023aSRobert Hancock 6801887023aSRobert Hancock /* If not using SGMII or copper 1000BaseX modes, use normal process. 6811887023aSRobert Hancock * Steps below are only required for these modes. 6821887023aSRobert Hancock */ 6831887023aSRobert Hancock if (phydev->interface != PHY_INTERFACE_MODE_SGMII && 6841887023aSRobert Hancock (extsr & MII_M1111_HWCFG_MODE_MASK) != 6851887023aSRobert Hancock MII_M1111_HWCFG_MODE_COPPER_1000X_AN) 6861887023aSRobert Hancock return marvell_config_aneg(phydev); 6871887023aSRobert Hancock 6881887023aSRobert Hancock err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 6891887023aSRobert Hancock if (err < 0) 6901887023aSRobert Hancock goto error; 6911887023aSRobert Hancock 6921887023aSRobert Hancock /* Configure the copper link first */ 6931887023aSRobert Hancock err = marvell_config_aneg(phydev); 6941887023aSRobert Hancock if (err < 0) 6951887023aSRobert Hancock goto error; 6961887023aSRobert Hancock 6971887023aSRobert Hancock /* Then the fiber link */ 6981887023aSRobert Hancock err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 6991887023aSRobert Hancock if (err < 0) 7001887023aSRobert Hancock goto error; 7011887023aSRobert Hancock 70206b334f0SRobert Hancock if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 70306b334f0SRobert Hancock /* Do not touch the fiber advertisement if we're in copper->sgmii mode. 70406b334f0SRobert Hancock * Just ensure that SGMII-side autonegotiation is enabled. 70506b334f0SRobert Hancock * If we switched from some other mode to SGMII it may not be. 70606b334f0SRobert Hancock */ 70706b334f0SRobert Hancock err = genphy_check_and_restart_aneg(phydev, false); 70806b334f0SRobert Hancock else 7091887023aSRobert Hancock err = marvell_config_aneg_fiber(phydev); 7101887023aSRobert Hancock if (err < 0) 7111887023aSRobert Hancock goto error; 7121887023aSRobert Hancock 7131887023aSRobert Hancock return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 7141887023aSRobert Hancock 7151887023aSRobert Hancock error: 7161887023aSRobert Hancock marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 7171887023aSRobert Hancock return err; 7181887023aSRobert Hancock } 7191887023aSRobert Hancock 72010e24caaSMichal Simek static int m88e1510_config_aneg(struct phy_device *phydev) 72110e24caaSMichal Simek { 72210e24caaSMichal Simek int err; 72310e24caaSMichal Simek 72452295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 72578301ebeSCharles-Antoine Couret if (err < 0) 72678301ebeSCharles-Antoine Couret goto error; 72778301ebeSCharles-Antoine Couret 72878301ebeSCharles-Antoine Couret /* Configure the copper link first */ 72910e24caaSMichal Simek err = m88e1318_config_aneg(phydev); 73010e24caaSMichal Simek if (err < 0) 73178301ebeSCharles-Antoine Couret goto error; 73210e24caaSMichal Simek 733de9c4e06SRussell King /* Do not touch the fiber page if we're in copper->sgmii mode */ 734de9c4e06SRussell King if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 735de9c4e06SRussell King return 0; 736de9c4e06SRussell King 73778301ebeSCharles-Antoine Couret /* Then the fiber link */ 73852295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 73978301ebeSCharles-Antoine Couret if (err < 0) 74078301ebeSCharles-Antoine Couret goto error; 74178301ebeSCharles-Antoine Couret 74278301ebeSCharles-Antoine Couret err = marvell_config_aneg_fiber(phydev); 74378301ebeSCharles-Antoine Couret if (err < 0) 74478301ebeSCharles-Antoine Couret goto error; 74578301ebeSCharles-Antoine Couret 74652295666SAndrew Lunn return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 74778301ebeSCharles-Antoine Couret 74878301ebeSCharles-Antoine Couret error: 74952295666SAndrew Lunn marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 75078301ebeSCharles-Antoine Couret return err; 75179be1a1cSClemens Gruber } 75279be1a1cSClemens Gruber 75307777246SWang Dongsheng static void marvell_config_led(struct phy_device *phydev) 75407777246SWang Dongsheng { 75507777246SWang Dongsheng u16 def_config; 75607777246SWang Dongsheng int err; 75707777246SWang Dongsheng 75807777246SWang Dongsheng switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 75907777246SWang Dongsheng /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 76007777246SWang Dongsheng case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 76107777246SWang Dongsheng case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 76207777246SWang Dongsheng def_config = MII_88E1121_PHY_LED_DEF; 76307777246SWang Dongsheng break; 76407777246SWang Dongsheng /* Default PHY LED config: 76507777246SWang Dongsheng * LED[0] .. 1000Mbps Link 76607777246SWang Dongsheng * LED[1] .. 100Mbps Link 76707777246SWang Dongsheng * LED[2] .. Blink, Activity 76807777246SWang Dongsheng */ 76907777246SWang Dongsheng case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 770a93f7fe1SJian Shen if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE) 771a93f7fe1SJian Shen def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE; 772a93f7fe1SJian Shen else 77307777246SWang Dongsheng def_config = MII_88E1510_PHY_LED_DEF; 77407777246SWang Dongsheng break; 77507777246SWang Dongsheng default: 77607777246SWang Dongsheng return; 77707777246SWang Dongsheng } 77807777246SWang Dongsheng 77907777246SWang Dongsheng err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 78007777246SWang Dongsheng def_config); 78107777246SWang Dongsheng if (err < 0) 782ab2a605fSAndrew Lunn phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 78307777246SWang Dongsheng } 78407777246SWang Dongsheng 78579be1a1cSClemens Gruber static int marvell_config_init(struct phy_device *phydev) 78679be1a1cSClemens Gruber { 78785bec4bcSBhaskar Chowdhury /* Set default LED */ 78807777246SWang Dongsheng marvell_config_led(phydev); 78907777246SWang Dongsheng 79079be1a1cSClemens Gruber /* Set registers from marvell,reg-init DT property */ 79110e24caaSMichal Simek return marvell_of_reg_init(phydev); 79210e24caaSMichal Simek } 79310e24caaSMichal Simek 7946b358aedSSebastian Hesselbarth static int m88e3016_config_init(struct phy_device *phydev) 7956b358aedSSebastian Hesselbarth { 796fea23fb5SRussell King int ret; 7976b358aedSSebastian Hesselbarth 7986b358aedSSebastian Hesselbarth /* Enable Scrambler and Auto-Crossover */ 799fea23fb5SRussell King ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 800f102852fSRussell King MII_88E3016_DISABLE_SCRAMBLER, 801fea23fb5SRussell King MII_88E3016_AUTO_MDIX_CROSSOVER); 802fea23fb5SRussell King if (ret < 0) 803fea23fb5SRussell King return ret; 8046b358aedSSebastian Hesselbarth 80579be1a1cSClemens Gruber return marvell_config_init(phydev); 8066b358aedSSebastian Hesselbarth } 8076b358aedSSebastian Hesselbarth 808865b813aSAndrew Lunn static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 809865b813aSAndrew Lunn u16 mode, 810865b813aSAndrew Lunn int fibre_copper_auto) 811865b813aSAndrew Lunn { 812865b813aSAndrew Lunn if (fibre_copper_auto) 813fea23fb5SRussell King mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 814865b813aSAndrew Lunn 815fea23fb5SRussell King return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 816f102852fSRussell King MII_M1111_HWCFG_MODE_MASK | 817fea23fb5SRussell King MII_M1111_HWCFG_FIBER_COPPER_AUTO | 818f102852fSRussell King MII_M1111_HWCFG_FIBER_COPPER_RES, 819fea23fb5SRussell King mode); 820865b813aSAndrew Lunn } 821865b813aSAndrew Lunn 82261111598SAndrew Lunn static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 823895ee682SKim Phillips { 824fea23fb5SRussell King int delay; 825895ee682SKim Phillips 82616d4d650SWeihang Li switch (phydev->interface) { 82716d4d650SWeihang Li case PHY_INTERFACE_MODE_RGMII_ID: 828fea23fb5SRussell King delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 82916d4d650SWeihang Li break; 83016d4d650SWeihang Li case PHY_INTERFACE_MODE_RGMII_RXID: 831fea23fb5SRussell King delay = MII_M1111_RGMII_RX_DELAY; 83216d4d650SWeihang Li break; 83316d4d650SWeihang Li case PHY_INTERFACE_MODE_RGMII_TXID: 834fea23fb5SRussell King delay = MII_M1111_RGMII_TX_DELAY; 83516d4d650SWeihang Li break; 83616d4d650SWeihang Li default: 837fea23fb5SRussell King delay = 0; 83816d4d650SWeihang Li break; 8399daf5a76SKim Phillips } 840895ee682SKim Phillips 841fea23fb5SRussell King return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 842f102852fSRussell King MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 843fea23fb5SRussell King delay); 84461111598SAndrew Lunn } 84561111598SAndrew Lunn 84661111598SAndrew Lunn static int m88e1111_config_init_rgmii(struct phy_device *phydev) 84761111598SAndrew Lunn { 84861111598SAndrew Lunn int temp; 84961111598SAndrew Lunn int err; 85061111598SAndrew Lunn 85161111598SAndrew Lunn err = m88e1111_config_init_rgmii_delays(phydev); 852895ee682SKim Phillips if (err < 0) 853895ee682SKim Phillips return err; 854895ee682SKim Phillips 855895ee682SKim Phillips temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 856895ee682SKim Phillips if (temp < 0) 857895ee682SKim Phillips return temp; 858895ee682SKim Phillips 859895ee682SKim Phillips temp &= ~(MII_M1111_HWCFG_MODE_MASK); 860be937f1fSAlexandr Smirnov 8617239016dSWang Jian if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 862be937f1fSAlexandr Smirnov temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 863be937f1fSAlexandr Smirnov else 864be937f1fSAlexandr Smirnov temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 865895ee682SKim Phillips 866e1dde8dcSAndrew Lunn return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 867895ee682SKim Phillips } 868895ee682SKim Phillips 869e1dde8dcSAndrew Lunn static int m88e1111_config_init_sgmii(struct phy_device *phydev) 870e1dde8dcSAndrew Lunn { 871e1dde8dcSAndrew Lunn int err; 872e1dde8dcSAndrew Lunn 873865b813aSAndrew Lunn err = m88e1111_config_init_hwcfg_mode( 874865b813aSAndrew Lunn phydev, 875865b813aSAndrew Lunn MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 876865b813aSAndrew Lunn MII_M1111_HWCFG_FIBER_COPPER_AUTO); 8774117b5beSKapil Juneja if (err < 0) 8784117b5beSKapil Juneja return err; 87907151bc9SMadalin Bucur 88007151bc9SMadalin Bucur /* make sure copper is selected */ 88152295666SAndrew Lunn return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 8824117b5beSKapil Juneja } 8834117b5beSKapil Juneja 884e1dde8dcSAndrew Lunn static int m88e1111_config_init_rtbi(struct phy_device *phydev) 885e1dde8dcSAndrew Lunn { 88661111598SAndrew Lunn int err; 887e1dde8dcSAndrew Lunn 88861111598SAndrew Lunn err = m88e1111_config_init_rgmii_delays(phydev); 889fea23fb5SRussell King if (err < 0) 8905f8cbc13SLiu Yu-B13201 return err; 8915f8cbc13SLiu Yu-B13201 892865b813aSAndrew Lunn err = m88e1111_config_init_hwcfg_mode( 893865b813aSAndrew Lunn phydev, 894865b813aSAndrew Lunn MII_M1111_HWCFG_MODE_RTBI, 895865b813aSAndrew Lunn MII_M1111_HWCFG_FIBER_COPPER_AUTO); 8965f8cbc13SLiu Yu-B13201 if (err < 0) 8975f8cbc13SLiu Yu-B13201 return err; 8985f8cbc13SLiu Yu-B13201 8995f8cbc13SLiu Yu-B13201 /* soft reset */ 90034386344SAndrew Lunn err = genphy_soft_reset(phydev); 9015f8cbc13SLiu Yu-B13201 if (err < 0) 9025f8cbc13SLiu Yu-B13201 return err; 903e1dde8dcSAndrew Lunn 904865b813aSAndrew Lunn return m88e1111_config_init_hwcfg_mode( 905865b813aSAndrew Lunn phydev, 906865b813aSAndrew Lunn MII_M1111_HWCFG_MODE_RTBI, 907865b813aSAndrew Lunn MII_M1111_HWCFG_FIBER_COPPER_AUTO); 908e1dde8dcSAndrew Lunn } 909e1dde8dcSAndrew Lunn 9101887023aSRobert Hancock static int m88e1111_config_init_1000basex(struct phy_device *phydev) 9111887023aSRobert Hancock { 9121887023aSRobert Hancock int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); 9131887023aSRobert Hancock int err, mode; 9141887023aSRobert Hancock 9151887023aSRobert Hancock if (extsr < 0) 9161887023aSRobert Hancock return extsr; 9171887023aSRobert Hancock 9181887023aSRobert Hancock /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */ 9191887023aSRobert Hancock mode = extsr & MII_M1111_HWCFG_MODE_MASK; 9201887023aSRobert Hancock if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) { 9211887023aSRobert Hancock err = phy_modify(phydev, MII_M1111_PHY_EXT_SR, 9221887023aSRobert Hancock MII_M1111_HWCFG_MODE_MASK | 9231887023aSRobert Hancock MII_M1111_HWCFG_SERIAL_AN_BYPASS, 9241887023aSRobert Hancock MII_M1111_HWCFG_MODE_COPPER_1000X_AN | 9251887023aSRobert Hancock MII_M1111_HWCFG_SERIAL_AN_BYPASS); 9261887023aSRobert Hancock if (err < 0) 9271887023aSRobert Hancock return err; 9281887023aSRobert Hancock } 9291887023aSRobert Hancock return 0; 9301887023aSRobert Hancock } 9311887023aSRobert Hancock 932e1dde8dcSAndrew Lunn static int m88e1111_config_init(struct phy_device *phydev) 933e1dde8dcSAndrew Lunn { 934e1dde8dcSAndrew Lunn int err; 935e1dde8dcSAndrew Lunn 936e1dde8dcSAndrew Lunn if (phy_interface_is_rgmii(phydev)) { 937e1dde8dcSAndrew Lunn err = m88e1111_config_init_rgmii(phydev); 938fea23fb5SRussell King if (err < 0) 939e1dde8dcSAndrew Lunn return err; 940e1dde8dcSAndrew Lunn } 941e1dde8dcSAndrew Lunn 942e1dde8dcSAndrew Lunn if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 943e1dde8dcSAndrew Lunn err = m88e1111_config_init_sgmii(phydev); 944e1dde8dcSAndrew Lunn if (err < 0) 945e1dde8dcSAndrew Lunn return err; 946e1dde8dcSAndrew Lunn } 947e1dde8dcSAndrew Lunn 948e1dde8dcSAndrew Lunn if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 949e1dde8dcSAndrew Lunn err = m88e1111_config_init_rtbi(phydev); 9505f8cbc13SLiu Yu-B13201 if (err < 0) 9515f8cbc13SLiu Yu-B13201 return err; 9525f8cbc13SLiu Yu-B13201 } 9535f8cbc13SLiu Yu-B13201 9541887023aSRobert Hancock if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) { 9551887023aSRobert Hancock err = m88e1111_config_init_1000basex(phydev); 9561887023aSRobert Hancock if (err < 0) 9571887023aSRobert Hancock return err; 9581887023aSRobert Hancock } 9591887023aSRobert Hancock 960cf41a51dSDavid Daney err = marvell_of_reg_init(phydev); 961cf41a51dSDavid Daney if (err < 0) 962cf41a51dSDavid Daney return err; 9635f8cbc13SLiu Yu-B13201 9640ed99eccSRobert Hancock err = genphy_soft_reset(phydev); 9650ed99eccSRobert Hancock if (err < 0) 9660ed99eccSRobert Hancock return err; 9670ed99eccSRobert Hancock 9680ed99eccSRobert Hancock if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 9690ed99eccSRobert Hancock /* If the HWCFG_MODE was changed from another mode (such as 9700ed99eccSRobert Hancock * 1000BaseX) to SGMII, the state of the support bits may have 9710ed99eccSRobert Hancock * also changed now that the PHY has been reset. 9720ed99eccSRobert Hancock * Update the PHY abilities accordingly. 9730ed99eccSRobert Hancock */ 9740ed99eccSRobert Hancock err = genphy_read_abilities(phydev); 9750ed99eccSRobert Hancock linkmode_or(phydev->advertising, phydev->advertising, 9760ed99eccSRobert Hancock phydev->supported); 9770ed99eccSRobert Hancock } 9780ed99eccSRobert Hancock return err; 979895ee682SKim Phillips } 980895ee682SKim Phillips 9815c6bc519SHeiner Kallweit static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data) 9825c6bc519SHeiner Kallweit { 9835c6bc519SHeiner Kallweit int val, cnt, enable; 9845c6bc519SHeiner Kallweit 9855c6bc519SHeiner Kallweit val = phy_read(phydev, MII_M1111_PHY_EXT_CR); 9865c6bc519SHeiner Kallweit if (val < 0) 9875c6bc519SHeiner Kallweit return val; 9885c6bc519SHeiner Kallweit 9895c6bc519SHeiner Kallweit enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val); 9905c6bc519SHeiner Kallweit cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1; 9915c6bc519SHeiner Kallweit 9925c6bc519SHeiner Kallweit *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 9935c6bc519SHeiner Kallweit 9945c6bc519SHeiner Kallweit return 0; 9955c6bc519SHeiner Kallweit } 9965c6bc519SHeiner Kallweit 9975c6bc519SHeiner Kallweit static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt) 9985c6bc519SHeiner Kallweit { 999e7679c55SMaxim Kochetkov int val, err; 10005c6bc519SHeiner Kallweit 10015c6bc519SHeiner Kallweit if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX) 10025c6bc519SHeiner Kallweit return -E2BIG; 10035c6bc519SHeiner Kallweit 1004e7679c55SMaxim Kochetkov if (!cnt) { 1005e7679c55SMaxim Kochetkov err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, 10065c6bc519SHeiner Kallweit MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); 1007e7679c55SMaxim Kochetkov } else { 10085c6bc519SHeiner Kallweit val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; 10095c6bc519SHeiner Kallweit val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); 10105c6bc519SHeiner Kallweit 1011e7679c55SMaxim Kochetkov err = phy_modify(phydev, MII_M1111_PHY_EXT_CR, 10125c6bc519SHeiner Kallweit MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | 10135c6bc519SHeiner Kallweit MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, 10145c6bc519SHeiner Kallweit val); 10155c6bc519SHeiner Kallweit } 10165c6bc519SHeiner Kallweit 1017e7679c55SMaxim Kochetkov if (err < 0) 1018e7679c55SMaxim Kochetkov return err; 1019e7679c55SMaxim Kochetkov 1020e7679c55SMaxim Kochetkov return genphy_soft_reset(phydev); 1021e7679c55SMaxim Kochetkov } 1022e7679c55SMaxim Kochetkov 10235c6bc519SHeiner Kallweit static int m88e1111_get_tunable(struct phy_device *phydev, 10245c6bc519SHeiner Kallweit struct ethtool_tunable *tuna, void *data) 10255c6bc519SHeiner Kallweit { 10265c6bc519SHeiner Kallweit switch (tuna->id) { 10275c6bc519SHeiner Kallweit case ETHTOOL_PHY_DOWNSHIFT: 10285c6bc519SHeiner Kallweit return m88e1111_get_downshift(phydev, data); 10295c6bc519SHeiner Kallweit default: 10305c6bc519SHeiner Kallweit return -EOPNOTSUPP; 10315c6bc519SHeiner Kallweit } 10325c6bc519SHeiner Kallweit } 10335c6bc519SHeiner Kallweit 10345c6bc519SHeiner Kallweit static int m88e1111_set_tunable(struct phy_device *phydev, 10355c6bc519SHeiner Kallweit struct ethtool_tunable *tuna, const void *data) 10365c6bc519SHeiner Kallweit { 10375c6bc519SHeiner Kallweit switch (tuna->id) { 10385c6bc519SHeiner Kallweit case ETHTOOL_PHY_DOWNSHIFT: 10395c6bc519SHeiner Kallweit return m88e1111_set_downshift(phydev, *(const u8 *)data); 10405c6bc519SHeiner Kallweit default: 10415c6bc519SHeiner Kallweit return -EOPNOTSUPP; 10425c6bc519SHeiner Kallweit } 10435c6bc519SHeiner Kallweit } 10445c6bc519SHeiner Kallweit 1045911af5e1SHeiner Kallweit static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data) 1046a3bdfce7SHeiner Kallweit { 1047a3bdfce7SHeiner Kallweit int val, cnt, enable; 1048a3bdfce7SHeiner Kallweit 1049a3bdfce7SHeiner Kallweit val = phy_read(phydev, MII_M1011_PHY_SCR); 1050a3bdfce7SHeiner Kallweit if (val < 0) 1051a3bdfce7SHeiner Kallweit return val; 1052a3bdfce7SHeiner Kallweit 1053a3bdfce7SHeiner Kallweit enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val); 1054f8d975beSHeiner Kallweit cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1; 1055a3bdfce7SHeiner Kallweit 1056a3bdfce7SHeiner Kallweit *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 1057a3bdfce7SHeiner Kallweit 1058a3bdfce7SHeiner Kallweit return 0; 1059a3bdfce7SHeiner Kallweit } 1060a3bdfce7SHeiner Kallweit 1061911af5e1SHeiner Kallweit static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt) 1062a3bdfce7SHeiner Kallweit { 1063990875b2SMaxim Kochetkov int val, err; 1064a3bdfce7SHeiner Kallweit 1065a3bdfce7SHeiner Kallweit if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX) 1066a3bdfce7SHeiner Kallweit return -E2BIG; 1067a3bdfce7SHeiner Kallweit 1068990875b2SMaxim Kochetkov if (!cnt) { 1069990875b2SMaxim Kochetkov err = phy_clear_bits(phydev, MII_M1011_PHY_SCR, 1070a3bdfce7SHeiner Kallweit MII_M1011_PHY_SCR_DOWNSHIFT_EN); 1071990875b2SMaxim Kochetkov } else { 1072a3bdfce7SHeiner Kallweit val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; 1073f8d975beSHeiner Kallweit val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); 1074a3bdfce7SHeiner Kallweit 1075990875b2SMaxim Kochetkov err = phy_modify(phydev, MII_M1011_PHY_SCR, 1076a3bdfce7SHeiner Kallweit MII_M1011_PHY_SCR_DOWNSHIFT_EN | 1077f8d975beSHeiner Kallweit MII_M1011_PHY_SCR_DOWNSHIFT_MASK, 1078a3bdfce7SHeiner Kallweit val); 1079a3bdfce7SHeiner Kallweit } 1080a3bdfce7SHeiner Kallweit 1081990875b2SMaxim Kochetkov if (err < 0) 1082990875b2SMaxim Kochetkov return err; 1083990875b2SMaxim Kochetkov 1084990875b2SMaxim Kochetkov return genphy_soft_reset(phydev); 1085990875b2SMaxim Kochetkov } 1086990875b2SMaxim Kochetkov 1087911af5e1SHeiner Kallweit static int m88e1011_get_tunable(struct phy_device *phydev, 1088a3bdfce7SHeiner Kallweit struct ethtool_tunable *tuna, void *data) 1089a3bdfce7SHeiner Kallweit { 1090a3bdfce7SHeiner Kallweit switch (tuna->id) { 1091a3bdfce7SHeiner Kallweit case ETHTOOL_PHY_DOWNSHIFT: 1092911af5e1SHeiner Kallweit return m88e1011_get_downshift(phydev, data); 1093a3bdfce7SHeiner Kallweit default: 1094a3bdfce7SHeiner Kallweit return -EOPNOTSUPP; 1095a3bdfce7SHeiner Kallweit } 1096a3bdfce7SHeiner Kallweit } 1097a3bdfce7SHeiner Kallweit 1098911af5e1SHeiner Kallweit static int m88e1011_set_tunable(struct phy_device *phydev, 1099a3bdfce7SHeiner Kallweit struct ethtool_tunable *tuna, const void *data) 1100a3bdfce7SHeiner Kallweit { 1101a3bdfce7SHeiner Kallweit switch (tuna->id) { 1102a3bdfce7SHeiner Kallweit case ETHTOOL_PHY_DOWNSHIFT: 1103911af5e1SHeiner Kallweit return m88e1011_set_downshift(phydev, *(const u8 *)data); 1104a3bdfce7SHeiner Kallweit default: 1105a3bdfce7SHeiner Kallweit return -EOPNOTSUPP; 1106a3bdfce7SHeiner Kallweit } 1107a3bdfce7SHeiner Kallweit } 1108a3bdfce7SHeiner Kallweit 11098385b1f0SMaxim Kochetkov static int m88e1112_config_init(struct phy_device *phydev) 11108385b1f0SMaxim Kochetkov { 11118385b1f0SMaxim Kochetkov int err; 11128385b1f0SMaxim Kochetkov 11138385b1f0SMaxim Kochetkov err = m88e1011_set_downshift(phydev, 3); 11148385b1f0SMaxim Kochetkov if (err < 0) 11158385b1f0SMaxim Kochetkov return err; 11168385b1f0SMaxim Kochetkov 11178385b1f0SMaxim Kochetkov return m88e1111_config_init(phydev); 11188385b1f0SMaxim Kochetkov } 11198385b1f0SMaxim Kochetkov 11208385b1f0SMaxim Kochetkov static int m88e1111gbe_config_init(struct phy_device *phydev) 11218385b1f0SMaxim Kochetkov { 11228385b1f0SMaxim Kochetkov int err; 11238385b1f0SMaxim Kochetkov 11248385b1f0SMaxim Kochetkov err = m88e1111_set_downshift(phydev, 3); 11258385b1f0SMaxim Kochetkov if (err < 0) 11268385b1f0SMaxim Kochetkov return err; 11278385b1f0SMaxim Kochetkov 11288385b1f0SMaxim Kochetkov return m88e1111_config_init(phydev); 11298385b1f0SMaxim Kochetkov } 11308385b1f0SMaxim Kochetkov 11318385b1f0SMaxim Kochetkov static int marvell_1011gbe_config_init(struct phy_device *phydev) 11328385b1f0SMaxim Kochetkov { 11338385b1f0SMaxim Kochetkov int err; 11348385b1f0SMaxim Kochetkov 11358385b1f0SMaxim Kochetkov err = m88e1011_set_downshift(phydev, 3); 11368385b1f0SMaxim Kochetkov if (err < 0) 11378385b1f0SMaxim Kochetkov return err; 11388385b1f0SMaxim Kochetkov 11398385b1f0SMaxim Kochetkov return marvell_config_init(phydev); 11408385b1f0SMaxim Kochetkov } 1141e2d861ccSHeiner Kallweit static int m88e1116r_config_init(struct phy_device *phydev) 1142e2d861ccSHeiner Kallweit { 1143e2d861ccSHeiner Kallweit int err; 1144e2d861ccSHeiner Kallweit 1145e2d861ccSHeiner Kallweit err = genphy_soft_reset(phydev); 1146e2d861ccSHeiner Kallweit if (err < 0) 1147e2d861ccSHeiner Kallweit return err; 1148e2d861ccSHeiner Kallweit 1149e2d861ccSHeiner Kallweit msleep(500); 1150e2d861ccSHeiner Kallweit 1151e2d861ccSHeiner Kallweit err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1152e2d861ccSHeiner Kallweit if (err < 0) 1153e2d861ccSHeiner Kallweit return err; 1154e2d861ccSHeiner Kallweit 1155e2d861ccSHeiner Kallweit err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1156e2d861ccSHeiner Kallweit if (err < 0) 1157e2d861ccSHeiner Kallweit return err; 1158e2d861ccSHeiner Kallweit 1159911af5e1SHeiner Kallweit err = m88e1011_set_downshift(phydev, 8); 1160e2d861ccSHeiner Kallweit if (err < 0) 1161e2d861ccSHeiner Kallweit return err; 1162e2d861ccSHeiner Kallweit 1163e2d861ccSHeiner Kallweit if (phy_interface_is_rgmii(phydev)) { 1164e2d861ccSHeiner Kallweit err = m88e1121_config_aneg_rgmii_delays(phydev); 1165e2d861ccSHeiner Kallweit if (err < 0) 1166e2d861ccSHeiner Kallweit return err; 1167e2d861ccSHeiner Kallweit } 1168e2d861ccSHeiner Kallweit 1169e2d861ccSHeiner Kallweit err = genphy_soft_reset(phydev); 1170e2d861ccSHeiner Kallweit if (err < 0) 1171e2d861ccSHeiner Kallweit return err; 1172e2d861ccSHeiner Kallweit 1173e2d861ccSHeiner Kallweit return marvell_config_init(phydev); 1174e2d861ccSHeiner Kallweit } 1175e2d861ccSHeiner Kallweit 1176dd9a122aSEsben Haabendal static int m88e1318_config_init(struct phy_device *phydev) 1177dd9a122aSEsben Haabendal { 1178dd9a122aSEsben Haabendal if (phy_interrupt_is_valid(phydev)) { 1179dd9a122aSEsben Haabendal int err = phy_modify_paged( 1180dd9a122aSEsben Haabendal phydev, MII_MARVELL_LED_PAGE, 1181dd9a122aSEsben Haabendal MII_88E1318S_PHY_LED_TCR, 1182dd9a122aSEsben Haabendal MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1183dd9a122aSEsben Haabendal MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1184dd9a122aSEsben Haabendal MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1185dd9a122aSEsben Haabendal if (err < 0) 1186dd9a122aSEsben Haabendal return err; 1187dd9a122aSEsben Haabendal } 1188dd9a122aSEsben Haabendal 118907777246SWang Dongsheng return marvell_config_init(phydev); 1190dd9a122aSEsben Haabendal } 1191dd9a122aSEsben Haabendal 1192407353ecSClemens Gruber static int m88e1510_config_init(struct phy_device *phydev) 1193407353ecSClemens Gruber { 119465a9dedcSLeszek Polak static const struct { 119565a9dedcSLeszek Polak u16 reg17, reg16; 119665a9dedcSLeszek Polak } errata_vals[] = { 119765a9dedcSLeszek Polak { 0x214b, 0x2144 }, 119865a9dedcSLeszek Polak { 0x0c28, 0x2146 }, 119965a9dedcSLeszek Polak { 0xb233, 0x214d }, 120065a9dedcSLeszek Polak { 0xcc0c, 0x2159 }, 120165a9dedcSLeszek Polak }; 1202407353ecSClemens Gruber int err; 120365a9dedcSLeszek Polak int i; 120465a9dedcSLeszek Polak 120565a9dedcSLeszek Polak /* As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/ 120665a9dedcSLeszek Polak * 88E1514 Rev A0, Errata Section 5.1: 120765a9dedcSLeszek Polak * If EEE is intended to be used, the following register writes 120865a9dedcSLeszek Polak * must be done once after every hardware reset. 120965a9dedcSLeszek Polak */ 121065a9dedcSLeszek Polak err = marvell_set_page(phydev, 0x00FF); 121165a9dedcSLeszek Polak if (err < 0) 121265a9dedcSLeszek Polak return err; 121365a9dedcSLeszek Polak 121465a9dedcSLeszek Polak for (i = 0; i < ARRAY_SIZE(errata_vals); ++i) { 121565a9dedcSLeszek Polak err = phy_write(phydev, 17, errata_vals[i].reg17); 121665a9dedcSLeszek Polak if (err) 121765a9dedcSLeszek Polak return err; 121865a9dedcSLeszek Polak err = phy_write(phydev, 16, errata_vals[i].reg16); 121965a9dedcSLeszek Polak if (err) 122065a9dedcSLeszek Polak return err; 122165a9dedcSLeszek Polak } 122265a9dedcSLeszek Polak 122365a9dedcSLeszek Polak err = marvell_set_page(phydev, 0x00FB); 122465a9dedcSLeszek Polak if (err < 0) 122565a9dedcSLeszek Polak return err; 122665a9dedcSLeszek Polak err = phy_write(phydev, 07, 0xC00D); 122765a9dedcSLeszek Polak if (err < 0) 122865a9dedcSLeszek Polak return err; 122965a9dedcSLeszek Polak err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 123065a9dedcSLeszek Polak if (err < 0) 123165a9dedcSLeszek Polak return err; 1232407353ecSClemens Gruber 1233407353ecSClemens Gruber /* SGMII-to-Copper mode initialization */ 1234407353ecSClemens Gruber if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1235407353ecSClemens Gruber /* Select page 18 */ 12366427bb2dSAndrew Lunn err = marvell_set_page(phydev, 18); 1237407353ecSClemens Gruber if (err < 0) 1238407353ecSClemens Gruber return err; 1239407353ecSClemens Gruber 1240407353ecSClemens Gruber /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 1241fea23fb5SRussell King err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 1242f102852fSRussell King MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 1243fea23fb5SRussell King MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 1244407353ecSClemens Gruber if (err < 0) 1245407353ecSClemens Gruber return err; 1246407353ecSClemens Gruber 1247407353ecSClemens Gruber /* PHY reset is necessary after changing MODE[2:0] */ 1248832913c3SYejune Deng err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 1249fea23fb5SRussell King MII_88E1510_GEN_CTRL_REG_1_RESET); 1250407353ecSClemens Gruber if (err < 0) 1251407353ecSClemens Gruber return err; 1252407353ecSClemens Gruber 1253407353ecSClemens Gruber /* Reset page selection */ 125452295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1255407353ecSClemens Gruber if (err < 0) 1256407353ecSClemens Gruber return err; 1257407353ecSClemens Gruber } 12588385b1f0SMaxim Kochetkov err = m88e1011_set_downshift(phydev, 3); 12598385b1f0SMaxim Kochetkov if (err < 0) 12608385b1f0SMaxim Kochetkov return err; 1261407353ecSClemens Gruber 1262dd9a122aSEsben Haabendal return m88e1318_config_init(phydev); 1263407353ecSClemens Gruber } 1264407353ecSClemens Gruber 1265605f196eSRon Madrid static int m88e1118_config_aneg(struct phy_device *phydev) 1266605f196eSRon Madrid { 1267605f196eSRon Madrid int err; 1268605f196eSRon Madrid 1269fecd5e91SAndrew Lunn err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1270605f196eSRon Madrid if (err < 0) 1271605f196eSRon Madrid return err; 1272605f196eSRon Madrid 1273605f196eSRon Madrid err = genphy_config_aneg(phydev); 1274aec12836SPavel Parkhomenko if (err < 0) 1275aec12836SPavel Parkhomenko return err; 1276aec12836SPavel Parkhomenko 1277aec12836SPavel Parkhomenko return genphy_soft_reset(phydev); 1278605f196eSRon Madrid } 1279605f196eSRon Madrid 1280605f196eSRon Madrid static int m88e1118_config_init(struct phy_device *phydev) 1281605f196eSRon Madrid { 12825b8f9703SRussell King (Oracle) u16 leds; 1283605f196eSRon Madrid int err; 1284605f196eSRon Madrid 1285605f196eSRon Madrid /* Enable 1000 Mbit */ 12865b8f9703SRussell King (Oracle) err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE, 12875b8f9703SRussell King (Oracle) MII_88E1121_PHY_MSCR_REG, 0x1070); 1288605f196eSRon Madrid if (err < 0) 1289605f196eSRon Madrid return err; 1290605f196eSRon Madrid 1291f22725c9SRussell King (Oracle) if (phy_interface_is_rgmii(phydev)) { 1292f22725c9SRussell King (Oracle) err = m88e1121_config_aneg_rgmii_delays(phydev); 1293f22725c9SRussell King (Oracle) if (err < 0) 1294f22725c9SRussell King (Oracle) return err; 1295f22725c9SRussell King (Oracle) } 1296f22725c9SRussell King (Oracle) 1297605f196eSRon Madrid /* Adjust LED Control */ 12982f495c39SBenjamin Herrenschmidt if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 12995b8f9703SRussell King (Oracle) leds = 0x1100; 13002f495c39SBenjamin Herrenschmidt else 13015b8f9703SRussell King (Oracle) leds = 0x021e; 13025b8f9703SRussell King (Oracle) 13035b8f9703SRussell King (Oracle) err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds); 1304605f196eSRon Madrid if (err < 0) 1305605f196eSRon Madrid return err; 1306605f196eSRon Madrid 1307cf41a51dSDavid Daney err = marvell_of_reg_init(phydev); 1308cf41a51dSDavid Daney if (err < 0) 1309cf41a51dSDavid Daney return err; 1310cf41a51dSDavid Daney 13115b8f9703SRussell King (Oracle) /* Reset page register */ 131252295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1313605f196eSRon Madrid if (err < 0) 1314605f196eSRon Madrid return err; 1315605f196eSRon Madrid 131634386344SAndrew Lunn return genphy_soft_reset(phydev); 1317605f196eSRon Madrid } 1318605f196eSRon Madrid 131990600732SDavid Daney static int m88e1149_config_init(struct phy_device *phydev) 132090600732SDavid Daney { 132190600732SDavid Daney int err; 132290600732SDavid Daney 132390600732SDavid Daney /* Change address */ 132452295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 132590600732SDavid Daney if (err < 0) 132690600732SDavid Daney return err; 132790600732SDavid Daney 132890600732SDavid Daney /* Enable 1000 Mbit */ 132990600732SDavid Daney err = phy_write(phydev, 0x15, 0x1048); 133090600732SDavid Daney if (err < 0) 133190600732SDavid Daney return err; 133290600732SDavid Daney 1333cf41a51dSDavid Daney err = marvell_of_reg_init(phydev); 1334cf41a51dSDavid Daney if (err < 0) 1335cf41a51dSDavid Daney return err; 1336cf41a51dSDavid Daney 133790600732SDavid Daney /* Reset address */ 133852295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 133990600732SDavid Daney if (err < 0) 134090600732SDavid Daney return err; 134190600732SDavid Daney 134234386344SAndrew Lunn return genphy_soft_reset(phydev); 134390600732SDavid Daney } 134490600732SDavid Daney 1345e1dde8dcSAndrew Lunn static int m88e1145_config_init_rgmii(struct phy_device *phydev) 134676884679SAndy Fleming { 134776884679SAndy Fleming int err; 1348e69d9ed4SAndrew Lunn 134961111598SAndrew Lunn err = m88e1111_config_init_rgmii_delays(phydev); 135076884679SAndy Fleming if (err < 0) 135176884679SAndy Fleming return err; 135276884679SAndy Fleming 13532f495c39SBenjamin Herrenschmidt if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 135476884679SAndy Fleming err = phy_write(phydev, 0x1d, 0x0012); 135576884679SAndy Fleming if (err < 0) 135676884679SAndy Fleming return err; 135776884679SAndy Fleming 1358f102852fSRussell King err = phy_modify(phydev, 0x1e, 0x0fc0, 1359fea23fb5SRussell King 2 << 9 | /* 36 ohm */ 1360fea23fb5SRussell King 2 << 6); /* 39 ohm */ 136176884679SAndy Fleming if (err < 0) 136276884679SAndy Fleming return err; 136376884679SAndy Fleming 136476884679SAndy Fleming err = phy_write(phydev, 0x1d, 0x3); 136576884679SAndy Fleming if (err < 0) 136676884679SAndy Fleming return err; 136776884679SAndy Fleming 136876884679SAndy Fleming err = phy_write(phydev, 0x1e, 0x8000); 1369e1dde8dcSAndrew Lunn } 137076884679SAndy Fleming return err; 137176884679SAndy Fleming } 137276884679SAndy Fleming 1373e1dde8dcSAndrew Lunn static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1374e1dde8dcSAndrew Lunn { 1375865b813aSAndrew Lunn return m88e1111_config_init_hwcfg_mode( 1376865b813aSAndrew Lunn phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1377865b813aSAndrew Lunn MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1378e1dde8dcSAndrew Lunn } 1379e1dde8dcSAndrew Lunn 1380e1dde8dcSAndrew Lunn static int m88e1145_config_init(struct phy_device *phydev) 1381e1dde8dcSAndrew Lunn { 1382e1dde8dcSAndrew Lunn int err; 1383e1dde8dcSAndrew Lunn 1384e1dde8dcSAndrew Lunn /* Take care of errata E0 & E1 */ 1385e1dde8dcSAndrew Lunn err = phy_write(phydev, 0x1d, 0x001b); 1386e1dde8dcSAndrew Lunn if (err < 0) 1387e1dde8dcSAndrew Lunn return err; 1388e1dde8dcSAndrew Lunn 1389e1dde8dcSAndrew Lunn err = phy_write(phydev, 0x1e, 0x418f); 1390e1dde8dcSAndrew Lunn if (err < 0) 1391e1dde8dcSAndrew Lunn return err; 1392e1dde8dcSAndrew Lunn 1393e1dde8dcSAndrew Lunn err = phy_write(phydev, 0x1d, 0x0016); 1394e1dde8dcSAndrew Lunn if (err < 0) 1395e1dde8dcSAndrew Lunn return err; 1396e1dde8dcSAndrew Lunn 1397e1dde8dcSAndrew Lunn err = phy_write(phydev, 0x1e, 0xa2da); 1398e1dde8dcSAndrew Lunn if (err < 0) 1399e1dde8dcSAndrew Lunn return err; 1400e1dde8dcSAndrew Lunn 1401e1dde8dcSAndrew Lunn if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1402e1dde8dcSAndrew Lunn err = m88e1145_config_init_rgmii(phydev); 1403e1dde8dcSAndrew Lunn if (err < 0) 1404e1dde8dcSAndrew Lunn return err; 1405e1dde8dcSAndrew Lunn } 1406e1dde8dcSAndrew Lunn 1407e1dde8dcSAndrew Lunn if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1408e1dde8dcSAndrew Lunn err = m88e1145_config_init_sgmii(phydev); 1409b0224175SViet Nga Dao if (err < 0) 1410b0224175SViet Nga Dao return err; 1411b0224175SViet Nga Dao } 14128385b1f0SMaxim Kochetkov err = m88e1111_set_downshift(phydev, 3); 14138385b1f0SMaxim Kochetkov if (err < 0) 14148385b1f0SMaxim Kochetkov return err; 1415b0224175SViet Nga Dao 1416cf41a51dSDavid Daney err = marvell_of_reg_init(phydev); 1417cf41a51dSDavid Daney if (err < 0) 1418cf41a51dSDavid Daney return err; 1419cf41a51dSDavid Daney 142076884679SAndy Fleming return 0; 142176884679SAndy Fleming } 142200db8189SAndy Fleming 142369f42be8SHeiner Kallweit static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) 142469f42be8SHeiner Kallweit { 142569f42be8SHeiner Kallweit int val; 142669f42be8SHeiner Kallweit 142769f42be8SHeiner Kallweit val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); 142869f42be8SHeiner Kallweit if (val < 0) 142969f42be8SHeiner Kallweit return val; 143069f42be8SHeiner Kallweit 143169f42be8SHeiner Kallweit if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { 143269f42be8SHeiner Kallweit *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; 143369f42be8SHeiner Kallweit return 0; 143469f42be8SHeiner Kallweit } 143569f42be8SHeiner Kallweit 143669f42be8SHeiner Kallweit val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 143769f42be8SHeiner Kallweit 143869f42be8SHeiner Kallweit switch (val) { 143969f42be8SHeiner Kallweit case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: 144069f42be8SHeiner Kallweit *msecs = 0; 144169f42be8SHeiner Kallweit break; 144269f42be8SHeiner Kallweit case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: 144369f42be8SHeiner Kallweit *msecs = 10; 144469f42be8SHeiner Kallweit break; 144569f42be8SHeiner Kallweit case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: 144669f42be8SHeiner Kallweit *msecs = 20; 144769f42be8SHeiner Kallweit break; 144869f42be8SHeiner Kallweit case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: 144969f42be8SHeiner Kallweit *msecs = 40; 145069f42be8SHeiner Kallweit break; 145169f42be8SHeiner Kallweit default: 145269f42be8SHeiner Kallweit return -EINVAL; 145369f42be8SHeiner Kallweit } 145469f42be8SHeiner Kallweit 145569f42be8SHeiner Kallweit return 0; 145669f42be8SHeiner Kallweit } 145769f42be8SHeiner Kallweit 145869f42be8SHeiner Kallweit static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) 145969f42be8SHeiner Kallweit { 146069f42be8SHeiner Kallweit struct ethtool_eee eee; 146169f42be8SHeiner Kallweit int val, ret; 146269f42be8SHeiner Kallweit 146369f42be8SHeiner Kallweit if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) 146469f42be8SHeiner Kallweit return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, 146569f42be8SHeiner Kallweit MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 146669f42be8SHeiner Kallweit 146769f42be8SHeiner Kallweit /* According to the Marvell data sheet EEE must be disabled for 146869f42be8SHeiner Kallweit * Fast Link Down detection to work properly 146969f42be8SHeiner Kallweit */ 147069f42be8SHeiner Kallweit ret = phy_ethtool_get_eee(phydev, &eee); 147169f42be8SHeiner Kallweit if (!ret && eee.eee_enabled) { 147269f42be8SHeiner Kallweit phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); 147369f42be8SHeiner Kallweit return -EBUSY; 147469f42be8SHeiner Kallweit } 147569f42be8SHeiner Kallweit 147669f42be8SHeiner Kallweit if (*msecs <= 5) 147769f42be8SHeiner Kallweit val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; 147869f42be8SHeiner Kallweit else if (*msecs <= 15) 147969f42be8SHeiner Kallweit val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; 148069f42be8SHeiner Kallweit else if (*msecs <= 30) 148169f42be8SHeiner Kallweit val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; 148269f42be8SHeiner Kallweit else 148369f42be8SHeiner Kallweit val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; 148469f42be8SHeiner Kallweit 148569f42be8SHeiner Kallweit val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 148669f42be8SHeiner Kallweit 148769f42be8SHeiner Kallweit ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, 148869f42be8SHeiner Kallweit MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 148969f42be8SHeiner Kallweit if (ret) 149069f42be8SHeiner Kallweit return ret; 149169f42be8SHeiner Kallweit 149269f42be8SHeiner Kallweit return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, 149369f42be8SHeiner Kallweit MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 149469f42be8SHeiner Kallweit } 149569f42be8SHeiner Kallweit 149669f42be8SHeiner Kallweit static int m88e1540_get_tunable(struct phy_device *phydev, 149769f42be8SHeiner Kallweit struct ethtool_tunable *tuna, void *data) 149869f42be8SHeiner Kallweit { 149969f42be8SHeiner Kallweit switch (tuna->id) { 150069f42be8SHeiner Kallweit case ETHTOOL_PHY_FAST_LINK_DOWN: 150169f42be8SHeiner Kallweit return m88e1540_get_fld(phydev, data); 1502a3bdfce7SHeiner Kallweit case ETHTOOL_PHY_DOWNSHIFT: 1503911af5e1SHeiner Kallweit return m88e1011_get_downshift(phydev, data); 150469f42be8SHeiner Kallweit default: 150569f42be8SHeiner Kallweit return -EOPNOTSUPP; 150669f42be8SHeiner Kallweit } 150769f42be8SHeiner Kallweit } 150869f42be8SHeiner Kallweit 150969f42be8SHeiner Kallweit static int m88e1540_set_tunable(struct phy_device *phydev, 151069f42be8SHeiner Kallweit struct ethtool_tunable *tuna, const void *data) 151169f42be8SHeiner Kallweit { 151269f42be8SHeiner Kallweit switch (tuna->id) { 151369f42be8SHeiner Kallweit case ETHTOOL_PHY_FAST_LINK_DOWN: 151469f42be8SHeiner Kallweit return m88e1540_set_fld(phydev, data); 1515a3bdfce7SHeiner Kallweit case ETHTOOL_PHY_DOWNSHIFT: 1516911af5e1SHeiner Kallweit return m88e1011_set_downshift(phydev, *(const u8 *)data); 151769f42be8SHeiner Kallweit default: 151869f42be8SHeiner Kallweit return -EOPNOTSUPP; 151969f42be8SHeiner Kallweit } 152069f42be8SHeiner Kallweit } 152169f42be8SHeiner Kallweit 15228cbcdc1aSAndrew Lunn /* The VOD can be out of specification on link up. Poke an 15238cbcdc1aSAndrew Lunn * undocumented register, in an undocumented page, with a magic value 15248cbcdc1aSAndrew Lunn * to fix this. 15258cbcdc1aSAndrew Lunn */ 15268cbcdc1aSAndrew Lunn static int m88e6390_errata(struct phy_device *phydev) 15278cbcdc1aSAndrew Lunn { 15288cbcdc1aSAndrew Lunn int err; 15298cbcdc1aSAndrew Lunn 15308cbcdc1aSAndrew Lunn err = phy_write(phydev, MII_BMCR, 15318cbcdc1aSAndrew Lunn BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 15328cbcdc1aSAndrew Lunn if (err) 15338cbcdc1aSAndrew Lunn return err; 15348cbcdc1aSAndrew Lunn 15358cbcdc1aSAndrew Lunn usleep_range(300, 400); 15368cbcdc1aSAndrew Lunn 15378cbcdc1aSAndrew Lunn err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 15388cbcdc1aSAndrew Lunn if (err) 15398cbcdc1aSAndrew Lunn return err; 15408cbcdc1aSAndrew Lunn 15418cbcdc1aSAndrew Lunn return genphy_soft_reset(phydev); 15428cbcdc1aSAndrew Lunn } 15438cbcdc1aSAndrew Lunn 15448cbcdc1aSAndrew Lunn static int m88e6390_config_aneg(struct phy_device *phydev) 15458cbcdc1aSAndrew Lunn { 15468cbcdc1aSAndrew Lunn int err; 15478cbcdc1aSAndrew Lunn 15488cbcdc1aSAndrew Lunn err = m88e6390_errata(phydev); 15498cbcdc1aSAndrew Lunn if (err) 15508cbcdc1aSAndrew Lunn return err; 15518cbcdc1aSAndrew Lunn 15528cbcdc1aSAndrew Lunn return m88e1510_config_aneg(phydev); 15538cbcdc1aSAndrew Lunn } 15548cbcdc1aSAndrew Lunn 15556cfb3bccSCharles-Antoine Couret /** 1556ab9cb729SAndrew Lunn * fiber_lpa_mod_linkmode_lpa_t 1557c0ec3c27SAndrew Lunn * @advertising: the linkmode advertisement settings 15586cfb3bccSCharles-Antoine Couret * @lpa: value of the MII_LPA register for fiber link 1559be937f1fSAlexandr Smirnov * 1560ab9cb729SAndrew Lunn * A small helper function that translates MII_LPA bits to linkmode LP 1561ab9cb729SAndrew Lunn * advertisement settings. Other bits in advertising are left 1562ab9cb729SAndrew Lunn * unchanged. 15636cfb3bccSCharles-Antoine Couret */ 1564ab9cb729SAndrew Lunn static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 15656cfb3bccSCharles-Antoine Couret { 1566ab9cb729SAndrew Lunn linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 156720ecf424SRussell King advertising, lpa & LPA_1000XHALF); 1568ab9cb729SAndrew Lunn 1569ab9cb729SAndrew Lunn linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 157020ecf424SRussell King advertising, lpa & LPA_1000XFULL); 15716cfb3bccSCharles-Antoine Couret } 15726cfb3bccSCharles-Antoine Couret 1573e1dde8dcSAndrew Lunn static int marvell_read_status_page_an(struct phy_device *phydev, 1574d2004e27SRussell King int fiber, int status) 1575be937f1fSAlexandr Smirnov { 1576be937f1fSAlexandr Smirnov int lpa; 1577fcf1f59aSRussell King int err; 1578be937f1fSAlexandr Smirnov 15793b72f84fSClemens Gruber if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) { 15803b72f84fSClemens Gruber phydev->link = 0; 15813b72f84fSClemens Gruber return 0; 15823b72f84fSClemens Gruber } 15833b72f84fSClemens Gruber 15843b72f84fSClemens Gruber if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 15853b72f84fSClemens Gruber phydev->duplex = DUPLEX_FULL; 15863b72f84fSClemens Gruber else 15873b72f84fSClemens Gruber phydev->duplex = DUPLEX_HALF; 15883b72f84fSClemens Gruber 15893b72f84fSClemens Gruber switch (status & MII_M1011_PHY_STATUS_SPD_MASK) { 15903b72f84fSClemens Gruber case MII_M1011_PHY_STATUS_1000: 15913b72f84fSClemens Gruber phydev->speed = SPEED_1000; 15923b72f84fSClemens Gruber break; 15933b72f84fSClemens Gruber 15943b72f84fSClemens Gruber case MII_M1011_PHY_STATUS_100: 15953b72f84fSClemens Gruber phydev->speed = SPEED_100; 15963b72f84fSClemens Gruber break; 15973b72f84fSClemens Gruber 15983b72f84fSClemens Gruber default: 15993b72f84fSClemens Gruber phydev->speed = SPEED_10; 16003b72f84fSClemens Gruber break; 16013b72f84fSClemens Gruber } 16023b72f84fSClemens Gruber 1603fcf1f59aSRussell King if (!fiber) { 1604fcf1f59aSRussell King err = genphy_read_lpa(phydev); 1605fcf1f59aSRussell King if (err < 0) 1606fcf1f59aSRussell King return err; 1607fcf1f59aSRussell King 1608fcf1f59aSRussell King phy_resolve_aneg_pause(phydev); 1609fcf1f59aSRussell King } else { 1610be937f1fSAlexandr Smirnov lpa = phy_read(phydev, MII_LPA); 1611be937f1fSAlexandr Smirnov if (lpa < 0) 1612be937f1fSAlexandr Smirnov return lpa; 1613be937f1fSAlexandr Smirnov 16146cfb3bccSCharles-Antoine Couret /* The fiber link is only 1000M capable */ 1615ab9cb729SAndrew Lunn fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 16166cfb3bccSCharles-Antoine Couret 16176cfb3bccSCharles-Antoine Couret if (phydev->duplex == DUPLEX_FULL) { 16186cfb3bccSCharles-Antoine Couret if (!(lpa & LPA_PAUSE_FIBER)) { 16196cfb3bccSCharles-Antoine Couret phydev->pause = 0; 16206cfb3bccSCharles-Antoine Couret phydev->asym_pause = 0; 16216cfb3bccSCharles-Antoine Couret } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 16226cfb3bccSCharles-Antoine Couret phydev->pause = 1; 16236cfb3bccSCharles-Antoine Couret phydev->asym_pause = 1; 16246cfb3bccSCharles-Antoine Couret } else { 16256cfb3bccSCharles-Antoine Couret phydev->pause = 1; 16266cfb3bccSCharles-Antoine Couret phydev->asym_pause = 0; 16276cfb3bccSCharles-Antoine Couret } 16286cfb3bccSCharles-Antoine Couret } 16296cfb3bccSCharles-Antoine Couret } 1630fcf1f59aSRussell King 1631e1dde8dcSAndrew Lunn return 0; 1632e1dde8dcSAndrew Lunn } 1633e1dde8dcSAndrew Lunn 1634e1dde8dcSAndrew Lunn /* marvell_read_status_page 1635e1dde8dcSAndrew Lunn * 1636e1dde8dcSAndrew Lunn * Description: 1637e1dde8dcSAndrew Lunn * Check the link, then figure out the current state 1638e1dde8dcSAndrew Lunn * by comparing what we advertise with what the link partner 1639e1dde8dcSAndrew Lunn * advertises. Start by checking the gigabit possibilities, 1640e1dde8dcSAndrew Lunn * then move on to 10/100. 1641e1dde8dcSAndrew Lunn */ 1642e1dde8dcSAndrew Lunn static int marvell_read_status_page(struct phy_device *phydev, int page) 1643e1dde8dcSAndrew Lunn { 1644d2004e27SRussell King int status; 1645e1dde8dcSAndrew Lunn int fiber; 1646e1dde8dcSAndrew Lunn int err; 1647e1dde8dcSAndrew Lunn 1648d2004e27SRussell King status = phy_read(phydev, MII_M1011_PHY_STATUS); 1649d2004e27SRussell King if (status < 0) 1650d2004e27SRussell King return status; 1651d2004e27SRussell King 1652d2004e27SRussell King /* Use the generic register for copper link status, 1653d2004e27SRussell King * and the PHY status register for fiber link status. 1654e1dde8dcSAndrew Lunn */ 1655d2004e27SRussell King if (page == MII_MARVELL_FIBER_PAGE) { 1656d2004e27SRussell King phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK); 1657d2004e27SRussell King } else { 1658d2004e27SRussell King err = genphy_update_link(phydev); 1659d2004e27SRussell King if (err) 1660d2004e27SRussell King return err; 1661d2004e27SRussell King } 1662d2004e27SRussell King 166352295666SAndrew Lunn if (page == MII_MARVELL_FIBER_PAGE) 1664e1dde8dcSAndrew Lunn fiber = 1; 1665e1dde8dcSAndrew Lunn else 1666e1dde8dcSAndrew Lunn fiber = 0; 1667e1dde8dcSAndrew Lunn 166898f92831SRussell King linkmode_zero(phydev->lp_advertising); 166998f92831SRussell King phydev->pause = 0; 167098f92831SRussell King phydev->asym_pause = 0; 1671b82cf17fSRussell King phydev->speed = SPEED_UNKNOWN; 1672b82cf17fSRussell King phydev->duplex = DUPLEX_UNKNOWN; 16734217a64eSMichael Walle phydev->port = fiber ? PORT_FIBRE : PORT_TP; 167498f92831SRussell King 1675e1dde8dcSAndrew Lunn if (phydev->autoneg == AUTONEG_ENABLE) 1676d2004e27SRussell King err = marvell_read_status_page_an(phydev, fiber, status); 1677e1dde8dcSAndrew Lunn else 167898f92831SRussell King err = genphy_read_status_fixed(phydev); 1679e1dde8dcSAndrew Lunn 1680e1dde8dcSAndrew Lunn return err; 1681e1dde8dcSAndrew Lunn } 1682e1dde8dcSAndrew Lunn 16836cfb3bccSCharles-Antoine Couret /* marvell_read_status 16846cfb3bccSCharles-Antoine Couret * 16856cfb3bccSCharles-Antoine Couret * Some Marvell's phys have two modes: fiber and copper. 16866cfb3bccSCharles-Antoine Couret * Both need status checked. 16876cfb3bccSCharles-Antoine Couret * Description: 16886cfb3bccSCharles-Antoine Couret * First, check the fiber link and status. 16896cfb3bccSCharles-Antoine Couret * If the fiber link is down, check the copper link and status which 16906cfb3bccSCharles-Antoine Couret * will be the default value if both link are down. 16916cfb3bccSCharles-Antoine Couret */ 16926cfb3bccSCharles-Antoine Couret static int marvell_read_status(struct phy_device *phydev) 16936cfb3bccSCharles-Antoine Couret { 16946cfb3bccSCharles-Antoine Couret int err; 16956cfb3bccSCharles-Antoine Couret 16966cfb3bccSCharles-Antoine Couret /* Check the fiber mode first */ 16973c1bcc86SAndrew Lunn if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 16983c1bcc86SAndrew Lunn phydev->supported) && 1699a13c0652SRussell King phydev->interface != PHY_INTERFACE_MODE_SGMII) { 170052295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 17016cfb3bccSCharles-Antoine Couret if (err < 0) 17026cfb3bccSCharles-Antoine Couret goto error; 17036cfb3bccSCharles-Antoine Couret 170452295666SAndrew Lunn err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 17056cfb3bccSCharles-Antoine Couret if (err < 0) 17066cfb3bccSCharles-Antoine Couret goto error; 17076cfb3bccSCharles-Antoine Couret 17080c3439bcSAndrew Lunn /* If the fiber link is up, it is the selected and 17090c3439bcSAndrew Lunn * used link. In this case, we need to stay in the 17100c3439bcSAndrew Lunn * fiber page. Please to be careful about that, avoid 17110c3439bcSAndrew Lunn * to restore Copper page in other functions which 17120c3439bcSAndrew Lunn * could break the behaviour for some fiber phy like 17130c3439bcSAndrew Lunn * 88E1512. 17140c3439bcSAndrew Lunn */ 17156cfb3bccSCharles-Antoine Couret if (phydev->link) 17166cfb3bccSCharles-Antoine Couret return 0; 17176cfb3bccSCharles-Antoine Couret 17186cfb3bccSCharles-Antoine Couret /* If fiber link is down, check and save copper mode state */ 171952295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 17206cfb3bccSCharles-Antoine Couret if (err < 0) 17216cfb3bccSCharles-Antoine Couret goto error; 17226cfb3bccSCharles-Antoine Couret } 17236cfb3bccSCharles-Antoine Couret 172452295666SAndrew Lunn return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 17256cfb3bccSCharles-Antoine Couret 17266cfb3bccSCharles-Antoine Couret error: 172752295666SAndrew Lunn marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 17286cfb3bccSCharles-Antoine Couret return err; 17296cfb3bccSCharles-Antoine Couret } 17303758be3dSCharles-Antoine Couret 17313758be3dSCharles-Antoine Couret /* marvell_suspend 17323758be3dSCharles-Antoine Couret * 17333758be3dSCharles-Antoine Couret * Some Marvell's phys have two modes: fiber and copper. 17343758be3dSCharles-Antoine Couret * Both need to be suspended 17353758be3dSCharles-Antoine Couret */ 17363758be3dSCharles-Antoine Couret static int marvell_suspend(struct phy_device *phydev) 17373758be3dSCharles-Antoine Couret { 17383758be3dSCharles-Antoine Couret int err; 17393758be3dSCharles-Antoine Couret 17403758be3dSCharles-Antoine Couret /* Suspend the fiber mode first */ 1741837d9e49SKurt Cancemi if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 17423c1bcc86SAndrew Lunn phydev->supported)) { 174352295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 17443758be3dSCharles-Antoine Couret if (err < 0) 17453758be3dSCharles-Antoine Couret goto error; 17463758be3dSCharles-Antoine Couret 17473758be3dSCharles-Antoine Couret /* With the page set, use the generic suspend */ 17483758be3dSCharles-Antoine Couret err = genphy_suspend(phydev); 17493758be3dSCharles-Antoine Couret if (err < 0) 17503758be3dSCharles-Antoine Couret goto error; 17513758be3dSCharles-Antoine Couret 17523758be3dSCharles-Antoine Couret /* Then, the copper link */ 175352295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 17543758be3dSCharles-Antoine Couret if (err < 0) 17553758be3dSCharles-Antoine Couret goto error; 17563758be3dSCharles-Antoine Couret } 17573758be3dSCharles-Antoine Couret 17583758be3dSCharles-Antoine Couret /* With the page set, use the generic suspend */ 17593758be3dSCharles-Antoine Couret return genphy_suspend(phydev); 17603758be3dSCharles-Antoine Couret 17613758be3dSCharles-Antoine Couret error: 176252295666SAndrew Lunn marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 17633758be3dSCharles-Antoine Couret return err; 17643758be3dSCharles-Antoine Couret } 17653758be3dSCharles-Antoine Couret 17663758be3dSCharles-Antoine Couret /* marvell_resume 17673758be3dSCharles-Antoine Couret * 17683758be3dSCharles-Antoine Couret * Some Marvell's phys have two modes: fiber and copper. 17693758be3dSCharles-Antoine Couret * Both need to be resumed 17703758be3dSCharles-Antoine Couret */ 17713758be3dSCharles-Antoine Couret static int marvell_resume(struct phy_device *phydev) 17723758be3dSCharles-Antoine Couret { 17733758be3dSCharles-Antoine Couret int err; 17743758be3dSCharles-Antoine Couret 17753758be3dSCharles-Antoine Couret /* Resume the fiber mode first */ 1776837d9e49SKurt Cancemi if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 17773c1bcc86SAndrew Lunn phydev->supported)) { 177852295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 17793758be3dSCharles-Antoine Couret if (err < 0) 17803758be3dSCharles-Antoine Couret goto error; 17813758be3dSCharles-Antoine Couret 17823758be3dSCharles-Antoine Couret /* With the page set, use the generic resume */ 17833758be3dSCharles-Antoine Couret err = genphy_resume(phydev); 17843758be3dSCharles-Antoine Couret if (err < 0) 17853758be3dSCharles-Antoine Couret goto error; 17863758be3dSCharles-Antoine Couret 17873758be3dSCharles-Antoine Couret /* Then, the copper link */ 178852295666SAndrew Lunn err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 17893758be3dSCharles-Antoine Couret if (err < 0) 17903758be3dSCharles-Antoine Couret goto error; 17913758be3dSCharles-Antoine Couret } 17923758be3dSCharles-Antoine Couret 17933758be3dSCharles-Antoine Couret /* With the page set, use the generic resume */ 17943758be3dSCharles-Antoine Couret return genphy_resume(phydev); 17953758be3dSCharles-Antoine Couret 17963758be3dSCharles-Antoine Couret error: 179752295666SAndrew Lunn marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 17983758be3dSCharles-Antoine Couret return err; 17993758be3dSCharles-Antoine Couret } 18003758be3dSCharles-Antoine Couret 18016b358aedSSebastian Hesselbarth static int marvell_aneg_done(struct phy_device *phydev) 18026b358aedSSebastian Hesselbarth { 18036b358aedSSebastian Hesselbarth int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1804e69d9ed4SAndrew Lunn 18056b358aedSSebastian Hesselbarth return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 18066b358aedSSebastian Hesselbarth } 18076b358aedSSebastian Hesselbarth 180823beb38fSAndrew Lunn static void m88e1318_get_wol(struct phy_device *phydev, 180923beb38fSAndrew Lunn struct ethtool_wolinfo *wol) 18103871c387SMichael Stapelberg { 1811f4f9dcc3SJisheng Zhang int ret; 1812424ca4c5SRussell King 18136164659fSSong Yoong Siang wol->supported = WAKE_MAGIC | WAKE_PHY; 18143871c387SMichael Stapelberg wol->wolopts = 0; 18153871c387SMichael Stapelberg 1816f4f9dcc3SJisheng Zhang ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE, 1817f4f9dcc3SJisheng Zhang MII_88E1318S_PHY_WOL_CTRL); 18186164659fSSong Yoong Siang if (ret < 0) 18196164659fSSong Yoong Siang return; 18206164659fSSong Yoong Siang 18216164659fSSong Yoong Siang if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 18223871c387SMichael Stapelberg wol->wolopts |= WAKE_MAGIC; 18236164659fSSong Yoong Siang 18246164659fSSong Yoong Siang if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE) 18256164659fSSong Yoong Siang wol->wolopts |= WAKE_PHY; 18263871c387SMichael Stapelberg } 18273871c387SMichael Stapelberg 182823beb38fSAndrew Lunn static int m88e1318_set_wol(struct phy_device *phydev, 182923beb38fSAndrew Lunn struct ethtool_wolinfo *wol) 18303871c387SMichael Stapelberg { 1831424ca4c5SRussell King int err = 0, oldpage; 18323871c387SMichael Stapelberg 1833424ca4c5SRussell King oldpage = phy_save_page(phydev); 1834424ca4c5SRussell King if (oldpage < 0) 1835424ca4c5SRussell King goto error; 18363871c387SMichael Stapelberg 18376164659fSSong Yoong Siang if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) { 18383871c387SMichael Stapelberg /* Explicitly switch to page 0x00, just to be sure */ 1839424ca4c5SRussell King err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 18403871c387SMichael Stapelberg if (err < 0) 1841424ca4c5SRussell King goto error; 18423871c387SMichael Stapelberg 1843b6a930faSJingju Hou /* If WOL event happened once, the LED[2] interrupt pin 1844b6a930faSJingju Hou * will not be cleared unless we reading the interrupt status 1845b6a930faSJingju Hou * register. If interrupts are in use, the normal interrupt 1846b6a930faSJingju Hou * handling will clear the WOL event. Clear the WOL event 1847b6a930faSJingju Hou * before enabling it if !phy_interrupt_is_valid() 1848b6a930faSJingju Hou */ 1849b6a930faSJingju Hou if (!phy_interrupt_is_valid(phydev)) 1850e0a7328fSAndrew Lunn __phy_read(phydev, MII_M1011_IEVENT); 1851b6a930faSJingju Hou 18523871c387SMichael Stapelberg /* Enable the WOL interrupt */ 1853832913c3SYejune Deng err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER, 1854424ca4c5SRussell King MII_88E1318S_PHY_CSIER_WOL_EIE); 18553871c387SMichael Stapelberg if (err < 0) 1856424ca4c5SRussell King goto error; 18573871c387SMichael Stapelberg 1858424ca4c5SRussell King err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 18593871c387SMichael Stapelberg if (err < 0) 1860424ca4c5SRussell King goto error; 18613871c387SMichael Stapelberg 18623871c387SMichael Stapelberg /* Setup LED[2] as interrupt pin (active low) */ 1863424ca4c5SRussell King err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1864f102852fSRussell King MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1865424ca4c5SRussell King MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1866424ca4c5SRussell King MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 18673871c387SMichael Stapelberg if (err < 0) 1868424ca4c5SRussell King goto error; 18696164659fSSong Yoong Siang } 18703871c387SMichael Stapelberg 18716164659fSSong Yoong Siang if (wol->wolopts & WAKE_MAGIC) { 1872424ca4c5SRussell King err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 18733871c387SMichael Stapelberg if (err < 0) 1874424ca4c5SRussell King goto error; 18753871c387SMichael Stapelberg 18763871c387SMichael Stapelberg /* Store the device address for the magic packet */ 1877424ca4c5SRussell King err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 18783871c387SMichael Stapelberg ((phydev->attached_dev->dev_addr[5] << 8) | 18793871c387SMichael Stapelberg phydev->attached_dev->dev_addr[4])); 18803871c387SMichael Stapelberg if (err < 0) 1881424ca4c5SRussell King goto error; 1882424ca4c5SRussell King err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 18833871c387SMichael Stapelberg ((phydev->attached_dev->dev_addr[3] << 8) | 18843871c387SMichael Stapelberg phydev->attached_dev->dev_addr[2])); 18853871c387SMichael Stapelberg if (err < 0) 1886424ca4c5SRussell King goto error; 1887424ca4c5SRussell King err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 18883871c387SMichael Stapelberg ((phydev->attached_dev->dev_addr[1] << 8) | 18893871c387SMichael Stapelberg phydev->attached_dev->dev_addr[0])); 18903871c387SMichael Stapelberg if (err < 0) 1891424ca4c5SRussell King goto error; 18923871c387SMichael Stapelberg 18933871c387SMichael Stapelberg /* Clear WOL status and enable magic packet matching */ 1894832913c3SYejune Deng err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL, 1895424ca4c5SRussell King MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1896424ca4c5SRussell King MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 18973871c387SMichael Stapelberg if (err < 0) 1898424ca4c5SRussell King goto error; 18993871c387SMichael Stapelberg } else { 1900424ca4c5SRussell King err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 19013871c387SMichael Stapelberg if (err < 0) 1902424ca4c5SRussell King goto error; 19033871c387SMichael Stapelberg 19043871c387SMichael Stapelberg /* Clear WOL status and disable magic packet matching */ 1905424ca4c5SRussell King err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1906f102852fSRussell King MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1907424ca4c5SRussell King MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 19083871c387SMichael Stapelberg if (err < 0) 1909424ca4c5SRussell King goto error; 19103871c387SMichael Stapelberg } 19113871c387SMichael Stapelberg 19126164659fSSong Yoong Siang if (wol->wolopts & WAKE_PHY) { 19136164659fSSong Yoong Siang err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 19146164659fSSong Yoong Siang if (err < 0) 19156164659fSSong Yoong Siang goto error; 19166164659fSSong Yoong Siang 19176164659fSSong Yoong Siang /* Clear WOL status and enable link up event */ 19186164659fSSong Yoong Siang err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 19196164659fSSong Yoong Siang MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 19206164659fSSong Yoong Siang MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE); 19216164659fSSong Yoong Siang if (err < 0) 19226164659fSSong Yoong Siang goto error; 19236164659fSSong Yoong Siang } else { 19246164659fSSong Yoong Siang err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 19256164659fSSong Yoong Siang if (err < 0) 19266164659fSSong Yoong Siang goto error; 19276164659fSSong Yoong Siang 19286164659fSSong Yoong Siang /* Clear WOL status and disable link up event */ 19296164659fSSong Yoong Siang err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 19306164659fSSong Yoong Siang MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE, 19316164659fSSong Yoong Siang MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 19326164659fSSong Yoong Siang if (err < 0) 19336164659fSSong Yoong Siang goto error; 19346164659fSSong Yoong Siang } 19356164659fSSong Yoong Siang 1936424ca4c5SRussell King error: 1937424ca4c5SRussell King return phy_restore_page(phydev, oldpage, err); 19383871c387SMichael Stapelberg } 19393871c387SMichael Stapelberg 1940d2fa47d9SAndrew Lunn static int marvell_get_sset_count(struct phy_device *phydev) 1941d2fa47d9SAndrew Lunn { 19423c1bcc86SAndrew Lunn if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 19433c1bcc86SAndrew Lunn phydev->supported)) 1944d2fa47d9SAndrew Lunn return ARRAY_SIZE(marvell_hw_stats); 19452170fef7SCharles-Antoine Couret else 19462170fef7SCharles-Antoine Couret return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1947d2fa47d9SAndrew Lunn } 1948d2fa47d9SAndrew Lunn 1949d2fa47d9SAndrew Lunn static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1950d2fa47d9SAndrew Lunn { 1951fdfdf867SAndrew Lunn int count = marvell_get_sset_count(phydev); 1952d2fa47d9SAndrew Lunn int i; 1953d2fa47d9SAndrew Lunn 1954fdfdf867SAndrew Lunn for (i = 0; i < count; i++) { 1955fb3ceec1SWolfram Sang strscpy(data + i * ETH_GSTRING_LEN, 1956d2fa47d9SAndrew Lunn marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1957d2fa47d9SAndrew Lunn } 1958d2fa47d9SAndrew Lunn } 1959d2fa47d9SAndrew Lunn 1960d2fa47d9SAndrew Lunn static u64 marvell_get_stat(struct phy_device *phydev, int i) 1961d2fa47d9SAndrew Lunn { 1962d2fa47d9SAndrew Lunn struct marvell_hw_stat stat = marvell_hw_stats[i]; 1963d2fa47d9SAndrew Lunn struct marvell_priv *priv = phydev->priv; 1964424ca4c5SRussell King int val; 1965321b4d4bSAndrew Lunn u64 ret; 1966d2fa47d9SAndrew Lunn 1967424ca4c5SRussell King val = phy_read_paged(phydev, stat.page, stat.reg); 1968d2fa47d9SAndrew Lunn if (val < 0) { 19696c3442f5SJisheng Zhang ret = U64_MAX; 1970d2fa47d9SAndrew Lunn } else { 1971d2fa47d9SAndrew Lunn val = val & ((1 << stat.bits) - 1); 1972d2fa47d9SAndrew Lunn priv->stats[i] += val; 1973321b4d4bSAndrew Lunn ret = priv->stats[i]; 1974d2fa47d9SAndrew Lunn } 1975d2fa47d9SAndrew Lunn 1976321b4d4bSAndrew Lunn return ret; 1977d2fa47d9SAndrew Lunn } 1978d2fa47d9SAndrew Lunn 1979d2fa47d9SAndrew Lunn static void marvell_get_stats(struct phy_device *phydev, 1980d2fa47d9SAndrew Lunn struct ethtool_stats *stats, u64 *data) 1981d2fa47d9SAndrew Lunn { 1982fdfdf867SAndrew Lunn int count = marvell_get_sset_count(phydev); 1983d2fa47d9SAndrew Lunn int i; 1984d2fa47d9SAndrew Lunn 1985fdfdf867SAndrew Lunn for (i = 0; i < count; i++) 1986d2fa47d9SAndrew Lunn data[i] = marvell_get_stat(phydev, i); 1987d2fa47d9SAndrew Lunn } 1988d2fa47d9SAndrew Lunn 1989020a45afSMohammad Athari Bin Ismail static int m88e1510_loopback(struct phy_device *phydev, bool enable) 1990020a45afSMohammad Athari Bin Ismail { 1991020a45afSMohammad Athari Bin Ismail int err; 1992020a45afSMohammad Athari Bin Ismail 1993020a45afSMohammad Athari Bin Ismail if (enable) { 1994e62dbaffSRussell King (Oracle) u16 bmcr_ctl, mscr2_ctl = 0; 1995020a45afSMohammad Athari Bin Ismail 1996e62dbaffSRussell King (Oracle) bmcr_ctl = mii_bmcr_encode_fixed(phydev->speed, phydev->duplex); 1997020a45afSMohammad Athari Bin Ismail 1998020a45afSMohammad Athari Bin Ismail err = phy_write(phydev, MII_BMCR, bmcr_ctl); 1999020a45afSMohammad Athari Bin Ismail if (err < 0) 2000020a45afSMohammad Athari Bin Ismail return err; 2001020a45afSMohammad Athari Bin Ismail 2002020a45afSMohammad Athari Bin Ismail if (phydev->speed == SPEED_1000) 2003020a45afSMohammad Athari Bin Ismail mscr2_ctl = BMCR_SPEED1000; 2004020a45afSMohammad Athari Bin Ismail else if (phydev->speed == SPEED_100) 2005020a45afSMohammad Athari Bin Ismail mscr2_ctl = BMCR_SPEED100; 2006020a45afSMohammad Athari Bin Ismail 2007020a45afSMohammad Athari Bin Ismail err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 2008020a45afSMohammad Athari Bin Ismail MII_88E1510_MSCR_2, BMCR_SPEED1000 | 2009020a45afSMohammad Athari Bin Ismail BMCR_SPEED100, mscr2_ctl); 2010020a45afSMohammad Athari Bin Ismail if (err < 0) 2011020a45afSMohammad Athari Bin Ismail return err; 2012020a45afSMohammad Athari Bin Ismail 2013020a45afSMohammad Athari Bin Ismail /* Need soft reset to have speed configuration takes effect */ 2014020a45afSMohammad Athari Bin Ismail err = genphy_soft_reset(phydev); 2015020a45afSMohammad Athari Bin Ismail if (err < 0) 2016020a45afSMohammad Athari Bin Ismail return err; 2017020a45afSMohammad Athari Bin Ismail 2018*18c532e4SAminuddin Jamaluddin err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 2019020a45afSMohammad Athari Bin Ismail BMCR_LOOPBACK); 2020*18c532e4SAminuddin Jamaluddin 2021*18c532e4SAminuddin Jamaluddin if (!err) { 2022*18c532e4SAminuddin Jamaluddin /* It takes some time for PHY device to switch 2023*18c532e4SAminuddin Jamaluddin * into/out-of loopback mode. 2024*18c532e4SAminuddin Jamaluddin */ 2025*18c532e4SAminuddin Jamaluddin msleep(1000); 2026*18c532e4SAminuddin Jamaluddin } 2027*18c532e4SAminuddin Jamaluddin return err; 2028020a45afSMohammad Athari Bin Ismail } else { 2029020a45afSMohammad Athari Bin Ismail err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0); 2030020a45afSMohammad Athari Bin Ismail if (err < 0) 2031020a45afSMohammad Athari Bin Ismail return err; 2032020a45afSMohammad Athari Bin Ismail 2033020a45afSMohammad Athari Bin Ismail return phy_config_aneg(phydev); 2034020a45afSMohammad Athari Bin Ismail } 2035020a45afSMohammad Athari Bin Ismail } 2036020a45afSMohammad Athari Bin Ismail 20370c9bcc1dSAndrew Lunn static int marvell_vct5_wait_complete(struct phy_device *phydev) 20380c9bcc1dSAndrew Lunn { 20390c9bcc1dSAndrew Lunn int i; 20400c9bcc1dSAndrew Lunn int val; 20410c9bcc1dSAndrew Lunn 20420c9bcc1dSAndrew Lunn for (i = 0; i < 32; i++) { 2043a618e86dSAndrew Lunn val = __phy_read(phydev, MII_VCT5_CTRL); 20440c9bcc1dSAndrew Lunn if (val < 0) 20450c9bcc1dSAndrew Lunn return val; 20460c9bcc1dSAndrew Lunn 20470c9bcc1dSAndrew Lunn if (val & MII_VCT5_CTRL_COMPLETE) 20480c9bcc1dSAndrew Lunn return 0; 20490c9bcc1dSAndrew Lunn } 20500c9bcc1dSAndrew Lunn 20510c9bcc1dSAndrew Lunn phydev_err(phydev, "Timeout while waiting for cable test to finish\n"); 20520c9bcc1dSAndrew Lunn return -ETIMEDOUT; 20530c9bcc1dSAndrew Lunn } 20540c9bcc1dSAndrew Lunn 20550c9bcc1dSAndrew Lunn static int marvell_vct5_amplitude(struct phy_device *phydev, int pair) 20560c9bcc1dSAndrew Lunn { 20570c9bcc1dSAndrew Lunn int amplitude; 20580c9bcc1dSAndrew Lunn int val; 20590c9bcc1dSAndrew Lunn int reg; 20600c9bcc1dSAndrew Lunn 20610c9bcc1dSAndrew Lunn reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair; 2062a618e86dSAndrew Lunn val = __phy_read(phydev, reg); 20630c9bcc1dSAndrew Lunn 20640c9bcc1dSAndrew Lunn if (val < 0) 20650c9bcc1dSAndrew Lunn return 0; 20660c9bcc1dSAndrew Lunn 20670c9bcc1dSAndrew Lunn amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >> 20680c9bcc1dSAndrew Lunn MII_VCT5_TX_RX_AMPLITUDE_SHIFT; 20690c9bcc1dSAndrew Lunn 20700c9bcc1dSAndrew Lunn if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION)) 20710c9bcc1dSAndrew Lunn amplitude = -amplitude; 20720c9bcc1dSAndrew Lunn 20730c9bcc1dSAndrew Lunn return 1000 * amplitude / 128; 20740c9bcc1dSAndrew Lunn } 20750c9bcc1dSAndrew Lunn 20760c9bcc1dSAndrew Lunn static u32 marvell_vct5_distance2cm(int distance) 20770c9bcc1dSAndrew Lunn { 20780c9bcc1dSAndrew Lunn return distance * 805 / 10; 20790c9bcc1dSAndrew Lunn } 20800c9bcc1dSAndrew Lunn 2081f2bc8ad3SAndrew Lunn static u32 marvell_vct5_cm2distance(int cm) 20820c9bcc1dSAndrew Lunn { 2083f2bc8ad3SAndrew Lunn return cm * 10 / 805; 2084f2bc8ad3SAndrew Lunn } 2085f2bc8ad3SAndrew Lunn 2086f2bc8ad3SAndrew Lunn static int marvell_vct5_amplitude_distance(struct phy_device *phydev, 2087f2bc8ad3SAndrew Lunn int distance, int pair) 2088f2bc8ad3SAndrew Lunn { 20890c9bcc1dSAndrew Lunn u16 reg; 20900c9bcc1dSAndrew Lunn int err; 2091f2bc8ad3SAndrew Lunn int mV; 2092f2bc8ad3SAndrew Lunn int i; 20930c9bcc1dSAndrew Lunn 2094a618e86dSAndrew Lunn err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE, 20950c9bcc1dSAndrew Lunn distance); 20960c9bcc1dSAndrew Lunn if (err) 20970c9bcc1dSAndrew Lunn return err; 20980c9bcc1dSAndrew Lunn 20990c9bcc1dSAndrew Lunn reg = MII_VCT5_CTRL_ENABLE | 21000c9bcc1dSAndrew Lunn MII_VCT5_CTRL_TX_SAME_CHANNEL | 21010c9bcc1dSAndrew Lunn MII_VCT5_CTRL_SAMPLES_DEFAULT | 21020c9bcc1dSAndrew Lunn MII_VCT5_CTRL_SAMPLE_POINT | 21030c9bcc1dSAndrew Lunn MII_VCT5_CTRL_PEEK_HYST_DEFAULT; 2104a618e86dSAndrew Lunn err = __phy_write(phydev, MII_VCT5_CTRL, reg); 21050c9bcc1dSAndrew Lunn if (err) 21060c9bcc1dSAndrew Lunn return err; 21070c9bcc1dSAndrew Lunn 21080c9bcc1dSAndrew Lunn err = marvell_vct5_wait_complete(phydev); 21090c9bcc1dSAndrew Lunn if (err) 21100c9bcc1dSAndrew Lunn return err; 21110c9bcc1dSAndrew Lunn 2112f2bc8ad3SAndrew Lunn for (i = 0; i < 4; i++) { 2113f2bc8ad3SAndrew Lunn if (pair != PHY_PAIR_ALL && i != pair) 2114f2bc8ad3SAndrew Lunn continue; 21150c9bcc1dSAndrew Lunn 2116f2bc8ad3SAndrew Lunn mV = marvell_vct5_amplitude(phydev, i); 2117f2bc8ad3SAndrew Lunn ethnl_cable_test_amplitude(phydev, i, mV); 2118f2bc8ad3SAndrew Lunn } 21190c9bcc1dSAndrew Lunn 21200c9bcc1dSAndrew Lunn return 0; 21210c9bcc1dSAndrew Lunn } 21220c9bcc1dSAndrew Lunn 21230c9bcc1dSAndrew Lunn static int marvell_vct5_amplitude_graph(struct phy_device *phydev) 21240c9bcc1dSAndrew Lunn { 2125f2bc8ad3SAndrew Lunn struct marvell_priv *priv = phydev->priv; 21260c9bcc1dSAndrew Lunn int distance; 2127db8668a1SAndrew Lunn u16 width; 2128a618e86dSAndrew Lunn int page; 21290c9bcc1dSAndrew Lunn int err; 21300c9bcc1dSAndrew Lunn u16 reg; 21310c9bcc1dSAndrew Lunn 2132db8668a1SAndrew Lunn if (priv->first <= TDR_SHORT_CABLE_LENGTH) 2133db8668a1SAndrew Lunn width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS; 2134db8668a1SAndrew Lunn else 2135db8668a1SAndrew Lunn width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 2136db8668a1SAndrew Lunn 21370c9bcc1dSAndrew Lunn reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 21380c9bcc1dSAndrew Lunn MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 2139db8668a1SAndrew Lunn MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 21400c9bcc1dSAndrew Lunn 21410c9bcc1dSAndrew Lunn err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 21420c9bcc1dSAndrew Lunn MII_VCT5_TX_PULSE_CTRL, reg); 21430c9bcc1dSAndrew Lunn if (err) 21440c9bcc1dSAndrew Lunn return err; 21450c9bcc1dSAndrew Lunn 2146a618e86dSAndrew Lunn /* Reading the TDR data is very MDIO heavy. We need to optimize 2147a618e86dSAndrew Lunn * access to keep the time to a minimum. So lock the bus once, 2148a618e86dSAndrew Lunn * and don't release it until complete. We can then avoid having 2149a618e86dSAndrew Lunn * to change the page for every access, greatly speeding things 2150a618e86dSAndrew Lunn * up. 2151a618e86dSAndrew Lunn */ 2152a618e86dSAndrew Lunn page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE); 2153a618e86dSAndrew Lunn if (page < 0) 2154830f5ce2SDan Carpenter goto restore_page; 2155a618e86dSAndrew Lunn 2156f2bc8ad3SAndrew Lunn for (distance = priv->first; 2157f2bc8ad3SAndrew Lunn distance <= priv->last; 2158f2bc8ad3SAndrew Lunn distance += priv->step) { 2159f2bc8ad3SAndrew Lunn err = marvell_vct5_amplitude_distance(phydev, distance, 2160f2bc8ad3SAndrew Lunn priv->pair); 21610c9bcc1dSAndrew Lunn if (err) 2162a618e86dSAndrew Lunn goto restore_page; 2163db8668a1SAndrew Lunn 2164db8668a1SAndrew Lunn if (distance > TDR_SHORT_CABLE_LENGTH && 2165db8668a1SAndrew Lunn width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) { 2166db8668a1SAndrew Lunn width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 2167db8668a1SAndrew Lunn reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 2168db8668a1SAndrew Lunn MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 2169db8668a1SAndrew Lunn MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 2170db8668a1SAndrew Lunn err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg); 2171db8668a1SAndrew Lunn if (err) 2172db8668a1SAndrew Lunn goto restore_page; 2173db8668a1SAndrew Lunn } 21740c9bcc1dSAndrew Lunn } 21750c9bcc1dSAndrew Lunn 2176a618e86dSAndrew Lunn restore_page: 2177a618e86dSAndrew Lunn return phy_restore_page(phydev, page, err); 21780c9bcc1dSAndrew Lunn } 21790c9bcc1dSAndrew Lunn 21800c9bcc1dSAndrew Lunn static int marvell_cable_test_start_common(struct phy_device *phydev) 2181fc879f72SAndrew Lunn { 2182fc879f72SAndrew Lunn int bmcr, bmsr, ret; 2183fc879f72SAndrew Lunn 2184fc879f72SAndrew Lunn /* If auto-negotiation is enabled, but not complete, the cable 2185fc879f72SAndrew Lunn * test never completes. So disable auto-neg. 2186fc879f72SAndrew Lunn */ 2187fc879f72SAndrew Lunn bmcr = phy_read(phydev, MII_BMCR); 2188fc879f72SAndrew Lunn if (bmcr < 0) 2189fc879f72SAndrew Lunn return bmcr; 2190fc879f72SAndrew Lunn 2191fc879f72SAndrew Lunn bmsr = phy_read(phydev, MII_BMSR); 2192fc879f72SAndrew Lunn 2193fc879f72SAndrew Lunn if (bmsr < 0) 2194fc879f72SAndrew Lunn return bmsr; 2195fc879f72SAndrew Lunn 2196fc879f72SAndrew Lunn if (bmcr & BMCR_ANENABLE) { 2197832913c3SYejune Deng ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE); 2198fc879f72SAndrew Lunn if (ret < 0) 2199fc879f72SAndrew Lunn return ret; 2200fc879f72SAndrew Lunn ret = genphy_soft_reset(phydev); 2201fc879f72SAndrew Lunn if (ret < 0) 2202fc879f72SAndrew Lunn return ret; 2203fc879f72SAndrew Lunn } 2204fc879f72SAndrew Lunn 2205fc879f72SAndrew Lunn /* If the link is up, allow it some time to go down */ 2206fc879f72SAndrew Lunn if (bmsr & BMSR_LSTATUS) 2207fc879f72SAndrew Lunn msleep(1500); 2208fc879f72SAndrew Lunn 22090c9bcc1dSAndrew Lunn return 0; 22100c9bcc1dSAndrew Lunn } 22110c9bcc1dSAndrew Lunn 22120c9bcc1dSAndrew Lunn static int marvell_vct7_cable_test_start(struct phy_device *phydev) 22130c9bcc1dSAndrew Lunn { 22140c9bcc1dSAndrew Lunn struct marvell_priv *priv = phydev->priv; 22150c9bcc1dSAndrew Lunn int ret; 22160c9bcc1dSAndrew Lunn 22170c9bcc1dSAndrew Lunn ret = marvell_cable_test_start_common(phydev); 22180c9bcc1dSAndrew Lunn if (ret) 22190c9bcc1dSAndrew Lunn return ret; 22200c9bcc1dSAndrew Lunn 22210c9bcc1dSAndrew Lunn priv->cable_test_tdr = false; 22220c9bcc1dSAndrew Lunn 22230c9bcc1dSAndrew Lunn /* Reset the VCT5 API control to defaults, otherwise 22240c9bcc1dSAndrew Lunn * VCT7 does not work correctly. 22250c9bcc1dSAndrew Lunn */ 22260c9bcc1dSAndrew Lunn ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 22270c9bcc1dSAndrew Lunn MII_VCT5_CTRL, 22280c9bcc1dSAndrew Lunn MII_VCT5_CTRL_TX_SAME_CHANNEL | 22290c9bcc1dSAndrew Lunn MII_VCT5_CTRL_SAMPLES_DEFAULT | 22300c9bcc1dSAndrew Lunn MII_VCT5_CTRL_MODE_MAXIMUM_PEEK | 22310c9bcc1dSAndrew Lunn MII_VCT5_CTRL_PEEK_HYST_DEFAULT); 22320c9bcc1dSAndrew Lunn if (ret) 22330c9bcc1dSAndrew Lunn return ret; 22340c9bcc1dSAndrew Lunn 22350c9bcc1dSAndrew Lunn ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 22360c9bcc1dSAndrew Lunn MII_VCT5_SAMPLE_POINT_DISTANCE, 0); 22370c9bcc1dSAndrew Lunn if (ret) 22380c9bcc1dSAndrew Lunn return ret; 22390c9bcc1dSAndrew Lunn 2240fc879f72SAndrew Lunn return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 2241fc879f72SAndrew Lunn MII_VCT7_CTRL, 2242fc879f72SAndrew Lunn MII_VCT7_CTRL_RUN_NOW | 2243fc879f72SAndrew Lunn MII_VCT7_CTRL_CENTIMETERS); 2244fc879f72SAndrew Lunn } 2245fc879f72SAndrew Lunn 2246f2bc8ad3SAndrew Lunn static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev, 2247f2bc8ad3SAndrew Lunn const struct phy_tdr_config *cfg) 22480c9bcc1dSAndrew Lunn { 22490c9bcc1dSAndrew Lunn struct marvell_priv *priv = phydev->priv; 22500c9bcc1dSAndrew Lunn int ret; 22510c9bcc1dSAndrew Lunn 2252f2bc8ad3SAndrew Lunn priv->cable_test_tdr = true; 2253f2bc8ad3SAndrew Lunn priv->first = marvell_vct5_cm2distance(cfg->first); 2254f2bc8ad3SAndrew Lunn priv->last = marvell_vct5_cm2distance(cfg->last); 2255f2bc8ad3SAndrew Lunn priv->step = marvell_vct5_cm2distance(cfg->step); 2256f2bc8ad3SAndrew Lunn priv->pair = cfg->pair; 2257f2bc8ad3SAndrew Lunn 2258f2bc8ad3SAndrew Lunn if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 2259f2bc8ad3SAndrew Lunn return -EINVAL; 2260f2bc8ad3SAndrew Lunn 2261f2bc8ad3SAndrew Lunn if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 2262f2bc8ad3SAndrew Lunn return -EINVAL; 2263f2bc8ad3SAndrew Lunn 22640c9bcc1dSAndrew Lunn /* Disable VCT7 */ 22650c9bcc1dSAndrew Lunn ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 22660c9bcc1dSAndrew Lunn MII_VCT7_CTRL, 0); 22670c9bcc1dSAndrew Lunn if (ret) 22680c9bcc1dSAndrew Lunn return ret; 22690c9bcc1dSAndrew Lunn 22700c9bcc1dSAndrew Lunn ret = marvell_cable_test_start_common(phydev); 22710c9bcc1dSAndrew Lunn if (ret) 22720c9bcc1dSAndrew Lunn return ret; 22730c9bcc1dSAndrew Lunn 22740c9bcc1dSAndrew Lunn ret = ethnl_cable_test_pulse(phydev, 1000); 22750c9bcc1dSAndrew Lunn if (ret) 22760c9bcc1dSAndrew Lunn return ret; 22770c9bcc1dSAndrew Lunn 22780c9bcc1dSAndrew Lunn return ethnl_cable_test_step(phydev, 2279f2bc8ad3SAndrew Lunn marvell_vct5_distance2cm(priv->first), 2280f2bc8ad3SAndrew Lunn marvell_vct5_distance2cm(priv->last), 2281f2bc8ad3SAndrew Lunn marvell_vct5_distance2cm(priv->step)); 22820c9bcc1dSAndrew Lunn } 22830c9bcc1dSAndrew Lunn 2284fc879f72SAndrew Lunn static int marvell_vct7_distance_to_length(int distance, bool meter) 2285fc879f72SAndrew Lunn { 2286fc879f72SAndrew Lunn if (meter) 2287fc879f72SAndrew Lunn distance *= 100; 2288fc879f72SAndrew Lunn 2289fc879f72SAndrew Lunn return distance; 2290fc879f72SAndrew Lunn } 2291fc879f72SAndrew Lunn 2292fc879f72SAndrew Lunn static bool marvell_vct7_distance_valid(int result) 2293fc879f72SAndrew Lunn { 2294fc879f72SAndrew Lunn switch (result) { 2295fc879f72SAndrew Lunn case MII_VCT7_RESULTS_OPEN: 2296fc879f72SAndrew Lunn case MII_VCT7_RESULTS_SAME_SHORT: 2297fc879f72SAndrew Lunn case MII_VCT7_RESULTS_CROSS_SHORT: 2298fc879f72SAndrew Lunn return true; 2299fc879f72SAndrew Lunn } 2300fc879f72SAndrew Lunn return false; 2301fc879f72SAndrew Lunn } 2302fc879f72SAndrew Lunn 2303fc879f72SAndrew Lunn static int marvell_vct7_report_length(struct phy_device *phydev, 2304fc879f72SAndrew Lunn int pair, bool meter) 2305fc879f72SAndrew Lunn { 2306fc879f72SAndrew Lunn int length; 2307fc879f72SAndrew Lunn int ret; 2308fc879f72SAndrew Lunn 2309fc879f72SAndrew Lunn ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2310fc879f72SAndrew Lunn MII_VCT7_PAIR_0_DISTANCE + pair); 2311fc879f72SAndrew Lunn if (ret < 0) 2312fc879f72SAndrew Lunn return ret; 2313fc879f72SAndrew Lunn 2314fc879f72SAndrew Lunn length = marvell_vct7_distance_to_length(ret, meter); 2315fc879f72SAndrew Lunn 2316fc879f72SAndrew Lunn ethnl_cable_test_fault_length(phydev, pair, length); 2317fc879f72SAndrew Lunn 2318fc879f72SAndrew Lunn return 0; 2319fc879f72SAndrew Lunn } 2320fc879f72SAndrew Lunn 2321fc879f72SAndrew Lunn static int marvell_vct7_cable_test_report_trans(int result) 2322fc879f72SAndrew Lunn { 2323fc879f72SAndrew Lunn switch (result) { 2324fc879f72SAndrew Lunn case MII_VCT7_RESULTS_OK: 2325fc879f72SAndrew Lunn return ETHTOOL_A_CABLE_RESULT_CODE_OK; 2326fc879f72SAndrew Lunn case MII_VCT7_RESULTS_OPEN: 2327fc879f72SAndrew Lunn return ETHTOOL_A_CABLE_RESULT_CODE_OPEN; 2328fc879f72SAndrew Lunn case MII_VCT7_RESULTS_SAME_SHORT: 2329fc879f72SAndrew Lunn return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT; 2330fc879f72SAndrew Lunn case MII_VCT7_RESULTS_CROSS_SHORT: 2331fc879f72SAndrew Lunn return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT; 2332fc879f72SAndrew Lunn default: 2333fc879f72SAndrew Lunn return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC; 2334fc879f72SAndrew Lunn } 2335fc879f72SAndrew Lunn } 2336fc879f72SAndrew Lunn 2337fc879f72SAndrew Lunn static int marvell_vct7_cable_test_report(struct phy_device *phydev) 2338fc879f72SAndrew Lunn { 2339fc879f72SAndrew Lunn int pair0, pair1, pair2, pair3; 2340fc879f72SAndrew Lunn bool meter; 2341fc879f72SAndrew Lunn int ret; 2342fc879f72SAndrew Lunn 2343fc879f72SAndrew Lunn ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2344fc879f72SAndrew Lunn MII_VCT7_RESULTS); 2345fc879f72SAndrew Lunn if (ret < 0) 2346fc879f72SAndrew Lunn return ret; 2347fc879f72SAndrew Lunn 2348fc879f72SAndrew Lunn pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >> 2349fc879f72SAndrew Lunn MII_VCT7_RESULTS_PAIR3_SHIFT; 2350fc879f72SAndrew Lunn pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >> 2351fc879f72SAndrew Lunn MII_VCT7_RESULTS_PAIR2_SHIFT; 2352fc879f72SAndrew Lunn pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >> 2353fc879f72SAndrew Lunn MII_VCT7_RESULTS_PAIR1_SHIFT; 2354fc879f72SAndrew Lunn pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >> 2355fc879f72SAndrew Lunn MII_VCT7_RESULTS_PAIR0_SHIFT; 2356fc879f72SAndrew Lunn 2357fc879f72SAndrew Lunn ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, 2358fc879f72SAndrew Lunn marvell_vct7_cable_test_report_trans(pair0)); 2359fc879f72SAndrew Lunn ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B, 2360fc879f72SAndrew Lunn marvell_vct7_cable_test_report_trans(pair1)); 2361fc879f72SAndrew Lunn ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C, 2362fc879f72SAndrew Lunn marvell_vct7_cable_test_report_trans(pair2)); 2363fc879f72SAndrew Lunn ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D, 2364fc879f72SAndrew Lunn marvell_vct7_cable_test_report_trans(pair3)); 2365fc879f72SAndrew Lunn 2366fc879f72SAndrew Lunn ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL); 2367fc879f72SAndrew Lunn if (ret < 0) 2368fc879f72SAndrew Lunn return ret; 2369fc879f72SAndrew Lunn 2370fc879f72SAndrew Lunn meter = ret & MII_VCT7_CTRL_METERS; 2371fc879f72SAndrew Lunn 2372fc879f72SAndrew Lunn if (marvell_vct7_distance_valid(pair0)) 2373fc879f72SAndrew Lunn marvell_vct7_report_length(phydev, 0, meter); 2374fc879f72SAndrew Lunn if (marvell_vct7_distance_valid(pair1)) 2375fc879f72SAndrew Lunn marvell_vct7_report_length(phydev, 1, meter); 2376fc879f72SAndrew Lunn if (marvell_vct7_distance_valid(pair2)) 2377fc879f72SAndrew Lunn marvell_vct7_report_length(phydev, 2, meter); 2378fc879f72SAndrew Lunn if (marvell_vct7_distance_valid(pair3)) 2379fc879f72SAndrew Lunn marvell_vct7_report_length(phydev, 3, meter); 2380fc879f72SAndrew Lunn 2381fc879f72SAndrew Lunn return 0; 2382fc879f72SAndrew Lunn } 2383fc879f72SAndrew Lunn 2384fc879f72SAndrew Lunn static int marvell_vct7_cable_test_get_status(struct phy_device *phydev, 2385fc879f72SAndrew Lunn bool *finished) 2386fc879f72SAndrew Lunn { 23870c9bcc1dSAndrew Lunn struct marvell_priv *priv = phydev->priv; 2388fc879f72SAndrew Lunn int ret; 2389fc879f72SAndrew Lunn 23900c9bcc1dSAndrew Lunn if (priv->cable_test_tdr) { 23910c9bcc1dSAndrew Lunn ret = marvell_vct5_amplitude_graph(phydev); 23920c9bcc1dSAndrew Lunn *finished = true; 23930c9bcc1dSAndrew Lunn return ret; 23940c9bcc1dSAndrew Lunn } 23950c9bcc1dSAndrew Lunn 2396fc879f72SAndrew Lunn *finished = false; 2397fc879f72SAndrew Lunn 2398fc879f72SAndrew Lunn ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2399fc879f72SAndrew Lunn MII_VCT7_CTRL); 2400fc879f72SAndrew Lunn 2401fc879f72SAndrew Lunn if (ret < 0) 2402fc879f72SAndrew Lunn return ret; 2403fc879f72SAndrew Lunn 2404fc879f72SAndrew Lunn if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) { 2405fc879f72SAndrew Lunn *finished = true; 2406fc879f72SAndrew Lunn 2407fc879f72SAndrew Lunn return marvell_vct7_cable_test_report(phydev); 2408fc879f72SAndrew Lunn } 2409fc879f72SAndrew Lunn 2410fc879f72SAndrew Lunn return 0; 2411fc879f72SAndrew Lunn } 2412fc879f72SAndrew Lunn 24130b04680fSAndrew Lunn #ifdef CONFIG_HWMON 241441d26bf4SMarek Behún struct marvell_hwmon_ops { 2415a978f7c4SMarek Behún int (*config)(struct phy_device *phydev); 241641d26bf4SMarek Behún int (*get_temp)(struct phy_device *phydev, long *temp); 241741d26bf4SMarek Behún int (*get_temp_critical)(struct phy_device *phydev, long *temp); 241841d26bf4SMarek Behún int (*set_temp_critical)(struct phy_device *phydev, long temp); 241941d26bf4SMarek Behún int (*get_temp_alarm)(struct phy_device *phydev, long *alarm); 242041d26bf4SMarek Behún }; 242141d26bf4SMarek Behún 242241d26bf4SMarek Behún static const struct marvell_hwmon_ops * 242341d26bf4SMarek Behún to_marvell_hwmon_ops(const struct phy_device *phydev) 242441d26bf4SMarek Behún { 242541d26bf4SMarek Behún return phydev->drv->driver_data; 242641d26bf4SMarek Behún } 242741d26bf4SMarek Behún 24280b04680fSAndrew Lunn static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 24290b04680fSAndrew Lunn { 2430975b388cSAndrew Lunn int oldpage; 2431424ca4c5SRussell King int ret = 0; 24320b04680fSAndrew Lunn int val; 24330b04680fSAndrew Lunn 24340b04680fSAndrew Lunn *temp = 0; 24350b04680fSAndrew Lunn 2436424ca4c5SRussell King oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2437424ca4c5SRussell King if (oldpage < 0) 2438424ca4c5SRussell King goto error; 2439975b388cSAndrew Lunn 24400b04680fSAndrew Lunn /* Enable temperature sensor */ 2441424ca4c5SRussell King ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 24420b04680fSAndrew Lunn if (ret < 0) 24430b04680fSAndrew Lunn goto error; 24440b04680fSAndrew Lunn 2445424ca4c5SRussell King ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 24460b04680fSAndrew Lunn ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 24470b04680fSAndrew Lunn if (ret < 0) 24480b04680fSAndrew Lunn goto error; 24490b04680fSAndrew Lunn 24500b04680fSAndrew Lunn /* Wait for temperature to stabilize */ 24510b04680fSAndrew Lunn usleep_range(10000, 12000); 24520b04680fSAndrew Lunn 2453424ca4c5SRussell King val = __phy_read(phydev, MII_88E1121_MISC_TEST); 24540b04680fSAndrew Lunn if (val < 0) { 24550b04680fSAndrew Lunn ret = val; 24560b04680fSAndrew Lunn goto error; 24570b04680fSAndrew Lunn } 24580b04680fSAndrew Lunn 24590b04680fSAndrew Lunn /* Disable temperature sensor */ 2460424ca4c5SRussell King ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 24610b04680fSAndrew Lunn ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 24620b04680fSAndrew Lunn if (ret < 0) 24630b04680fSAndrew Lunn goto error; 24640b04680fSAndrew Lunn 24650b04680fSAndrew Lunn *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 24660b04680fSAndrew Lunn 24670b04680fSAndrew Lunn error: 2468424ca4c5SRussell King return phy_restore_page(phydev, oldpage, ret); 24690b04680fSAndrew Lunn } 24700b04680fSAndrew Lunn 24710b04680fSAndrew Lunn static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 24720b04680fSAndrew Lunn { 24730b04680fSAndrew Lunn int ret; 24740b04680fSAndrew Lunn 24750b04680fSAndrew Lunn *temp = 0; 24760b04680fSAndrew Lunn 2477424ca4c5SRussell King ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2478424ca4c5SRussell King MII_88E1510_TEMP_SENSOR); 24790b04680fSAndrew Lunn if (ret < 0) 2480424ca4c5SRussell King return ret; 24810b04680fSAndrew Lunn 24820b04680fSAndrew Lunn *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 24830b04680fSAndrew Lunn 2484424ca4c5SRussell King return 0; 24850b04680fSAndrew Lunn } 24860b04680fSAndrew Lunn 2487f0a45816SColin Ian King static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 24880b04680fSAndrew Lunn { 24890b04680fSAndrew Lunn int ret; 24900b04680fSAndrew Lunn 24910b04680fSAndrew Lunn *temp = 0; 24920b04680fSAndrew Lunn 2493424ca4c5SRussell King ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2494424ca4c5SRussell King MII_88E1121_MISC_TEST); 24950b04680fSAndrew Lunn if (ret < 0) 2496424ca4c5SRussell King return ret; 24970b04680fSAndrew Lunn 24980b04680fSAndrew Lunn *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 24990b04680fSAndrew Lunn MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 25000b04680fSAndrew Lunn /* convert to mC */ 25010b04680fSAndrew Lunn *temp *= 1000; 25020b04680fSAndrew Lunn 2503424ca4c5SRussell King return 0; 25040b04680fSAndrew Lunn } 25050b04680fSAndrew Lunn 2506f0a45816SColin Ian King static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 25070b04680fSAndrew Lunn { 25080b04680fSAndrew Lunn temp = temp / 1000; 25090b04680fSAndrew Lunn temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 25100b04680fSAndrew Lunn 2511424ca4c5SRussell King return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2512424ca4c5SRussell King MII_88E1121_MISC_TEST, 2513424ca4c5SRussell King MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 2514424ca4c5SRussell King temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 25150b04680fSAndrew Lunn } 25160b04680fSAndrew Lunn 2517f0a45816SColin Ian King static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 25180b04680fSAndrew Lunn { 25190b04680fSAndrew Lunn int ret; 25200b04680fSAndrew Lunn 25210b04680fSAndrew Lunn *alarm = false; 25220b04680fSAndrew Lunn 2523424ca4c5SRussell King ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2524424ca4c5SRussell King MII_88E1121_MISC_TEST); 25250b04680fSAndrew Lunn if (ret < 0) 2526424ca4c5SRussell King return ret; 2527424ca4c5SRussell King 25280b04680fSAndrew Lunn *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 25290b04680fSAndrew Lunn 2530424ca4c5SRussell King return 0; 25310b04680fSAndrew Lunn } 25320b04680fSAndrew Lunn 2533fee2d546SAndrew Lunn static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 2534fee2d546SAndrew Lunn { 2535fee2d546SAndrew Lunn int sum = 0; 2536fee2d546SAndrew Lunn int oldpage; 2537fee2d546SAndrew Lunn int ret = 0; 2538fee2d546SAndrew Lunn int i; 2539fee2d546SAndrew Lunn 2540fee2d546SAndrew Lunn *temp = 0; 2541fee2d546SAndrew Lunn 2542fee2d546SAndrew Lunn oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2543fee2d546SAndrew Lunn if (oldpage < 0) 2544fee2d546SAndrew Lunn goto error; 2545fee2d546SAndrew Lunn 2546fee2d546SAndrew Lunn /* Enable temperature sensor */ 2547fee2d546SAndrew Lunn ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2548fee2d546SAndrew Lunn if (ret < 0) 2549fee2d546SAndrew Lunn goto error; 2550fee2d546SAndrew Lunn 255100218173SMarek Behún ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK; 25524f920c29SMarek Behún ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S; 2553fee2d546SAndrew Lunn 2554fee2d546SAndrew Lunn ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2555fee2d546SAndrew Lunn if (ret < 0) 2556fee2d546SAndrew Lunn goto error; 2557fee2d546SAndrew Lunn 2558fee2d546SAndrew Lunn /* Wait for temperature to stabilize */ 2559fee2d546SAndrew Lunn usleep_range(10000, 12000); 2560fee2d546SAndrew Lunn 2561fee2d546SAndrew Lunn /* Reading the temperature sense has an errata. You need to read 2562fee2d546SAndrew Lunn * a number of times and take an average. 2563fee2d546SAndrew Lunn */ 2564fee2d546SAndrew Lunn for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 2565fee2d546SAndrew Lunn ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 2566fee2d546SAndrew Lunn if (ret < 0) 2567fee2d546SAndrew Lunn goto error; 2568fee2d546SAndrew Lunn sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 2569fee2d546SAndrew Lunn } 2570fee2d546SAndrew Lunn 2571fee2d546SAndrew Lunn sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 2572fee2d546SAndrew Lunn *temp = (sum - 75) * 1000; 2573fee2d546SAndrew Lunn 2574fee2d546SAndrew Lunn /* Disable temperature sensor */ 2575fee2d546SAndrew Lunn ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2576fee2d546SAndrew Lunn if (ret < 0) 2577fee2d546SAndrew Lunn goto error; 2578fee2d546SAndrew Lunn 25794f920c29SMarek Behún ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK; 25804f920c29SMarek Behún ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE; 2581fee2d546SAndrew Lunn 2582fee2d546SAndrew Lunn ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2583fee2d546SAndrew Lunn 2584fee2d546SAndrew Lunn error: 2585fee2d546SAndrew Lunn phy_restore_page(phydev, oldpage, ret); 2586fee2d546SAndrew Lunn 2587fee2d546SAndrew Lunn return ret; 2588fee2d546SAndrew Lunn } 2589fee2d546SAndrew Lunn 2590a978f7c4SMarek Behún static int m88e6393_get_temp(struct phy_device *phydev, long *temp) 2591a978f7c4SMarek Behún { 2592a978f7c4SMarek Behún int err; 2593a978f7c4SMarek Behún 2594a978f7c4SMarek Behún err = m88e1510_get_temp(phydev, temp); 2595a978f7c4SMarek Behún 2596a978f7c4SMarek Behún /* 88E1510 measures T + 25, while the PHY on 88E6393X switch 2597a978f7c4SMarek Behún * T + 75, so we have to subtract another 50 2598a978f7c4SMarek Behún */ 2599a978f7c4SMarek Behún *temp -= 50000; 2600a978f7c4SMarek Behún 2601a978f7c4SMarek Behún return err; 2602a978f7c4SMarek Behún } 2603a978f7c4SMarek Behún 2604a978f7c4SMarek Behún static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp) 2605a978f7c4SMarek Behún { 2606a978f7c4SMarek Behún int ret; 2607a978f7c4SMarek Behún 2608a978f7c4SMarek Behún *temp = 0; 2609a978f7c4SMarek Behún 2610a978f7c4SMarek Behún ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2611a978f7c4SMarek Behún MII_88E6390_TEMP_SENSOR); 2612a978f7c4SMarek Behún if (ret < 0) 2613a978f7c4SMarek Behún return ret; 2614a978f7c4SMarek Behún 2615a978f7c4SMarek Behún *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >> 2616a978f7c4SMarek Behún MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000; 2617a978f7c4SMarek Behún 2618a978f7c4SMarek Behún return 0; 2619a978f7c4SMarek Behún } 2620a978f7c4SMarek Behún 2621a978f7c4SMarek Behún static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp) 2622a978f7c4SMarek Behún { 2623a978f7c4SMarek Behún temp = (temp / 1000) + 75; 2624a978f7c4SMarek Behún 2625a978f7c4SMarek Behún return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2626a978f7c4SMarek Behún MII_88E6390_TEMP_SENSOR, 2627a978f7c4SMarek Behún MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK, 2628a978f7c4SMarek Behún temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT); 2629a978f7c4SMarek Behún } 2630a978f7c4SMarek Behún 2631a978f7c4SMarek Behún static int m88e6393_hwmon_config(struct phy_device *phydev) 2632a978f7c4SMarek Behún { 2633a978f7c4SMarek Behún int err; 2634a978f7c4SMarek Behún 2635a978f7c4SMarek Behún err = m88e6393_set_temp_critical(phydev, 100000); 2636a978f7c4SMarek Behún if (err) 2637a978f7c4SMarek Behún return err; 2638a978f7c4SMarek Behún 2639a978f7c4SMarek Behún return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2640a978f7c4SMarek Behún MII_88E6390_MISC_TEST, 2641a978f7c4SMarek Behún MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK | 2642a978f7c4SMarek Behún MII_88E6393_MISC_TEST_SAMPLES_MASK | 2643a978f7c4SMarek Behún MII_88E6393_MISC_TEST_RATE_MASK, 2644a978f7c4SMarek Behún MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE | 2645a978f7c4SMarek Behún MII_88E6393_MISC_TEST_SAMPLES_2048 | 2646a978f7c4SMarek Behún MII_88E6393_MISC_TEST_RATE_2_3MS); 2647a978f7c4SMarek Behún } 2648a978f7c4SMarek Behún 264941d26bf4SMarek Behún static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type, 2650fee2d546SAndrew Lunn u32 attr, int channel, long *temp) 2651fee2d546SAndrew Lunn { 2652fee2d546SAndrew Lunn struct phy_device *phydev = dev_get_drvdata(dev); 265341d26bf4SMarek Behún const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 265441d26bf4SMarek Behún int err = -EOPNOTSUPP; 2655fee2d546SAndrew Lunn 2656fee2d546SAndrew Lunn switch (attr) { 2657fee2d546SAndrew Lunn case hwmon_temp_input: 265841d26bf4SMarek Behún if (ops->get_temp) 265941d26bf4SMarek Behún err = ops->get_temp(phydev, temp); 2660fee2d546SAndrew Lunn break; 266141d26bf4SMarek Behún case hwmon_temp_crit: 266241d26bf4SMarek Behún if (ops->get_temp_critical) 266341d26bf4SMarek Behún err = ops->get_temp_critical(phydev, temp); 266441d26bf4SMarek Behún break; 266541d26bf4SMarek Behún case hwmon_temp_max_alarm: 266641d26bf4SMarek Behún if (ops->get_temp_alarm) 266741d26bf4SMarek Behún err = ops->get_temp_alarm(phydev, temp); 266841d26bf4SMarek Behún break; 2669fee2d546SAndrew Lunn } 2670fee2d546SAndrew Lunn 2671fee2d546SAndrew Lunn return err; 2672fee2d546SAndrew Lunn } 2673fee2d546SAndrew Lunn 267441d26bf4SMarek Behún static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type, 267541d26bf4SMarek Behún u32 attr, int channel, long temp) 267641d26bf4SMarek Behún { 267741d26bf4SMarek Behún struct phy_device *phydev = dev_get_drvdata(dev); 267841d26bf4SMarek Behún const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 267941d26bf4SMarek Behún int err = -EOPNOTSUPP; 268041d26bf4SMarek Behún 268141d26bf4SMarek Behún switch (attr) { 268241d26bf4SMarek Behún case hwmon_temp_crit: 268341d26bf4SMarek Behún if (ops->set_temp_critical) 268441d26bf4SMarek Behún err = ops->set_temp_critical(phydev, temp); 268541d26bf4SMarek Behún break; 268641d26bf4SMarek Behún } 268741d26bf4SMarek Behún 268841d26bf4SMarek Behún return err; 268941d26bf4SMarek Behún } 269041d26bf4SMarek Behún 269141d26bf4SMarek Behún static umode_t marvell_hwmon_is_visible(const void *data, 2692fee2d546SAndrew Lunn enum hwmon_sensor_types type, 2693fee2d546SAndrew Lunn u32 attr, int channel) 2694fee2d546SAndrew Lunn { 269541d26bf4SMarek Behún const struct phy_device *phydev = data; 269641d26bf4SMarek Behún const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 269741d26bf4SMarek Behún 2698fee2d546SAndrew Lunn if (type != hwmon_temp) 2699fee2d546SAndrew Lunn return 0; 2700fee2d546SAndrew Lunn 2701fee2d546SAndrew Lunn switch (attr) { 2702fee2d546SAndrew Lunn case hwmon_temp_input: 270341d26bf4SMarek Behún return ops->get_temp ? 0444 : 0; 270441d26bf4SMarek Behún case hwmon_temp_max_alarm: 270541d26bf4SMarek Behún return ops->get_temp_alarm ? 0444 : 0; 270641d26bf4SMarek Behún case hwmon_temp_crit: 270741d26bf4SMarek Behún return (ops->get_temp_critical ? 0444 : 0) | 270841d26bf4SMarek Behún (ops->set_temp_critical ? 0200 : 0); 2709fee2d546SAndrew Lunn default: 2710fee2d546SAndrew Lunn return 0; 2711fee2d546SAndrew Lunn } 2712fee2d546SAndrew Lunn } 2713fee2d546SAndrew Lunn 271441d26bf4SMarek Behún static u32 marvell_hwmon_chip_config[] = { 271541d26bf4SMarek Behún HWMON_C_REGISTER_TZ, 2716fee2d546SAndrew Lunn 0 2717fee2d546SAndrew Lunn }; 2718fee2d546SAndrew Lunn 271941d26bf4SMarek Behún static const struct hwmon_channel_info marvell_hwmon_chip = { 272041d26bf4SMarek Behún .type = hwmon_chip, 272141d26bf4SMarek Behún .config = marvell_hwmon_chip_config, 2722fee2d546SAndrew Lunn }; 2723fee2d546SAndrew Lunn 272441d26bf4SMarek Behún /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not 272541d26bf4SMarek Behún * defined for all PHYs, because the hwmon code checks whether the attributes 272641d26bf4SMarek Behún * exists via the .is_visible method 272741d26bf4SMarek Behún */ 272841d26bf4SMarek Behún static u32 marvell_hwmon_temp_config[] = { 272941d26bf4SMarek Behún HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 273041d26bf4SMarek Behún 0 273141d26bf4SMarek Behún }; 273241d26bf4SMarek Behún 273341d26bf4SMarek Behún static const struct hwmon_channel_info marvell_hwmon_temp = { 273441d26bf4SMarek Behún .type = hwmon_temp, 273541d26bf4SMarek Behún .config = marvell_hwmon_temp_config, 273641d26bf4SMarek Behún }; 273741d26bf4SMarek Behún 273841d26bf4SMarek Behún static const struct hwmon_channel_info *marvell_hwmon_info[] = { 273941d26bf4SMarek Behún &marvell_hwmon_chip, 274041d26bf4SMarek Behún &marvell_hwmon_temp, 2741fee2d546SAndrew Lunn NULL 2742fee2d546SAndrew Lunn }; 2743fee2d546SAndrew Lunn 274441d26bf4SMarek Behún static const struct hwmon_ops marvell_hwmon_hwmon_ops = { 274541d26bf4SMarek Behún .is_visible = marvell_hwmon_is_visible, 274641d26bf4SMarek Behún .read = marvell_hwmon_read, 274741d26bf4SMarek Behún .write = marvell_hwmon_write, 2748fee2d546SAndrew Lunn }; 2749fee2d546SAndrew Lunn 275041d26bf4SMarek Behún static const struct hwmon_chip_info marvell_hwmon_chip_info = { 275141d26bf4SMarek Behún .ops = &marvell_hwmon_hwmon_ops, 275241d26bf4SMarek Behún .info = marvell_hwmon_info, 2753fee2d546SAndrew Lunn }; 2754fee2d546SAndrew Lunn 27550b04680fSAndrew Lunn static int marvell_hwmon_name(struct phy_device *phydev) 27560b04680fSAndrew Lunn { 27570b04680fSAndrew Lunn struct marvell_priv *priv = phydev->priv; 27580b04680fSAndrew Lunn struct device *dev = &phydev->mdio.dev; 27590b04680fSAndrew Lunn const char *devname = dev_name(dev); 27600b04680fSAndrew Lunn size_t len = strlen(devname); 27610b04680fSAndrew Lunn int i, j; 27620b04680fSAndrew Lunn 27630b04680fSAndrew Lunn priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 27640b04680fSAndrew Lunn if (!priv->hwmon_name) 27650b04680fSAndrew Lunn return -ENOMEM; 27660b04680fSAndrew Lunn 27670b04680fSAndrew Lunn for (i = j = 0; i < len && devname[i]; i++) { 27680b04680fSAndrew Lunn if (isalnum(devname[i])) 27690b04680fSAndrew Lunn priv->hwmon_name[j++] = devname[i]; 27700b04680fSAndrew Lunn } 27710b04680fSAndrew Lunn 27720b04680fSAndrew Lunn return 0; 27730b04680fSAndrew Lunn } 27740b04680fSAndrew Lunn 277541d26bf4SMarek Behún static int marvell_hwmon_probe(struct phy_device *phydev) 27760b04680fSAndrew Lunn { 277741d26bf4SMarek Behún const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 27780b04680fSAndrew Lunn struct marvell_priv *priv = phydev->priv; 27790b04680fSAndrew Lunn struct device *dev = &phydev->mdio.dev; 27800b04680fSAndrew Lunn int err; 27810b04680fSAndrew Lunn 278241d26bf4SMarek Behún if (!ops) 278341d26bf4SMarek Behún return 0; 278441d26bf4SMarek Behún 27850b04680fSAndrew Lunn err = marvell_hwmon_name(phydev); 27860b04680fSAndrew Lunn if (err) 27870b04680fSAndrew Lunn return err; 27880b04680fSAndrew Lunn 27890b04680fSAndrew Lunn priv->hwmon_dev = devm_hwmon_device_register_with_info( 279041d26bf4SMarek Behún dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL); 2791a978f7c4SMarek Behún if (IS_ERR(priv->hwmon_dev)) 2792a978f7c4SMarek Behún return PTR_ERR(priv->hwmon_dev); 27930b04680fSAndrew Lunn 2794a978f7c4SMarek Behún if (ops->config) 2795a978f7c4SMarek Behún err = ops->config(phydev); 2796a978f7c4SMarek Behún 2797a978f7c4SMarek Behún return err; 27980b04680fSAndrew Lunn } 27990b04680fSAndrew Lunn 280041d26bf4SMarek Behún static const struct marvell_hwmon_ops m88e1121_hwmon_ops = { 280141d26bf4SMarek Behún .get_temp = m88e1121_get_temp, 280241d26bf4SMarek Behún }; 28030b04680fSAndrew Lunn 280441d26bf4SMarek Behún static const struct marvell_hwmon_ops m88e1510_hwmon_ops = { 280541d26bf4SMarek Behún .get_temp = m88e1510_get_temp, 280641d26bf4SMarek Behún .get_temp_critical = m88e1510_get_temp_critical, 280741d26bf4SMarek Behún .set_temp_critical = m88e1510_set_temp_critical, 280841d26bf4SMarek Behún .get_temp_alarm = m88e1510_get_temp_alarm, 280941d26bf4SMarek Behún }; 2810fee2d546SAndrew Lunn 281141d26bf4SMarek Behún static const struct marvell_hwmon_ops m88e6390_hwmon_ops = { 281241d26bf4SMarek Behún .get_temp = m88e6390_get_temp, 281341d26bf4SMarek Behún }; 281441d26bf4SMarek Behún 2815a978f7c4SMarek Behún static const struct marvell_hwmon_ops m88e6393_hwmon_ops = { 2816a978f7c4SMarek Behún .config = m88e6393_hwmon_config, 2817a978f7c4SMarek Behún .get_temp = m88e6393_get_temp, 2818a978f7c4SMarek Behún .get_temp_critical = m88e6393_get_temp_critical, 2819a978f7c4SMarek Behún .set_temp_critical = m88e6393_set_temp_critical, 2820a978f7c4SMarek Behún .get_temp_alarm = m88e1510_get_temp_alarm, 2821a978f7c4SMarek Behún }; 2822a978f7c4SMarek Behún 282341d26bf4SMarek Behún #define DEF_MARVELL_HWMON_OPS(s) (&(s)) 282441d26bf4SMarek Behún 28250b04680fSAndrew Lunn #else 28260b04680fSAndrew Lunn 282741d26bf4SMarek Behún #define DEF_MARVELL_HWMON_OPS(s) NULL 2828fee2d546SAndrew Lunn 282941d26bf4SMarek Behún static int marvell_hwmon_probe(struct phy_device *phydev) 2830fee2d546SAndrew Lunn { 2831fee2d546SAndrew Lunn return 0; 2832fee2d546SAndrew Lunn } 28330b04680fSAndrew Lunn #endif 28340b04680fSAndrew Lunn 2835d2fa47d9SAndrew Lunn static int marvell_probe(struct phy_device *phydev) 2836d2fa47d9SAndrew Lunn { 2837d2fa47d9SAndrew Lunn struct marvell_priv *priv; 2838d2fa47d9SAndrew Lunn 2839e5a03bfdSAndrew Lunn priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 2840d2fa47d9SAndrew Lunn if (!priv) 2841d2fa47d9SAndrew Lunn return -ENOMEM; 2842d2fa47d9SAndrew Lunn 2843d2fa47d9SAndrew Lunn phydev->priv = priv; 2844d2fa47d9SAndrew Lunn 284541d26bf4SMarek Behún return marvell_hwmon_probe(phydev); 2846fee2d546SAndrew Lunn } 2847fee2d546SAndrew Lunn 2848b697d9d3SIvan Bornyakov static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id) 2849b697d9d3SIvan Bornyakov { 2850fd580c98SRussell King DECLARE_PHY_INTERFACE_MASK(interfaces); 2851b697d9d3SIvan Bornyakov struct phy_device *phydev = upstream; 2852b697d9d3SIvan Bornyakov phy_interface_t interface; 2853b697d9d3SIvan Bornyakov struct device *dev; 2854b697d9d3SIvan Bornyakov int oldpage; 2855b697d9d3SIvan Bornyakov int ret = 0; 2856b697d9d3SIvan Bornyakov u16 mode; 2857b697d9d3SIvan Bornyakov 2858b697d9d3SIvan Bornyakov __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, }; 2859b697d9d3SIvan Bornyakov 2860b697d9d3SIvan Bornyakov dev = &phydev->mdio.dev; 2861b697d9d3SIvan Bornyakov 2862fd580c98SRussell King sfp_parse_support(phydev->sfp_bus, id, supported, interfaces); 2863b697d9d3SIvan Bornyakov interface = sfp_select_interface(phydev->sfp_bus, supported); 2864b697d9d3SIvan Bornyakov 2865b697d9d3SIvan Bornyakov dev_info(dev, "%s SFP module inserted\n", phy_modes(interface)); 2866b697d9d3SIvan Bornyakov 2867b697d9d3SIvan Bornyakov switch (interface) { 2868b697d9d3SIvan Bornyakov case PHY_INTERFACE_MODE_1000BASEX: 2869b697d9d3SIvan Bornyakov mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X; 2870b697d9d3SIvan Bornyakov 2871b697d9d3SIvan Bornyakov break; 2872b697d9d3SIvan Bornyakov case PHY_INTERFACE_MODE_100BASEX: 2873b697d9d3SIvan Bornyakov mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX; 2874b697d9d3SIvan Bornyakov 2875b697d9d3SIvan Bornyakov break; 2876b697d9d3SIvan Bornyakov case PHY_INTERFACE_MODE_SGMII: 2877b697d9d3SIvan Bornyakov mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII; 2878b697d9d3SIvan Bornyakov 2879b697d9d3SIvan Bornyakov break; 2880b697d9d3SIvan Bornyakov default: 2881b697d9d3SIvan Bornyakov dev_err(dev, "Incompatible SFP module inserted\n"); 2882b697d9d3SIvan Bornyakov 2883b697d9d3SIvan Bornyakov return -EINVAL; 2884b697d9d3SIvan Bornyakov } 2885b697d9d3SIvan Bornyakov 2886b697d9d3SIvan Bornyakov oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE); 2887b697d9d3SIvan Bornyakov if (oldpage < 0) 2888b697d9d3SIvan Bornyakov goto error; 2889b697d9d3SIvan Bornyakov 2890b697d9d3SIvan Bornyakov ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 2891b697d9d3SIvan Bornyakov MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode); 2892b697d9d3SIvan Bornyakov if (ret < 0) 2893b697d9d3SIvan Bornyakov goto error; 2894b697d9d3SIvan Bornyakov 2895b697d9d3SIvan Bornyakov ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 2896b697d9d3SIvan Bornyakov MII_88E1510_GEN_CTRL_REG_1_RESET); 2897b697d9d3SIvan Bornyakov 2898b697d9d3SIvan Bornyakov error: 2899b697d9d3SIvan Bornyakov return phy_restore_page(phydev, oldpage, ret); 2900b697d9d3SIvan Bornyakov } 2901b697d9d3SIvan Bornyakov 2902b697d9d3SIvan Bornyakov static void m88e1510_sfp_remove(void *upstream) 2903b697d9d3SIvan Bornyakov { 2904b697d9d3SIvan Bornyakov struct phy_device *phydev = upstream; 2905b697d9d3SIvan Bornyakov int oldpage; 2906b697d9d3SIvan Bornyakov int ret = 0; 2907b697d9d3SIvan Bornyakov 2908b697d9d3SIvan Bornyakov oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE); 2909b697d9d3SIvan Bornyakov if (oldpage < 0) 2910b697d9d3SIvan Bornyakov goto error; 2911b697d9d3SIvan Bornyakov 2912b697d9d3SIvan Bornyakov ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 2913b697d9d3SIvan Bornyakov MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 2914b697d9d3SIvan Bornyakov MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII); 2915b697d9d3SIvan Bornyakov if (ret < 0) 2916b697d9d3SIvan Bornyakov goto error; 2917b697d9d3SIvan Bornyakov 2918b697d9d3SIvan Bornyakov ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 2919b697d9d3SIvan Bornyakov MII_88E1510_GEN_CTRL_REG_1_RESET); 2920b697d9d3SIvan Bornyakov 2921b697d9d3SIvan Bornyakov error: 2922b697d9d3SIvan Bornyakov phy_restore_page(phydev, oldpage, ret); 2923b697d9d3SIvan Bornyakov } 2924b697d9d3SIvan Bornyakov 2925b697d9d3SIvan Bornyakov static const struct sfp_upstream_ops m88e1510_sfp_ops = { 2926b697d9d3SIvan Bornyakov .module_insert = m88e1510_sfp_insert, 2927b697d9d3SIvan Bornyakov .module_remove = m88e1510_sfp_remove, 2928b697d9d3SIvan Bornyakov .attach = phy_sfp_attach, 2929b697d9d3SIvan Bornyakov .detach = phy_sfp_detach, 2930b697d9d3SIvan Bornyakov }; 2931b697d9d3SIvan Bornyakov 2932b697d9d3SIvan Bornyakov static int m88e1510_probe(struct phy_device *phydev) 2933b697d9d3SIvan Bornyakov { 2934b697d9d3SIvan Bornyakov int err; 2935b697d9d3SIvan Bornyakov 2936b697d9d3SIvan Bornyakov err = marvell_probe(phydev); 2937b697d9d3SIvan Bornyakov if (err) 2938b697d9d3SIvan Bornyakov return err; 2939b697d9d3SIvan Bornyakov 2940b697d9d3SIvan Bornyakov return phy_sfp_probe(phydev, &m88e1510_sfp_ops); 2941b697d9d3SIvan Bornyakov } 2942b697d9d3SIvan Bornyakov 2943e5479239SOlof Johansson static struct phy_driver marvell_drivers[] = { 2944e5479239SOlof Johansson { 29452f495c39SBenjamin Herrenschmidt .phy_id = MARVELL_PHY_ID_88E1101, 29462f495c39SBenjamin Herrenschmidt .phy_id_mask = MARVELL_PHY_ID_MASK, 294700db8189SAndy Fleming .name = "Marvell 88E1101", 2948dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 294918702414SArnd Bergmann .probe = marvell_probe, 2950ef0f9545SMaxim Kochetkov .config_init = marvell_config_init, 2951ef0f9545SMaxim Kochetkov .config_aneg = m88e1101_config_aneg, 2952ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 2953a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 2954ef0f9545SMaxim Kochetkov .resume = genphy_resume, 2955ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 2956424ca4c5SRussell King .read_page = marvell_read_page, 2957424ca4c5SRussell King .write_page = marvell_write_page, 2958d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 2959d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 2960d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 2961e5479239SOlof Johansson }, 2962e5479239SOlof Johansson { 29632f495c39SBenjamin Herrenschmidt .phy_id = MARVELL_PHY_ID_88E1112, 29642f495c39SBenjamin Herrenschmidt .phy_id_mask = MARVELL_PHY_ID_MASK, 296585cfb534SOlof Johansson .name = "Marvell 88E1112", 2966dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 2967d2fa47d9SAndrew Lunn .probe = marvell_probe, 29688385b1f0SMaxim Kochetkov .config_init = m88e1112_config_init, 2969ef0f9545SMaxim Kochetkov .config_aneg = marvell_config_aneg, 2970ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 2971a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 2972ef0f9545SMaxim Kochetkov .resume = genphy_resume, 2973ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 2974424ca4c5SRussell King .read_page = marvell_read_page, 2975424ca4c5SRussell King .write_page = marvell_write_page, 2976d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 2977d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 2978d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 2979262caf47SHeiner Kallweit .get_tunable = m88e1011_get_tunable, 2980262caf47SHeiner Kallweit .set_tunable = m88e1011_set_tunable, 298185cfb534SOlof Johansson }, 298285cfb534SOlof Johansson { 29832f495c39SBenjamin Herrenschmidt .phy_id = MARVELL_PHY_ID_88E1111, 29842f495c39SBenjamin Herrenschmidt .phy_id_mask = MARVELL_PHY_ID_MASK, 298576884679SAndy Fleming .name = "Marvell 88E1111", 2986dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 2987d2fa47d9SAndrew Lunn .probe = marvell_probe, 29888385b1f0SMaxim Kochetkov .config_init = m88e1111gbe_config_init, 29891887023aSRobert Hancock .config_aneg = m88e1111_config_aneg, 29901887023aSRobert Hancock .read_status = marvell_read_status, 29911887023aSRobert Hancock .config_intr = marvell_config_intr, 2992a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 29931887023aSRobert Hancock .resume = genphy_resume, 29941887023aSRobert Hancock .suspend = genphy_suspend, 29951887023aSRobert Hancock .read_page = marvell_read_page, 29961887023aSRobert Hancock .write_page = marvell_write_page, 29971887023aSRobert Hancock .get_sset_count = marvell_get_sset_count, 29981887023aSRobert Hancock .get_strings = marvell_get_strings, 29991887023aSRobert Hancock .get_stats = marvell_get_stats, 30001887023aSRobert Hancock .get_tunable = m88e1111_get_tunable, 30011887023aSRobert Hancock .set_tunable = m88e1111_set_tunable, 30021887023aSRobert Hancock }, 30031887023aSRobert Hancock { 30041887023aSRobert Hancock .phy_id = MARVELL_PHY_ID_88E1111_FINISAR, 30051887023aSRobert Hancock .phy_id_mask = MARVELL_PHY_ID_MASK, 30061887023aSRobert Hancock .name = "Marvell 88E1111 (Finisar)", 30071887023aSRobert Hancock /* PHY_GBIT_FEATURES */ 30081887023aSRobert Hancock .probe = marvell_probe, 30098385b1f0SMaxim Kochetkov .config_init = m88e1111gbe_config_init, 30101887023aSRobert Hancock .config_aneg = m88e1111_config_aneg, 3011ef0f9545SMaxim Kochetkov .read_status = marvell_read_status, 3012ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3013a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3014ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3015ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3016424ca4c5SRussell King .read_page = marvell_read_page, 3017424ca4c5SRussell King .write_page = marvell_write_page, 3018d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3019d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 3020d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 30215c6bc519SHeiner Kallweit .get_tunable = m88e1111_get_tunable, 30225c6bc519SHeiner Kallweit .set_tunable = m88e1111_set_tunable, 3023e5479239SOlof Johansson }, 3024e5479239SOlof Johansson { 30252f495c39SBenjamin Herrenschmidt .phy_id = MARVELL_PHY_ID_88E1118, 30262f495c39SBenjamin Herrenschmidt .phy_id_mask = MARVELL_PHY_ID_MASK, 3027605f196eSRon Madrid .name = "Marvell 88E1118", 3028dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 3029d2fa47d9SAndrew Lunn .probe = marvell_probe, 3030ef0f9545SMaxim Kochetkov .config_init = m88e1118_config_init, 3031ef0f9545SMaxim Kochetkov .config_aneg = m88e1118_config_aneg, 3032ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3033a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3034ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3035ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3036424ca4c5SRussell King .read_page = marvell_read_page, 3037424ca4c5SRussell King .write_page = marvell_write_page, 3038d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3039d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 3040d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 3041605f196eSRon Madrid }, 3042605f196eSRon Madrid { 30432f495c39SBenjamin Herrenschmidt .phy_id = MARVELL_PHY_ID_88E1121R, 30442f495c39SBenjamin Herrenschmidt .phy_id_mask = MARVELL_PHY_ID_MASK, 3045140bc929SSergei Poselenov .name = "Marvell 88E1121R", 304641d26bf4SMarek Behún .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops), 3047dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 304841d26bf4SMarek Behún .probe = marvell_probe, 30498385b1f0SMaxim Kochetkov .config_init = marvell_1011gbe_config_init, 3050ef0f9545SMaxim Kochetkov .config_aneg = m88e1121_config_aneg, 3051ef0f9545SMaxim Kochetkov .read_status = marvell_read_status, 3052ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3053a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3054ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3055ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3056424ca4c5SRussell King .read_page = marvell_read_page, 3057424ca4c5SRussell King .write_page = marvell_write_page, 3058d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3059d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 3060d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 3061911af5e1SHeiner Kallweit .get_tunable = m88e1011_get_tunable, 3062911af5e1SHeiner Kallweit .set_tunable = m88e1011_set_tunable, 3063140bc929SSergei Poselenov }, 3064140bc929SSergei Poselenov { 3065337ac9d5SCyril Chemparathy .phy_id = MARVELL_PHY_ID_88E1318S, 30666ba74014SLinus Torvalds .phy_id_mask = MARVELL_PHY_ID_MASK, 3067337ac9d5SCyril Chemparathy .name = "Marvell 88E1318S", 3068dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 3069d2fa47d9SAndrew Lunn .probe = marvell_probe, 3070ef0f9545SMaxim Kochetkov .config_init = m88e1318_config_init, 3071ef0f9545SMaxim Kochetkov .config_aneg = m88e1318_config_aneg, 3072ef0f9545SMaxim Kochetkov .read_status = marvell_read_status, 3073ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3074a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3075ef0f9545SMaxim Kochetkov .get_wol = m88e1318_get_wol, 3076ef0f9545SMaxim Kochetkov .set_wol = m88e1318_set_wol, 3077ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3078ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3079424ca4c5SRussell King .read_page = marvell_read_page, 3080424ca4c5SRussell King .write_page = marvell_write_page, 3081d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3082d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 3083d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 30843ff1c259SCyril Chemparathy }, 30853ff1c259SCyril Chemparathy { 30862f495c39SBenjamin Herrenschmidt .phy_id = MARVELL_PHY_ID_88E1145, 30872f495c39SBenjamin Herrenschmidt .phy_id_mask = MARVELL_PHY_ID_MASK, 308876884679SAndy Fleming .name = "Marvell 88E1145", 3089dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 3090d2fa47d9SAndrew Lunn .probe = marvell_probe, 3091ef0f9545SMaxim Kochetkov .config_init = m88e1145_config_init, 3092ef0f9545SMaxim Kochetkov .config_aneg = m88e1101_config_aneg, 3093ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3094a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3095ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3096ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3097424ca4c5SRussell King .read_page = marvell_read_page, 3098424ca4c5SRussell King .write_page = marvell_write_page, 3099d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3100d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 3101d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 3102a319fb52SHeiner Kallweit .get_tunable = m88e1111_get_tunable, 3103a319fb52SHeiner Kallweit .set_tunable = m88e1111_set_tunable, 3104ac8c635aSOlof Johansson }, 3105ac8c635aSOlof Johansson { 310690600732SDavid Daney .phy_id = MARVELL_PHY_ID_88E1149R, 310790600732SDavid Daney .phy_id_mask = MARVELL_PHY_ID_MASK, 310890600732SDavid Daney .name = "Marvell 88E1149R", 3109dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 3110d2fa47d9SAndrew Lunn .probe = marvell_probe, 3111ef0f9545SMaxim Kochetkov .config_init = m88e1149_config_init, 3112ef0f9545SMaxim Kochetkov .config_aneg = m88e1118_config_aneg, 3113ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3114a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3115ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3116ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3117424ca4c5SRussell King .read_page = marvell_read_page, 3118424ca4c5SRussell King .write_page = marvell_write_page, 3119d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3120d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 3121d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 312290600732SDavid Daney }, 312390600732SDavid Daney { 31242f495c39SBenjamin Herrenschmidt .phy_id = MARVELL_PHY_ID_88E1240, 31252f495c39SBenjamin Herrenschmidt .phy_id_mask = MARVELL_PHY_ID_MASK, 3126ac8c635aSOlof Johansson .name = "Marvell 88E1240", 3127dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 3128d2fa47d9SAndrew Lunn .probe = marvell_probe, 31298385b1f0SMaxim Kochetkov .config_init = m88e1112_config_init, 3130ef0f9545SMaxim Kochetkov .config_aneg = marvell_config_aneg, 3131ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3132a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3133ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3134ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3135424ca4c5SRussell King .read_page = marvell_read_page, 3136424ca4c5SRussell King .write_page = marvell_write_page, 3137d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3138d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 3139d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 314065ad85f6SMaxim Kochetkov .get_tunable = m88e1011_get_tunable, 314165ad85f6SMaxim Kochetkov .set_tunable = m88e1011_set_tunable, 3142ac8c635aSOlof Johansson }, 31433da09a51SMichal Simek { 31443da09a51SMichal Simek .phy_id = MARVELL_PHY_ID_88E1116R, 31453da09a51SMichal Simek .phy_id_mask = MARVELL_PHY_ID_MASK, 31463da09a51SMichal Simek .name = "Marvell 88E1116R", 3147dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 3148d2fa47d9SAndrew Lunn .probe = marvell_probe, 3149ef0f9545SMaxim Kochetkov .config_init = m88e1116r_config_init, 3150ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3151a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3152ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3153ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3154424ca4c5SRussell King .read_page = marvell_read_page, 3155424ca4c5SRussell King .write_page = marvell_write_page, 3156d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3157d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 3158d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 3159262caf47SHeiner Kallweit .get_tunable = m88e1011_get_tunable, 3160262caf47SHeiner Kallweit .set_tunable = m88e1011_set_tunable, 31613da09a51SMichal Simek }, 316210e24caaSMichal Simek { 316310e24caaSMichal Simek .phy_id = MARVELL_PHY_ID_88E1510, 316410e24caaSMichal Simek .phy_id_mask = MARVELL_PHY_ID_MASK, 316510e24caaSMichal Simek .name = "Marvell 88E1510", 316641d26bf4SMarek Behún .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3167719655a1SAndrew Lunn .features = PHY_GBIT_FIBRE_FEATURES, 3168fc879f72SAndrew Lunn .flags = PHY_POLL_CABLE_TEST, 3169b697d9d3SIvan Bornyakov .probe = m88e1510_probe, 3170ef0f9545SMaxim Kochetkov .config_init = m88e1510_config_init, 3171ef0f9545SMaxim Kochetkov .config_aneg = m88e1510_config_aneg, 3172ef0f9545SMaxim Kochetkov .read_status = marvell_read_status, 3173ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3174a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3175ef0f9545SMaxim Kochetkov .get_wol = m88e1318_get_wol, 3176ef0f9545SMaxim Kochetkov .set_wol = m88e1318_set_wol, 3177ef0f9545SMaxim Kochetkov .resume = marvell_resume, 3178ef0f9545SMaxim Kochetkov .suspend = marvell_suspend, 3179424ca4c5SRussell King .read_page = marvell_read_page, 3180424ca4c5SRussell King .write_page = marvell_write_page, 3181d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3182d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 3183d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 3184020a45afSMohammad Athari Bin Ismail .set_loopback = m88e1510_loopback, 3185262caf47SHeiner Kallweit .get_tunable = m88e1011_get_tunable, 3186262caf47SHeiner Kallweit .set_tunable = m88e1011_set_tunable, 3187fc879f72SAndrew Lunn .cable_test_start = marvell_vct7_cable_test_start, 31880c9bcc1dSAndrew Lunn .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3189fc879f72SAndrew Lunn .cable_test_get_status = marvell_vct7_cable_test_get_status, 319010e24caaSMichal Simek }, 31916b358aedSSebastian Hesselbarth { 3192819ec8e1SAndrew Lunn .phy_id = MARVELL_PHY_ID_88E1540, 3193819ec8e1SAndrew Lunn .phy_id_mask = MARVELL_PHY_ID_MASK, 3194819ec8e1SAndrew Lunn .name = "Marvell 88E1540", 319541d26bf4SMarek Behún .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3196dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 3197fc879f72SAndrew Lunn .flags = PHY_POLL_CABLE_TEST, 319841d26bf4SMarek Behún .probe = marvell_probe, 31998385b1f0SMaxim Kochetkov .config_init = marvell_1011gbe_config_init, 3200ef0f9545SMaxim Kochetkov .config_aneg = m88e1510_config_aneg, 3201ef0f9545SMaxim Kochetkov .read_status = marvell_read_status, 3202ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3203a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3204ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3205ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3206424ca4c5SRussell King .read_page = marvell_read_page, 3207424ca4c5SRussell King .write_page = marvell_write_page, 3208d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3209d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 3210d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 321169f42be8SHeiner Kallweit .get_tunable = m88e1540_get_tunable, 321269f42be8SHeiner Kallweit .set_tunable = m88e1540_set_tunable, 3213fc879f72SAndrew Lunn .cable_test_start = marvell_vct7_cable_test_start, 32140c9bcc1dSAndrew Lunn .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3215fc879f72SAndrew Lunn .cable_test_get_status = marvell_vct7_cable_test_get_status, 3216819ec8e1SAndrew Lunn }, 3217819ec8e1SAndrew Lunn { 321860f06fdeSAndrew Lunn .phy_id = MARVELL_PHY_ID_88E1545, 321960f06fdeSAndrew Lunn .phy_id_mask = MARVELL_PHY_ID_MASK, 322060f06fdeSAndrew Lunn .name = "Marvell 88E1545", 322141d26bf4SMarek Behún .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 322241d26bf4SMarek Behún .probe = marvell_probe, 3223dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 3224fc879f72SAndrew Lunn .flags = PHY_POLL_CABLE_TEST, 32258385b1f0SMaxim Kochetkov .config_init = marvell_1011gbe_config_init, 3226ef0f9545SMaxim Kochetkov .config_aneg = m88e1510_config_aneg, 3227ef0f9545SMaxim Kochetkov .read_status = marvell_read_status, 3228ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3229a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3230ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3231ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3232424ca4c5SRussell King .read_page = marvell_read_page, 3233424ca4c5SRussell King .write_page = marvell_write_page, 323460f06fdeSAndrew Lunn .get_sset_count = marvell_get_sset_count, 323560f06fdeSAndrew Lunn .get_strings = marvell_get_strings, 323660f06fdeSAndrew Lunn .get_stats = marvell_get_stats, 3237262caf47SHeiner Kallweit .get_tunable = m88e1540_get_tunable, 3238262caf47SHeiner Kallweit .set_tunable = m88e1540_set_tunable, 3239fc879f72SAndrew Lunn .cable_test_start = marvell_vct7_cable_test_start, 32400c9bcc1dSAndrew Lunn .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3241fc879f72SAndrew Lunn .cable_test_get_status = marvell_vct7_cable_test_get_status, 324260f06fdeSAndrew Lunn }, 324360f06fdeSAndrew Lunn { 32446b358aedSSebastian Hesselbarth .phy_id = MARVELL_PHY_ID_88E3016, 32456b358aedSSebastian Hesselbarth .phy_id_mask = MARVELL_PHY_ID_MASK, 32466b358aedSSebastian Hesselbarth .name = "Marvell 88E3016", 3247dcdecdcfSHeiner Kallweit /* PHY_BASIC_FEATURES */ 3248d2fa47d9SAndrew Lunn .probe = marvell_probe, 3249ef0f9545SMaxim Kochetkov .config_init = m88e3016_config_init, 3250ef0f9545SMaxim Kochetkov .aneg_done = marvell_aneg_done, 3251ef0f9545SMaxim Kochetkov .read_status = marvell_read_status, 3252ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3253a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3254ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3255ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3256424ca4c5SRussell King .read_page = marvell_read_page, 3257424ca4c5SRussell King .write_page = marvell_write_page, 3258d2fa47d9SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3259d2fa47d9SAndrew Lunn .get_strings = marvell_get_strings, 3260d2fa47d9SAndrew Lunn .get_stats = marvell_get_stats, 32616b358aedSSebastian Hesselbarth }, 3262e4cf8a38SAndrew Lunn { 32631fe976d3SPali Rohár .phy_id = MARVELL_PHY_ID_88E6341_FAMILY, 3264e4cf8a38SAndrew Lunn .phy_id_mask = MARVELL_PHY_ID_MASK, 32651fe976d3SPali Rohár .name = "Marvell 88E6341 Family", 326641d26bf4SMarek Behún .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 32671fe976d3SPali Rohár /* PHY_GBIT_FEATURES */ 32681fe976d3SPali Rohár .flags = PHY_POLL_CABLE_TEST, 326941d26bf4SMarek Behún .probe = marvell_probe, 32708385b1f0SMaxim Kochetkov .config_init = marvell_1011gbe_config_init, 32711fe976d3SPali Rohár .config_aneg = m88e6390_config_aneg, 32721fe976d3SPali Rohár .read_status = marvell_read_status, 32731fe976d3SPali Rohár .config_intr = marvell_config_intr, 32741fe976d3SPali Rohár .handle_interrupt = marvell_handle_interrupt, 32751fe976d3SPali Rohár .resume = genphy_resume, 32761fe976d3SPali Rohár .suspend = genphy_suspend, 32771fe976d3SPali Rohár .read_page = marvell_read_page, 32781fe976d3SPali Rohár .write_page = marvell_write_page, 32791fe976d3SPali Rohár .get_sset_count = marvell_get_sset_count, 32801fe976d3SPali Rohár .get_strings = marvell_get_strings, 32811fe976d3SPali Rohár .get_stats = marvell_get_stats, 32821fe976d3SPali Rohár .get_tunable = m88e1540_get_tunable, 32831fe976d3SPali Rohár .set_tunable = m88e1540_set_tunable, 32841fe976d3SPali Rohár .cable_test_start = marvell_vct7_cable_test_start, 32851fe976d3SPali Rohár .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 32861fe976d3SPali Rohár .cable_test_get_status = marvell_vct7_cable_test_get_status, 32871fe976d3SPali Rohár }, 32881fe976d3SPali Rohár { 32891fe976d3SPali Rohár .phy_id = MARVELL_PHY_ID_88E6390_FAMILY, 32901fe976d3SPali Rohár .phy_id_mask = MARVELL_PHY_ID_MASK, 32911fe976d3SPali Rohár .name = "Marvell 88E6390 Family", 329241d26bf4SMarek Behún .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops), 3293dcdecdcfSHeiner Kallweit /* PHY_GBIT_FEATURES */ 3294fc879f72SAndrew Lunn .flags = PHY_POLL_CABLE_TEST, 329541d26bf4SMarek Behún .probe = marvell_probe, 32968385b1f0SMaxim Kochetkov .config_init = marvell_1011gbe_config_init, 3297ef0f9545SMaxim Kochetkov .config_aneg = m88e6390_config_aneg, 3298ef0f9545SMaxim Kochetkov .read_status = marvell_read_status, 3299ef0f9545SMaxim Kochetkov .config_intr = marvell_config_intr, 3300a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3301ef0f9545SMaxim Kochetkov .resume = genphy_resume, 3302ef0f9545SMaxim Kochetkov .suspend = genphy_suspend, 3303424ca4c5SRussell King .read_page = marvell_read_page, 3304424ca4c5SRussell King .write_page = marvell_write_page, 3305e4cf8a38SAndrew Lunn .get_sset_count = marvell_get_sset_count, 3306e4cf8a38SAndrew Lunn .get_strings = marvell_get_strings, 3307e4cf8a38SAndrew Lunn .get_stats = marvell_get_stats, 330869f42be8SHeiner Kallweit .get_tunable = m88e1540_get_tunable, 330969f42be8SHeiner Kallweit .set_tunable = m88e1540_set_tunable, 3310fc879f72SAndrew Lunn .cable_test_start = marvell_vct7_cable_test_start, 33110c9bcc1dSAndrew Lunn .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3312fc879f72SAndrew Lunn .cable_test_get_status = marvell_vct7_cable_test_get_status, 3313e4cf8a38SAndrew Lunn }, 3314a602ea86SMaxim Kochetkov { 3315a978f7c4SMarek Behún .phy_id = MARVELL_PHY_ID_88E6393_FAMILY, 3316a978f7c4SMarek Behún .phy_id_mask = MARVELL_PHY_ID_MASK, 3317a978f7c4SMarek Behún .name = "Marvell 88E6393 Family", 3318a978f7c4SMarek Behún .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops), 3319a978f7c4SMarek Behún /* PHY_GBIT_FEATURES */ 3320a978f7c4SMarek Behún .flags = PHY_POLL_CABLE_TEST, 3321a978f7c4SMarek Behún .probe = marvell_probe, 33228385b1f0SMaxim Kochetkov .config_init = marvell_1011gbe_config_init, 3323a978f7c4SMarek Behún .config_aneg = m88e1510_config_aneg, 3324a978f7c4SMarek Behún .read_status = marvell_read_status, 3325a978f7c4SMarek Behún .config_intr = marvell_config_intr, 3326a978f7c4SMarek Behún .handle_interrupt = marvell_handle_interrupt, 3327a978f7c4SMarek Behún .resume = genphy_resume, 3328a978f7c4SMarek Behún .suspend = genphy_suspend, 3329a978f7c4SMarek Behún .read_page = marvell_read_page, 3330a978f7c4SMarek Behún .write_page = marvell_write_page, 3331a978f7c4SMarek Behún .get_sset_count = marvell_get_sset_count, 3332a978f7c4SMarek Behún .get_strings = marvell_get_strings, 3333a978f7c4SMarek Behún .get_stats = marvell_get_stats, 3334a978f7c4SMarek Behún .get_tunable = m88e1540_get_tunable, 3335a978f7c4SMarek Behún .set_tunable = m88e1540_set_tunable, 3336a978f7c4SMarek Behún .cable_test_start = marvell_vct7_cable_test_start, 3337a978f7c4SMarek Behún .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3338a978f7c4SMarek Behún .cable_test_get_status = marvell_vct7_cable_test_get_status, 3339a978f7c4SMarek Behún }, 3340a978f7c4SMarek Behún { 3341a602ea86SMaxim Kochetkov .phy_id = MARVELL_PHY_ID_88E1340S, 3342a602ea86SMaxim Kochetkov .phy_id_mask = MARVELL_PHY_ID_MASK, 3343a602ea86SMaxim Kochetkov .name = "Marvell 88E1340S", 334441d26bf4SMarek Behún .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 334541d26bf4SMarek Behún .probe = marvell_probe, 3346a602ea86SMaxim Kochetkov /* PHY_GBIT_FEATURES */ 33478385b1f0SMaxim Kochetkov .config_init = marvell_1011gbe_config_init, 3348a602ea86SMaxim Kochetkov .config_aneg = m88e1510_config_aneg, 3349a602ea86SMaxim Kochetkov .read_status = marvell_read_status, 3350a602ea86SMaxim Kochetkov .config_intr = marvell_config_intr, 3351a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3352a602ea86SMaxim Kochetkov .resume = genphy_resume, 3353a602ea86SMaxim Kochetkov .suspend = genphy_suspend, 3354a602ea86SMaxim Kochetkov .read_page = marvell_read_page, 3355a602ea86SMaxim Kochetkov .write_page = marvell_write_page, 3356a602ea86SMaxim Kochetkov .get_sset_count = marvell_get_sset_count, 3357a602ea86SMaxim Kochetkov .get_strings = marvell_get_strings, 3358a602ea86SMaxim Kochetkov .get_stats = marvell_get_stats, 3359a602ea86SMaxim Kochetkov .get_tunable = m88e1540_get_tunable, 3360a602ea86SMaxim Kochetkov .set_tunable = m88e1540_set_tunable, 3361a602ea86SMaxim Kochetkov }, 3362f59babf9SMaxim Kochetkov { 3363f59babf9SMaxim Kochetkov .phy_id = MARVELL_PHY_ID_88E1548P, 3364f59babf9SMaxim Kochetkov .phy_id_mask = MARVELL_PHY_ID_MASK, 3365f59babf9SMaxim Kochetkov .name = "Marvell 88E1548P", 336641d26bf4SMarek Behún .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 336741d26bf4SMarek Behún .probe = marvell_probe, 3368f59babf9SMaxim Kochetkov .features = PHY_GBIT_FIBRE_FEATURES, 33698385b1f0SMaxim Kochetkov .config_init = marvell_1011gbe_config_init, 3370f59babf9SMaxim Kochetkov .config_aneg = m88e1510_config_aneg, 3371f59babf9SMaxim Kochetkov .read_status = marvell_read_status, 3372f59babf9SMaxim Kochetkov .config_intr = marvell_config_intr, 3373a0723b37SIoana Ciornei .handle_interrupt = marvell_handle_interrupt, 3374f59babf9SMaxim Kochetkov .resume = genphy_resume, 3375f59babf9SMaxim Kochetkov .suspend = genphy_suspend, 3376f59babf9SMaxim Kochetkov .read_page = marvell_read_page, 3377f59babf9SMaxim Kochetkov .write_page = marvell_write_page, 3378f59babf9SMaxim Kochetkov .get_sset_count = marvell_get_sset_count, 3379f59babf9SMaxim Kochetkov .get_strings = marvell_get_strings, 3380f59babf9SMaxim Kochetkov .get_stats = marvell_get_stats, 3381f59babf9SMaxim Kochetkov .get_tunable = m88e1540_get_tunable, 3382f59babf9SMaxim Kochetkov .set_tunable = m88e1540_set_tunable, 3383f59babf9SMaxim Kochetkov }, 338476884679SAndy Fleming }; 338576884679SAndy Fleming 338650fd7150SJohan Hovold module_phy_driver(marvell_drivers); 33874e4f10f6SDavid Woodhouse 3388cf93c945SUwe Kleine-König static struct mdio_device_id __maybe_unused marvell_tbl[] = { 3389f5e1cabfSMichal Simek { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 3390f5e1cabfSMichal Simek { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 3391f5e1cabfSMichal Simek { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 33921887023aSRobert Hancock { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK }, 3393f5e1cabfSMichal Simek { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 3394f5e1cabfSMichal Simek { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 3395f5e1cabfSMichal Simek { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 3396f5e1cabfSMichal Simek { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 3397f5e1cabfSMichal Simek { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 3398f5e1cabfSMichal Simek { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 33993da09a51SMichal Simek { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 340010e24caaSMichal Simek { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 3401819ec8e1SAndrew Lunn { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 340260f06fdeSAndrew Lunn { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 34036b358aedSSebastian Hesselbarth { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 34041fe976d3SPali Rohár { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK }, 34051fe976d3SPali Rohár { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK }, 3406a978f7c4SMarek Behún { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK }, 3407a602ea86SMaxim Kochetkov { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK }, 3408f59babf9SMaxim Kochetkov { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK }, 34094e4f10f6SDavid Woodhouse { } 34104e4f10f6SDavid Woodhouse }; 34114e4f10f6SDavid Woodhouse 34124e4f10f6SDavid Woodhouse MODULE_DEVICE_TABLE(mdio, marvell_tbl); 3413