1 /* 2 * drivers/net/phy/davicom.c 3 * 4 * Driver for Davicom PHYs 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 * 10 * This program is free software; you can redistribute it and/or modify it 11 * under the terms of the GNU General Public License as published by the 12 * Free Software Foundation; either version 2 of the License, or (at your 13 * option) any later version. 14 * 15 */ 16 #include <linux/kernel.h> 17 #include <linux/string.h> 18 #include <linux/errno.h> 19 #include <linux/unistd.h> 20 #include <linux/slab.h> 21 #include <linux/interrupt.h> 22 #include <linux/init.h> 23 #include <linux/delay.h> 24 #include <linux/netdevice.h> 25 #include <linux/etherdevice.h> 26 #include <linux/skbuff.h> 27 #include <linux/spinlock.h> 28 #include <linux/mm.h> 29 #include <linux/module.h> 30 #include <linux/mii.h> 31 #include <linux/ethtool.h> 32 #include <linux/phy.h> 33 34 #include <asm/io.h> 35 #include <asm/irq.h> 36 #include <asm/uaccess.h> 37 38 #define MII_DM9161_SCR 0x10 39 #define MII_DM9161_SCR_INIT 0x0610 40 #define MII_DM9161_SCR_RMII 0x0100 41 42 /* DM9161 Interrupt Register */ 43 #define MII_DM9161_INTR 0x15 44 #define MII_DM9161_INTR_PEND 0x8000 45 #define MII_DM9161_INTR_DPLX_MASK 0x0800 46 #define MII_DM9161_INTR_SPD_MASK 0x0400 47 #define MII_DM9161_INTR_LINK_MASK 0x0200 48 #define MII_DM9161_INTR_MASK 0x0100 49 #define MII_DM9161_INTR_DPLX_CHANGE 0x0010 50 #define MII_DM9161_INTR_SPD_CHANGE 0x0008 51 #define MII_DM9161_INTR_LINK_CHANGE 0x0004 52 #define MII_DM9161_INTR_INIT 0x0000 53 #define MII_DM9161_INTR_STOP \ 54 (MII_DM9161_INTR_DPLX_MASK | MII_DM9161_INTR_SPD_MASK \ 55 | MII_DM9161_INTR_LINK_MASK | MII_DM9161_INTR_MASK) 56 57 /* DM9161 10BT Configuration/Status */ 58 #define MII_DM9161_10BTCSR 0x12 59 #define MII_DM9161_10BTCSR_INIT 0x7800 60 61 MODULE_DESCRIPTION("Davicom PHY driver"); 62 MODULE_AUTHOR("Andy Fleming"); 63 MODULE_LICENSE("GPL"); 64 65 66 #define DM9161_DELAY 1 67 static int dm9161_config_intr(struct phy_device *phydev) 68 { 69 int temp; 70 71 temp = phy_read(phydev, MII_DM9161_INTR); 72 73 if (temp < 0) 74 return temp; 75 76 if(PHY_INTERRUPT_ENABLED == phydev->interrupts ) 77 temp &= ~(MII_DM9161_INTR_STOP); 78 else 79 temp |= MII_DM9161_INTR_STOP; 80 81 temp = phy_write(phydev, MII_DM9161_INTR, temp); 82 83 return temp; 84 } 85 86 static int dm9161_config_aneg(struct phy_device *phydev) 87 { 88 int err; 89 90 /* Isolate the PHY */ 91 err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE); 92 93 if (err < 0) 94 return err; 95 96 /* Configure the new settings */ 97 err = genphy_config_aneg(phydev); 98 99 if (err < 0) 100 return err; 101 102 return 0; 103 } 104 105 static int dm9161_config_init(struct phy_device *phydev) 106 { 107 int err, temp; 108 109 /* Isolate the PHY */ 110 err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE); 111 112 if (err < 0) 113 return err; 114 115 switch (phydev->interface) { 116 case PHY_INTERFACE_MODE_MII: 117 temp = MII_DM9161_SCR_INIT; 118 break; 119 case PHY_INTERFACE_MODE_RMII: 120 temp = MII_DM9161_SCR_INIT | MII_DM9161_SCR_RMII; 121 break; 122 default: 123 return -EINVAL; 124 } 125 126 /* Do not bypass the scrambler/descrambler */ 127 err = phy_write(phydev, MII_DM9161_SCR, temp); 128 if (err < 0) 129 return err; 130 131 /* Clear 10BTCSR to default */ 132 err = phy_write(phydev, MII_DM9161_10BTCSR, MII_DM9161_10BTCSR_INIT); 133 134 if (err < 0) 135 return err; 136 137 /* Reconnect the PHY, and enable Autonegotiation */ 138 err = phy_write(phydev, MII_BMCR, BMCR_ANENABLE); 139 140 if (err < 0) 141 return err; 142 143 return 0; 144 } 145 146 static int dm9161_ack_interrupt(struct phy_device *phydev) 147 { 148 int err = phy_read(phydev, MII_DM9161_INTR); 149 150 return (err < 0) ? err : 0; 151 } 152 153 static struct phy_driver dm9161e_driver = { 154 .phy_id = 0x0181b880, 155 .name = "Davicom DM9161E", 156 .phy_id_mask = 0x0ffffff0, 157 .features = PHY_BASIC_FEATURES, 158 .config_init = dm9161_config_init, 159 .config_aneg = dm9161_config_aneg, 160 .read_status = genphy_read_status, 161 .driver = { .owner = THIS_MODULE,}, 162 }; 163 164 static struct phy_driver dm9161a_driver = { 165 .phy_id = 0x0181b8a0, 166 .name = "Davicom DM9161A", 167 .phy_id_mask = 0x0ffffff0, 168 .features = PHY_BASIC_FEATURES, 169 .config_init = dm9161_config_init, 170 .config_aneg = dm9161_config_aneg, 171 .read_status = genphy_read_status, 172 .driver = { .owner = THIS_MODULE,}, 173 }; 174 175 static struct phy_driver dm9131_driver = { 176 .phy_id = 0x00181b80, 177 .name = "Davicom DM9131", 178 .phy_id_mask = 0x0ffffff0, 179 .features = PHY_BASIC_FEATURES, 180 .flags = PHY_HAS_INTERRUPT, 181 .config_aneg = genphy_config_aneg, 182 .read_status = genphy_read_status, 183 .ack_interrupt = dm9161_ack_interrupt, 184 .config_intr = dm9161_config_intr, 185 .driver = { .owner = THIS_MODULE,}, 186 }; 187 188 static int __init davicom_init(void) 189 { 190 int ret; 191 192 ret = phy_driver_register(&dm9161e_driver); 193 if (ret) 194 goto err1; 195 196 ret = phy_driver_register(&dm9161a_driver); 197 if (ret) 198 goto err2; 199 200 ret = phy_driver_register(&dm9131_driver); 201 if (ret) 202 goto err3; 203 return 0; 204 205 err3: 206 phy_driver_unregister(&dm9161a_driver); 207 err2: 208 phy_driver_unregister(&dm9161e_driver); 209 err1: 210 return ret; 211 } 212 213 static void __exit davicom_exit(void) 214 { 215 phy_driver_unregister(&dm9161e_driver); 216 phy_driver_unregister(&dm9161a_driver); 217 phy_driver_unregister(&dm9131_driver); 218 } 219 220 module_init(davicom_init); 221 module_exit(davicom_exit); 222