1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/cicada.c 4 * 5 * Driver for Cicada PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 */ 11 #include <linux/kernel.h> 12 #include <linux/string.h> 13 #include <linux/errno.h> 14 #include <linux/unistd.h> 15 #include <linux/interrupt.h> 16 #include <linux/init.h> 17 #include <linux/delay.h> 18 #include <linux/netdevice.h> 19 #include <linux/etherdevice.h> 20 #include <linux/skbuff.h> 21 #include <linux/spinlock.h> 22 #include <linux/mm.h> 23 #include <linux/module.h> 24 #include <linux/mii.h> 25 #include <linux/ethtool.h> 26 #include <linux/phy.h> 27 28 #include <linux/io.h> 29 #include <asm/irq.h> 30 #include <linux/uaccess.h> 31 32 /* Cicada Extended Control Register 1 */ 33 #define MII_CIS8201_EXT_CON1 0x17 34 #define MII_CIS8201_EXTCON1_INIT 0x0000 35 36 /* Cicada Interrupt Mask Register */ 37 #define MII_CIS8201_IMASK 0x19 38 #define MII_CIS8201_IMASK_IEN 0x8000 39 #define MII_CIS8201_IMASK_SPEED 0x4000 40 #define MII_CIS8201_IMASK_LINK 0x2000 41 #define MII_CIS8201_IMASK_DUPLEX 0x1000 42 #define MII_CIS8201_IMASK_MASK 0xf000 43 44 /* Cicada Interrupt Status Register */ 45 #define MII_CIS8201_ISTAT 0x1a 46 #define MII_CIS8201_ISTAT_STATUS 0x8000 47 #define MII_CIS8201_ISTAT_SPEED 0x4000 48 #define MII_CIS8201_ISTAT_LINK 0x2000 49 #define MII_CIS8201_ISTAT_DUPLEX 0x1000 50 51 /* Cicada Auxiliary Control/Status Register */ 52 #define MII_CIS8201_AUX_CONSTAT 0x1c 53 #define MII_CIS8201_AUXCONSTAT_INIT 0x0004 54 #define MII_CIS8201_AUXCONSTAT_DUPLEX 0x0020 55 #define MII_CIS8201_AUXCONSTAT_SPEED 0x0018 56 #define MII_CIS8201_AUXCONSTAT_GBIT 0x0010 57 #define MII_CIS8201_AUXCONSTAT_100 0x0008 58 59 MODULE_DESCRIPTION("Cicadia PHY driver"); 60 MODULE_AUTHOR("Andy Fleming"); 61 MODULE_LICENSE("GPL"); 62 63 static int cis820x_config_init(struct phy_device *phydev) 64 { 65 int err; 66 67 err = phy_write(phydev, MII_CIS8201_AUX_CONSTAT, 68 MII_CIS8201_AUXCONSTAT_INIT); 69 70 if (err < 0) 71 return err; 72 73 err = phy_write(phydev, MII_CIS8201_EXT_CON1, 74 MII_CIS8201_EXTCON1_INIT); 75 76 return err; 77 } 78 79 static int cis820x_ack_interrupt(struct phy_device *phydev) 80 { 81 int err = phy_read(phydev, MII_CIS8201_ISTAT); 82 83 return (err < 0) ? err : 0; 84 } 85 86 static int cis820x_config_intr(struct phy_device *phydev) 87 { 88 int err; 89 90 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 91 err = phy_write(phydev, MII_CIS8201_IMASK, 92 MII_CIS8201_IMASK_MASK); 93 else 94 err = phy_write(phydev, MII_CIS8201_IMASK, 0); 95 96 return err; 97 } 98 99 /* Cicada 8201, a.k.a Vitesse VSC8201 */ 100 static struct phy_driver cis820x_driver[] = { 101 { 102 .phy_id = 0x000fc410, 103 .name = "Cicada Cis8201", 104 .phy_id_mask = 0x000ffff0, 105 /* PHY_GBIT_FEATURES */ 106 .config_init = &cis820x_config_init, 107 .ack_interrupt = &cis820x_ack_interrupt, 108 .config_intr = &cis820x_config_intr, 109 }, { 110 .phy_id = 0x000fc440, 111 .name = "Cicada Cis8204", 112 .phy_id_mask = 0x000fffc0, 113 /* PHY_GBIT_FEATURES */ 114 .config_init = &cis820x_config_init, 115 .ack_interrupt = &cis820x_ack_interrupt, 116 .config_intr = &cis820x_config_intr, 117 } }; 118 119 module_phy_driver(cis820x_driver); 120 121 static struct mdio_device_id __maybe_unused cicada_tbl[] = { 122 { 0x000fc410, 0x000ffff0 }, 123 { 0x000fc440, 0x000fffc0 }, 124 { } 125 }; 126 127 MODULE_DEVICE_TABLE(mdio, cicada_tbl); 128