1a9520543SMichael Schmitz // SPDX-License-Identifier: GPL-2.0+
2a9520543SMichael Schmitz /* Driver for Asix PHYs
3a9520543SMichael Schmitz *
4a9520543SMichael Schmitz * Author: Michael Schmitz <schmitzmic@gmail.com>
5a9520543SMichael Schmitz */
6a9520543SMichael Schmitz #include <linux/kernel.h>
7a9520543SMichael Schmitz #include <linux/errno.h>
8a9520543SMichael Schmitz #include <linux/init.h>
9a9520543SMichael Schmitz #include <linux/module.h>
10a9520543SMichael Schmitz #include <linux/mii.h>
11a9520543SMichael Schmitz #include <linux/phy.h>
12a9520543SMichael Schmitz
13dde25846SOleksij Rempel #define PHY_ID_ASIX_AX88772A 0x003b1861
14dde25846SOleksij Rempel #define PHY_ID_ASIX_AX88772C 0x003b1881
15a9520543SMichael Schmitz #define PHY_ID_ASIX_AX88796B 0x003b1841
16a9520543SMichael Schmitz
17a9520543SMichael Schmitz MODULE_DESCRIPTION("Asix PHY driver");
18a9520543SMichael Schmitz MODULE_AUTHOR("Michael Schmitz <schmitzmic@gmail.com>");
19a9520543SMichael Schmitz MODULE_LICENSE("GPL");
20a9520543SMichael Schmitz
21a9520543SMichael Schmitz /**
22a9520543SMichael Schmitz * asix_soft_reset - software reset the PHY via BMCR_RESET bit
23a9520543SMichael Schmitz * @phydev: target phy_device struct
24a9520543SMichael Schmitz *
25a9520543SMichael Schmitz * Description: Perform a software PHY reset using the standard
26a9520543SMichael Schmitz * BMCR_RESET bit and poll for the reset bit to be cleared.
27a9520543SMichael Schmitz * Toggle BMCR_RESET bit off to accommodate broken AX8796B PHY implementation
28a9520543SMichael Schmitz * such as used on the Individual Computers' X-Surf 100 Zorro card.
29a9520543SMichael Schmitz *
30a9520543SMichael Schmitz * Returns: 0 on success, < 0 on failure
31a9520543SMichael Schmitz */
asix_soft_reset(struct phy_device * phydev)32a9520543SMichael Schmitz static int asix_soft_reset(struct phy_device *phydev)
33a9520543SMichael Schmitz {
34a9520543SMichael Schmitz int ret;
35a9520543SMichael Schmitz
36a9520543SMichael Schmitz /* Asix PHY won't reset unless reset bit toggles */
37a9520543SMichael Schmitz ret = phy_write(phydev, MII_BMCR, 0);
38a9520543SMichael Schmitz if (ret < 0)
39a9520543SMichael Schmitz return ret;
40a9520543SMichael Schmitz
41a9520543SMichael Schmitz return genphy_soft_reset(phydev);
42a9520543SMichael Schmitz }
43a9520543SMichael Schmitz
44dde25846SOleksij Rempel /* AX88772A is not working properly with some old switches (NETGEAR EN 108TP):
45dde25846SOleksij Rempel * after autoneg is done and the link status is reported as active, the MII_LPA
46dde25846SOleksij Rempel * register is 0. This issue is not reproducible on AX88772C.
47dde25846SOleksij Rempel */
asix_ax88772a_read_status(struct phy_device * phydev)48dde25846SOleksij Rempel static int asix_ax88772a_read_status(struct phy_device *phydev)
49dde25846SOleksij Rempel {
50dde25846SOleksij Rempel int ret, val;
51dde25846SOleksij Rempel
52dde25846SOleksij Rempel ret = genphy_update_link(phydev);
53dde25846SOleksij Rempel if (ret)
54dde25846SOleksij Rempel return ret;
55dde25846SOleksij Rempel
56dde25846SOleksij Rempel if (!phydev->link)
57dde25846SOleksij Rempel return 0;
58dde25846SOleksij Rempel
59dde25846SOleksij Rempel /* If MII_LPA is 0, phy_resolve_aneg_linkmode() will fail to resolve
60dde25846SOleksij Rempel * linkmode so use MII_BMCR as default values.
61dde25846SOleksij Rempel */
62dde25846SOleksij Rempel val = phy_read(phydev, MII_BMCR);
63dde25846SOleksij Rempel if (val < 0)
64dde25846SOleksij Rempel return val;
65dde25846SOleksij Rempel
66dde25846SOleksij Rempel if (val & BMCR_SPEED100)
67dde25846SOleksij Rempel phydev->speed = SPEED_100;
68dde25846SOleksij Rempel else
69dde25846SOleksij Rempel phydev->speed = SPEED_10;
70dde25846SOleksij Rempel
71dde25846SOleksij Rempel if (val & BMCR_FULLDPLX)
72dde25846SOleksij Rempel phydev->duplex = DUPLEX_FULL;
73dde25846SOleksij Rempel else
74dde25846SOleksij Rempel phydev->duplex = DUPLEX_HALF;
75dde25846SOleksij Rempel
76dde25846SOleksij Rempel ret = genphy_read_lpa(phydev);
77dde25846SOleksij Rempel if (ret < 0)
78dde25846SOleksij Rempel return ret;
79dde25846SOleksij Rempel
80dde25846SOleksij Rempel if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete)
81dde25846SOleksij Rempel phy_resolve_aneg_linkmode(phydev);
82dde25846SOleksij Rempel
83dde25846SOleksij Rempel return 0;
84dde25846SOleksij Rempel }
85dde25846SOleksij Rempel
asix_ax88772a_link_change_notify(struct phy_device * phydev)86dde25846SOleksij Rempel static void asix_ax88772a_link_change_notify(struct phy_device *phydev)
87dde25846SOleksij Rempel {
88dde25846SOleksij Rempel /* Reset PHY, otherwise MII_LPA will provide outdated information.
89dde25846SOleksij Rempel * This issue is reproducible only with some link partner PHYs
90dde25846SOleksij Rempel */
917227bc7bSOleksij Rempel if (phydev->state == PHY_NOLINK) {
927227bc7bSOleksij Rempel phy_init_hw(phydev);
937227bc7bSOleksij Rempel phy_start_aneg(phydev);
947227bc7bSOleksij Rempel }
95dde25846SOleksij Rempel }
96dde25846SOleksij Rempel
97dde25846SOleksij Rempel static struct phy_driver asix_driver[] = {
98dde25846SOleksij Rempel {
99dde25846SOleksij Rempel PHY_ID_MATCH_EXACT(PHY_ID_ASIX_AX88772A),
100dde25846SOleksij Rempel .name = "Asix Electronics AX88772A",
101dde25846SOleksij Rempel .flags = PHY_IS_INTERNAL,
102dde25846SOleksij Rempel .read_status = asix_ax88772a_read_status,
103dde25846SOleksij Rempel .suspend = genphy_suspend,
104dde25846SOleksij Rempel .resume = genphy_resume,
105dde25846SOleksij Rempel .soft_reset = asix_soft_reset,
106dde25846SOleksij Rempel .link_change_notify = asix_ax88772a_link_change_notify,
107dde25846SOleksij Rempel }, {
108dde25846SOleksij Rempel PHY_ID_MATCH_EXACT(PHY_ID_ASIX_AX88772C),
109dde25846SOleksij Rempel .name = "Asix Electronics AX88772C",
110dde25846SOleksij Rempel .flags = PHY_IS_INTERNAL,
111dde25846SOleksij Rempel .suspend = genphy_suspend,
112dde25846SOleksij Rempel .resume = genphy_resume,
113dde25846SOleksij Rempel .soft_reset = asix_soft_reset,
114dde25846SOleksij Rempel }, {
115a9520543SMichael Schmitz .phy_id = PHY_ID_ASIX_AX88796B,
116a9520543SMichael Schmitz .name = "Asix Electronics AX88796B",
117a9520543SMichael Schmitz .phy_id_mask = 0xfffffff0,
118a9520543SMichael Schmitz /* PHY_BASIC_FEATURES */
119a9520543SMichael Schmitz .soft_reset = asix_soft_reset,
120a9520543SMichael Schmitz } };
121a9520543SMichael Schmitz
122a9520543SMichael Schmitz module_phy_driver(asix_driver);
123a9520543SMichael Schmitz
124a9520543SMichael Schmitz static struct mdio_device_id __maybe_unused asix_tbl[] = {
125dde25846SOleksij Rempel { PHY_ID_MATCH_EXACT(PHY_ID_ASIX_AX88772A) },
126dde25846SOleksij Rempel { PHY_ID_MATCH_EXACT(PHY_ID_ASIX_AX88772C) },
127a9520543SMichael Schmitz { PHY_ID_ASIX_AX88796B, 0xfffffff0 },
128a9520543SMichael Schmitz { }
129a9520543SMichael Schmitz };
130a9520543SMichael Schmitz
131a9520543SMichael Schmitz MODULE_DEVICE_TABLE(mdio, asix_tbl);
132