1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2018-2020 Linaro Ltd. 5 */ 6 7 #include <linux/types.h> 8 #include <linux/io.h> 9 #include <linux/delay.h> 10 11 #include "ipa.h" 12 #include "ipa_clock.h" 13 #include "ipa_uc.h" 14 15 /** 16 * DOC: The IPA embedded microcontroller 17 * 18 * The IPA incorporates a microcontroller that is able to do some additional 19 * handling/offloading of network activity. The current code makes 20 * essentially no use of the microcontroller, but it still requires some 21 * initialization. It needs to be notified in the event the AP crashes. 22 * 23 * The microcontroller can generate two interrupts to the AP. One interrupt 24 * is used to indicate that a response to a request from the AP is available. 25 * The other is used to notify the AP of the occurrence of an event. In 26 * addition, the AP can interrupt the microcontroller by writing a register. 27 * 28 * A 128 byte block of structured memory within the IPA SRAM is used together 29 * with these interrupts to implement the communication interface between the 30 * AP and the IPA microcontroller. Each side writes data to the shared area 31 * before interrupting its peer, which will read the written data in response 32 * to the interrupt. Some information found in the shared area is currently 33 * unused. All remaining space in the shared area is reserved, and must not 34 * be read or written by the AP. 35 */ 36 /* Supports hardware interface version 0x2000 */ 37 38 /* Offset relative to the base of the IPA shared address space of the 39 * shared region used for communication with the microcontroller. The 40 * region is 128 bytes in size, but only the first 40 bytes are used. 41 */ 42 #define IPA_MEM_UC_OFFSET 0x0000 43 44 /* Delay to allow a the microcontroller to save state when crashing */ 45 #define IPA_SEND_DELAY 100 /* microseconds */ 46 47 /** 48 * struct ipa_uc_mem_area - AP/microcontroller shared memory area 49 * @command: command code (AP->microcontroller) 50 * @command_param: low 32 bits of command parameter (AP->microcontroller) 51 * @command_param_hi: high 32 bits of command parameter (AP->microcontroller) 52 * 53 * @response: response code (microcontroller->AP) 54 * @response_param: response parameter (microcontroller->AP) 55 * 56 * @event: event code (microcontroller->AP) 57 * @event_param: event parameter (microcontroller->AP) 58 * 59 * @first_error_address: address of first error-source on SNOC 60 * @hw_state: state of hardware (including error type information) 61 * @warning_counter: counter of non-fatal hardware errors 62 * @interface_version: hardware-reported interface version 63 */ 64 struct ipa_uc_mem_area { 65 u8 command; /* enum ipa_uc_command */ 66 u8 reserved0[3]; 67 __le32 command_param; 68 __le32 command_param_hi; 69 u8 response; /* enum ipa_uc_response */ 70 u8 reserved1[3]; 71 __le32 response_param; 72 u8 event; /* enum ipa_uc_event */ 73 u8 reserved2[3]; 74 75 __le32 event_param; 76 __le32 first_error_address; 77 u8 hw_state; 78 u8 warning_counter; 79 __le16 reserved3; 80 __le16 interface_version; 81 __le16 reserved4; 82 }; 83 84 /** enum ipa_uc_command - commands from the AP to the microcontroller */ 85 enum ipa_uc_command { 86 IPA_UC_COMMAND_NO_OP = 0, 87 IPA_UC_COMMAND_UPDATE_FLAGS = 1, 88 IPA_UC_COMMAND_DEBUG_RUN_TEST = 2, 89 IPA_UC_COMMAND_DEBUG_GET_INFO = 3, 90 IPA_UC_COMMAND_ERR_FATAL = 4, 91 IPA_UC_COMMAND_CLK_GATE = 5, 92 IPA_UC_COMMAND_CLK_UNGATE = 6, 93 IPA_UC_COMMAND_MEMCPY = 7, 94 IPA_UC_COMMAND_RESET_PIPE = 8, 95 IPA_UC_COMMAND_REG_WRITE = 9, 96 IPA_UC_COMMAND_GSI_CH_EMPTY = 10, 97 }; 98 99 /** enum ipa_uc_response - microcontroller response codes */ 100 enum ipa_uc_response { 101 IPA_UC_RESPONSE_NO_OP = 0, 102 IPA_UC_RESPONSE_INIT_COMPLETED = 1, 103 IPA_UC_RESPONSE_CMD_COMPLETED = 2, 104 IPA_UC_RESPONSE_DEBUG_GET_INFO = 3, 105 }; 106 107 /** enum ipa_uc_event - common cpu events reported by the microcontroller */ 108 enum ipa_uc_event { 109 IPA_UC_EVENT_NO_OP = 0, 110 IPA_UC_EVENT_ERROR = 1, 111 IPA_UC_EVENT_LOG_INFO = 2, 112 }; 113 114 static struct ipa_uc_mem_area *ipa_uc_shared(struct ipa *ipa) 115 { 116 u32 offset = ipa->mem_offset + ipa->mem[IPA_MEM_UC_SHARED].offset; 117 118 return ipa->mem_virt + offset; 119 } 120 121 /* Microcontroller event IPA interrupt handler */ 122 static void ipa_uc_event_handler(struct ipa *ipa, enum ipa_irq_id irq_id) 123 { 124 struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa); 125 struct device *dev = &ipa->pdev->dev; 126 127 if (shared->event == IPA_UC_EVENT_ERROR) 128 dev_err(dev, "microcontroller error event\n"); 129 else 130 dev_err(dev, "unsupported microcontroller event %hhu\n", 131 shared->event); 132 } 133 134 /* Microcontroller response IPA interrupt handler */ 135 static void ipa_uc_response_hdlr(struct ipa *ipa, enum ipa_irq_id irq_id) 136 { 137 struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa); 138 139 /* An INIT_COMPLETED response message is sent to the AP by the 140 * microcontroller when it is operational. Other than this, the AP 141 * should only receive responses from the microcontroller when it has 142 * sent it a request message. 143 * 144 * We can drop the clock reference taken in ipa_uc_init() once we 145 * know the microcontroller has finished its initialization. 146 */ 147 switch (shared->response) { 148 case IPA_UC_RESPONSE_INIT_COMPLETED: 149 ipa->uc_loaded = true; 150 ipa_clock_put(ipa); 151 break; 152 default: 153 dev_warn(&ipa->pdev->dev, 154 "unsupported microcontroller response %hhu\n", 155 shared->response); 156 break; 157 } 158 } 159 160 /* ipa_uc_setup() - Set up the microcontroller */ 161 void ipa_uc_setup(struct ipa *ipa) 162 { 163 /* The microcontroller needs the IPA clock running until it has 164 * completed its initialization. It signals this by sending an 165 * INIT_COMPLETED response message to the AP. This could occur after 166 * we have finished doing the rest of the IPA initialization, so we 167 * need to take an extra "proxy" reference, and hold it until we've 168 * received that signal. (This reference is dropped in 169 * ipa_uc_response_hdlr(), above.) 170 */ 171 ipa_clock_get(ipa); 172 173 ipa->uc_loaded = false; 174 ipa_interrupt_add(ipa->interrupt, IPA_IRQ_UC_0, ipa_uc_event_handler); 175 ipa_interrupt_add(ipa->interrupt, IPA_IRQ_UC_1, ipa_uc_response_hdlr); 176 } 177 178 /* Inverse of ipa_uc_setup() */ 179 void ipa_uc_teardown(struct ipa *ipa) 180 { 181 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_1); 182 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_0); 183 if (!ipa->uc_loaded) 184 ipa_clock_put(ipa); 185 } 186 187 /* Send a command to the microcontroller */ 188 static void send_uc_command(struct ipa *ipa, u32 command, u32 command_param) 189 { 190 struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa); 191 192 shared->command = command; 193 shared->command_param = cpu_to_le32(command_param); 194 shared->command_param_hi = 0; 195 shared->response = 0; 196 shared->response_param = 0; 197 198 iowrite32(1, ipa->reg_virt + IPA_REG_IRQ_UC_OFFSET); 199 } 200 201 /* Tell the microcontroller the AP is shutting down */ 202 void ipa_uc_panic_notifier(struct ipa *ipa) 203 { 204 if (!ipa->uc_loaded) 205 return; 206 207 send_uc_command(ipa, IPA_UC_COMMAND_ERR_FATAL, 0); 208 209 /* give uc enough time to save state */ 210 udelay(IPA_SEND_DELAY); 211 } 212