1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2018-2020 Linaro Ltd. 5 */ 6 7 #include <linux/types.h> 8 #include <linux/atomic.h> 9 #include <linux/bitfield.h> 10 #include <linux/device.h> 11 #include <linux/bug.h> 12 #include <linux/io.h> 13 #include <linux/firmware.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 #include <linux/of_address.h> 18 #include <linux/remoteproc.h> 19 #include <linux/qcom_scm.h> 20 #include <linux/soc/qcom/mdt_loader.h> 21 22 #include "ipa.h" 23 #include "ipa_clock.h" 24 #include "ipa_data.h" 25 #include "ipa_endpoint.h" 26 #include "ipa_cmd.h" 27 #include "ipa_reg.h" 28 #include "ipa_mem.h" 29 #include "ipa_table.h" 30 #include "ipa_modem.h" 31 #include "ipa_uc.h" 32 #include "ipa_interrupt.h" 33 #include "gsi_trans.h" 34 35 /** 36 * DOC: The IP Accelerator 37 * 38 * This driver supports the Qualcomm IP Accelerator (IPA), which is a 39 * networking component found in many Qualcomm SoCs. The IPA is connected 40 * to the application processor (AP), but is also connected (and partially 41 * controlled by) other "execution environments" (EEs), such as a modem. 42 * 43 * The IPA is the conduit between the AP and the modem that carries network 44 * traffic. This driver presents a network interface representing the 45 * connection of the modem to external (e.g. LTE) networks. 46 * 47 * The IPA provides protocol checksum calculation, offloading this work 48 * from the AP. The IPA offers additional functionality, including routing, 49 * filtering, and NAT support, but that more advanced functionality is not 50 * currently supported. Despite that, some resources--including routing 51 * tables and filter tables--are defined in this driver because they must 52 * be initialized even when the advanced hardware features are not used. 53 * 54 * There are two distinct layers that implement the IPA hardware, and this 55 * is reflected in the organization of the driver. The generic software 56 * interface (GSI) is an integral component of the IPA, providing a 57 * well-defined communication layer between the AP subsystem and the IPA 58 * core. The GSI implements a set of "channels" used for communication 59 * between the AP and the IPA. 60 * 61 * The IPA layer uses GSI channels to implement its "endpoints". And while 62 * a GSI channel carries data between the AP and the IPA, a pair of IPA 63 * endpoints is used to carry traffic between two EEs. Specifically, the main 64 * modem network interface is implemented by two pairs of endpoints: a TX 65 * endpoint on the AP coupled with an RX endpoint on the modem; and another 66 * RX endpoint on the AP receiving data from a TX endpoint on the modem. 67 */ 68 69 /* The name of the GSI firmware file relative to /lib/firmware */ 70 #define IPA_FWS_PATH "ipa_fws.mdt" 71 #define IPA_PAS_ID 15 72 73 /** 74 * ipa_suspend_handler() - Handle the suspend IPA interrupt 75 * @ipa: IPA pointer 76 * @irq_id: IPA interrupt type (unused) 77 * 78 * When in suspended state, the IPA can trigger a resume by sending a SUSPEND 79 * IPA interrupt. 80 */ 81 static void ipa_suspend_handler(struct ipa *ipa, enum ipa_irq_id irq_id) 82 { 83 /* Take a a single clock reference to prevent suspend. All 84 * endpoints will be resumed as a result. This reference will 85 * be dropped when we get a power management suspend request. 86 */ 87 if (!atomic_xchg(&ipa->suspend_ref, 1)) 88 ipa_clock_get(ipa); 89 90 /* Acknowledge/clear the suspend interrupt on all endpoints */ 91 ipa_interrupt_suspend_clear_all(ipa->interrupt); 92 } 93 94 /** 95 * ipa_setup() - Set up IPA hardware 96 * @ipa: IPA pointer 97 * 98 * Perform initialization that requires issuing immediate commands on 99 * the command TX endpoint. If the modem is doing GSI firmware load 100 * and initialization, this function will be called when an SMP2P 101 * interrupt has been signaled by the modem. Otherwise it will be 102 * called from ipa_probe() after GSI firmware has been successfully 103 * loaded, authenticated, and started by Trust Zone. 104 */ 105 int ipa_setup(struct ipa *ipa) 106 { 107 struct ipa_endpoint *exception_endpoint; 108 struct ipa_endpoint *command_endpoint; 109 int ret; 110 111 /* Setup for IPA v3.5.1 has some slight differences */ 112 ret = gsi_setup(&ipa->gsi, ipa->version == IPA_VERSION_3_5_1); 113 if (ret) 114 return ret; 115 116 ipa->interrupt = ipa_interrupt_setup(ipa); 117 if (IS_ERR(ipa->interrupt)) { 118 ret = PTR_ERR(ipa->interrupt); 119 goto err_gsi_teardown; 120 } 121 ipa_interrupt_add(ipa->interrupt, IPA_IRQ_TX_SUSPEND, 122 ipa_suspend_handler); 123 124 ipa_uc_setup(ipa); 125 126 ipa_endpoint_setup(ipa); 127 128 /* We need to use the AP command TX endpoint to perform other 129 * initialization, so we enable first. 130 */ 131 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]; 132 ret = ipa_endpoint_enable_one(command_endpoint); 133 if (ret) 134 goto err_endpoint_teardown; 135 136 ret = ipa_mem_setup(ipa); 137 if (ret) 138 goto err_command_disable; 139 140 ret = ipa_table_setup(ipa); 141 if (ret) 142 goto err_mem_teardown; 143 144 /* Enable the exception handling endpoint, and tell the hardware 145 * to use it by default. 146 */ 147 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]; 148 ret = ipa_endpoint_enable_one(exception_endpoint); 149 if (ret) 150 goto err_table_teardown; 151 152 ipa_endpoint_default_route_set(ipa, exception_endpoint->endpoint_id); 153 154 /* We're all set. Now prepare for communication with the modem */ 155 ret = ipa_modem_setup(ipa); 156 if (ret) 157 goto err_default_route_clear; 158 159 ipa->setup_complete = true; 160 161 dev_info(&ipa->pdev->dev, "IPA driver setup completed successfully\n"); 162 163 return 0; 164 165 err_default_route_clear: 166 ipa_endpoint_default_route_clear(ipa); 167 ipa_endpoint_disable_one(exception_endpoint); 168 err_table_teardown: 169 ipa_table_teardown(ipa); 170 err_mem_teardown: 171 ipa_mem_teardown(ipa); 172 err_command_disable: 173 ipa_endpoint_disable_one(command_endpoint); 174 err_endpoint_teardown: 175 ipa_endpoint_teardown(ipa); 176 ipa_uc_teardown(ipa); 177 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_TX_SUSPEND); 178 ipa_interrupt_teardown(ipa->interrupt); 179 err_gsi_teardown: 180 gsi_teardown(&ipa->gsi); 181 182 return ret; 183 } 184 185 /** 186 * ipa_teardown() - Inverse of ipa_setup() 187 * @ipa: IPA pointer 188 */ 189 static void ipa_teardown(struct ipa *ipa) 190 { 191 struct ipa_endpoint *exception_endpoint; 192 struct ipa_endpoint *command_endpoint; 193 194 ipa_modem_teardown(ipa); 195 ipa_endpoint_default_route_clear(ipa); 196 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]; 197 ipa_endpoint_disable_one(exception_endpoint); 198 ipa_table_teardown(ipa); 199 ipa_mem_teardown(ipa); 200 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]; 201 ipa_endpoint_disable_one(command_endpoint); 202 ipa_endpoint_teardown(ipa); 203 ipa_uc_teardown(ipa); 204 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_TX_SUSPEND); 205 ipa_interrupt_teardown(ipa->interrupt); 206 gsi_teardown(&ipa->gsi); 207 } 208 209 /* Configure QMB Core Master Port selection */ 210 static void ipa_hardware_config_comp(struct ipa *ipa) 211 { 212 u32 val; 213 214 /* Nothing to configure for IPA v3.5.1 */ 215 if (ipa->version == IPA_VERSION_3_5_1) 216 return; 217 218 val = ioread32(ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET); 219 220 if (ipa->version == IPA_VERSION_4_0) { 221 val &= ~IPA_QMB_SELECT_CONS_EN_FMASK; 222 val &= ~IPA_QMB_SELECT_PROD_EN_FMASK; 223 val &= ~IPA_QMB_SELECT_GLOBAL_EN_FMASK; 224 } else { 225 val |= GSI_MULTI_AXI_MASTERS_DIS_FMASK; 226 } 227 228 val |= GSI_MULTI_INORDER_RD_DIS_FMASK; 229 val |= GSI_MULTI_INORDER_WR_DIS_FMASK; 230 231 iowrite32(val, ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET); 232 } 233 234 /* Configure DDR and PCIe max read/write QSB values */ 235 static void ipa_hardware_config_qsb(struct ipa *ipa) 236 { 237 u32 val; 238 239 /* QMB_0 represents DDR; QMB_1 represents PCIe (not present in 4.2) */ 240 val = u32_encode_bits(8, GEN_QMB_0_MAX_WRITES_FMASK); 241 if (ipa->version == IPA_VERSION_4_2) 242 val |= u32_encode_bits(0, GEN_QMB_1_MAX_WRITES_FMASK); 243 else 244 val |= u32_encode_bits(4, GEN_QMB_1_MAX_WRITES_FMASK); 245 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_WRITES_OFFSET); 246 247 if (ipa->version == IPA_VERSION_3_5_1) { 248 val = u32_encode_bits(8, GEN_QMB_0_MAX_READS_FMASK); 249 val |= u32_encode_bits(12, GEN_QMB_1_MAX_READS_FMASK); 250 } else { 251 val = u32_encode_bits(12, GEN_QMB_0_MAX_READS_FMASK); 252 if (ipa->version == IPA_VERSION_4_2) 253 val |= u32_encode_bits(0, GEN_QMB_1_MAX_READS_FMASK); 254 else 255 val |= u32_encode_bits(12, GEN_QMB_1_MAX_READS_FMASK); 256 /* GEN_QMB_0_MAX_READS_BEATS is 0 */ 257 /* GEN_QMB_1_MAX_READS_BEATS is 0 */ 258 } 259 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_READS_OFFSET); 260 } 261 262 static void ipa_idle_indication_cfg(struct ipa *ipa, 263 u32 enter_idle_debounce_thresh, 264 bool const_non_idle_enable) 265 { 266 u32 offset; 267 u32 val; 268 269 val = u32_encode_bits(enter_idle_debounce_thresh, 270 ENTER_IDLE_DEBOUNCE_THRESH_FMASK); 271 if (const_non_idle_enable) 272 val |= CONST_NON_IDLE_ENABLE_FMASK; 273 274 offset = ipa_reg_idle_indication_cfg_offset(ipa->version); 275 iowrite32(val, ipa->reg_virt + offset); 276 } 277 278 /** 279 * ipa_hardware_dcd_config() - Enable dynamic clock division on IPA 280 * @ipa: IPA pointer 281 * 282 * Configures when the IPA signals it is idle to the global clock 283 * controller, which can respond by scalling down the clock to 284 * save power. 285 */ 286 static void ipa_hardware_dcd_config(struct ipa *ipa) 287 { 288 /* Recommended values for IPA 3.5 according to IPA HPG */ 289 ipa_idle_indication_cfg(ipa, 256, false); 290 } 291 292 static void ipa_hardware_dcd_deconfig(struct ipa *ipa) 293 { 294 /* Power-on reset values */ 295 ipa_idle_indication_cfg(ipa, 0, true); 296 } 297 298 /** 299 * ipa_hardware_config() - Primitive hardware initialization 300 * @ipa: IPA pointer 301 */ 302 static void ipa_hardware_config(struct ipa *ipa) 303 { 304 u32 granularity; 305 u32 val; 306 307 /* Fill in backward-compatibility register, based on version */ 308 val = ipa_reg_bcr_val(ipa->version); 309 iowrite32(val, ipa->reg_virt + IPA_REG_BCR_OFFSET); 310 311 if (ipa->version != IPA_VERSION_3_5_1) { 312 /* Enable open global clocks (hardware workaround) */ 313 val = GLOBAL_FMASK; 314 val |= GLOBAL_2X_CLK_FMASK; 315 iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET); 316 317 /* Disable PA mask to allow HOLB drop (hardware workaround) */ 318 val = ioread32(ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); 319 val &= ~PA_MASK_EN; 320 iowrite32(val, ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); 321 } 322 323 ipa_hardware_config_comp(ipa); 324 325 /* Configure system bus limits */ 326 ipa_hardware_config_qsb(ipa); 327 328 /* Configure aggregation granularity */ 329 val = ioread32(ipa->reg_virt + IPA_REG_COUNTER_CFG_OFFSET); 330 granularity = ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY); 331 val = u32_encode_bits(granularity, AGGR_GRANULARITY); 332 iowrite32(val, ipa->reg_virt + IPA_REG_COUNTER_CFG_OFFSET); 333 334 /* Disable hashed IPv4 and IPv6 routing and filtering for IPA v4.2 */ 335 if (ipa->version == IPA_VERSION_4_2) 336 iowrite32(0, ipa->reg_virt + IPA_REG_FILT_ROUT_HASH_EN_OFFSET); 337 338 /* Enable dynamic clock division */ 339 ipa_hardware_dcd_config(ipa); 340 } 341 342 /** 343 * ipa_hardware_deconfig() - Inverse of ipa_hardware_config() 344 * @ipa: IPA pointer 345 * 346 * This restores the power-on reset values (even if they aren't different) 347 */ 348 static void ipa_hardware_deconfig(struct ipa *ipa) 349 { 350 /* Mostly we just leave things as we set them. */ 351 ipa_hardware_dcd_deconfig(ipa); 352 } 353 354 #ifdef IPA_VALIDATION 355 356 /* # IPA resources used based on version (see IPA_RESOURCE_GROUP_COUNT) */ 357 static int ipa_resource_group_count(struct ipa *ipa) 358 { 359 switch (ipa->version) { 360 case IPA_VERSION_3_5_1: 361 return 3; 362 363 case IPA_VERSION_4_0: 364 case IPA_VERSION_4_1: 365 return 4; 366 367 case IPA_VERSION_4_2: 368 return 1; 369 370 default: 371 return 0; 372 } 373 } 374 375 static bool ipa_resource_limits_valid(struct ipa *ipa, 376 const struct ipa_resource_data *data) 377 { 378 u32 group_count = ipa_resource_group_count(ipa); 379 u32 i; 380 u32 j; 381 382 if (!group_count) 383 return false; 384 385 /* Return an error if a non-zero resource group limit is specified 386 * for a resource not supported by hardware. 387 */ 388 for (i = 0; i < data->resource_src_count; i++) { 389 const struct ipa_resource_src *resource; 390 391 resource = &data->resource_src[i]; 392 for (j = group_count; j < IPA_RESOURCE_GROUP_COUNT; j++) 393 if (resource->limits[j].min || resource->limits[j].max) 394 return false; 395 } 396 397 for (i = 0; i < data->resource_dst_count; i++) { 398 const struct ipa_resource_dst *resource; 399 400 resource = &data->resource_dst[i]; 401 for (j = group_count; j < IPA_RESOURCE_GROUP_COUNT; j++) 402 if (resource->limits[j].min || resource->limits[j].max) 403 return false; 404 } 405 406 return true; 407 } 408 409 #else /* !IPA_VALIDATION */ 410 411 static bool ipa_resource_limits_valid(struct ipa *ipa, 412 const struct ipa_resource_data *data) 413 { 414 return true; 415 } 416 417 #endif /* !IPA_VALIDATION */ 418 419 static void 420 ipa_resource_config_common(struct ipa *ipa, u32 offset, 421 const struct ipa_resource_limits *xlimits, 422 const struct ipa_resource_limits *ylimits) 423 { 424 u32 val; 425 426 val = u32_encode_bits(xlimits->min, X_MIN_LIM_FMASK); 427 val |= u32_encode_bits(xlimits->max, X_MAX_LIM_FMASK); 428 val |= u32_encode_bits(ylimits->min, Y_MIN_LIM_FMASK); 429 val |= u32_encode_bits(ylimits->max, Y_MAX_LIM_FMASK); 430 431 iowrite32(val, ipa->reg_virt + offset); 432 } 433 434 static void ipa_resource_config_src_01(struct ipa *ipa, 435 const struct ipa_resource_src *resource) 436 { 437 u32 offset = IPA_REG_SRC_RSRC_GRP_01_RSRC_TYPE_N_OFFSET(resource->type); 438 439 ipa_resource_config_common(ipa, offset, 440 &resource->limits[0], &resource->limits[1]); 441 } 442 443 static void ipa_resource_config_src_23(struct ipa *ipa, 444 const struct ipa_resource_src *resource) 445 { 446 u32 offset = IPA_REG_SRC_RSRC_GRP_23_RSRC_TYPE_N_OFFSET(resource->type); 447 448 ipa_resource_config_common(ipa, offset, 449 &resource->limits[2], &resource->limits[3]); 450 } 451 452 static void ipa_resource_config_dst_01(struct ipa *ipa, 453 const struct ipa_resource_dst *resource) 454 { 455 u32 offset = IPA_REG_DST_RSRC_GRP_01_RSRC_TYPE_N_OFFSET(resource->type); 456 457 ipa_resource_config_common(ipa, offset, 458 &resource->limits[0], &resource->limits[1]); 459 } 460 461 static void ipa_resource_config_dst_23(struct ipa *ipa, 462 const struct ipa_resource_dst *resource) 463 { 464 u32 offset = IPA_REG_DST_RSRC_GRP_23_RSRC_TYPE_N_OFFSET(resource->type); 465 466 ipa_resource_config_common(ipa, offset, 467 &resource->limits[2], &resource->limits[3]); 468 } 469 470 static int 471 ipa_resource_config(struct ipa *ipa, const struct ipa_resource_data *data) 472 { 473 u32 i; 474 475 if (!ipa_resource_limits_valid(ipa, data)) 476 return -EINVAL; 477 478 for (i = 0; i < data->resource_src_count; i++) { 479 ipa_resource_config_src_01(ipa, &data->resource_src[i]); 480 ipa_resource_config_src_23(ipa, &data->resource_src[i]); 481 } 482 483 for (i = 0; i < data->resource_dst_count; i++) { 484 ipa_resource_config_dst_01(ipa, &data->resource_dst[i]); 485 ipa_resource_config_dst_23(ipa, &data->resource_dst[i]); 486 } 487 488 return 0; 489 } 490 491 static void ipa_resource_deconfig(struct ipa *ipa) 492 { 493 /* Nothing to do */ 494 } 495 496 /** 497 * ipa_config() - Configure IPA hardware 498 * @ipa: IPA pointer 499 * @data: IPA configuration data 500 * 501 * Perform initialization requiring IPA clock to be enabled. 502 */ 503 static int ipa_config(struct ipa *ipa, const struct ipa_data *data) 504 { 505 int ret; 506 507 /* Get a clock reference to allow initialization. This reference 508 * is held after initialization completes, and won't get dropped 509 * unless/until a system suspend request arrives. 510 */ 511 atomic_set(&ipa->suspend_ref, 1); 512 ipa_clock_get(ipa); 513 514 ipa_hardware_config(ipa); 515 516 ret = ipa_endpoint_config(ipa); 517 if (ret) 518 goto err_hardware_deconfig; 519 520 ret = ipa_mem_config(ipa); 521 if (ret) 522 goto err_endpoint_deconfig; 523 524 ipa_table_config(ipa); 525 526 /* Assign resource limitation to each group */ 527 ret = ipa_resource_config(ipa, data->resource_data); 528 if (ret) 529 goto err_table_deconfig; 530 531 ret = ipa_modem_config(ipa); 532 if (ret) 533 goto err_resource_deconfig; 534 535 return 0; 536 537 err_resource_deconfig: 538 ipa_resource_deconfig(ipa); 539 err_table_deconfig: 540 ipa_table_deconfig(ipa); 541 ipa_mem_deconfig(ipa); 542 err_endpoint_deconfig: 543 ipa_endpoint_deconfig(ipa); 544 err_hardware_deconfig: 545 ipa_hardware_deconfig(ipa); 546 ipa_clock_put(ipa); 547 atomic_set(&ipa->suspend_ref, 0); 548 549 return ret; 550 } 551 552 /** 553 * ipa_deconfig() - Inverse of ipa_config() 554 * @ipa: IPA pointer 555 */ 556 static void ipa_deconfig(struct ipa *ipa) 557 { 558 ipa_modem_deconfig(ipa); 559 ipa_resource_deconfig(ipa); 560 ipa_table_deconfig(ipa); 561 ipa_mem_deconfig(ipa); 562 ipa_endpoint_deconfig(ipa); 563 ipa_hardware_deconfig(ipa); 564 ipa_clock_put(ipa); 565 atomic_set(&ipa->suspend_ref, 0); 566 } 567 568 static int ipa_firmware_load(struct device *dev) 569 { 570 const struct firmware *fw; 571 struct device_node *node; 572 struct resource res; 573 phys_addr_t phys; 574 ssize_t size; 575 void *virt; 576 int ret; 577 578 node = of_parse_phandle(dev->of_node, "memory-region", 0); 579 if (!node) { 580 dev_err(dev, "DT error getting \"memory-region\" property\n"); 581 return -EINVAL; 582 } 583 584 ret = of_address_to_resource(node, 0, &res); 585 if (ret) { 586 dev_err(dev, "error %d getting \"memory-region\" resource\n", 587 ret); 588 return ret; 589 } 590 591 ret = request_firmware(&fw, IPA_FWS_PATH, dev); 592 if (ret) { 593 dev_err(dev, "error %d requesting \"%s\"\n", ret, IPA_FWS_PATH); 594 return ret; 595 } 596 597 phys = res.start; 598 size = (size_t)resource_size(&res); 599 virt = memremap(phys, size, MEMREMAP_WC); 600 if (!virt) { 601 dev_err(dev, "unable to remap firmware memory\n"); 602 ret = -ENOMEM; 603 goto out_release_firmware; 604 } 605 606 ret = qcom_mdt_load(dev, fw, IPA_FWS_PATH, IPA_PAS_ID, 607 virt, phys, size, NULL); 608 if (ret) 609 dev_err(dev, "error %d loading \"%s\"\n", ret, IPA_FWS_PATH); 610 else if ((ret = qcom_scm_pas_auth_and_reset(IPA_PAS_ID))) 611 dev_err(dev, "error %d authenticating \"%s\"\n", ret, 612 IPA_FWS_PATH); 613 614 memunmap(virt); 615 out_release_firmware: 616 release_firmware(fw); 617 618 return ret; 619 } 620 621 static const struct of_device_id ipa_match[] = { 622 { 623 .compatible = "qcom,sdm845-ipa", 624 .data = &ipa_data_sdm845, 625 }, 626 { 627 .compatible = "qcom,sc7180-ipa", 628 .data = &ipa_data_sc7180, 629 }, 630 { }, 631 }; 632 MODULE_DEVICE_TABLE(of, ipa_match); 633 634 static phandle of_property_read_phandle(const struct device_node *np, 635 const char *name) 636 { 637 struct property *prop; 638 int len = 0; 639 640 prop = of_find_property(np, name, &len); 641 if (!prop || len != sizeof(__be32)) 642 return 0; 643 644 return be32_to_cpup(prop->value); 645 } 646 647 /* Check things that can be validated at build time. This just 648 * groups these things BUILD_BUG_ON() calls don't clutter the rest 649 * of the code. 650 * */ 651 static void ipa_validate_build(void) 652 { 653 #ifdef IPA_VALIDATE 654 /* We assume we're working on 64-bit hardware */ 655 BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT)); 656 657 /* Code assumes the EE ID for the AP is 0 (zeroed structure field) */ 658 BUILD_BUG_ON(GSI_EE_AP != 0); 659 660 /* There's no point if we have no channels or event rings */ 661 BUILD_BUG_ON(!GSI_CHANNEL_COUNT_MAX); 662 BUILD_BUG_ON(!GSI_EVT_RING_COUNT_MAX); 663 664 /* GSI hardware design limits */ 665 BUILD_BUG_ON(GSI_CHANNEL_COUNT_MAX > 32); 666 BUILD_BUG_ON(GSI_EVT_RING_COUNT_MAX > 31); 667 668 /* The number of TREs in a transaction is limited by the channel's 669 * TLV FIFO size. A transaction structure uses 8-bit fields 670 * to represents the number of TREs it has allocated and used. 671 */ 672 BUILD_BUG_ON(GSI_TLV_MAX > U8_MAX); 673 674 /* Exceeding 128 bytes makes the transaction pool *much* larger */ 675 BUILD_BUG_ON(sizeof(struct gsi_trans) > 128); 676 677 /* This is used as a divisor */ 678 BUILD_BUG_ON(!IPA_AGGR_GRANULARITY); 679 680 /* Aggregation granularity value can't be 0, and must fit */ 681 BUILD_BUG_ON(!ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY)); 682 BUILD_BUG_ON(ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY) > 683 field_max(AGGR_GRANULARITY)); 684 #endif /* IPA_VALIDATE */ 685 } 686 687 /** 688 * ipa_probe() - IPA platform driver probe function 689 * @pdev: Platform device pointer 690 * 691 * Return: 0 if successful, or a negative error code (possibly 692 * EPROBE_DEFER) 693 * 694 * This is the main entry point for the IPA driver. Initialization proceeds 695 * in several stages: 696 * - The "init" stage involves activities that can be initialized without 697 * access to the IPA hardware. 698 * - The "config" stage requires the IPA clock to be active so IPA registers 699 * can be accessed, but does not require the use of IPA immediate commands. 700 * - The "setup" stage uses IPA immediate commands, and so requires the GSI 701 * layer to be initialized. 702 * 703 * A Boolean Device Tree "modem-init" property determines whether GSI 704 * initialization will be performed by the AP (Trust Zone) or the modem. 705 * If the AP does GSI initialization, the setup phase is entered after 706 * this has completed successfully. Otherwise the modem initializes 707 * the GSI layer and signals it has finished by sending an SMP2P interrupt 708 * to the AP; this triggers the start if IPA setup. 709 */ 710 static int ipa_probe(struct platform_device *pdev) 711 { 712 struct wakeup_source *wakeup_source; 713 struct device *dev = &pdev->dev; 714 const struct ipa_data *data; 715 struct ipa_clock *clock; 716 struct rproc *rproc; 717 bool modem_alloc; 718 bool modem_init; 719 struct ipa *ipa; 720 phandle phandle; 721 bool prefetch; 722 int ret; 723 724 ipa_validate_build(); 725 726 /* If we need Trust Zone, make sure it's available */ 727 modem_init = of_property_read_bool(dev->of_node, "modem-init"); 728 if (!modem_init) 729 if (!qcom_scm_is_available()) 730 return -EPROBE_DEFER; 731 732 /* We rely on remoteproc to tell us about modem state changes */ 733 phandle = of_property_read_phandle(dev->of_node, "modem-remoteproc"); 734 if (!phandle) { 735 dev_err(dev, "DT missing \"modem-remoteproc\" property\n"); 736 return -EINVAL; 737 } 738 739 rproc = rproc_get_by_phandle(phandle); 740 if (!rproc) 741 return -EPROBE_DEFER; 742 743 /* The clock and interconnects might not be ready when we're 744 * probed, so might return -EPROBE_DEFER. 745 */ 746 clock = ipa_clock_init(dev); 747 if (IS_ERR(clock)) { 748 ret = PTR_ERR(clock); 749 goto err_rproc_put; 750 } 751 752 /* No more EPROBE_DEFER. Get our configuration data */ 753 data = of_device_get_match_data(dev); 754 if (!data) { 755 /* This is really IPA_VALIDATE (should never happen) */ 756 dev_err(dev, "matched hardware not supported\n"); 757 ret = -ENOTSUPP; 758 goto err_clock_exit; 759 } 760 761 /* Create a wakeup source. */ 762 wakeup_source = wakeup_source_register(dev, "ipa"); 763 if (!wakeup_source) { 764 /* The most likely reason for failure is memory exhaustion */ 765 ret = -ENOMEM; 766 goto err_clock_exit; 767 } 768 769 /* Allocate and initialize the IPA structure */ 770 ipa = kzalloc(sizeof(*ipa), GFP_KERNEL); 771 if (!ipa) { 772 ret = -ENOMEM; 773 goto err_wakeup_source_unregister; 774 } 775 776 ipa->pdev = pdev; 777 dev_set_drvdata(dev, ipa); 778 ipa->modem_rproc = rproc; 779 ipa->clock = clock; 780 atomic_set(&ipa->suspend_ref, 0); 781 ipa->wakeup_source = wakeup_source; 782 ipa->version = data->version; 783 784 ret = ipa_reg_init(ipa); 785 if (ret) 786 goto err_kfree_ipa; 787 788 ret = ipa_mem_init(ipa, data->mem_data); 789 if (ret) 790 goto err_reg_exit; 791 792 /* GSI v2.0+ (IPA v4.0+) uses prefetch for the command channel */ 793 prefetch = ipa->version != IPA_VERSION_3_5_1; 794 /* IPA v4.2 requires the AP to allocate channels for the modem */ 795 modem_alloc = ipa->version == IPA_VERSION_4_2; 796 797 ret = gsi_init(&ipa->gsi, pdev, prefetch, data->endpoint_count, 798 data->endpoint_data, modem_alloc); 799 if (ret) 800 goto err_mem_exit; 801 802 /* Result is a non-zero mask endpoints that support filtering */ 803 ipa->filter_map = ipa_endpoint_init(ipa, data->endpoint_count, 804 data->endpoint_data); 805 if (!ipa->filter_map) { 806 ret = -EINVAL; 807 goto err_gsi_exit; 808 } 809 810 ret = ipa_table_init(ipa); 811 if (ret) 812 goto err_endpoint_exit; 813 814 ret = ipa_modem_init(ipa, modem_init); 815 if (ret) 816 goto err_table_exit; 817 818 ret = ipa_config(ipa, data); 819 if (ret) 820 goto err_modem_exit; 821 822 dev_info(dev, "IPA driver initialized"); 823 824 /* If the modem is doing early initialization, it will trigger a 825 * call to ipa_setup() call when it has finished. In that case 826 * we're done here. 827 */ 828 if (modem_init) 829 return 0; 830 831 /* Otherwise we need to load the firmware and have Trust Zone validate 832 * and install it. If that succeeds we can proceed with setup. 833 */ 834 ret = ipa_firmware_load(dev); 835 if (ret) 836 goto err_deconfig; 837 838 ret = ipa_setup(ipa); 839 if (ret) 840 goto err_deconfig; 841 842 return 0; 843 844 err_deconfig: 845 ipa_deconfig(ipa); 846 err_modem_exit: 847 ipa_modem_exit(ipa); 848 err_table_exit: 849 ipa_table_exit(ipa); 850 err_endpoint_exit: 851 ipa_endpoint_exit(ipa); 852 err_gsi_exit: 853 gsi_exit(&ipa->gsi); 854 err_mem_exit: 855 ipa_mem_exit(ipa); 856 err_reg_exit: 857 ipa_reg_exit(ipa); 858 err_kfree_ipa: 859 kfree(ipa); 860 err_wakeup_source_unregister: 861 wakeup_source_unregister(wakeup_source); 862 err_clock_exit: 863 ipa_clock_exit(clock); 864 err_rproc_put: 865 rproc_put(rproc); 866 867 return ret; 868 } 869 870 static int ipa_remove(struct platform_device *pdev) 871 { 872 struct ipa *ipa = dev_get_drvdata(&pdev->dev); 873 struct rproc *rproc = ipa->modem_rproc; 874 struct ipa_clock *clock = ipa->clock; 875 struct wakeup_source *wakeup_source; 876 int ret; 877 878 wakeup_source = ipa->wakeup_source; 879 880 if (ipa->setup_complete) { 881 ret = ipa_modem_stop(ipa); 882 if (ret) 883 return ret; 884 885 ipa_teardown(ipa); 886 } 887 888 ipa_deconfig(ipa); 889 ipa_modem_exit(ipa); 890 ipa_table_exit(ipa); 891 ipa_endpoint_exit(ipa); 892 gsi_exit(&ipa->gsi); 893 ipa_mem_exit(ipa); 894 ipa_reg_exit(ipa); 895 kfree(ipa); 896 wakeup_source_unregister(wakeup_source); 897 ipa_clock_exit(clock); 898 rproc_put(rproc); 899 900 return 0; 901 } 902 903 /** 904 * ipa_suspend() - Power management system suspend callback 905 * @dev: IPA device structure 906 * 907 * Return: Always returns zero 908 * 909 * Called by the PM framework when a system suspend operation is invoked. 910 */ 911 static int ipa_suspend(struct device *dev) 912 { 913 struct ipa *ipa = dev_get_drvdata(dev); 914 915 ipa_clock_put(ipa); 916 atomic_set(&ipa->suspend_ref, 0); 917 918 return 0; 919 } 920 921 /** 922 * ipa_resume() - Power management system resume callback 923 * @dev: IPA device structure 924 * 925 * Return: Always returns 0 926 * 927 * Called by the PM framework when a system resume operation is invoked. 928 */ 929 static int ipa_resume(struct device *dev) 930 { 931 struct ipa *ipa = dev_get_drvdata(dev); 932 933 /* This clock reference will keep the IPA out of suspend 934 * until we get a power management suspend request. 935 */ 936 atomic_set(&ipa->suspend_ref, 1); 937 ipa_clock_get(ipa); 938 939 return 0; 940 } 941 942 static const struct dev_pm_ops ipa_pm_ops = { 943 .suspend = ipa_suspend, 944 .resume = ipa_resume, 945 }; 946 947 static struct platform_driver ipa_driver = { 948 .probe = ipa_probe, 949 .remove = ipa_remove, 950 .driver = { 951 .name = "ipa", 952 .pm = &ipa_pm_ops, 953 .of_match_table = ipa_match, 954 }, 955 }; 956 957 module_platform_driver(ipa_driver); 958 959 MODULE_LICENSE("GPL v2"); 960 MODULE_DESCRIPTION("Qualcomm IP Accelerator device driver"); 961