xref: /openbmc/linux/drivers/net/ipa/ipa_interrupt.c (revision 06676aa1)
1 // SPDX-License-Identifier: GPL-2.0
2 
3 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
4  * Copyright (C) 2018-2020 Linaro Ltd.
5  */
6 
7 /* DOC: IPA Interrupts
8  *
9  * The IPA has an interrupt line distinct from the interrupt used by the GSI
10  * code.  Whereas GSI interrupts are generally related to channel events (like
11  * transfer completions), IPA interrupts are related to other events related
12  * to the IPA.  Some of the IPA interrupts come from a microcontroller
13  * embedded in the IPA.  Each IPA interrupt type can be both masked and
14  * acknowledged independent of the others.
15  *
16  * Two of the IPA interrupts are initiated by the microcontroller.  A third
17  * can be generated to signal the need for a wakeup/resume when an IPA
18  * endpoint has been suspended.  There are other IPA events, but at this
19  * time only these three are supported.
20  */
21 
22 #include <linux/types.h>
23 #include <linux/interrupt.h>
24 
25 #include "ipa.h"
26 #include "ipa_clock.h"
27 #include "ipa_reg.h"
28 #include "ipa_endpoint.h"
29 #include "ipa_interrupt.h"
30 
31 /**
32  * struct ipa_interrupt - IPA interrupt information
33  * @ipa:		IPA pointer
34  * @irq:		Linux IRQ number used for IPA interrupts
35  * @enabled:		Mask indicating which interrupts are enabled
36  * @handler:		Array of handlers indexed by IPA interrupt ID
37  */
38 struct ipa_interrupt {
39 	struct ipa *ipa;
40 	u32 irq;
41 	u32 enabled;
42 	ipa_irq_handler_t handler[IPA_IRQ_COUNT];
43 };
44 
45 /* Returns true if the interrupt type is associated with the microcontroller */
46 static bool ipa_interrupt_uc(struct ipa_interrupt *interrupt, u32 irq_id)
47 {
48 	return irq_id == IPA_IRQ_UC_0 || irq_id == IPA_IRQ_UC_1;
49 }
50 
51 /* Process a particular interrupt type that has been received */
52 static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id)
53 {
54 	bool uc_irq = ipa_interrupt_uc(interrupt, irq_id);
55 	struct ipa *ipa = interrupt->ipa;
56 	u32 mask = BIT(irq_id);
57 	u32 offset;
58 
59 	/* For microcontroller interrupts, clear the interrupt right away,
60 	 * "to avoid clearing unhandled interrupts."
61 	 */
62 	offset = ipa_reg_irq_clr_offset(ipa->version);
63 	if (uc_irq)
64 		iowrite32(mask, ipa->reg_virt + offset);
65 
66 	if (irq_id < IPA_IRQ_COUNT && interrupt->handler[irq_id])
67 		interrupt->handler[irq_id](interrupt->ipa, irq_id);
68 
69 	/* Clearing the SUSPEND_TX interrupt also clears the register
70 	 * that tells us which suspended endpoint(s) caused the interrupt,
71 	 * so defer clearing until after the handler has been called.
72 	 */
73 	if (!uc_irq)
74 		iowrite32(mask, ipa->reg_virt + offset);
75 }
76 
77 /* Process all IPA interrupt types that have been signaled */
78 static void ipa_interrupt_process_all(struct ipa_interrupt *interrupt)
79 {
80 	struct ipa *ipa = interrupt->ipa;
81 	u32 enabled = interrupt->enabled;
82 	u32 offset;
83 	u32 mask;
84 
85 	/* The status register indicates which conditions are present,
86 	 * including conditions whose interrupt is not enabled.  Handle
87 	 * only the enabled ones.
88 	 */
89 	offset = ipa_reg_irq_stts_offset(ipa->version);
90 	mask = ioread32(ipa->reg_virt + offset);
91 	while ((mask &= enabled)) {
92 		do {
93 			u32 irq_id = __ffs(mask);
94 
95 			mask ^= BIT(irq_id);
96 
97 			ipa_interrupt_process(interrupt, irq_id);
98 		} while (mask);
99 		mask = ioread32(ipa->reg_virt + offset);
100 	}
101 }
102 
103 /* Threaded part of the IPA IRQ handler */
104 static irqreturn_t ipa_isr_thread(int irq, void *dev_id)
105 {
106 	struct ipa_interrupt *interrupt = dev_id;
107 
108 	ipa_clock_get(interrupt->ipa);
109 
110 	ipa_interrupt_process_all(interrupt);
111 
112 	ipa_clock_put(interrupt->ipa);
113 
114 	return IRQ_HANDLED;
115 }
116 
117 /* Hard part (i.e., "real" IRQ handler) of the IRQ handler */
118 static irqreturn_t ipa_isr(int irq, void *dev_id)
119 {
120 	struct ipa_interrupt *interrupt = dev_id;
121 	struct ipa *ipa = interrupt->ipa;
122 	u32 offset;
123 	u32 mask;
124 
125 	offset = ipa_reg_irq_stts_offset(ipa->version);
126 	mask = ioread32(ipa->reg_virt + offset);
127 	if (mask & interrupt->enabled)
128 		return IRQ_WAKE_THREAD;
129 
130 	/* Nothing in the mask was supposed to cause an interrupt */
131 	offset = ipa_reg_irq_clr_offset(ipa->version);
132 	iowrite32(mask, ipa->reg_virt + offset);
133 
134 	dev_err(&ipa->pdev->dev, "%s: unexpected interrupt, mask 0x%08x\n",
135 		__func__, mask);
136 
137 	return IRQ_HANDLED;
138 }
139 
140 /* Common function used to enable/disable TX_SUSPEND for an endpoint */
141 static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt,
142 					  u32 endpoint_id, bool enable)
143 {
144 	struct ipa *ipa = interrupt->ipa;
145 	u32 mask = BIT(endpoint_id);
146 	u32 offset;
147 	u32 val;
148 
149 	/* assert(mask & ipa->available); */
150 
151 	/* IPA version 3.0 does not support TX_SUSPEND interrupt control */
152 	if (ipa->version == IPA_VERSION_3_0)
153 		return;
154 
155 	offset = ipa_reg_irq_suspend_en_offset(ipa->version);
156 	val = ioread32(ipa->reg_virt + offset);
157 	if (enable)
158 		val |= mask;
159 	else
160 		val &= ~mask;
161 	iowrite32(val, ipa->reg_virt + offset);
162 }
163 
164 /* Enable TX_SUSPEND for an endpoint */
165 void
166 ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id)
167 {
168 	ipa_interrupt_suspend_control(interrupt, endpoint_id, true);
169 }
170 
171 /* Disable TX_SUSPEND for an endpoint */
172 void
173 ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id)
174 {
175 	ipa_interrupt_suspend_control(interrupt, endpoint_id, false);
176 }
177 
178 /* Clear the suspend interrupt for all endpoints that signaled it */
179 void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt)
180 {
181 	struct ipa *ipa = interrupt->ipa;
182 	u32 offset;
183 	u32 val;
184 
185 	offset = ipa_reg_irq_suspend_info_offset(ipa->version);
186 	val = ioread32(ipa->reg_virt + offset);
187 
188 	/* SUSPEND interrupt status isn't cleared on IPA version 3.0 */
189 	if (ipa->version == IPA_VERSION_3_0)
190 		return;
191 
192 	offset = ipa_reg_irq_suspend_clr_offset(ipa->version);
193 	iowrite32(val, ipa->reg_virt + offset);
194 }
195 
196 /* Simulate arrival of an IPA TX_SUSPEND interrupt */
197 void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt)
198 {
199 	ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND);
200 }
201 
202 /* Add a handler for an IPA interrupt */
203 void ipa_interrupt_add(struct ipa_interrupt *interrupt,
204 		       enum ipa_irq_id ipa_irq, ipa_irq_handler_t handler)
205 {
206 	struct ipa *ipa = interrupt->ipa;
207 	u32 offset;
208 
209 	/* assert(ipa_irq < IPA_IRQ_COUNT); */
210 	interrupt->handler[ipa_irq] = handler;
211 
212 	/* Update the IPA interrupt mask to enable it */
213 	interrupt->enabled |= BIT(ipa_irq);
214 	offset = ipa_reg_irq_en_offset(ipa->version);
215 	iowrite32(interrupt->enabled, ipa->reg_virt + offset);
216 }
217 
218 /* Remove the handler for an IPA interrupt type */
219 void
220 ipa_interrupt_remove(struct ipa_interrupt *interrupt, enum ipa_irq_id ipa_irq)
221 {
222 	struct ipa *ipa = interrupt->ipa;
223 	u32 offset;
224 
225 	/* assert(ipa_irq < IPA_IRQ_COUNT); */
226 	/* Update the IPA interrupt mask to disable it */
227 	interrupt->enabled &= ~BIT(ipa_irq);
228 	offset = ipa_reg_irq_en_offset(ipa->version);
229 	iowrite32(interrupt->enabled, ipa->reg_virt + offset);
230 
231 	interrupt->handler[ipa_irq] = NULL;
232 }
233 
234 /* Set up the IPA interrupt framework */
235 struct ipa_interrupt *ipa_interrupt_setup(struct ipa *ipa)
236 {
237 	struct device *dev = &ipa->pdev->dev;
238 	struct ipa_interrupt *interrupt;
239 	unsigned int irq;
240 	u32 offset;
241 	int ret;
242 
243 	ret = platform_get_irq_byname(ipa->pdev, "ipa");
244 	if (ret <= 0) {
245 		dev_err(dev, "DT error %d getting \"ipa\" IRQ property\n",
246 			ret);
247 		return ERR_PTR(ret ? : -EINVAL);
248 	}
249 	irq = ret;
250 
251 	interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL);
252 	if (!interrupt)
253 		return ERR_PTR(-ENOMEM);
254 	interrupt->ipa = ipa;
255 	interrupt->irq = irq;
256 
257 	/* Start with all IPA interrupts disabled */
258 	offset = ipa_reg_irq_en_offset(ipa->version);
259 	iowrite32(0, ipa->reg_virt + offset);
260 
261 	ret = request_threaded_irq(irq, ipa_isr, ipa_isr_thread, IRQF_ONESHOT,
262 				   "ipa", interrupt);
263 	if (ret) {
264 		dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret);
265 		goto err_kfree;
266 	}
267 
268 	ret = enable_irq_wake(irq);
269 	if (ret) {
270 		dev_err(dev, "error %d enabling wakeup for \"ipa\" IRQ\n", ret);
271 		goto err_free_irq;
272 	}
273 
274 	return interrupt;
275 
276 err_free_irq:
277 	free_irq(interrupt->irq, interrupt);
278 err_kfree:
279 	kfree(interrupt);
280 
281 	return ERR_PTR(ret);
282 }
283 
284 /* Tear down the IPA interrupt framework */
285 void ipa_interrupt_teardown(struct ipa_interrupt *interrupt)
286 {
287 	struct device *dev = &interrupt->ipa->pdev->dev;
288 	int ret;
289 
290 	ret = disable_irq_wake(interrupt->irq);
291 	if (ret)
292 		dev_err(dev, "error %d disabling \"ipa\" IRQ wakeup\n", ret);
293 	free_irq(interrupt->irq, interrupt);
294 	kfree(interrupt);
295 }
296