1ba764c4dSAlex Elder // SPDX-License-Identifier: GPL-2.0 2ba764c4dSAlex Elder 3ba764c4dSAlex Elder /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. 4ba764c4dSAlex Elder * Copyright (C) 2018-2020 Linaro Ltd. 5ba764c4dSAlex Elder */ 6ba764c4dSAlex Elder 7ba764c4dSAlex Elder /* DOC: IPA Interrupts 8ba764c4dSAlex Elder * 9ba764c4dSAlex Elder * The IPA has an interrupt line distinct from the interrupt used by the GSI 10ba764c4dSAlex Elder * code. Whereas GSI interrupts are generally related to channel events (like 11ba764c4dSAlex Elder * transfer completions), IPA interrupts are related to other events related 12ba764c4dSAlex Elder * to the IPA. Some of the IPA interrupts come from a microcontroller 13ba764c4dSAlex Elder * embedded in the IPA. Each IPA interrupt type can be both masked and 14ba764c4dSAlex Elder * acknowledged independent of the others. 15ba764c4dSAlex Elder * 16ba764c4dSAlex Elder * Two of the IPA interrupts are initiated by the microcontroller. A third 17ba764c4dSAlex Elder * can be generated to signal the need for a wakeup/resume when an IPA 18ba764c4dSAlex Elder * endpoint has been suspended. There are other IPA events, but at this 19ba764c4dSAlex Elder * time only these three are supported. 20ba764c4dSAlex Elder */ 21ba764c4dSAlex Elder 22ba764c4dSAlex Elder #include <linux/types.h> 23ba764c4dSAlex Elder #include <linux/interrupt.h> 24ba764c4dSAlex Elder 25ba764c4dSAlex Elder #include "ipa.h" 26ba764c4dSAlex Elder #include "ipa_clock.h" 27ba764c4dSAlex Elder #include "ipa_reg.h" 28ba764c4dSAlex Elder #include "ipa_endpoint.h" 29ba764c4dSAlex Elder #include "ipa_interrupt.h" 30ba764c4dSAlex Elder 31ba764c4dSAlex Elder /** 32ba764c4dSAlex Elder * struct ipa_interrupt - IPA interrupt information 33ba764c4dSAlex Elder * @ipa: IPA pointer 34ba764c4dSAlex Elder * @irq: Linux IRQ number used for IPA interrupts 35ba764c4dSAlex Elder * @enabled: Mask indicating which interrupts are enabled 36ba764c4dSAlex Elder * @handler: Array of handlers indexed by IPA interrupt ID 37ba764c4dSAlex Elder */ 38ba764c4dSAlex Elder struct ipa_interrupt { 39ba764c4dSAlex Elder struct ipa *ipa; 40ba764c4dSAlex Elder u32 irq; 41ba764c4dSAlex Elder u32 enabled; 42ba764c4dSAlex Elder ipa_irq_handler_t handler[IPA_IRQ_COUNT]; 43ba764c4dSAlex Elder }; 44ba764c4dSAlex Elder 45ba764c4dSAlex Elder /* Returns true if the interrupt type is associated with the microcontroller */ 46ba764c4dSAlex Elder static bool ipa_interrupt_uc(struct ipa_interrupt *interrupt, u32 irq_id) 47ba764c4dSAlex Elder { 48ba764c4dSAlex Elder return irq_id == IPA_IRQ_UC_0 || irq_id == IPA_IRQ_UC_1; 49ba764c4dSAlex Elder } 50ba764c4dSAlex Elder 51ba764c4dSAlex Elder /* Process a particular interrupt type that has been received */ 52ba764c4dSAlex Elder static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id) 53ba764c4dSAlex Elder { 54ba764c4dSAlex Elder bool uc_irq = ipa_interrupt_uc(interrupt, irq_id); 55ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 56ba764c4dSAlex Elder u32 mask = BIT(irq_id); 57e666aa97SAlex Elder u32 offset; 58ba764c4dSAlex Elder 59ba764c4dSAlex Elder /* For microcontroller interrupts, clear the interrupt right away, 60ba764c4dSAlex Elder * "to avoid clearing unhandled interrupts." 61ba764c4dSAlex Elder */ 62e666aa97SAlex Elder offset = ipa_reg_irq_clr_offset(ipa->version); 63ba764c4dSAlex Elder if (uc_irq) 64e666aa97SAlex Elder iowrite32(mask, ipa->reg_virt + offset); 65ba764c4dSAlex Elder 66ba764c4dSAlex Elder if (irq_id < IPA_IRQ_COUNT && interrupt->handler[irq_id]) 67ba764c4dSAlex Elder interrupt->handler[irq_id](interrupt->ipa, irq_id); 68ba764c4dSAlex Elder 69ba764c4dSAlex Elder /* Clearing the SUSPEND_TX interrupt also clears the register 70ba764c4dSAlex Elder * that tells us which suspended endpoint(s) caused the interrupt, 71ba764c4dSAlex Elder * so defer clearing until after the handler has been called. 72ba764c4dSAlex Elder */ 73ba764c4dSAlex Elder if (!uc_irq) 74e666aa97SAlex Elder iowrite32(mask, ipa->reg_virt + offset); 75ba764c4dSAlex Elder } 76ba764c4dSAlex Elder 77ba764c4dSAlex Elder /* Process all IPA interrupt types that have been signaled */ 78ba764c4dSAlex Elder static void ipa_interrupt_process_all(struct ipa_interrupt *interrupt) 79ba764c4dSAlex Elder { 80ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 81ba764c4dSAlex Elder u32 enabled = interrupt->enabled; 82*e70e410fSAlex Elder u32 pending; 83e666aa97SAlex Elder u32 offset; 84ba764c4dSAlex Elder u32 mask; 85ba764c4dSAlex Elder 86ba764c4dSAlex Elder /* The status register indicates which conditions are present, 87ba764c4dSAlex Elder * including conditions whose interrupt is not enabled. Handle 88ba764c4dSAlex Elder * only the enabled ones. 89ba764c4dSAlex Elder */ 90e666aa97SAlex Elder offset = ipa_reg_irq_stts_offset(ipa->version); 91*e70e410fSAlex Elder pending = ioread32(ipa->reg_virt + offset); 92*e70e410fSAlex Elder while ((mask = pending & enabled)) { 93ba764c4dSAlex Elder do { 94ba764c4dSAlex Elder u32 irq_id = __ffs(mask); 95ba764c4dSAlex Elder 96ba764c4dSAlex Elder mask ^= BIT(irq_id); 97ba764c4dSAlex Elder 98ba764c4dSAlex Elder ipa_interrupt_process(interrupt, irq_id); 99ba764c4dSAlex Elder } while (mask); 100*e70e410fSAlex Elder pending = ioread32(ipa->reg_virt + offset); 101*e70e410fSAlex Elder } 102*e70e410fSAlex Elder 103*e70e410fSAlex Elder /* If any disabled interrupts are pending, clear them */ 104*e70e410fSAlex Elder if (pending) { 105*e70e410fSAlex Elder struct device *dev = &ipa->pdev->dev; 106*e70e410fSAlex Elder 107*e70e410fSAlex Elder dev_dbg(dev, "clearing disabled IPA interrupts 0x%08x\n", 108*e70e410fSAlex Elder pending); 109*e70e410fSAlex Elder offset = ipa_reg_irq_clr_offset(ipa->version); 110*e70e410fSAlex Elder iowrite32(pending, ipa->reg_virt + offset); 111ba764c4dSAlex Elder } 112ba764c4dSAlex Elder } 113ba764c4dSAlex Elder 114937a0da4SAlex Elder /* IPA IRQ handler is threaded */ 115ba764c4dSAlex Elder static irqreturn_t ipa_isr_thread(int irq, void *dev_id) 116ba764c4dSAlex Elder { 117ba764c4dSAlex Elder struct ipa_interrupt *interrupt = dev_id; 118ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 119e666aa97SAlex Elder u32 offset; 120ba764c4dSAlex Elder u32 mask; 121ba764c4dSAlex Elder 122937a0da4SAlex Elder ipa_clock_get(ipa); 123937a0da4SAlex Elder 124e666aa97SAlex Elder offset = ipa_reg_irq_stts_offset(ipa->version); 125e666aa97SAlex Elder mask = ioread32(ipa->reg_virt + offset); 126937a0da4SAlex Elder if (mask & interrupt->enabled) { 127937a0da4SAlex Elder ipa_interrupt_process_all(interrupt); 128937a0da4SAlex Elder goto out_clock_put; 129937a0da4SAlex Elder } 130ba764c4dSAlex Elder 131ba764c4dSAlex Elder /* Nothing in the mask was supposed to cause an interrupt */ 132e666aa97SAlex Elder offset = ipa_reg_irq_clr_offset(ipa->version); 133e666aa97SAlex Elder iowrite32(mask, ipa->reg_virt + offset); 134ba764c4dSAlex Elder 135ba764c4dSAlex Elder dev_err(&ipa->pdev->dev, "%s: unexpected interrupt, mask 0x%08x\n", 136ba764c4dSAlex Elder __func__, mask); 137ba764c4dSAlex Elder 138937a0da4SAlex Elder out_clock_put: 139937a0da4SAlex Elder ipa_clock_put(ipa); 140937a0da4SAlex Elder 141ba764c4dSAlex Elder return IRQ_HANDLED; 142ba764c4dSAlex Elder } 143ba764c4dSAlex Elder 144ba764c4dSAlex Elder /* Common function used to enable/disable TX_SUSPEND for an endpoint */ 145ba764c4dSAlex Elder static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt, 146ba764c4dSAlex Elder u32 endpoint_id, bool enable) 147ba764c4dSAlex Elder { 148ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 149ba764c4dSAlex Elder u32 mask = BIT(endpoint_id); 150e666aa97SAlex Elder u32 offset; 151ba764c4dSAlex Elder u32 val; 152ba764c4dSAlex Elder 1535bc55884SAlex Elder WARN_ON(!(mask & ipa->available)); 154e666aa97SAlex Elder 155e666aa97SAlex Elder /* IPA version 3.0 does not support TX_SUSPEND interrupt control */ 156e666aa97SAlex Elder if (ipa->version == IPA_VERSION_3_0) 157e666aa97SAlex Elder return; 158e666aa97SAlex Elder 159e666aa97SAlex Elder offset = ipa_reg_irq_suspend_en_offset(ipa->version); 160e666aa97SAlex Elder val = ioread32(ipa->reg_virt + offset); 161ba764c4dSAlex Elder if (enable) 162ba764c4dSAlex Elder val |= mask; 163ba764c4dSAlex Elder else 164ba764c4dSAlex Elder val &= ~mask; 165e666aa97SAlex Elder iowrite32(val, ipa->reg_virt + offset); 166ba764c4dSAlex Elder } 167ba764c4dSAlex Elder 168ba764c4dSAlex Elder /* Enable TX_SUSPEND for an endpoint */ 169ba764c4dSAlex Elder void 170ba764c4dSAlex Elder ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id) 171ba764c4dSAlex Elder { 172ba764c4dSAlex Elder ipa_interrupt_suspend_control(interrupt, endpoint_id, true); 173ba764c4dSAlex Elder } 174ba764c4dSAlex Elder 175ba764c4dSAlex Elder /* Disable TX_SUSPEND for an endpoint */ 176ba764c4dSAlex Elder void 177ba764c4dSAlex Elder ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id) 178ba764c4dSAlex Elder { 179ba764c4dSAlex Elder ipa_interrupt_suspend_control(interrupt, endpoint_id, false); 180ba764c4dSAlex Elder } 181ba764c4dSAlex Elder 182ba764c4dSAlex Elder /* Clear the suspend interrupt for all endpoints that signaled it */ 183ba764c4dSAlex Elder void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt) 184ba764c4dSAlex Elder { 185ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 186e666aa97SAlex Elder u32 offset; 187ba764c4dSAlex Elder u32 val; 188ba764c4dSAlex Elder 189e666aa97SAlex Elder offset = ipa_reg_irq_suspend_info_offset(ipa->version); 190e666aa97SAlex Elder val = ioread32(ipa->reg_virt + offset); 191e666aa97SAlex Elder 192e666aa97SAlex Elder /* SUSPEND interrupt status isn't cleared on IPA version 3.0 */ 193e666aa97SAlex Elder if (ipa->version == IPA_VERSION_3_0) 194e666aa97SAlex Elder return; 195e666aa97SAlex Elder 196e666aa97SAlex Elder offset = ipa_reg_irq_suspend_clr_offset(ipa->version); 197e666aa97SAlex Elder iowrite32(val, ipa->reg_virt + offset); 198ba764c4dSAlex Elder } 199ba764c4dSAlex Elder 200ba764c4dSAlex Elder /* Simulate arrival of an IPA TX_SUSPEND interrupt */ 201ba764c4dSAlex Elder void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt) 202ba764c4dSAlex Elder { 203ba764c4dSAlex Elder ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND); 204ba764c4dSAlex Elder } 205ba764c4dSAlex Elder 206ba764c4dSAlex Elder /* Add a handler for an IPA interrupt */ 207ba764c4dSAlex Elder void ipa_interrupt_add(struct ipa_interrupt *interrupt, 208ba764c4dSAlex Elder enum ipa_irq_id ipa_irq, ipa_irq_handler_t handler) 209ba764c4dSAlex Elder { 210ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 211e666aa97SAlex Elder u32 offset; 212ba764c4dSAlex Elder 2135bc55884SAlex Elder WARN_ON(ipa_irq >= IPA_IRQ_COUNT); 2145bc55884SAlex Elder 215ba764c4dSAlex Elder interrupt->handler[ipa_irq] = handler; 216ba764c4dSAlex Elder 217ba764c4dSAlex Elder /* Update the IPA interrupt mask to enable it */ 218ba764c4dSAlex Elder interrupt->enabled |= BIT(ipa_irq); 219e666aa97SAlex Elder offset = ipa_reg_irq_en_offset(ipa->version); 220e666aa97SAlex Elder iowrite32(interrupt->enabled, ipa->reg_virt + offset); 221ba764c4dSAlex Elder } 222ba764c4dSAlex Elder 223ba764c4dSAlex Elder /* Remove the handler for an IPA interrupt type */ 224ba764c4dSAlex Elder void 225ba764c4dSAlex Elder ipa_interrupt_remove(struct ipa_interrupt *interrupt, enum ipa_irq_id ipa_irq) 226ba764c4dSAlex Elder { 227ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 228e666aa97SAlex Elder u32 offset; 229ba764c4dSAlex Elder 2305bc55884SAlex Elder WARN_ON(ipa_irq >= IPA_IRQ_COUNT); 2315bc55884SAlex Elder 232ba764c4dSAlex Elder /* Update the IPA interrupt mask to disable it */ 233ba764c4dSAlex Elder interrupt->enabled &= ~BIT(ipa_irq); 234e666aa97SAlex Elder offset = ipa_reg_irq_en_offset(ipa->version); 235e666aa97SAlex Elder iowrite32(interrupt->enabled, ipa->reg_virt + offset); 236ba764c4dSAlex Elder 237ba764c4dSAlex Elder interrupt->handler[ipa_irq] = NULL; 238ba764c4dSAlex Elder } 239ba764c4dSAlex Elder 2401118a147SAlex Elder /* Configure the IPA interrupt framework */ 2411118a147SAlex Elder struct ipa_interrupt *ipa_interrupt_config(struct ipa *ipa) 242ba764c4dSAlex Elder { 243ba764c4dSAlex Elder struct device *dev = &ipa->pdev->dev; 244ba764c4dSAlex Elder struct ipa_interrupt *interrupt; 245ba764c4dSAlex Elder unsigned int irq; 246e666aa97SAlex Elder u32 offset; 247ba764c4dSAlex Elder int ret; 248ba764c4dSAlex Elder 249ba764c4dSAlex Elder ret = platform_get_irq_byname(ipa->pdev, "ipa"); 250ba764c4dSAlex Elder if (ret <= 0) { 251ba764c4dSAlex Elder dev_err(dev, "DT error %d getting \"ipa\" IRQ property\n", 252ba764c4dSAlex Elder ret); 253ba764c4dSAlex Elder return ERR_PTR(ret ? : -EINVAL); 254ba764c4dSAlex Elder } 255ba764c4dSAlex Elder irq = ret; 256ba764c4dSAlex Elder 257ba764c4dSAlex Elder interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL); 258ba764c4dSAlex Elder if (!interrupt) 259ba764c4dSAlex Elder return ERR_PTR(-ENOMEM); 260ba764c4dSAlex Elder interrupt->ipa = ipa; 261ba764c4dSAlex Elder interrupt->irq = irq; 262ba764c4dSAlex Elder 263ba764c4dSAlex Elder /* Start with all IPA interrupts disabled */ 264e666aa97SAlex Elder offset = ipa_reg_irq_en_offset(ipa->version); 265e666aa97SAlex Elder iowrite32(0, ipa->reg_virt + offset); 266ba764c4dSAlex Elder 267937a0da4SAlex Elder ret = request_threaded_irq(irq, NULL, ipa_isr_thread, IRQF_ONESHOT, 268ba764c4dSAlex Elder "ipa", interrupt); 269ba764c4dSAlex Elder if (ret) { 270ba764c4dSAlex Elder dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret); 271ba764c4dSAlex Elder goto err_kfree; 272ba764c4dSAlex Elder } 273ba764c4dSAlex Elder 274d1b5126aSAlex Elder ret = enable_irq_wake(irq); 275d1b5126aSAlex Elder if (ret) { 276d1b5126aSAlex Elder dev_err(dev, "error %d enabling wakeup for \"ipa\" IRQ\n", ret); 277d1b5126aSAlex Elder goto err_free_irq; 278d1b5126aSAlex Elder } 279d1b5126aSAlex Elder 280ba764c4dSAlex Elder return interrupt; 281ba764c4dSAlex Elder 282d1b5126aSAlex Elder err_free_irq: 283d1b5126aSAlex Elder free_irq(interrupt->irq, interrupt); 284ba764c4dSAlex Elder err_kfree: 285ba764c4dSAlex Elder kfree(interrupt); 286ba764c4dSAlex Elder 287ba764c4dSAlex Elder return ERR_PTR(ret); 288ba764c4dSAlex Elder } 289ba764c4dSAlex Elder 2901118a147SAlex Elder /* Inverse of ipa_interrupt_config() */ 2911118a147SAlex Elder void ipa_interrupt_deconfig(struct ipa_interrupt *interrupt) 292ba764c4dSAlex Elder { 293d1b5126aSAlex Elder struct device *dev = &interrupt->ipa->pdev->dev; 294d1b5126aSAlex Elder int ret; 295d1b5126aSAlex Elder 296d1b5126aSAlex Elder ret = disable_irq_wake(interrupt->irq); 297d1b5126aSAlex Elder if (ret) 298d1b5126aSAlex Elder dev_err(dev, "error %d disabling \"ipa\" IRQ wakeup\n", ret); 299ba764c4dSAlex Elder free_irq(interrupt->irq, interrupt); 300ba764c4dSAlex Elder kfree(interrupt); 301ba764c4dSAlex Elder } 302