1ba764c4dSAlex Elder // SPDX-License-Identifier: GPL-2.0 2ba764c4dSAlex Elder 3ba764c4dSAlex Elder /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. 4a4388da5SAlex Elder * Copyright (C) 2018-2022 Linaro Ltd. 5ba764c4dSAlex Elder */ 6ba764c4dSAlex Elder 7ba764c4dSAlex Elder /* DOC: IPA Interrupts 8ba764c4dSAlex Elder * 9ba764c4dSAlex Elder * The IPA has an interrupt line distinct from the interrupt used by the GSI 10ba764c4dSAlex Elder * code. Whereas GSI interrupts are generally related to channel events (like 11ba764c4dSAlex Elder * transfer completions), IPA interrupts are related to other events related 12ba764c4dSAlex Elder * to the IPA. Some of the IPA interrupts come from a microcontroller 13ba764c4dSAlex Elder * embedded in the IPA. Each IPA interrupt type can be both masked and 14ba764c4dSAlex Elder * acknowledged independent of the others. 15ba764c4dSAlex Elder * 16ba764c4dSAlex Elder * Two of the IPA interrupts are initiated by the microcontroller. A third 17ba764c4dSAlex Elder * can be generated to signal the need for a wakeup/resume when an IPA 18ba764c4dSAlex Elder * endpoint has been suspended. There are other IPA events, but at this 19ba764c4dSAlex Elder * time only these three are supported. 20ba764c4dSAlex Elder */ 21ba764c4dSAlex Elder 22ba764c4dSAlex Elder #include <linux/types.h> 23ba764c4dSAlex Elder #include <linux/interrupt.h> 24c3f115aaSAlex Elder #include <linux/pm_runtime.h> 25ba764c4dSAlex Elder 26ba764c4dSAlex Elder #include "ipa.h" 27ba764c4dSAlex Elder #include "ipa_reg.h" 28ba764c4dSAlex Elder #include "ipa_endpoint.h" 29ba764c4dSAlex Elder #include "ipa_interrupt.h" 30ba764c4dSAlex Elder 31ba764c4dSAlex Elder /** 32ba764c4dSAlex Elder * struct ipa_interrupt - IPA interrupt information 33ba764c4dSAlex Elder * @ipa: IPA pointer 34ba764c4dSAlex Elder * @irq: Linux IRQ number used for IPA interrupts 35ba764c4dSAlex Elder * @enabled: Mask indicating which interrupts are enabled 36ba764c4dSAlex Elder * @handler: Array of handlers indexed by IPA interrupt ID 37ba764c4dSAlex Elder */ 38ba764c4dSAlex Elder struct ipa_interrupt { 39ba764c4dSAlex Elder struct ipa *ipa; 40ba764c4dSAlex Elder u32 irq; 41ba764c4dSAlex Elder u32 enabled; 42ba764c4dSAlex Elder ipa_irq_handler_t handler[IPA_IRQ_COUNT]; 43ba764c4dSAlex Elder }; 44ba764c4dSAlex Elder 45ba764c4dSAlex Elder /* Returns true if the interrupt type is associated with the microcontroller */ 46ba764c4dSAlex Elder static bool ipa_interrupt_uc(struct ipa_interrupt *interrupt, u32 irq_id) 47ba764c4dSAlex Elder { 48ba764c4dSAlex Elder return irq_id == IPA_IRQ_UC_0 || irq_id == IPA_IRQ_UC_1; 49ba764c4dSAlex Elder } 50ba764c4dSAlex Elder 51ba764c4dSAlex Elder /* Process a particular interrupt type that has been received */ 52ba764c4dSAlex Elder static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id) 53ba764c4dSAlex Elder { 54ba764c4dSAlex Elder bool uc_irq = ipa_interrupt_uc(interrupt, irq_id); 55ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 566a244b75SAlex Elder const struct ipa_reg *reg; 57ba764c4dSAlex Elder u32 mask = BIT(irq_id); 58e666aa97SAlex Elder u32 offset; 59ba764c4dSAlex Elder 60ba764c4dSAlex Elder /* For microcontroller interrupts, clear the interrupt right away, 61ba764c4dSAlex Elder * "to avoid clearing unhandled interrupts." 62ba764c4dSAlex Elder */ 636a244b75SAlex Elder reg = ipa_reg(ipa, IPA_IRQ_CLR); 646a244b75SAlex Elder offset = ipa_reg_offset(reg); 65ba764c4dSAlex Elder if (uc_irq) 66e666aa97SAlex Elder iowrite32(mask, ipa->reg_virt + offset); 67ba764c4dSAlex Elder 68ba764c4dSAlex Elder if (irq_id < IPA_IRQ_COUNT && interrupt->handler[irq_id]) 69ba764c4dSAlex Elder interrupt->handler[irq_id](interrupt->ipa, irq_id); 70ba764c4dSAlex Elder 71ba764c4dSAlex Elder /* Clearing the SUSPEND_TX interrupt also clears the register 72ba764c4dSAlex Elder * that tells us which suspended endpoint(s) caused the interrupt, 73ba764c4dSAlex Elder * so defer clearing until after the handler has been called. 74ba764c4dSAlex Elder */ 75ba764c4dSAlex Elder if (!uc_irq) 76e666aa97SAlex Elder iowrite32(mask, ipa->reg_virt + offset); 77ba764c4dSAlex Elder } 78ba764c4dSAlex Elder 79176086d8SAlex Elder /* IPA IRQ handler is threaded */ 80176086d8SAlex Elder static irqreturn_t ipa_isr_thread(int irq, void *dev_id) 81ba764c4dSAlex Elder { 82176086d8SAlex Elder struct ipa_interrupt *interrupt = dev_id; 83ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 84ba764c4dSAlex Elder u32 enabled = interrupt->enabled; 856a244b75SAlex Elder const struct ipa_reg *reg; 86c3f115aaSAlex Elder struct device *dev; 87e70e410fSAlex Elder u32 pending; 88e666aa97SAlex Elder u32 offset; 89ba764c4dSAlex Elder u32 mask; 907ebd168cSAlex Elder int ret; 91ba764c4dSAlex Elder 92c3f115aaSAlex Elder dev = &ipa->pdev->dev; 93c3f115aaSAlex Elder ret = pm_runtime_get_sync(dev); 947ebd168cSAlex Elder if (WARN_ON(ret < 0)) 95c3f115aaSAlex Elder goto out_power_put; 96176086d8SAlex Elder 97ba764c4dSAlex Elder /* The status register indicates which conditions are present, 98ba764c4dSAlex Elder * including conditions whose interrupt is not enabled. Handle 99ba764c4dSAlex Elder * only the enabled ones. 100ba764c4dSAlex Elder */ 1016a244b75SAlex Elder reg = ipa_reg(ipa, IPA_IRQ_STTS); 1026a244b75SAlex Elder offset = ipa_reg_offset(reg); 103e70e410fSAlex Elder pending = ioread32(ipa->reg_virt + offset); 104e70e410fSAlex Elder while ((mask = pending & enabled)) { 105ba764c4dSAlex Elder do { 106ba764c4dSAlex Elder u32 irq_id = __ffs(mask); 107ba764c4dSAlex Elder 108ba764c4dSAlex Elder mask ^= BIT(irq_id); 109ba764c4dSAlex Elder 110ba764c4dSAlex Elder ipa_interrupt_process(interrupt, irq_id); 111ba764c4dSAlex Elder } while (mask); 112e70e410fSAlex Elder pending = ioread32(ipa->reg_virt + offset); 113e70e410fSAlex Elder } 114e70e410fSAlex Elder 115e70e410fSAlex Elder /* If any disabled interrupts are pending, clear them */ 116e70e410fSAlex Elder if (pending) { 117e70e410fSAlex Elder dev_dbg(dev, "clearing disabled IPA interrupts 0x%08x\n", 118e70e410fSAlex Elder pending); 1196a244b75SAlex Elder reg = ipa_reg(ipa, IPA_IRQ_CLR); 1206a244b75SAlex Elder offset = ipa_reg_offset(reg); 121e70e410fSAlex Elder iowrite32(pending, ipa->reg_virt + offset); 122ba764c4dSAlex Elder } 123c3f115aaSAlex Elder out_power_put: 1241aac309dSAlex Elder pm_runtime_mark_last_busy(dev); 1251aac309dSAlex Elder (void)pm_runtime_put_autosuspend(dev); 126937a0da4SAlex Elder 127ba764c4dSAlex Elder return IRQ_HANDLED; 128ba764c4dSAlex Elder } 129ba764c4dSAlex Elder 130ba764c4dSAlex Elder /* Common function used to enable/disable TX_SUSPEND for an endpoint */ 131ba764c4dSAlex Elder static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt, 132ba764c4dSAlex Elder u32 endpoint_id, bool enable) 133ba764c4dSAlex Elder { 134ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 135*d9d71a89SAlex Elder u32 mask = BIT(endpoint_id % 32); 136f298ba78SAlex Elder u32 unit = endpoint_id / 32; 1376a244b75SAlex Elder const struct ipa_reg *reg; 138e666aa97SAlex Elder u32 offset; 139ba764c4dSAlex Elder u32 val; 140ba764c4dSAlex Elder 14188de7672SAlex Elder WARN_ON(!test_bit(endpoint_id, ipa->available)); 142e666aa97SAlex Elder 143e666aa97SAlex Elder /* IPA version 3.0 does not support TX_SUSPEND interrupt control */ 144e666aa97SAlex Elder if (ipa->version == IPA_VERSION_3_0) 145e666aa97SAlex Elder return; 146e666aa97SAlex Elder 1476a244b75SAlex Elder reg = ipa_reg(ipa, IRQ_SUSPEND_EN); 148f298ba78SAlex Elder offset = ipa_reg_n_offset(reg, unit); 149e666aa97SAlex Elder val = ioread32(ipa->reg_virt + offset); 15088de7672SAlex Elder 151ba764c4dSAlex Elder if (enable) 152ba764c4dSAlex Elder val |= mask; 153ba764c4dSAlex Elder else 154ba764c4dSAlex Elder val &= ~mask; 15588de7672SAlex Elder 156e666aa97SAlex Elder iowrite32(val, ipa->reg_virt + offset); 157ba764c4dSAlex Elder } 158ba764c4dSAlex Elder 159ba764c4dSAlex Elder /* Enable TX_SUSPEND for an endpoint */ 160ba764c4dSAlex Elder void 161ba764c4dSAlex Elder ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id) 162ba764c4dSAlex Elder { 163ba764c4dSAlex Elder ipa_interrupt_suspend_control(interrupt, endpoint_id, true); 164ba764c4dSAlex Elder } 165ba764c4dSAlex Elder 166ba764c4dSAlex Elder /* Disable TX_SUSPEND for an endpoint */ 167ba764c4dSAlex Elder void 168ba764c4dSAlex Elder ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id) 169ba764c4dSAlex Elder { 170ba764c4dSAlex Elder ipa_interrupt_suspend_control(interrupt, endpoint_id, false); 171ba764c4dSAlex Elder } 172ba764c4dSAlex Elder 173ba764c4dSAlex Elder /* Clear the suspend interrupt for all endpoints that signaled it */ 174ba764c4dSAlex Elder void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt) 175ba764c4dSAlex Elder { 176ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 177f298ba78SAlex Elder u32 unit_count; 178f298ba78SAlex Elder u32 unit; 179f298ba78SAlex Elder 180f298ba78SAlex Elder unit_count = roundup(ipa->endpoint_count, 32); 181f298ba78SAlex Elder for (unit = 0; unit < unit_count; unit++) { 1826a244b75SAlex Elder const struct ipa_reg *reg; 183ba764c4dSAlex Elder u32 val; 184ba764c4dSAlex Elder 1856a244b75SAlex Elder reg = ipa_reg(ipa, IRQ_SUSPEND_INFO); 186f298ba78SAlex Elder val = ioread32(ipa->reg_virt + ipa_reg_n_offset(reg, unit)); 187e666aa97SAlex Elder 188e666aa97SAlex Elder /* SUSPEND interrupt status isn't cleared on IPA version 3.0 */ 189e666aa97SAlex Elder if (ipa->version == IPA_VERSION_3_0) 190f298ba78SAlex Elder continue; 191e666aa97SAlex Elder 1926a244b75SAlex Elder reg = ipa_reg(ipa, IRQ_SUSPEND_CLR); 193f298ba78SAlex Elder iowrite32(val, ipa->reg_virt + ipa_reg_n_offset(reg, unit)); 194f298ba78SAlex Elder } 195ba764c4dSAlex Elder } 196ba764c4dSAlex Elder 197ba764c4dSAlex Elder /* Simulate arrival of an IPA TX_SUSPEND interrupt */ 198ba764c4dSAlex Elder void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt) 199ba764c4dSAlex Elder { 200ba764c4dSAlex Elder ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND); 201ba764c4dSAlex Elder } 202ba764c4dSAlex Elder 203ba764c4dSAlex Elder /* Add a handler for an IPA interrupt */ 204ba764c4dSAlex Elder void ipa_interrupt_add(struct ipa_interrupt *interrupt, 205ba764c4dSAlex Elder enum ipa_irq_id ipa_irq, ipa_irq_handler_t handler) 206ba764c4dSAlex Elder { 207ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 2086a244b75SAlex Elder const struct ipa_reg *reg; 209ba764c4dSAlex Elder 2101172aa6eSJakub Kicinski if (WARN_ON(ipa_irq >= IPA_IRQ_COUNT)) 2111172aa6eSJakub Kicinski return; 2125bc55884SAlex Elder 213ba764c4dSAlex Elder interrupt->handler[ipa_irq] = handler; 214ba764c4dSAlex Elder 215ba764c4dSAlex Elder /* Update the IPA interrupt mask to enable it */ 216ba764c4dSAlex Elder interrupt->enabled |= BIT(ipa_irq); 2176a244b75SAlex Elder 2186a244b75SAlex Elder reg = ipa_reg(ipa, IPA_IRQ_EN); 2196a244b75SAlex Elder iowrite32(interrupt->enabled, ipa->reg_virt + ipa_reg_offset(reg)); 220ba764c4dSAlex Elder } 221ba764c4dSAlex Elder 222ba764c4dSAlex Elder /* Remove the handler for an IPA interrupt type */ 223ba764c4dSAlex Elder void 224ba764c4dSAlex Elder ipa_interrupt_remove(struct ipa_interrupt *interrupt, enum ipa_irq_id ipa_irq) 225ba764c4dSAlex Elder { 226ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 2276a244b75SAlex Elder const struct ipa_reg *reg; 228ba764c4dSAlex Elder 2291172aa6eSJakub Kicinski if (WARN_ON(ipa_irq >= IPA_IRQ_COUNT)) 2301172aa6eSJakub Kicinski return; 2315bc55884SAlex Elder 232ba764c4dSAlex Elder /* Update the IPA interrupt mask to disable it */ 233ba764c4dSAlex Elder interrupt->enabled &= ~BIT(ipa_irq); 2346a244b75SAlex Elder 2356a244b75SAlex Elder reg = ipa_reg(ipa, IPA_IRQ_EN); 2366a244b75SAlex Elder iowrite32(interrupt->enabled, ipa->reg_virt + ipa_reg_offset(reg)); 237ba764c4dSAlex Elder 238ba764c4dSAlex Elder interrupt->handler[ipa_irq] = NULL; 239ba764c4dSAlex Elder } 240ba764c4dSAlex Elder 2411118a147SAlex Elder /* Configure the IPA interrupt framework */ 2421118a147SAlex Elder struct ipa_interrupt *ipa_interrupt_config(struct ipa *ipa) 243ba764c4dSAlex Elder { 244ba764c4dSAlex Elder struct device *dev = &ipa->pdev->dev; 245ba764c4dSAlex Elder struct ipa_interrupt *interrupt; 2466a244b75SAlex Elder const struct ipa_reg *reg; 247ba764c4dSAlex Elder unsigned int irq; 248ba764c4dSAlex Elder int ret; 249ba764c4dSAlex Elder 250ba764c4dSAlex Elder ret = platform_get_irq_byname(ipa->pdev, "ipa"); 251ba764c4dSAlex Elder if (ret <= 0) { 252ba764c4dSAlex Elder dev_err(dev, "DT error %d getting \"ipa\" IRQ property\n", 253ba764c4dSAlex Elder ret); 254ba764c4dSAlex Elder return ERR_PTR(ret ? : -EINVAL); 255ba764c4dSAlex Elder } 256ba764c4dSAlex Elder irq = ret; 257ba764c4dSAlex Elder 258ba764c4dSAlex Elder interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL); 259ba764c4dSAlex Elder if (!interrupt) 260ba764c4dSAlex Elder return ERR_PTR(-ENOMEM); 261ba764c4dSAlex Elder interrupt->ipa = ipa; 262ba764c4dSAlex Elder interrupt->irq = irq; 263ba764c4dSAlex Elder 264ba764c4dSAlex Elder /* Start with all IPA interrupts disabled */ 2656a244b75SAlex Elder reg = ipa_reg(ipa, IPA_IRQ_EN); 2666a244b75SAlex Elder iowrite32(0, ipa->reg_virt + ipa_reg_offset(reg)); 267ba764c4dSAlex Elder 268937a0da4SAlex Elder ret = request_threaded_irq(irq, NULL, ipa_isr_thread, IRQF_ONESHOT, 269ba764c4dSAlex Elder "ipa", interrupt); 270ba764c4dSAlex Elder if (ret) { 271ba764c4dSAlex Elder dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret); 272ba764c4dSAlex Elder goto err_kfree; 273ba764c4dSAlex Elder } 274ba764c4dSAlex Elder 275d1b5126aSAlex Elder ret = enable_irq_wake(irq); 276d1b5126aSAlex Elder if (ret) { 277d1b5126aSAlex Elder dev_err(dev, "error %d enabling wakeup for \"ipa\" IRQ\n", ret); 278d1b5126aSAlex Elder goto err_free_irq; 279d1b5126aSAlex Elder } 280d1b5126aSAlex Elder 281ba764c4dSAlex Elder return interrupt; 282ba764c4dSAlex Elder 283d1b5126aSAlex Elder err_free_irq: 284d1b5126aSAlex Elder free_irq(interrupt->irq, interrupt); 285ba764c4dSAlex Elder err_kfree: 286ba764c4dSAlex Elder kfree(interrupt); 287ba764c4dSAlex Elder 288ba764c4dSAlex Elder return ERR_PTR(ret); 289ba764c4dSAlex Elder } 290ba764c4dSAlex Elder 2911118a147SAlex Elder /* Inverse of ipa_interrupt_config() */ 2921118a147SAlex Elder void ipa_interrupt_deconfig(struct ipa_interrupt *interrupt) 293ba764c4dSAlex Elder { 294d1b5126aSAlex Elder struct device *dev = &interrupt->ipa->pdev->dev; 295d1b5126aSAlex Elder int ret; 296d1b5126aSAlex Elder 297d1b5126aSAlex Elder ret = disable_irq_wake(interrupt->irq); 298d1b5126aSAlex Elder if (ret) 299d1b5126aSAlex Elder dev_err(dev, "error %d disabling \"ipa\" IRQ wakeup\n", ret); 300ba764c4dSAlex Elder free_irq(interrupt->irq, interrupt); 301ba764c4dSAlex Elder kfree(interrupt); 302ba764c4dSAlex Elder } 303