1ba764c4dSAlex Elder // SPDX-License-Identifier: GPL-2.0 2ba764c4dSAlex Elder 3ba764c4dSAlex Elder /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. 4ba764c4dSAlex Elder * Copyright (C) 2018-2020 Linaro Ltd. 5ba764c4dSAlex Elder */ 6ba764c4dSAlex Elder 7ba764c4dSAlex Elder /* DOC: IPA Interrupts 8ba764c4dSAlex Elder * 9ba764c4dSAlex Elder * The IPA has an interrupt line distinct from the interrupt used by the GSI 10ba764c4dSAlex Elder * code. Whereas GSI interrupts are generally related to channel events (like 11ba764c4dSAlex Elder * transfer completions), IPA interrupts are related to other events related 12ba764c4dSAlex Elder * to the IPA. Some of the IPA interrupts come from a microcontroller 13ba764c4dSAlex Elder * embedded in the IPA. Each IPA interrupt type can be both masked and 14ba764c4dSAlex Elder * acknowledged independent of the others. 15ba764c4dSAlex Elder * 16ba764c4dSAlex Elder * Two of the IPA interrupts are initiated by the microcontroller. A third 17ba764c4dSAlex Elder * can be generated to signal the need for a wakeup/resume when an IPA 18ba764c4dSAlex Elder * endpoint has been suspended. There are other IPA events, but at this 19ba764c4dSAlex Elder * time only these three are supported. 20ba764c4dSAlex Elder */ 21ba764c4dSAlex Elder 22ba764c4dSAlex Elder #include <linux/types.h> 23ba764c4dSAlex Elder #include <linux/interrupt.h> 24c3f115aaSAlex Elder #include <linux/pm_runtime.h> 25ba764c4dSAlex Elder 26ba764c4dSAlex Elder #include "ipa.h" 27ba764c4dSAlex Elder #include "ipa_reg.h" 28ba764c4dSAlex Elder #include "ipa_endpoint.h" 29ba764c4dSAlex Elder #include "ipa_interrupt.h" 30ba764c4dSAlex Elder 31ba764c4dSAlex Elder /** 32ba764c4dSAlex Elder * struct ipa_interrupt - IPA interrupt information 33ba764c4dSAlex Elder * @ipa: IPA pointer 34ba764c4dSAlex Elder * @irq: Linux IRQ number used for IPA interrupts 35ba764c4dSAlex Elder * @enabled: Mask indicating which interrupts are enabled 36ba764c4dSAlex Elder * @handler: Array of handlers indexed by IPA interrupt ID 37ba764c4dSAlex Elder */ 38ba764c4dSAlex Elder struct ipa_interrupt { 39ba764c4dSAlex Elder struct ipa *ipa; 40ba764c4dSAlex Elder u32 irq; 41ba764c4dSAlex Elder u32 enabled; 42ba764c4dSAlex Elder ipa_irq_handler_t handler[IPA_IRQ_COUNT]; 43ba764c4dSAlex Elder }; 44ba764c4dSAlex Elder 45ba764c4dSAlex Elder /* Returns true if the interrupt type is associated with the microcontroller */ 46ba764c4dSAlex Elder static bool ipa_interrupt_uc(struct ipa_interrupt *interrupt, u32 irq_id) 47ba764c4dSAlex Elder { 48ba764c4dSAlex Elder return irq_id == IPA_IRQ_UC_0 || irq_id == IPA_IRQ_UC_1; 49ba764c4dSAlex Elder } 50ba764c4dSAlex Elder 51ba764c4dSAlex Elder /* Process a particular interrupt type that has been received */ 52ba764c4dSAlex Elder static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id) 53ba764c4dSAlex Elder { 54ba764c4dSAlex Elder bool uc_irq = ipa_interrupt_uc(interrupt, irq_id); 55ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 56ba764c4dSAlex Elder u32 mask = BIT(irq_id); 57e666aa97SAlex Elder u32 offset; 58ba764c4dSAlex Elder 59ba764c4dSAlex Elder /* For microcontroller interrupts, clear the interrupt right away, 60ba764c4dSAlex Elder * "to avoid clearing unhandled interrupts." 61ba764c4dSAlex Elder */ 62e666aa97SAlex Elder offset = ipa_reg_irq_clr_offset(ipa->version); 63ba764c4dSAlex Elder if (uc_irq) 64e666aa97SAlex Elder iowrite32(mask, ipa->reg_virt + offset); 65ba764c4dSAlex Elder 66ba764c4dSAlex Elder if (irq_id < IPA_IRQ_COUNT && interrupt->handler[irq_id]) 67ba764c4dSAlex Elder interrupt->handler[irq_id](interrupt->ipa, irq_id); 68ba764c4dSAlex Elder 69ba764c4dSAlex Elder /* Clearing the SUSPEND_TX interrupt also clears the register 70ba764c4dSAlex Elder * that tells us which suspended endpoint(s) caused the interrupt, 71ba764c4dSAlex Elder * so defer clearing until after the handler has been called. 72ba764c4dSAlex Elder */ 73ba764c4dSAlex Elder if (!uc_irq) 74e666aa97SAlex Elder iowrite32(mask, ipa->reg_virt + offset); 75ba764c4dSAlex Elder } 76ba764c4dSAlex Elder 77176086d8SAlex Elder /* IPA IRQ handler is threaded */ 78176086d8SAlex Elder static irqreturn_t ipa_isr_thread(int irq, void *dev_id) 79ba764c4dSAlex Elder { 80176086d8SAlex Elder struct ipa_interrupt *interrupt = dev_id; 81ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 82ba764c4dSAlex Elder u32 enabled = interrupt->enabled; 83c3f115aaSAlex Elder struct device *dev; 84e70e410fSAlex Elder u32 pending; 85e666aa97SAlex Elder u32 offset; 86ba764c4dSAlex Elder u32 mask; 877ebd168cSAlex Elder int ret; 88ba764c4dSAlex Elder 89c3f115aaSAlex Elder dev = &ipa->pdev->dev; 90c3f115aaSAlex Elder ret = pm_runtime_get_sync(dev); 917ebd168cSAlex Elder if (WARN_ON(ret < 0)) 92c3f115aaSAlex Elder goto out_power_put; 93176086d8SAlex Elder 94ba764c4dSAlex Elder /* The status register indicates which conditions are present, 95ba764c4dSAlex Elder * including conditions whose interrupt is not enabled. Handle 96ba764c4dSAlex Elder * only the enabled ones. 97ba764c4dSAlex Elder */ 98e666aa97SAlex Elder offset = ipa_reg_irq_stts_offset(ipa->version); 99e70e410fSAlex Elder pending = ioread32(ipa->reg_virt + offset); 100e70e410fSAlex Elder while ((mask = pending & enabled)) { 101ba764c4dSAlex Elder do { 102ba764c4dSAlex Elder u32 irq_id = __ffs(mask); 103ba764c4dSAlex Elder 104ba764c4dSAlex Elder mask ^= BIT(irq_id); 105ba764c4dSAlex Elder 106ba764c4dSAlex Elder ipa_interrupt_process(interrupt, irq_id); 107ba764c4dSAlex Elder } while (mask); 108e70e410fSAlex Elder pending = ioread32(ipa->reg_virt + offset); 109e70e410fSAlex Elder } 110e70e410fSAlex Elder 111e70e410fSAlex Elder /* If any disabled interrupts are pending, clear them */ 112e70e410fSAlex Elder if (pending) { 113e70e410fSAlex Elder dev_dbg(dev, "clearing disabled IPA interrupts 0x%08x\n", 114e70e410fSAlex Elder pending); 115e70e410fSAlex Elder offset = ipa_reg_irq_clr_offset(ipa->version); 116e70e410fSAlex Elder iowrite32(pending, ipa->reg_virt + offset); 117ba764c4dSAlex Elder } 118c3f115aaSAlex Elder out_power_put: 1191aac309dSAlex Elder pm_runtime_mark_last_busy(dev); 1201aac309dSAlex Elder (void)pm_runtime_put_autosuspend(dev); 121937a0da4SAlex Elder 122ba764c4dSAlex Elder return IRQ_HANDLED; 123ba764c4dSAlex Elder } 124ba764c4dSAlex Elder 125ba764c4dSAlex Elder /* Common function used to enable/disable TX_SUSPEND for an endpoint */ 126ba764c4dSAlex Elder static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt, 127ba764c4dSAlex Elder u32 endpoint_id, bool enable) 128ba764c4dSAlex Elder { 129ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 130ba764c4dSAlex Elder u32 mask = BIT(endpoint_id); 131e666aa97SAlex Elder u32 offset; 132ba764c4dSAlex Elder u32 val; 133ba764c4dSAlex Elder 1345bc55884SAlex Elder WARN_ON(!(mask & ipa->available)); 135e666aa97SAlex Elder 136e666aa97SAlex Elder /* IPA version 3.0 does not support TX_SUSPEND interrupt control */ 137e666aa97SAlex Elder if (ipa->version == IPA_VERSION_3_0) 138e666aa97SAlex Elder return; 139e666aa97SAlex Elder 140e666aa97SAlex Elder offset = ipa_reg_irq_suspend_en_offset(ipa->version); 141e666aa97SAlex Elder val = ioread32(ipa->reg_virt + offset); 142ba764c4dSAlex Elder if (enable) 143ba764c4dSAlex Elder val |= mask; 144ba764c4dSAlex Elder else 145ba764c4dSAlex Elder val &= ~mask; 146e666aa97SAlex Elder iowrite32(val, ipa->reg_virt + offset); 147ba764c4dSAlex Elder } 148ba764c4dSAlex Elder 149ba764c4dSAlex Elder /* Enable TX_SUSPEND for an endpoint */ 150ba764c4dSAlex Elder void 151ba764c4dSAlex Elder ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id) 152ba764c4dSAlex Elder { 153ba764c4dSAlex Elder ipa_interrupt_suspend_control(interrupt, endpoint_id, true); 154ba764c4dSAlex Elder } 155ba764c4dSAlex Elder 156ba764c4dSAlex Elder /* Disable TX_SUSPEND for an endpoint */ 157ba764c4dSAlex Elder void 158ba764c4dSAlex Elder ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id) 159ba764c4dSAlex Elder { 160ba764c4dSAlex Elder ipa_interrupt_suspend_control(interrupt, endpoint_id, false); 161ba764c4dSAlex Elder } 162ba764c4dSAlex Elder 163ba764c4dSAlex Elder /* Clear the suspend interrupt for all endpoints that signaled it */ 164ba764c4dSAlex Elder void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt) 165ba764c4dSAlex Elder { 166ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 167e666aa97SAlex Elder u32 offset; 168ba764c4dSAlex Elder u32 val; 169ba764c4dSAlex Elder 170e666aa97SAlex Elder offset = ipa_reg_irq_suspend_info_offset(ipa->version); 171e666aa97SAlex Elder val = ioread32(ipa->reg_virt + offset); 172e666aa97SAlex Elder 173e666aa97SAlex Elder /* SUSPEND interrupt status isn't cleared on IPA version 3.0 */ 174e666aa97SAlex Elder if (ipa->version == IPA_VERSION_3_0) 175e666aa97SAlex Elder return; 176e666aa97SAlex Elder 177e666aa97SAlex Elder offset = ipa_reg_irq_suspend_clr_offset(ipa->version); 178e666aa97SAlex Elder iowrite32(val, ipa->reg_virt + offset); 179ba764c4dSAlex Elder } 180ba764c4dSAlex Elder 181ba764c4dSAlex Elder /* Simulate arrival of an IPA TX_SUSPEND interrupt */ 182ba764c4dSAlex Elder void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt) 183ba764c4dSAlex Elder { 184ba764c4dSAlex Elder ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND); 185ba764c4dSAlex Elder } 186ba764c4dSAlex Elder 187ba764c4dSAlex Elder /* Add a handler for an IPA interrupt */ 188ba764c4dSAlex Elder void ipa_interrupt_add(struct ipa_interrupt *interrupt, 189ba764c4dSAlex Elder enum ipa_irq_id ipa_irq, ipa_irq_handler_t handler) 190ba764c4dSAlex Elder { 191ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 192e666aa97SAlex Elder u32 offset; 193ba764c4dSAlex Elder 194*1172aa6eSJakub Kicinski if (WARN_ON(ipa_irq >= IPA_IRQ_COUNT)) 195*1172aa6eSJakub Kicinski return; 1965bc55884SAlex Elder 197ba764c4dSAlex Elder interrupt->handler[ipa_irq] = handler; 198ba764c4dSAlex Elder 199ba764c4dSAlex Elder /* Update the IPA interrupt mask to enable it */ 200ba764c4dSAlex Elder interrupt->enabled |= BIT(ipa_irq); 201e666aa97SAlex Elder offset = ipa_reg_irq_en_offset(ipa->version); 202e666aa97SAlex Elder iowrite32(interrupt->enabled, ipa->reg_virt + offset); 203ba764c4dSAlex Elder } 204ba764c4dSAlex Elder 205ba764c4dSAlex Elder /* Remove the handler for an IPA interrupt type */ 206ba764c4dSAlex Elder void 207ba764c4dSAlex Elder ipa_interrupt_remove(struct ipa_interrupt *interrupt, enum ipa_irq_id ipa_irq) 208ba764c4dSAlex Elder { 209ba764c4dSAlex Elder struct ipa *ipa = interrupt->ipa; 210e666aa97SAlex Elder u32 offset; 211ba764c4dSAlex Elder 212*1172aa6eSJakub Kicinski if (WARN_ON(ipa_irq >= IPA_IRQ_COUNT)) 213*1172aa6eSJakub Kicinski return; 2145bc55884SAlex Elder 215ba764c4dSAlex Elder /* Update the IPA interrupt mask to disable it */ 216ba764c4dSAlex Elder interrupt->enabled &= ~BIT(ipa_irq); 217e666aa97SAlex Elder offset = ipa_reg_irq_en_offset(ipa->version); 218e666aa97SAlex Elder iowrite32(interrupt->enabled, ipa->reg_virt + offset); 219ba764c4dSAlex Elder 220ba764c4dSAlex Elder interrupt->handler[ipa_irq] = NULL; 221ba764c4dSAlex Elder } 222ba764c4dSAlex Elder 2231118a147SAlex Elder /* Configure the IPA interrupt framework */ 2241118a147SAlex Elder struct ipa_interrupt *ipa_interrupt_config(struct ipa *ipa) 225ba764c4dSAlex Elder { 226ba764c4dSAlex Elder struct device *dev = &ipa->pdev->dev; 227ba764c4dSAlex Elder struct ipa_interrupt *interrupt; 228ba764c4dSAlex Elder unsigned int irq; 229e666aa97SAlex Elder u32 offset; 230ba764c4dSAlex Elder int ret; 231ba764c4dSAlex Elder 232ba764c4dSAlex Elder ret = platform_get_irq_byname(ipa->pdev, "ipa"); 233ba764c4dSAlex Elder if (ret <= 0) { 234ba764c4dSAlex Elder dev_err(dev, "DT error %d getting \"ipa\" IRQ property\n", 235ba764c4dSAlex Elder ret); 236ba764c4dSAlex Elder return ERR_PTR(ret ? : -EINVAL); 237ba764c4dSAlex Elder } 238ba764c4dSAlex Elder irq = ret; 239ba764c4dSAlex Elder 240ba764c4dSAlex Elder interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL); 241ba764c4dSAlex Elder if (!interrupt) 242ba764c4dSAlex Elder return ERR_PTR(-ENOMEM); 243ba764c4dSAlex Elder interrupt->ipa = ipa; 244ba764c4dSAlex Elder interrupt->irq = irq; 245ba764c4dSAlex Elder 246ba764c4dSAlex Elder /* Start with all IPA interrupts disabled */ 247e666aa97SAlex Elder offset = ipa_reg_irq_en_offset(ipa->version); 248e666aa97SAlex Elder iowrite32(0, ipa->reg_virt + offset); 249ba764c4dSAlex Elder 250937a0da4SAlex Elder ret = request_threaded_irq(irq, NULL, ipa_isr_thread, IRQF_ONESHOT, 251ba764c4dSAlex Elder "ipa", interrupt); 252ba764c4dSAlex Elder if (ret) { 253ba764c4dSAlex Elder dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret); 254ba764c4dSAlex Elder goto err_kfree; 255ba764c4dSAlex Elder } 256ba764c4dSAlex Elder 257d1b5126aSAlex Elder ret = enable_irq_wake(irq); 258d1b5126aSAlex Elder if (ret) { 259d1b5126aSAlex Elder dev_err(dev, "error %d enabling wakeup for \"ipa\" IRQ\n", ret); 260d1b5126aSAlex Elder goto err_free_irq; 261d1b5126aSAlex Elder } 262d1b5126aSAlex Elder 263ba764c4dSAlex Elder return interrupt; 264ba764c4dSAlex Elder 265d1b5126aSAlex Elder err_free_irq: 266d1b5126aSAlex Elder free_irq(interrupt->irq, interrupt); 267ba764c4dSAlex Elder err_kfree: 268ba764c4dSAlex Elder kfree(interrupt); 269ba764c4dSAlex Elder 270ba764c4dSAlex Elder return ERR_PTR(ret); 271ba764c4dSAlex Elder } 272ba764c4dSAlex Elder 2731118a147SAlex Elder /* Inverse of ipa_interrupt_config() */ 2741118a147SAlex Elder void ipa_interrupt_deconfig(struct ipa_interrupt *interrupt) 275ba764c4dSAlex Elder { 276d1b5126aSAlex Elder struct device *dev = &interrupt->ipa->pdev->dev; 277d1b5126aSAlex Elder int ret; 278d1b5126aSAlex Elder 279d1b5126aSAlex Elder ret = disable_irq_wake(interrupt->irq); 280d1b5126aSAlex Elder if (ret) 281d1b5126aSAlex Elder dev_err(dev, "error %d disabling \"ipa\" IRQ wakeup\n", ret); 282ba764c4dSAlex Elder free_irq(interrupt->irq, interrupt); 283ba764c4dSAlex Elder kfree(interrupt); 284ba764c4dSAlex Elder } 285