xref: /openbmc/linux/drivers/net/ipa/ipa_data.h (revision 3219953b)
11ed7d0c0SAlex Elder /* SPDX-License-Identifier: GPL-2.0 */
21ed7d0c0SAlex Elder 
31ed7d0c0SAlex Elder /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4fd2b7bc3SAlex Elder  * Copyright (C) 2019-2021 Linaro Ltd.
51ed7d0c0SAlex Elder  */
61ed7d0c0SAlex Elder #ifndef _IPA_DATA_H_
71ed7d0c0SAlex Elder #define _IPA_DATA_H_
81ed7d0c0SAlex Elder 
91ed7d0c0SAlex Elder #include <linux/types.h>
101ed7d0c0SAlex Elder 
111ed7d0c0SAlex Elder #include "ipa_version.h"
121ed7d0c0SAlex Elder #include "ipa_endpoint.h"
131ed7d0c0SAlex Elder #include "ipa_mem.h"
141ed7d0c0SAlex Elder 
151ed7d0c0SAlex Elder /**
161ed7d0c0SAlex Elder  * DOC: IPA/GSI Configuration Data
171ed7d0c0SAlex Elder  *
181ed7d0c0SAlex Elder  * Boot-time configuration data is used to define the configuration of the
191ed7d0c0SAlex Elder  * IPA and GSI resources to use for a given platform.  This data is supplied
201ed7d0c0SAlex Elder  * via the Device Tree match table, associated with a particular compatible
21b259cc2aSAlex Elder  * string.  The data defines information about how resources, endpoints and
22b259cc2aSAlex Elder  * channels, memory, clocking and so on are allocated and used for the
23b259cc2aSAlex Elder  * platform.
241ed7d0c0SAlex Elder  *
251ed7d0c0SAlex Elder  * Resources are data structures used internally by the IPA hardware.  The
261ed7d0c0SAlex Elder  * configuration data defines the number (or limits of the number) of various
271ed7d0c0SAlex Elder  * types of these resources.
281ed7d0c0SAlex Elder  *
291ed7d0c0SAlex Elder  * Endpoint configuration data defines properties of both IPA endpoints and
301ed7d0c0SAlex Elder  * GSI channels.  A channel is a GSI construct, and represents a single
311ed7d0c0SAlex Elder  * communication path between the IPA and a particular execution environment
321ed7d0c0SAlex Elder  * (EE), such as the AP or Modem.  Each EE has a set of channels associated
331ed7d0c0SAlex Elder  * with it, and each channel has an ID unique for that EE.  For the most part
341ed7d0c0SAlex Elder  * the only GSI channels of concern to this driver belong to the AP
351ed7d0c0SAlex Elder  *
361ed7d0c0SAlex Elder  * An endpoint is an IPA construct representing a single channel anywhere
371ed7d0c0SAlex Elder  * in the system.  An IPA endpoint ID maps directly to an (EE, channel_id)
381ed7d0c0SAlex Elder  * pair.  Generally, this driver is concerned with only endpoints associated
391ed7d0c0SAlex Elder  * with the AP, however this will change when support for routing (etc.) is
401ed7d0c0SAlex Elder  * added.  IPA endpoint and GSI channel configuration data are defined
411ed7d0c0SAlex Elder  * together, establishing the endpoint_id->(EE, channel_id) mapping.
421ed7d0c0SAlex Elder  *
431ed7d0c0SAlex Elder  * Endpoint configuration data consists of three parts:  properties that
441ed7d0c0SAlex Elder  * are common to IPA and GSI (EE ID, channel ID, endpoint ID, and direction);
451ed7d0c0SAlex Elder  * properties associated with the GSI channel; and properties associated with
461ed7d0c0SAlex Elder  * the IPA endpoint.
471ed7d0c0SAlex Elder  */
481ed7d0c0SAlex Elder 
49*3219953bSAlex Elder /* The maximum possible number of source or destination resource groups */
50*3219953bSAlex Elder #define IPA_RESOURCE_GROUP_MAX	8
511ed7d0c0SAlex Elder 
5237537fa8SAlex Elder /** enum ipa_qsb_master_id - array index for IPA QSB configuration data */
5337537fa8SAlex Elder enum ipa_qsb_master_id {
5437537fa8SAlex Elder 	IPA_QSB_MASTER_DDR,
5537537fa8SAlex Elder 	IPA_QSB_MASTER_PCIE,
5637537fa8SAlex Elder };
5737537fa8SAlex Elder 
5837537fa8SAlex Elder /**
5937537fa8SAlex Elder  * struct ipa_qsb_data - Qualcomm System Bus configuration data
6037537fa8SAlex Elder  * @max_writes:	Maximum outstanding write requests for this master
6137537fa8SAlex Elder  * @max_reads:	Maximum outstanding read requests for this master
62b9aa0805SAlex Elder  * @max_reads_beats: Max outstanding read bytes in 8-byte "beats" (if non-zero)
6337537fa8SAlex Elder  */
6437537fa8SAlex Elder struct ipa_qsb_data {
6537537fa8SAlex Elder 	u8 max_writes;
6637537fa8SAlex Elder 	u8 max_reads;
67b9aa0805SAlex Elder 	u8 max_reads_beats;		/* Not present for IPA v3.5.1 */
6837537fa8SAlex Elder };
6937537fa8SAlex Elder 
701ed7d0c0SAlex Elder /**
711ed7d0c0SAlex Elder  * struct gsi_channel_data - GSI channel configuration data
721ed7d0c0SAlex Elder  * @tre_count:		number of TREs in the channel ring
731ed7d0c0SAlex Elder  * @event_count:	number of slots in the associated event ring
741ed7d0c0SAlex Elder  * @tlv_count:		number of entries in channel's TLV FIFO
751ed7d0c0SAlex Elder  *
761ed7d0c0SAlex Elder  * A GSI channel is a unidirectional means of transferring data to or
771ed7d0c0SAlex Elder  * from (and through) the IPA.  A GSI channel has a ring buffer made
78b259cc2aSAlex Elder  * up of "transfer ring elements" (TREs) that specify individual data
79b259cc2aSAlex Elder  * transfers or IPA immediate commands.  TREs are filled by the AP,
80b259cc2aSAlex Elder  * and control is passed to IPA hardware by writing the last written
81b259cc2aSAlex Elder  * element into a doorbell register.
821ed7d0c0SAlex Elder  *
831ed7d0c0SAlex Elder  * When data transfer commands have completed the GSI generates an
841ed7d0c0SAlex Elder  * event (a structure of data) and optionally signals the AP with
851ed7d0c0SAlex Elder  * an interrupt.  Event structures are implemented by another ring
861ed7d0c0SAlex Elder  * buffer, directed toward the AP from the IPA.
871ed7d0c0SAlex Elder  *
881ed7d0c0SAlex Elder  * The input to a GSI channel is a FIFO of type/length/value (TLV)
891ed7d0c0SAlex Elder  * elements, and the size of this FIFO limits the number of TREs
901ed7d0c0SAlex Elder  * that can be included in a single transaction.
911ed7d0c0SAlex Elder  */
921ed7d0c0SAlex Elder struct gsi_channel_data {
931ed7d0c0SAlex Elder 	u16 tre_count;
941ed7d0c0SAlex Elder 	u16 event_count;
951ed7d0c0SAlex Elder 	u8 tlv_count;
961ed7d0c0SAlex Elder };
971ed7d0c0SAlex Elder 
981ed7d0c0SAlex Elder /**
991ed7d0c0SAlex Elder  * struct ipa_endpoint_tx_data - configuration data for TX endpoints
1001690d8a7SAlex Elder  * @seq_type:		primary packet processing sequencer type
1011690d8a7SAlex Elder  * @seq_rep_type:	sequencer type for replication processing
1021ed7d0c0SAlex Elder  * @status_endpoint:	endpoint to which status elements are sent
1031ed7d0c0SAlex Elder  *
1041ed7d0c0SAlex Elder  * The @status_endpoint is only valid if the endpoint's @status_enable
1051ed7d0c0SAlex Elder  * flag is set.
1061ed7d0c0SAlex Elder  */
1071ed7d0c0SAlex Elder struct ipa_endpoint_tx_data {
1081690d8a7SAlex Elder 	enum ipa_seq_type seq_type;
1091690d8a7SAlex Elder 	enum ipa_seq_rep_type seq_rep_type;
1101ed7d0c0SAlex Elder 	enum ipa_endpoint_name status_endpoint;
1111ed7d0c0SAlex Elder };
1121ed7d0c0SAlex Elder 
1131ed7d0c0SAlex Elder /**
1141ed7d0c0SAlex Elder  * struct ipa_endpoint_rx_data - configuration data for RX endpoints
1151ed7d0c0SAlex Elder  * @pad_align:	power-of-2 boundary to which packet payload is aligned
1161ed7d0c0SAlex Elder  * @aggr_close_eof: whether aggregation closes on end-of-frame
1171ed7d0c0SAlex Elder  *
1181ed7d0c0SAlex Elder  * With each packet it transfers, the IPA hardware can perform certain
1191ed7d0c0SAlex Elder  * transformations of its packet data.  One of these is adding pad bytes
1201ed7d0c0SAlex Elder  * to the end of the packet data so the result ends on a power-of-2 boundary.
1211ed7d0c0SAlex Elder  *
1221ed7d0c0SAlex Elder  * It is also able to aggregate multiple packets into a single receive buffer.
1231ed7d0c0SAlex Elder  * Aggregation is "open" while a buffer is being filled, and "closes" when
1241ed7d0c0SAlex Elder  * certain criteria are met.  One of those criteria is the sender indicating
1251ed7d0c0SAlex Elder  * a "frame" consisting of several transfers has ended.
1261ed7d0c0SAlex Elder  */
1271ed7d0c0SAlex Elder struct ipa_endpoint_rx_data {
1281ed7d0c0SAlex Elder 	u32 pad_align;
1291ed7d0c0SAlex Elder 	bool aggr_close_eof;
1301ed7d0c0SAlex Elder };
1311ed7d0c0SAlex Elder 
1321ed7d0c0SAlex Elder /**
1331ed7d0c0SAlex Elder  * struct ipa_endpoint_config_data - IPA endpoint hardware configuration
1342d265342SAlex Elder  * @resource_group:	resource group to assign endpoint to
1351ed7d0c0SAlex Elder  * @checksum:		whether checksum offload is enabled
1361ed7d0c0SAlex Elder  * @qmap:		whether endpoint uses QMAP protocol
1371ed7d0c0SAlex Elder  * @aggregation:	whether endpoint supports aggregation
1381ed7d0c0SAlex Elder  * @status_enable:	whether endpoint uses status elements
1391ed7d0c0SAlex Elder  * @dma_mode:		whether endpoint operates in DMA mode
1401ed7d0c0SAlex Elder  * @dma_endpoint:	peer endpoint, if operating in DMA mode
1411ed7d0c0SAlex Elder  * @tx:			TX-specific endpoint information (see above)
1421ed7d0c0SAlex Elder  * @rx:			RX-specific endpoint information (see above)
1431ed7d0c0SAlex Elder  */
1441ed7d0c0SAlex Elder struct ipa_endpoint_config_data {
1452d265342SAlex Elder 	u32 resource_group;
1461ed7d0c0SAlex Elder 	bool checksum;
1471ed7d0c0SAlex Elder 	bool qmap;
1481ed7d0c0SAlex Elder 	bool aggregation;
1491ed7d0c0SAlex Elder 	bool status_enable;
1501ed7d0c0SAlex Elder 	bool dma_mode;
1511ed7d0c0SAlex Elder 	enum ipa_endpoint_name dma_endpoint;
1521ed7d0c0SAlex Elder 	union {
1531ed7d0c0SAlex Elder 		struct ipa_endpoint_tx_data tx;
1541ed7d0c0SAlex Elder 		struct ipa_endpoint_rx_data rx;
1551ed7d0c0SAlex Elder 	};
1561ed7d0c0SAlex Elder };
1571ed7d0c0SAlex Elder 
1581ed7d0c0SAlex Elder /**
1591ed7d0c0SAlex Elder  * struct ipa_endpoint_data - IPA endpoint configuration data
1601ed7d0c0SAlex Elder  * @filter_support:	whether endpoint supports filtering
1611ed7d0c0SAlex Elder  * @config:		hardware configuration (see above)
1621ed7d0c0SAlex Elder  *
1631ed7d0c0SAlex Elder  * Not all endpoints support the IPA filtering capability.  A filter table
1641ed7d0c0SAlex Elder  * defines the filters to apply for those endpoints that support it.  The
1651ed7d0c0SAlex Elder  * AP is responsible for initializing this table, and it must include entries
1661ed7d0c0SAlex Elder  * for non-AP endpoints.  For this reason we define *all* endpoints used
1671ed7d0c0SAlex Elder  * in the system, and indicate whether they support filtering.
1681ed7d0c0SAlex Elder  *
1691ed7d0c0SAlex Elder  * The remaining endpoint configuration data applies only to AP endpoints.
1701ed7d0c0SAlex Elder  */
1711ed7d0c0SAlex Elder struct ipa_endpoint_data {
1721ed7d0c0SAlex Elder 	bool filter_support;
1731690d8a7SAlex Elder 	/* Everything else is specified only for AP endpoints */
1741ed7d0c0SAlex Elder 	struct ipa_endpoint_config_data config;
1751ed7d0c0SAlex Elder };
1761ed7d0c0SAlex Elder 
1771ed7d0c0SAlex Elder /**
1781ed7d0c0SAlex Elder  * struct ipa_gsi_endpoint_data - GSI channel/IPA endpoint data
179fd2b7bc3SAlex Elder  * @ee_id:	GSI execution environment ID
180fd2b7bc3SAlex Elder  * @channel_id:	GSI channel ID
181fd2b7bc3SAlex Elder  * @endpoint_id: IPA endpoint ID
182fd2b7bc3SAlex Elder  * @toward_ipa:	direction of data transfer
183fd2b7bc3SAlex Elder  * @channel:	GSI channel configuration data (see above)
184fd2b7bc3SAlex Elder  * @endpoint:	IPA endpoint configuration data (see above)
1851ed7d0c0SAlex Elder  */
1861ed7d0c0SAlex Elder struct ipa_gsi_endpoint_data {
1871ed7d0c0SAlex Elder 	u8 ee_id;		/* enum gsi_ee_id */
1881ed7d0c0SAlex Elder 	u8 channel_id;
1891ed7d0c0SAlex Elder 	u8 endpoint_id;
1901ed7d0c0SAlex Elder 	bool toward_ipa;
1911ed7d0c0SAlex Elder 
1921ed7d0c0SAlex Elder 	struct gsi_channel_data channel;
1931ed7d0c0SAlex Elder 	struct ipa_endpoint_data endpoint;
1941ed7d0c0SAlex Elder };
1951ed7d0c0SAlex Elder 
1961ed7d0c0SAlex Elder /**
1971ed7d0c0SAlex Elder  * struct ipa_resource_limits - minimum and maximum resource counts
1981ed7d0c0SAlex Elder  * @min:	minimum number of resources of a given type
1991ed7d0c0SAlex Elder  * @max:	maximum number of resources of a given type
2001ed7d0c0SAlex Elder  */
2011ed7d0c0SAlex Elder struct ipa_resource_limits {
2021ed7d0c0SAlex Elder 	u32 min;
2031ed7d0c0SAlex Elder 	u32 max;
2041ed7d0c0SAlex Elder };
2051ed7d0c0SAlex Elder 
2061ed7d0c0SAlex Elder /**
2077336ce1aSAlex Elder  * struct ipa_resource - resource group source or destination resource usage
2087336ce1aSAlex Elder  * @limits:	array of resource limits, indexed by group
2091ed7d0c0SAlex Elder  */
2107336ce1aSAlex Elder struct ipa_resource {
211d9d1cddfSAlex Elder 	struct ipa_resource_limits limits[IPA_RESOURCE_GROUP_MAX];
2121ed7d0c0SAlex Elder };
2131ed7d0c0SAlex Elder 
2141ed7d0c0SAlex Elder /**
2151ed7d0c0SAlex Elder  * struct ipa_resource_data - IPA resource configuration data
2164fd704b3SAlex Elder  * @rsrc_group_src_count: number of source resource groups supported
2174fd704b3SAlex Elder  * @rsrc_group_dst_count: number of destination resource groups supported
2181ed7d0c0SAlex Elder  * @resource_src_count:	number of entries in the resource_src array
2191ed7d0c0SAlex Elder  * @resource_src:	source endpoint group resources
2201ed7d0c0SAlex Elder  * @resource_dst_count:	number of entries in the resource_dst array
2211ed7d0c0SAlex Elder  * @resource_dst:	destination endpoint group resources
2221ed7d0c0SAlex Elder  *
2231ed7d0c0SAlex Elder  * In order to manage quality of service between endpoints, certain resources
2241ed7d0c0SAlex Elder  * required for operation are allocated to groups of endpoints.  Generally
2251ed7d0c0SAlex Elder  * this information is invisible to the AP, but the AP is responsible for
2261ed7d0c0SAlex Elder  * programming it at initialization time, so we specify it here.
2271ed7d0c0SAlex Elder  */
2281ed7d0c0SAlex Elder struct ipa_resource_data {
2294fd704b3SAlex Elder 	u32 rsrc_group_src_count;
2304fd704b3SAlex Elder 	u32 rsrc_group_dst_count;
2311ed7d0c0SAlex Elder 	u32 resource_src_count;
2327336ce1aSAlex Elder 	const struct ipa_resource *resource_src;
2331ed7d0c0SAlex Elder 	u32 resource_dst_count;
2347336ce1aSAlex Elder 	const struct ipa_resource *resource_dst;
2351ed7d0c0SAlex Elder };
2361ed7d0c0SAlex Elder 
2371ed7d0c0SAlex Elder /**
238dfccb8b1SAlex Elder  * struct ipa_mem_data - description of IPA memory regions
2393128aae8SAlex Elder  * @local_count:	number of regions defined in the local[] array
2403128aae8SAlex Elder  * @local:		array of IPA-local memory region descriptors
2413e313c3fSAlex Elder  * @imem_addr:		physical address of IPA region within IMEM
2423e313c3fSAlex Elder  * @imem_size:		size in bytes of IPA IMEM region
243a0036bb4SAlex Elder  * @smem_id:		item identifier for IPA region within SMEM memory
244b259cc2aSAlex Elder  * @smem_size:		size in bytes of the IPA SMEM region
2451ed7d0c0SAlex Elder  */
2461ed7d0c0SAlex Elder struct ipa_mem_data {
2473128aae8SAlex Elder 	u32 local_count;
2483128aae8SAlex Elder 	const struct ipa_mem *local;
2493e313c3fSAlex Elder 	u32 imem_addr;
2503e313c3fSAlex Elder 	u32 imem_size;
251a0036bb4SAlex Elder 	u32 smem_id;
252a0036bb4SAlex Elder 	u32 smem_size;
2531ed7d0c0SAlex Elder };
2541ed7d0c0SAlex Elder 
255dfccb8b1SAlex Elder /**
256bf52e27bSAlex Elder  * struct ipa_interconnect_data - description of IPA interconnect bandwidths
257e938d7efSAlex Elder  * @name:		Interconnect name (matches interconnect-name in DT)
258bf52e27bSAlex Elder  * @peak_bandwidth:	Peak interconnect bandwidth (in 1000 byte/sec units)
259bf52e27bSAlex Elder  * @average_bandwidth:	Average interconnect bandwidth (in 1000 byte/sec units)
260dfccb8b1SAlex Elder  */
261dfccb8b1SAlex Elder struct ipa_interconnect_data {
262e938d7efSAlex Elder 	const char *name;
263bf52e27bSAlex Elder 	u32 peak_bandwidth;
264bf52e27bSAlex Elder 	u32 average_bandwidth;
265dfccb8b1SAlex Elder };
266dfccb8b1SAlex Elder 
267dfccb8b1SAlex Elder /**
268dfccb8b1SAlex Elder  * struct ipa_clock_data - description of IPA clock and interconnect rates
269dfccb8b1SAlex Elder  * @core_clock_rate:	Core clock rate (Hz)
270ea151e19SAlex Elder  * @interconnect_count:	Number of entries in the interconnect_data array
271ea151e19SAlex Elder  * @interconnect_data:	IPA interconnect configuration data
272dfccb8b1SAlex Elder  */
273dfccb8b1SAlex Elder struct ipa_clock_data {
274dfccb8b1SAlex Elder 	u32 core_clock_rate;
275ea151e19SAlex Elder 	u32 interconnect_count;		/* # entries in interconnect_data[] */
276ea151e19SAlex Elder 	const struct ipa_interconnect_data *interconnect_data;
277dfccb8b1SAlex Elder };
278dfccb8b1SAlex Elder 
2791ed7d0c0SAlex Elder /**
2801ed7d0c0SAlex Elder  * struct ipa_data - combined IPA/GSI configuration data
2811ed7d0c0SAlex Elder  * @version:		IPA hardware version
28237537fa8SAlex Elder  * @qsb_count:		number of entries in the qsb_data array
28337537fa8SAlex Elder  * @qsb_data:		Qualcomm System Bus configuration data
28437537fa8SAlex Elder  * @endpoint_count:	number of entries in the endpoint_data array
2851ed7d0c0SAlex Elder  * @endpoint_data:	IPA endpoint/GSI channel data
2861ed7d0c0SAlex Elder  * @resource_data:	IPA resource configuration data
287b259cc2aSAlex Elder  * @mem_data:		IPA memory region data
288b259cc2aSAlex Elder  * @clock_data:		IPA clock and interconnect data
2891ed7d0c0SAlex Elder  */
2901ed7d0c0SAlex Elder struct ipa_data {
2911ed7d0c0SAlex Elder 	enum ipa_version version;
292b259cc2aSAlex Elder 	u32 qsb_count;		/* number of entries in qsb_data[] */
29337537fa8SAlex Elder 	const struct ipa_qsb_data *qsb_data;
294b259cc2aSAlex Elder 	u32 endpoint_count;	/* number of entries in endpoint_data[] */
2951ed7d0c0SAlex Elder 	const struct ipa_gsi_endpoint_data *endpoint_data;
2961ed7d0c0SAlex Elder 	const struct ipa_resource_data *resource_data;
2973128aae8SAlex Elder 	const struct ipa_mem_data *mem_data;
298dfccb8b1SAlex Elder 	const struct ipa_clock_data *clock_data;
2991ed7d0c0SAlex Elder };
3001ed7d0c0SAlex Elder 
3011ed7d0c0SAlex Elder extern const struct ipa_data ipa_data_sdm845;
3021ed7d0c0SAlex Elder extern const struct ipa_data ipa_data_sc7180;
3031ed7d0c0SAlex Elder 
3041ed7d0c0SAlex Elder #endif /* _IPA_DATA_H_ */
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