1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2019-2020 Linaro Ltd. 5 */ 6 7 #include <linux/types.h> 8 #include <linux/bits.h> 9 #include <linux/bitfield.h> 10 #include <linux/refcount.h> 11 #include <linux/scatterlist.h> 12 #include <linux/dma-direction.h> 13 14 #include "gsi.h" 15 #include "gsi_private.h" 16 #include "gsi_trans.h" 17 #include "ipa_gsi.h" 18 #include "ipa_data.h" 19 #include "ipa_cmd.h" 20 21 /** 22 * DOC: GSI Transactions 23 * 24 * A GSI transaction abstracts the behavior of a GSI channel by representing 25 * everything about a related group of IPA commands in a single structure. 26 * (A "command" in this sense is either a data transfer or an IPA immediate 27 * command.) Most details of interaction with the GSI hardware are managed 28 * by the GSI transaction core, allowing users to simply describe commands 29 * to be performed. When a transaction has completed a callback function 30 * (dependent on the type of endpoint associated with the channel) allows 31 * cleanup of resources associated with the transaction. 32 * 33 * To perform a command (or set of them), a user of the GSI transaction 34 * interface allocates a transaction, indicating the number of TREs required 35 * (one per command). If sufficient TREs are available, they are reserved 36 * for use in the transaction and the allocation succeeds. This way 37 * exhaustion of the available TREs in a channel ring is detected 38 * as early as possible. All resources required to complete a transaction 39 * are allocated at transaction allocation time. 40 * 41 * Commands performed as part of a transaction are represented in an array 42 * of Linux scatterlist structures. This array is allocated with the 43 * transaction, and its entries are initialized using standard scatterlist 44 * functions (such as sg_set_buf() or skb_to_sgvec()). 45 * 46 * Once a transaction's scatterlist structures have been initialized, the 47 * transaction is committed. The caller is responsible for mapping buffers 48 * for DMA if necessary, and this should be done *before* allocating 49 * the transaction. Between a successful allocation and commit of a 50 * transaction no errors should occur. 51 * 52 * Committing transfers ownership of the entire transaction to the GSI 53 * transaction core. The GSI transaction code formats the content of 54 * the scatterlist array into the channel ring buffer and informs the 55 * hardware that new TREs are available to process. 56 * 57 * The last TRE in each transaction is marked to interrupt the AP when the 58 * GSI hardware has completed it. Because transfers described by TREs are 59 * performed strictly in order, signaling the completion of just the last 60 * TRE in the transaction is sufficient to indicate the full transaction 61 * is complete. 62 * 63 * When a transaction is complete, ipa_gsi_trans_complete() is called by the 64 * GSI code into the IPA layer, allowing it to perform any final cleanup 65 * required before the transaction is freed. 66 */ 67 68 /* Hardware values representing a transfer element type */ 69 enum gsi_tre_type { 70 GSI_RE_XFER = 0x2, 71 GSI_RE_IMMD_CMD = 0x3, 72 }; 73 74 /* An entry in a channel ring */ 75 struct gsi_tre { 76 __le64 addr; /* DMA address */ 77 __le16 len_opcode; /* length in bytes or enum IPA_CMD_* */ 78 __le16 reserved; 79 __le32 flags; /* TRE_FLAGS_* */ 80 }; 81 82 /* gsi_tre->flags mask values (in CPU byte order) */ 83 #define TRE_FLAGS_CHAIN_FMASK GENMASK(0, 0) 84 #define TRE_FLAGS_IEOT_FMASK GENMASK(9, 9) 85 #define TRE_FLAGS_BEI_FMASK GENMASK(10, 10) 86 #define TRE_FLAGS_TYPE_FMASK GENMASK(23, 16) 87 88 int gsi_trans_pool_init(struct gsi_trans_pool *pool, size_t size, u32 count, 89 u32 max_alloc) 90 { 91 void *virt; 92 93 if (!size) 94 return -EINVAL; 95 if (count < max_alloc) 96 return -EINVAL; 97 if (!max_alloc) 98 return -EINVAL; 99 100 /* By allocating a few extra entries in our pool (one less 101 * than the maximum number that will be requested in a 102 * single allocation), we can always satisfy requests without 103 * ever worrying about straddling the end of the pool array. 104 * If there aren't enough entries starting at the free index, 105 * we just allocate free entries from the beginning of the pool. 106 */ 107 virt = kcalloc(count + max_alloc - 1, size, GFP_KERNEL); 108 if (!virt) 109 return -ENOMEM; 110 111 pool->base = virt; 112 /* If the allocator gave us any extra memory, use it */ 113 pool->count = ksize(pool->base) / size; 114 pool->free = 0; 115 pool->max_alloc = max_alloc; 116 pool->size = size; 117 pool->addr = 0; /* Only used for DMA pools */ 118 119 return 0; 120 } 121 122 void gsi_trans_pool_exit(struct gsi_trans_pool *pool) 123 { 124 kfree(pool->base); 125 memset(pool, 0, sizeof(*pool)); 126 } 127 128 /* Allocate the requested number of (zeroed) entries from the pool */ 129 /* Home-grown DMA pool. This way we can preallocate and use the tre_count 130 * to guarantee allocations will succeed. Even though we specify max_alloc 131 * (and it can be more than one), we only allow allocation of a single 132 * element from a DMA pool. 133 */ 134 int gsi_trans_pool_init_dma(struct device *dev, struct gsi_trans_pool *pool, 135 size_t size, u32 count, u32 max_alloc) 136 { 137 size_t total_size; 138 dma_addr_t addr; 139 void *virt; 140 141 if (!size) 142 return -EINVAL; 143 if (count < max_alloc) 144 return -EINVAL; 145 if (!max_alloc) 146 return -EINVAL; 147 148 /* Don't let allocations cross a power-of-two boundary */ 149 size = __roundup_pow_of_two(size); 150 total_size = (count + max_alloc - 1) * size; 151 152 /* The allocator will give us a power-of-2 number of pages 153 * sufficient to satisfy our request. Round up our requested 154 * size to avoid any unused space in the allocation. This way 155 * gsi_trans_pool_exit_dma() can assume the total allocated 156 * size is exactly (count * size). 157 */ 158 total_size = get_order(total_size) << PAGE_SHIFT; 159 160 virt = dma_alloc_coherent(dev, total_size, &addr, GFP_KERNEL); 161 if (!virt) 162 return -ENOMEM; 163 164 pool->base = virt; 165 pool->count = total_size / size; 166 pool->free = 0; 167 pool->size = size; 168 pool->max_alloc = max_alloc; 169 pool->addr = addr; 170 171 return 0; 172 } 173 174 void gsi_trans_pool_exit_dma(struct device *dev, struct gsi_trans_pool *pool) 175 { 176 size_t total_size = pool->count * pool->size; 177 178 dma_free_coherent(dev, total_size, pool->base, pool->addr); 179 memset(pool, 0, sizeof(*pool)); 180 } 181 182 /* Return the byte offset of the next free entry in the pool */ 183 static u32 gsi_trans_pool_alloc_common(struct gsi_trans_pool *pool, u32 count) 184 { 185 u32 offset; 186 187 WARN_ON(!count); 188 WARN_ON(count > pool->max_alloc); 189 190 /* Allocate from beginning if wrap would occur */ 191 if (count > pool->count - pool->free) 192 pool->free = 0; 193 194 offset = pool->free * pool->size; 195 pool->free += count; 196 memset(pool->base + offset, 0, count * pool->size); 197 198 return offset; 199 } 200 201 /* Allocate a contiguous block of zeroed entries from a pool */ 202 void *gsi_trans_pool_alloc(struct gsi_trans_pool *pool, u32 count) 203 { 204 return pool->base + gsi_trans_pool_alloc_common(pool, count); 205 } 206 207 /* Allocate a single zeroed entry from a DMA pool */ 208 void *gsi_trans_pool_alloc_dma(struct gsi_trans_pool *pool, dma_addr_t *addr) 209 { 210 u32 offset = gsi_trans_pool_alloc_common(pool, 1); 211 212 *addr = pool->addr + offset; 213 214 return pool->base + offset; 215 } 216 217 /* Map a TRE ring entry index to the transaction it is associated with */ 218 static void gsi_trans_map(struct gsi_trans *trans, u32 index) 219 { 220 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id]; 221 222 /* The completion event will indicate the last TRE used */ 223 index += trans->used_count - 1; 224 225 /* Note: index *must* be used modulo the ring count here */ 226 channel->trans_info.map[index % channel->tre_ring.count] = trans; 227 } 228 229 /* Return the transaction mapped to a given ring entry */ 230 struct gsi_trans * 231 gsi_channel_trans_mapped(struct gsi_channel *channel, u32 index) 232 { 233 /* Note: index *must* be used modulo the ring count here */ 234 return channel->trans_info.map[index % channel->tre_ring.count]; 235 } 236 237 /* Return the oldest completed transaction for a channel (or null) */ 238 struct gsi_trans *gsi_channel_trans_complete(struct gsi_channel *channel) 239 { 240 return list_first_entry_or_null(&channel->trans_info.complete, 241 struct gsi_trans, links); 242 } 243 244 /* Move a transaction from the allocated list to the pending list */ 245 static void gsi_trans_move_pending(struct gsi_trans *trans) 246 { 247 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id]; 248 struct gsi_trans_info *trans_info = &channel->trans_info; 249 250 spin_lock_bh(&trans_info->spinlock); 251 252 list_move_tail(&trans->links, &trans_info->pending); 253 254 spin_unlock_bh(&trans_info->spinlock); 255 } 256 257 /* Move a transaction and all of its predecessors from the pending list 258 * to the completed list. 259 */ 260 void gsi_trans_move_complete(struct gsi_trans *trans) 261 { 262 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id]; 263 struct gsi_trans_info *trans_info = &channel->trans_info; 264 struct list_head list; 265 266 spin_lock_bh(&trans_info->spinlock); 267 268 /* Move this transaction and all predecessors to completed list */ 269 list_cut_position(&list, &trans_info->pending, &trans->links); 270 list_splice_tail(&list, &trans_info->complete); 271 272 spin_unlock_bh(&trans_info->spinlock); 273 } 274 275 /* Move a transaction from the completed list to the polled list */ 276 void gsi_trans_move_polled(struct gsi_trans *trans) 277 { 278 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id]; 279 struct gsi_trans_info *trans_info = &channel->trans_info; 280 281 spin_lock_bh(&trans_info->spinlock); 282 283 list_move_tail(&trans->links, &trans_info->polled); 284 285 spin_unlock_bh(&trans_info->spinlock); 286 } 287 288 /* Reserve some number of TREs on a channel. Returns true if successful */ 289 static bool 290 gsi_trans_tre_reserve(struct gsi_trans_info *trans_info, u32 tre_count) 291 { 292 int avail = atomic_read(&trans_info->tre_avail); 293 int new; 294 295 do { 296 new = avail - (int)tre_count; 297 if (unlikely(new < 0)) 298 return false; 299 } while (!atomic_try_cmpxchg(&trans_info->tre_avail, &avail, new)); 300 301 return true; 302 } 303 304 /* Release previously-reserved TRE entries to a channel */ 305 static void 306 gsi_trans_tre_release(struct gsi_trans_info *trans_info, u32 tre_count) 307 { 308 atomic_add(tre_count, &trans_info->tre_avail); 309 } 310 311 /* Return true if no transactions are allocated, false otherwise */ 312 bool gsi_channel_trans_idle(struct gsi *gsi, u32 channel_id) 313 { 314 u32 tre_max = gsi_channel_tre_max(gsi, channel_id); 315 struct gsi_trans_info *trans_info; 316 317 trans_info = &gsi->channel[channel_id].trans_info; 318 319 return atomic_read(&trans_info->tre_avail) == tre_max; 320 } 321 322 /* Allocate a GSI transaction on a channel */ 323 struct gsi_trans *gsi_channel_trans_alloc(struct gsi *gsi, u32 channel_id, 324 u32 tre_count, 325 enum dma_data_direction direction) 326 { 327 struct gsi_channel *channel = &gsi->channel[channel_id]; 328 struct gsi_trans_info *trans_info; 329 struct gsi_trans *trans; 330 331 if (WARN_ON(tre_count > channel->trans_tre_max)) 332 return NULL; 333 334 trans_info = &channel->trans_info; 335 336 /* We reserve the TREs now, but consume them at commit time. 337 * If there aren't enough available, we're done. 338 */ 339 if (!gsi_trans_tre_reserve(trans_info, tre_count)) 340 return NULL; 341 342 /* Allocate and initialize non-zero fields in the transaction */ 343 trans = gsi_trans_pool_alloc(&trans_info->pool, 1); 344 trans->gsi = gsi; 345 trans->channel_id = channel_id; 346 trans->rsvd_count = tre_count; 347 init_completion(&trans->completion); 348 349 /* Allocate the scatterlist and (if requested) info entries. */ 350 trans->sgl = gsi_trans_pool_alloc(&trans_info->sg_pool, tre_count); 351 sg_init_marker(trans->sgl, tre_count); 352 353 trans->direction = direction; 354 355 spin_lock_bh(&trans_info->spinlock); 356 357 list_add_tail(&trans->links, &trans_info->alloc); 358 359 spin_unlock_bh(&trans_info->spinlock); 360 361 refcount_set(&trans->refcount, 1); 362 363 return trans; 364 } 365 366 /* Free a previously-allocated transaction */ 367 void gsi_trans_free(struct gsi_trans *trans) 368 { 369 refcount_t *refcount = &trans->refcount; 370 struct gsi_trans_info *trans_info; 371 bool last; 372 373 /* We must hold the lock to release the last reference */ 374 if (refcount_dec_not_one(refcount)) 375 return; 376 377 trans_info = &trans->gsi->channel[trans->channel_id].trans_info; 378 379 spin_lock_bh(&trans_info->spinlock); 380 381 /* Reference might have been added before we got the lock */ 382 last = refcount_dec_and_test(refcount); 383 if (last) 384 list_del(&trans->links); 385 386 spin_unlock_bh(&trans_info->spinlock); 387 388 if (!last) 389 return; 390 391 ipa_gsi_trans_release(trans); 392 393 /* Releasing the reserved TREs implicitly frees the sgl[] and 394 * (if present) info[] arrays, plus the transaction itself. 395 */ 396 gsi_trans_tre_release(trans_info, trans->rsvd_count); 397 } 398 399 /* Add an immediate command to a transaction */ 400 void gsi_trans_cmd_add(struct gsi_trans *trans, void *buf, u32 size, 401 dma_addr_t addr, enum ipa_cmd_opcode opcode) 402 { 403 u32 which = trans->used_count++; 404 struct scatterlist *sg; 405 406 WARN_ON(which >= trans->rsvd_count); 407 408 /* Commands are quite different from data transfer requests. 409 * Their payloads come from a pool whose memory is allocated 410 * using dma_alloc_coherent(). We therefore do *not* map them 411 * for DMA (unlike what we do for pages and skbs). 412 * 413 * When a transaction completes, the SGL is normally unmapped. 414 * A command transaction has direction DMA_NONE, which tells 415 * gsi_trans_complete() to skip the unmapping step. 416 * 417 * The only things we use directly in a command scatter/gather 418 * entry are the DMA address and length. We still need the SG 419 * table flags to be maintained though, so assign a NULL page 420 * pointer for that purpose. 421 */ 422 sg = &trans->sgl[which]; 423 sg_assign_page(sg, NULL); 424 sg_dma_address(sg) = addr; 425 sg_dma_len(sg) = size; 426 427 trans->cmd_opcode[which] = opcode; 428 } 429 430 /* Add a page transfer to a transaction. It will fill the only TRE. */ 431 int gsi_trans_page_add(struct gsi_trans *trans, struct page *page, u32 size, 432 u32 offset) 433 { 434 struct scatterlist *sg = &trans->sgl[0]; 435 int ret; 436 437 if (WARN_ON(trans->rsvd_count != 1)) 438 return -EINVAL; 439 if (WARN_ON(trans->used_count)) 440 return -EINVAL; 441 442 sg_set_page(sg, page, size, offset); 443 ret = dma_map_sg(trans->gsi->dev, sg, 1, trans->direction); 444 if (!ret) 445 return -ENOMEM; 446 447 trans->used_count++; /* Transaction now owns the (DMA mapped) page */ 448 449 return 0; 450 } 451 452 /* Add an SKB transfer to a transaction. No other TREs will be used. */ 453 int gsi_trans_skb_add(struct gsi_trans *trans, struct sk_buff *skb) 454 { 455 struct scatterlist *sg = &trans->sgl[0]; 456 u32 used_count; 457 int ret; 458 459 if (WARN_ON(trans->rsvd_count != 1)) 460 return -EINVAL; 461 if (WARN_ON(trans->used_count)) 462 return -EINVAL; 463 464 /* skb->len will not be 0 (checked early) */ 465 ret = skb_to_sgvec(skb, sg, 0, skb->len); 466 if (ret < 0) 467 return ret; 468 used_count = ret; 469 470 ret = dma_map_sg(trans->gsi->dev, sg, used_count, trans->direction); 471 if (!ret) 472 return -ENOMEM; 473 474 /* Transaction now owns the (DMA mapped) skb */ 475 trans->used_count += used_count; 476 477 return 0; 478 } 479 480 /* Compute the length/opcode value to use for a TRE */ 481 static __le16 gsi_tre_len_opcode(enum ipa_cmd_opcode opcode, u32 len) 482 { 483 return opcode == IPA_CMD_NONE ? cpu_to_le16((u16)len) 484 : cpu_to_le16((u16)opcode); 485 } 486 487 /* Compute the flags value to use for a given TRE */ 488 static __le32 gsi_tre_flags(bool last_tre, bool bei, enum ipa_cmd_opcode opcode) 489 { 490 enum gsi_tre_type tre_type; 491 u32 tre_flags; 492 493 tre_type = opcode == IPA_CMD_NONE ? GSI_RE_XFER : GSI_RE_IMMD_CMD; 494 tre_flags = u32_encode_bits(tre_type, TRE_FLAGS_TYPE_FMASK); 495 496 /* Last TRE contains interrupt flags */ 497 if (last_tre) { 498 /* All transactions end in a transfer completion interrupt */ 499 tre_flags |= TRE_FLAGS_IEOT_FMASK; 500 /* Don't interrupt when outbound commands are acknowledged */ 501 if (bei) 502 tre_flags |= TRE_FLAGS_BEI_FMASK; 503 } else { /* All others indicate there's more to come */ 504 tre_flags |= TRE_FLAGS_CHAIN_FMASK; 505 } 506 507 return cpu_to_le32(tre_flags); 508 } 509 510 static void gsi_trans_tre_fill(struct gsi_tre *dest_tre, dma_addr_t addr, 511 u32 len, bool last_tre, bool bei, 512 enum ipa_cmd_opcode opcode) 513 { 514 struct gsi_tre tre; 515 516 tre.addr = cpu_to_le64(addr); 517 tre.len_opcode = gsi_tre_len_opcode(opcode, len); 518 tre.reserved = 0; 519 tre.flags = gsi_tre_flags(last_tre, bei, opcode); 520 521 /* ARM64 can write 16 bytes as a unit with a single instruction. 522 * Doing the assignment this way is an attempt to make that happen. 523 */ 524 *dest_tre = tre; 525 } 526 527 /** 528 * __gsi_trans_commit() - Common GSI transaction commit code 529 * @trans: Transaction to commit 530 * @ring_db: Whether to tell the hardware about these queued transfers 531 * 532 * Formats channel ring TRE entries based on the content of the scatterlist. 533 * Maps a transaction pointer to the last ring entry used for the transaction, 534 * so it can be recovered when it completes. Moves the transaction to the 535 * pending list. Finally, updates the channel ring pointer and optionally 536 * rings the doorbell. 537 */ 538 static void __gsi_trans_commit(struct gsi_trans *trans, bool ring_db) 539 { 540 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id]; 541 struct gsi_ring *tre_ring = &channel->tre_ring; 542 enum ipa_cmd_opcode opcode = IPA_CMD_NONE; 543 bool bei = channel->toward_ipa; 544 struct gsi_tre *dest_tre; 545 struct scatterlist *sg; 546 u32 byte_count = 0; 547 u8 *cmd_opcode; 548 u32 avail; 549 u32 i; 550 551 WARN_ON(!trans->used_count); 552 553 /* Consume the entries. If we cross the end of the ring while 554 * filling them we'll switch to the beginning to finish. 555 * If there is no info array we're doing a simple data 556 * transfer request, whose opcode is IPA_CMD_NONE. 557 */ 558 cmd_opcode = channel->command ? &trans->cmd_opcode[0] : NULL; 559 avail = tre_ring->count - tre_ring->index % tre_ring->count; 560 dest_tre = gsi_ring_virt(tre_ring, tre_ring->index); 561 for_each_sg(trans->sgl, sg, trans->used_count, i) { 562 bool last_tre = i == trans->used_count - 1; 563 dma_addr_t addr = sg_dma_address(sg); 564 u32 len = sg_dma_len(sg); 565 566 byte_count += len; 567 if (!avail--) 568 dest_tre = gsi_ring_virt(tre_ring, 0); 569 if (cmd_opcode) 570 opcode = *cmd_opcode++; 571 572 gsi_trans_tre_fill(dest_tre, addr, len, last_tre, bei, opcode); 573 dest_tre++; 574 } 575 /* Associate the TRE with the transaction */ 576 gsi_trans_map(trans, tre_ring->index); 577 578 tre_ring->index += trans->used_count; 579 580 trans->len = byte_count; 581 if (channel->toward_ipa) 582 gsi_trans_tx_committed(trans); 583 584 gsi_trans_move_pending(trans); 585 586 /* Ring doorbell if requested, or if all TREs are allocated */ 587 if (ring_db || !atomic_read(&channel->trans_info.tre_avail)) { 588 /* Report what we're handing off to hardware for TX channels */ 589 if (channel->toward_ipa) 590 gsi_trans_tx_queued(trans); 591 gsi_channel_doorbell(channel); 592 } 593 } 594 595 /* Commit a GSI transaction */ 596 void gsi_trans_commit(struct gsi_trans *trans, bool ring_db) 597 { 598 if (trans->used_count) 599 __gsi_trans_commit(trans, ring_db); 600 else 601 gsi_trans_free(trans); 602 } 603 604 /* Commit a GSI transaction and wait for it to complete */ 605 void gsi_trans_commit_wait(struct gsi_trans *trans) 606 { 607 if (!trans->used_count) 608 goto out_trans_free; 609 610 refcount_inc(&trans->refcount); 611 612 __gsi_trans_commit(trans, true); 613 614 wait_for_completion(&trans->completion); 615 616 out_trans_free: 617 gsi_trans_free(trans); 618 } 619 620 /* Process the completion of a transaction; called while polling */ 621 void gsi_trans_complete(struct gsi_trans *trans) 622 { 623 /* If the entire SGL was mapped when added, unmap it now */ 624 if (trans->direction != DMA_NONE) 625 dma_unmap_sg(trans->gsi->dev, trans->sgl, trans->used_count, 626 trans->direction); 627 628 ipa_gsi_trans_complete(trans); 629 630 complete(&trans->completion); 631 632 gsi_trans_free(trans); 633 } 634 635 /* Cancel a channel's pending transactions */ 636 void gsi_channel_trans_cancel_pending(struct gsi_channel *channel) 637 { 638 struct gsi_trans_info *trans_info = &channel->trans_info; 639 struct gsi_trans *trans; 640 bool cancelled; 641 642 /* channel->gsi->mutex is held by caller */ 643 spin_lock_bh(&trans_info->spinlock); 644 645 cancelled = !list_empty(&trans_info->pending); 646 list_for_each_entry(trans, &trans_info->pending, links) 647 trans->cancelled = true; 648 649 list_splice_tail_init(&trans_info->pending, &trans_info->complete); 650 651 spin_unlock_bh(&trans_info->spinlock); 652 653 /* Schedule NAPI polling to complete the cancelled transactions */ 654 if (cancelled) 655 napi_schedule(&channel->napi); 656 } 657 658 /* Issue a command to read a single byte from a channel */ 659 int gsi_trans_read_byte(struct gsi *gsi, u32 channel_id, dma_addr_t addr) 660 { 661 struct gsi_channel *channel = &gsi->channel[channel_id]; 662 struct gsi_ring *tre_ring = &channel->tre_ring; 663 struct gsi_trans_info *trans_info; 664 struct gsi_tre *dest_tre; 665 666 trans_info = &channel->trans_info; 667 668 /* First reserve the TRE, if possible */ 669 if (!gsi_trans_tre_reserve(trans_info, 1)) 670 return -EBUSY; 671 672 /* Now fill the reserved TRE and tell the hardware */ 673 674 dest_tre = gsi_ring_virt(tre_ring, tre_ring->index); 675 gsi_trans_tre_fill(dest_tre, addr, 1, true, false, IPA_CMD_NONE); 676 677 tre_ring->index++; 678 gsi_channel_doorbell(channel); 679 680 return 0; 681 } 682 683 /* Mark a gsi_trans_read_byte() request done */ 684 void gsi_trans_read_byte_done(struct gsi *gsi, u32 channel_id) 685 { 686 struct gsi_channel *channel = &gsi->channel[channel_id]; 687 688 gsi_trans_tre_release(&channel->trans_info, 1); 689 } 690 691 /* Initialize a channel's GSI transaction info */ 692 int gsi_channel_trans_init(struct gsi *gsi, u32 channel_id) 693 { 694 struct gsi_channel *channel = &gsi->channel[channel_id]; 695 struct gsi_trans_info *trans_info; 696 u32 tre_max; 697 int ret; 698 699 /* Ensure the size of a channel element is what's expected */ 700 BUILD_BUG_ON(sizeof(struct gsi_tre) != GSI_RING_ELEMENT_SIZE); 701 702 /* The map array is used to determine what transaction is associated 703 * with a TRE that the hardware reports has completed. We need one 704 * map entry per TRE. 705 */ 706 trans_info = &channel->trans_info; 707 trans_info->map = kcalloc(channel->tre_count, sizeof(*trans_info->map), 708 GFP_KERNEL); 709 if (!trans_info->map) 710 return -ENOMEM; 711 712 /* We can't use more TREs than there are available in the ring. 713 * This limits the number of transactions that can be oustanding. 714 * Worst case is one TRE per transaction (but we actually limit 715 * it to something a little less than that). We allocate resources 716 * for transactions (including transaction structures) based on 717 * this maximum number. 718 */ 719 tre_max = gsi_channel_tre_max(channel->gsi, channel_id); 720 721 /* Transactions are allocated one at a time. */ 722 ret = gsi_trans_pool_init(&trans_info->pool, sizeof(struct gsi_trans), 723 tre_max, 1); 724 if (ret) 725 goto err_kfree; 726 727 /* A transaction uses a scatterlist array to represent the data 728 * transfers implemented by the transaction. Each scatterlist 729 * element is used to fill a single TRE when the transaction is 730 * committed. So we need as many scatterlist elements as the 731 * maximum number of TREs that can be outstanding. 732 */ 733 ret = gsi_trans_pool_init(&trans_info->sg_pool, 734 sizeof(struct scatterlist), 735 tre_max, channel->trans_tre_max); 736 if (ret) 737 goto err_trans_pool_exit; 738 739 /* Finally, the tre_avail field is what ultimately limits the number 740 * of outstanding transactions and their resources. A transaction 741 * allocation succeeds only if the TREs available are sufficient for 742 * what the transaction might need. Transaction resource pools are 743 * sized based on the maximum number of outstanding TREs, so there 744 * will always be resources available if there are TREs available. 745 */ 746 atomic_set(&trans_info->tre_avail, tre_max); 747 748 spin_lock_init(&trans_info->spinlock); 749 INIT_LIST_HEAD(&trans_info->alloc); 750 INIT_LIST_HEAD(&trans_info->pending); 751 INIT_LIST_HEAD(&trans_info->complete); 752 INIT_LIST_HEAD(&trans_info->polled); 753 754 return 0; 755 756 err_trans_pool_exit: 757 gsi_trans_pool_exit(&trans_info->pool); 758 err_kfree: 759 kfree(trans_info->map); 760 761 dev_err(gsi->dev, "error %d initializing channel %u transactions\n", 762 ret, channel_id); 763 764 return ret; 765 } 766 767 /* Inverse of gsi_channel_trans_init() */ 768 void gsi_channel_trans_exit(struct gsi_channel *channel) 769 { 770 struct gsi_trans_info *trans_info = &channel->trans_info; 771 772 gsi_trans_pool_exit(&trans_info->sg_pool); 773 gsi_trans_pool_exit(&trans_info->pool); 774 kfree(trans_info->map); 775 } 776