19dd441e4SAlex Elder // SPDX-License-Identifier: GPL-2.0 29dd441e4SAlex Elder 39dd441e4SAlex Elder /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. 49dd441e4SAlex Elder * Copyright (C) 2019-2020 Linaro Ltd. 59dd441e4SAlex Elder */ 69dd441e4SAlex Elder 79dd441e4SAlex Elder #include <linux/types.h> 89dd441e4SAlex Elder #include <linux/bits.h> 99dd441e4SAlex Elder #include <linux/bitfield.h> 109dd441e4SAlex Elder #include <linux/refcount.h> 119dd441e4SAlex Elder #include <linux/scatterlist.h> 129dd441e4SAlex Elder #include <linux/dma-direction.h> 139dd441e4SAlex Elder 149dd441e4SAlex Elder #include "gsi.h" 159dd441e4SAlex Elder #include "gsi_private.h" 169dd441e4SAlex Elder #include "gsi_trans.h" 179dd441e4SAlex Elder #include "ipa_gsi.h" 189dd441e4SAlex Elder #include "ipa_data.h" 199dd441e4SAlex Elder #include "ipa_cmd.h" 209dd441e4SAlex Elder 219dd441e4SAlex Elder /** 229dd441e4SAlex Elder * DOC: GSI Transactions 239dd441e4SAlex Elder * 249dd441e4SAlex Elder * A GSI transaction abstracts the behavior of a GSI channel by representing 25*ace5dc61SAlex Elder * everything about a related group of IPA operations in a single structure. 26*ace5dc61SAlex Elder * (A "operation" in this sense is either a data transfer or an IPA immediate 279dd441e4SAlex Elder * command.) Most details of interaction with the GSI hardware are managed 28*ace5dc61SAlex Elder * by the GSI transaction core, allowing users to simply describe operations 299dd441e4SAlex Elder * to be performed. When a transaction has completed a callback function 309dd441e4SAlex Elder * (dependent on the type of endpoint associated with the channel) allows 319dd441e4SAlex Elder * cleanup of resources associated with the transaction. 329dd441e4SAlex Elder * 33*ace5dc61SAlex Elder * To perform an operation (or set of them), a user of the GSI transaction 349dd441e4SAlex Elder * interface allocates a transaction, indicating the number of TREs required 35*ace5dc61SAlex Elder * (one per operation). If sufficient TREs are available, they are reserved 369dd441e4SAlex Elder * for use in the transaction and the allocation succeeds. This way 37*ace5dc61SAlex Elder * exhaustion of the available TREs in a channel ring is detected as early 38*ace5dc61SAlex Elder * as possible. Any other resources that might be needed to complete a 39*ace5dc61SAlex Elder * transaction are also allocated when the transaction is allocated. 409dd441e4SAlex Elder * 41*ace5dc61SAlex Elder * Operations performed as part of a transaction are represented in an array 42*ace5dc61SAlex Elder * of Linux scatterlist structures, allocated with the transaction. These 43*ace5dc61SAlex Elder * scatterlist structures are initialized by "adding" operations to the 44*ace5dc61SAlex Elder * transaction. If a buffer in an operation must be mapped for DMA, this is 45*ace5dc61SAlex Elder * done at the time it is added to the transaction. It is possible for a 46*ace5dc61SAlex Elder * mapping error to occur when an operation is added. In this case the 47*ace5dc61SAlex Elder * transaction should simply be freed; this correctly releases resources 48*ace5dc61SAlex Elder * associated with the transaction. 499dd441e4SAlex Elder * 50*ace5dc61SAlex Elder * Once all operations have been successfully added to a transaction, the 51*ace5dc61SAlex Elder * transaction is committed. Committing transfers ownership of the entire 52*ace5dc61SAlex Elder * transaction to the GSI transaction core. The GSI transaction code 53*ace5dc61SAlex Elder * formats the content of the scatterlist array into the channel ring 54*ace5dc61SAlex Elder * buffer and informs the hardware that new TREs are available to process. 559dd441e4SAlex Elder * 569dd441e4SAlex Elder * The last TRE in each transaction is marked to interrupt the AP when the 579dd441e4SAlex Elder * GSI hardware has completed it. Because transfers described by TREs are 589dd441e4SAlex Elder * performed strictly in order, signaling the completion of just the last 599dd441e4SAlex Elder * TRE in the transaction is sufficient to indicate the full transaction 609dd441e4SAlex Elder * is complete. 619dd441e4SAlex Elder * 629dd441e4SAlex Elder * When a transaction is complete, ipa_gsi_trans_complete() is called by the 639dd441e4SAlex Elder * GSI code into the IPA layer, allowing it to perform any final cleanup 649dd441e4SAlex Elder * required before the transaction is freed. 659dd441e4SAlex Elder */ 669dd441e4SAlex Elder 679dd441e4SAlex Elder /* Hardware values representing a transfer element type */ 689dd441e4SAlex Elder enum gsi_tre_type { 699dd441e4SAlex Elder GSI_RE_XFER = 0x2, 709dd441e4SAlex Elder GSI_RE_IMMD_CMD = 0x3, 719dd441e4SAlex Elder }; 729dd441e4SAlex Elder 739dd441e4SAlex Elder /* An entry in a channel ring */ 749dd441e4SAlex Elder struct gsi_tre { 759dd441e4SAlex Elder __le64 addr; /* DMA address */ 769dd441e4SAlex Elder __le16 len_opcode; /* length in bytes or enum IPA_CMD_* */ 779dd441e4SAlex Elder __le16 reserved; 789dd441e4SAlex Elder __le32 flags; /* TRE_FLAGS_* */ 799dd441e4SAlex Elder }; 809dd441e4SAlex Elder 819dd441e4SAlex Elder /* gsi_tre->flags mask values (in CPU byte order) */ 829dd441e4SAlex Elder #define TRE_FLAGS_CHAIN_FMASK GENMASK(0, 0) 839dd441e4SAlex Elder #define TRE_FLAGS_IEOT_FMASK GENMASK(9, 9) 849dd441e4SAlex Elder #define TRE_FLAGS_BEI_FMASK GENMASK(10, 10) 859dd441e4SAlex Elder #define TRE_FLAGS_TYPE_FMASK GENMASK(23, 16) 869dd441e4SAlex Elder 879dd441e4SAlex Elder int gsi_trans_pool_init(struct gsi_trans_pool *pool, size_t size, u32 count, 889dd441e4SAlex Elder u32 max_alloc) 899dd441e4SAlex Elder { 909dd441e4SAlex Elder void *virt; 919dd441e4SAlex Elder 927ad3bd52SAlex Elder if (!size) 939dd441e4SAlex Elder return -EINVAL; 949dd441e4SAlex Elder if (count < max_alloc) 959dd441e4SAlex Elder return -EINVAL; 969dd441e4SAlex Elder if (!max_alloc) 979dd441e4SAlex Elder return -EINVAL; 989dd441e4SAlex Elder 999dd441e4SAlex Elder /* By allocating a few extra entries in our pool (one less 1009dd441e4SAlex Elder * than the maximum number that will be requested in a 1019dd441e4SAlex Elder * single allocation), we can always satisfy requests without 1029dd441e4SAlex Elder * ever worrying about straddling the end of the pool array. 1039dd441e4SAlex Elder * If there aren't enough entries starting at the free index, 1049dd441e4SAlex Elder * we just allocate free entries from the beginning of the pool. 1059dd441e4SAlex Elder */ 1069dd441e4SAlex Elder virt = kcalloc(count + max_alloc - 1, size, GFP_KERNEL); 1079dd441e4SAlex Elder if (!virt) 1089dd441e4SAlex Elder return -ENOMEM; 1099dd441e4SAlex Elder 1109dd441e4SAlex Elder pool->base = virt; 1119dd441e4SAlex Elder /* If the allocator gave us any extra memory, use it */ 1129dd441e4SAlex Elder pool->count = ksize(pool->base) / size; 1139dd441e4SAlex Elder pool->free = 0; 1149dd441e4SAlex Elder pool->max_alloc = max_alloc; 1159dd441e4SAlex Elder pool->size = size; 1169dd441e4SAlex Elder pool->addr = 0; /* Only used for DMA pools */ 1179dd441e4SAlex Elder 1189dd441e4SAlex Elder return 0; 1199dd441e4SAlex Elder } 1209dd441e4SAlex Elder 1219dd441e4SAlex Elder void gsi_trans_pool_exit(struct gsi_trans_pool *pool) 1229dd441e4SAlex Elder { 1239dd441e4SAlex Elder kfree(pool->base); 1249dd441e4SAlex Elder memset(pool, 0, sizeof(*pool)); 1259dd441e4SAlex Elder } 1269dd441e4SAlex Elder 127*ace5dc61SAlex Elder /* Home-grown DMA pool. This way we can preallocate the pool, and guarantee 128*ace5dc61SAlex Elder * allocations will succeed. The immediate commands in a transaction can 129*ace5dc61SAlex Elder * require up to max_alloc elements from the pool. But we only allow 130*ace5dc61SAlex Elder * allocation of a single element from a DMA pool at a time. 1319dd441e4SAlex Elder */ 1329dd441e4SAlex Elder int gsi_trans_pool_init_dma(struct device *dev, struct gsi_trans_pool *pool, 1339dd441e4SAlex Elder size_t size, u32 count, u32 max_alloc) 1349dd441e4SAlex Elder { 1359dd441e4SAlex Elder size_t total_size; 1369dd441e4SAlex Elder dma_addr_t addr; 1379dd441e4SAlex Elder void *virt; 1389dd441e4SAlex Elder 1397ad3bd52SAlex Elder if (!size) 1409dd441e4SAlex Elder return -EINVAL; 1419dd441e4SAlex Elder if (count < max_alloc) 1429dd441e4SAlex Elder return -EINVAL; 1439dd441e4SAlex Elder if (!max_alloc) 1449dd441e4SAlex Elder return -EINVAL; 1459dd441e4SAlex Elder 1469dd441e4SAlex Elder /* Don't let allocations cross a power-of-two boundary */ 1479dd441e4SAlex Elder size = __roundup_pow_of_two(size); 1489dd441e4SAlex Elder total_size = (count + max_alloc - 1) * size; 1499dd441e4SAlex Elder 15019aaf72cSAlex Elder /* The allocator will give us a power-of-2 number of pages 15119aaf72cSAlex Elder * sufficient to satisfy our request. Round up our requested 15219aaf72cSAlex Elder * size to avoid any unused space in the allocation. This way 15319aaf72cSAlex Elder * gsi_trans_pool_exit_dma() can assume the total allocated 1541130b252SAlex Elder * size is exactly (count * size). 1559dd441e4SAlex Elder */ 1569dd441e4SAlex Elder total_size = get_order(total_size) << PAGE_SHIFT; 1579dd441e4SAlex Elder 1589dd441e4SAlex Elder virt = dma_alloc_coherent(dev, total_size, &addr, GFP_KERNEL); 1599dd441e4SAlex Elder if (!virt) 1609dd441e4SAlex Elder return -ENOMEM; 1619dd441e4SAlex Elder 1629dd441e4SAlex Elder pool->base = virt; 1639dd441e4SAlex Elder pool->count = total_size / size; 1649dd441e4SAlex Elder pool->free = 0; 1659dd441e4SAlex Elder pool->size = size; 1669dd441e4SAlex Elder pool->max_alloc = max_alloc; 1679dd441e4SAlex Elder pool->addr = addr; 1689dd441e4SAlex Elder 1699dd441e4SAlex Elder return 0; 1709dd441e4SAlex Elder } 1719dd441e4SAlex Elder 1729dd441e4SAlex Elder void gsi_trans_pool_exit_dma(struct device *dev, struct gsi_trans_pool *pool) 1739dd441e4SAlex Elder { 1741130b252SAlex Elder size_t total_size = pool->count * pool->size; 1751130b252SAlex Elder 1761130b252SAlex Elder dma_free_coherent(dev, total_size, pool->base, pool->addr); 1779dd441e4SAlex Elder memset(pool, 0, sizeof(*pool)); 1789dd441e4SAlex Elder } 1799dd441e4SAlex Elder 1809dd441e4SAlex Elder /* Return the byte offset of the next free entry in the pool */ 1819dd441e4SAlex Elder static u32 gsi_trans_pool_alloc_common(struct gsi_trans_pool *pool, u32 count) 1829dd441e4SAlex Elder { 1839dd441e4SAlex Elder u32 offset; 1849dd441e4SAlex Elder 1855bc55884SAlex Elder WARN_ON(!count); 1865bc55884SAlex Elder WARN_ON(count > pool->max_alloc); 1879dd441e4SAlex Elder 1889dd441e4SAlex Elder /* Allocate from beginning if wrap would occur */ 1899dd441e4SAlex Elder if (count > pool->count - pool->free) 1909dd441e4SAlex Elder pool->free = 0; 1919dd441e4SAlex Elder 1929dd441e4SAlex Elder offset = pool->free * pool->size; 1939dd441e4SAlex Elder pool->free += count; 1949dd441e4SAlex Elder memset(pool->base + offset, 0, count * pool->size); 1959dd441e4SAlex Elder 1969dd441e4SAlex Elder return offset; 1979dd441e4SAlex Elder } 1989dd441e4SAlex Elder 1999dd441e4SAlex Elder /* Allocate a contiguous block of zeroed entries from a pool */ 2009dd441e4SAlex Elder void *gsi_trans_pool_alloc(struct gsi_trans_pool *pool, u32 count) 2019dd441e4SAlex Elder { 2029dd441e4SAlex Elder return pool->base + gsi_trans_pool_alloc_common(pool, count); 2039dd441e4SAlex Elder } 2049dd441e4SAlex Elder 2059dd441e4SAlex Elder /* Allocate a single zeroed entry from a DMA pool */ 2069dd441e4SAlex Elder void *gsi_trans_pool_alloc_dma(struct gsi_trans_pool *pool, dma_addr_t *addr) 2079dd441e4SAlex Elder { 2089dd441e4SAlex Elder u32 offset = gsi_trans_pool_alloc_common(pool, 1); 2099dd441e4SAlex Elder 2109dd441e4SAlex Elder *addr = pool->addr + offset; 2119dd441e4SAlex Elder 2129dd441e4SAlex Elder return pool->base + offset; 2139dd441e4SAlex Elder } 2149dd441e4SAlex Elder 2158eec7831SAlex Elder /* Map a TRE ring entry index to the transaction it is associated with */ 2168eec7831SAlex Elder static void gsi_trans_map(struct gsi_trans *trans, u32 index) 2179dd441e4SAlex Elder { 2188eec7831SAlex Elder struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id]; 2198eec7831SAlex Elder 2208eec7831SAlex Elder /* The completion event will indicate the last TRE used */ 2218eec7831SAlex Elder index += trans->used_count - 1; 2228eec7831SAlex Elder 2239dd441e4SAlex Elder /* Note: index *must* be used modulo the ring count here */ 2249dd441e4SAlex Elder channel->trans_info.map[index % channel->tre_ring.count] = trans; 2259dd441e4SAlex Elder } 2269dd441e4SAlex Elder 2279dd441e4SAlex Elder /* Return the transaction mapped to a given ring entry */ 2289dd441e4SAlex Elder struct gsi_trans * 2299dd441e4SAlex Elder gsi_channel_trans_mapped(struct gsi_channel *channel, u32 index) 2309dd441e4SAlex Elder { 2319dd441e4SAlex Elder /* Note: index *must* be used modulo the ring count here */ 2329dd441e4SAlex Elder return channel->trans_info.map[index % channel->tre_ring.count]; 2339dd441e4SAlex Elder } 2349dd441e4SAlex Elder 2359dd441e4SAlex Elder /* Return the oldest completed transaction for a channel (or null) */ 2369dd441e4SAlex Elder struct gsi_trans *gsi_channel_trans_complete(struct gsi_channel *channel) 2379dd441e4SAlex Elder { 2388672bab7SAlex Elder struct gsi_trans_info *trans_info = &channel->trans_info; 2398672bab7SAlex Elder u16 trans_id = trans_info->completed_id; 2408672bab7SAlex Elder 241019e37eaSAlex Elder if (trans_id == trans_info->pending_id) { 242019e37eaSAlex Elder gsi_channel_update(channel); 2430c126ec3SAlex Elder if (trans_id == trans_info->pending_id) 244019e37eaSAlex Elder return NULL; 245019e37eaSAlex Elder } 2468672bab7SAlex Elder 2470c126ec3SAlex Elder return &trans_info->trans[trans_id %= channel->tre_count]; 2489dd441e4SAlex Elder } 2499dd441e4SAlex Elder 25011902b41SAlex Elder /* Move a transaction from allocated to committed state */ 251b63f507cSAlex Elder static void gsi_trans_move_committed(struct gsi_trans *trans) 2529dd441e4SAlex Elder { 2539dd441e4SAlex Elder struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id]; 2549dd441e4SAlex Elder struct gsi_trans_info *trans_info = &channel->trans_info; 2559dd441e4SAlex Elder 25641e2a2c0SAlex Elder /* This allocated transaction is now committed */ 25741e2a2c0SAlex Elder trans_info->allocated_id++; 258b63f507cSAlex Elder } 259b63f507cSAlex Elder 260d338ae28SAlex Elder /* Move committed transactions to pending state */ 261b63f507cSAlex Elder static void gsi_trans_move_pending(struct gsi_trans *trans) 262b63f507cSAlex Elder { 263b63f507cSAlex Elder struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id]; 264b63f507cSAlex Elder struct gsi_trans_info *trans_info = &channel->trans_info; 265fc95d958SAlex Elder u16 trans_index = trans - &trans_info->trans[0]; 266fc95d958SAlex Elder u16 delta; 267b63f507cSAlex Elder 268fc95d958SAlex Elder /* These committed transactions are now pending */ 269fc95d958SAlex Elder delta = trans_index - trans_info->committed_id + 1; 270fc95d958SAlex Elder trans_info->committed_id += delta % channel->tre_count; 2719dd441e4SAlex Elder } 2729dd441e4SAlex Elder 273d338ae28SAlex Elder /* Move pending transactions to completed state */ 2749dd441e4SAlex Elder void gsi_trans_move_complete(struct gsi_trans *trans) 2759dd441e4SAlex Elder { 2769dd441e4SAlex Elder struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id]; 2779dd441e4SAlex Elder struct gsi_trans_info *trans_info = &channel->trans_info; 278eeff7c14SAlex Elder u16 trans_index = trans - trans_info->trans; 279eeff7c14SAlex Elder u16 delta; 2809dd441e4SAlex Elder 281eeff7c14SAlex Elder /* These pending transactions are now completed */ 282eeff7c14SAlex Elder delta = trans_index - trans_info->pending_id + 1; 283eeff7c14SAlex Elder delta %= channel->tre_count; 284eeff7c14SAlex Elder trans_info->pending_id += delta; 2859dd441e4SAlex Elder } 2869dd441e4SAlex Elder 287d338ae28SAlex Elder /* Move a transaction from completed to polled state */ 2889dd441e4SAlex Elder void gsi_trans_move_polled(struct gsi_trans *trans) 2899dd441e4SAlex Elder { 2909dd441e4SAlex Elder struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id]; 2919dd441e4SAlex Elder struct gsi_trans_info *trans_info = &channel->trans_info; 2929dd441e4SAlex Elder 293949cd0b5SAlex Elder /* This completed transaction is now polled */ 294949cd0b5SAlex Elder trans_info->completed_id++; 2959dd441e4SAlex Elder } 2969dd441e4SAlex Elder 2979dd441e4SAlex Elder /* Reserve some number of TREs on a channel. Returns true if successful */ 2989dd441e4SAlex Elder static bool 2999dd441e4SAlex Elder gsi_trans_tre_reserve(struct gsi_trans_info *trans_info, u32 tre_count) 3009dd441e4SAlex Elder { 3019dd441e4SAlex Elder int avail = atomic_read(&trans_info->tre_avail); 3029dd441e4SAlex Elder int new; 3039dd441e4SAlex Elder 3049dd441e4SAlex Elder do { 3059dd441e4SAlex Elder new = avail - (int)tre_count; 3069dd441e4SAlex Elder if (unlikely(new < 0)) 3079dd441e4SAlex Elder return false; 3089dd441e4SAlex Elder } while (!atomic_try_cmpxchg(&trans_info->tre_avail, &avail, new)); 3099dd441e4SAlex Elder 3109dd441e4SAlex Elder return true; 3119dd441e4SAlex Elder } 3129dd441e4SAlex Elder 3139dd441e4SAlex Elder /* Release previously-reserved TRE entries to a channel */ 3149dd441e4SAlex Elder static void 3159dd441e4SAlex Elder gsi_trans_tre_release(struct gsi_trans_info *trans_info, u32 tre_count) 3169dd441e4SAlex Elder { 3179dd441e4SAlex Elder atomic_add(tre_count, &trans_info->tre_avail); 3189dd441e4SAlex Elder } 3199dd441e4SAlex Elder 3205fc7f9baSAlex Elder /* Return true if no transactions are allocated, false otherwise */ 3215fc7f9baSAlex Elder bool gsi_channel_trans_idle(struct gsi *gsi, u32 channel_id) 3225fc7f9baSAlex Elder { 3235fc7f9baSAlex Elder u32 tre_max = gsi_channel_tre_max(gsi, channel_id); 3245fc7f9baSAlex Elder struct gsi_trans_info *trans_info; 3255fc7f9baSAlex Elder 3265fc7f9baSAlex Elder trans_info = &gsi->channel[channel_id].trans_info; 3275fc7f9baSAlex Elder 3285fc7f9baSAlex Elder return atomic_read(&trans_info->tre_avail) == tre_max; 3295fc7f9baSAlex Elder } 3305fc7f9baSAlex Elder 3319dd441e4SAlex Elder /* Allocate a GSI transaction on a channel */ 3329dd441e4SAlex Elder struct gsi_trans *gsi_channel_trans_alloc(struct gsi *gsi, u32 channel_id, 3339dd441e4SAlex Elder u32 tre_count, 3349dd441e4SAlex Elder enum dma_data_direction direction) 3359dd441e4SAlex Elder { 3369dd441e4SAlex Elder struct gsi_channel *channel = &gsi->channel[channel_id]; 3379dd441e4SAlex Elder struct gsi_trans_info *trans_info; 3389dd441e4SAlex Elder struct gsi_trans *trans; 33912382d11SAlex Elder u16 trans_index; 3409dd441e4SAlex Elder 34188e03057SAlex Elder if (WARN_ON(tre_count > channel->trans_tre_max)) 3425bc55884SAlex Elder return NULL; 3439dd441e4SAlex Elder 3449dd441e4SAlex Elder trans_info = &channel->trans_info; 3459dd441e4SAlex Elder 34612382d11SAlex Elder /* If we can't reserve the TREs for the transaction, we're done */ 3479dd441e4SAlex Elder if (!gsi_trans_tre_reserve(trans_info, tre_count)) 3489dd441e4SAlex Elder return NULL; 3499dd441e4SAlex Elder 35012382d11SAlex Elder trans_index = trans_info->free_id % channel->tre_count; 35112382d11SAlex Elder trans = &trans_info->trans[trans_index]; 35212382d11SAlex Elder memset(trans, 0, sizeof(*trans)); 35312382d11SAlex Elder 35412382d11SAlex Elder /* Initialize non-zero fields in the transaction */ 3559dd441e4SAlex Elder trans->gsi = gsi; 3569dd441e4SAlex Elder trans->channel_id = channel_id; 3573eeabea6SAlex Elder trans->rsvd_count = tre_count; 3589dd441e4SAlex Elder init_completion(&trans->completion); 3599dd441e4SAlex Elder 360616c4a83SAlex Elder /* Allocate the scatterlist */ 3619dd441e4SAlex Elder trans->sgl = gsi_trans_pool_alloc(&trans_info->sg_pool, tre_count); 3629dd441e4SAlex Elder sg_init_marker(trans->sgl, tre_count); 3639dd441e4SAlex Elder 3649dd441e4SAlex Elder trans->direction = direction; 36512382d11SAlex Elder refcount_set(&trans->refcount, 1); 36612382d11SAlex Elder 367d338ae28SAlex Elder /* This free transaction is now allocated */ 36812382d11SAlex Elder trans_info->free_id++; 3699dd441e4SAlex Elder 3709dd441e4SAlex Elder return trans; 3719dd441e4SAlex Elder } 3729dd441e4SAlex Elder 373064c9c32SAlex Elder /* Free a previously-allocated transaction */ 3749dd441e4SAlex Elder void gsi_trans_free(struct gsi_trans *trans) 3759dd441e4SAlex Elder { 3769dd441e4SAlex Elder struct gsi_trans_info *trans_info; 3779dd441e4SAlex Elder 378d338ae28SAlex Elder if (!refcount_dec_and_test(&trans->refcount)) 379064c9c32SAlex Elder return; 380064c9c32SAlex Elder 381eeff7c14SAlex Elder /* Unused transactions are allocated but never committed, pending, 382949cd0b5SAlex Elder * completed, or polled. 383eeff7c14SAlex Elder */ 384d338ae28SAlex Elder trans_info = &trans->gsi->channel[trans->channel_id].trans_info; 385fc95d958SAlex Elder if (!trans->used_count) { 38641e2a2c0SAlex Elder trans_info->allocated_id++; 387fc95d958SAlex Elder trans_info->committed_id++; 388eeff7c14SAlex Elder trans_info->pending_id++; 389949cd0b5SAlex Elder trans_info->completed_id++; 390fc95d958SAlex Elder } else { 3919dd441e4SAlex Elder ipa_gsi_trans_release(trans); 392fc95d958SAlex Elder } 3939dd441e4SAlex Elder 394fd3bd039SAlex Elder /* This transaction is now free */ 395fd3bd039SAlex Elder trans_info->polled_id++; 396fd3bd039SAlex Elder 3979dd441e4SAlex Elder /* Releasing the reserved TREs implicitly frees the sgl[] and 3989dd441e4SAlex Elder * (if present) info[] arrays, plus the transaction itself. 3999dd441e4SAlex Elder */ 4003eeabea6SAlex Elder gsi_trans_tre_release(trans_info, trans->rsvd_count); 4019dd441e4SAlex Elder } 4029dd441e4SAlex Elder 4039dd441e4SAlex Elder /* Add an immediate command to a transaction */ 4049dd441e4SAlex Elder void gsi_trans_cmd_add(struct gsi_trans *trans, void *buf, u32 size, 4054de284b7SAlex Elder dma_addr_t addr, enum ipa_cmd_opcode opcode) 4069dd441e4SAlex Elder { 4073eeabea6SAlex Elder u32 which = trans->used_count++; 4089dd441e4SAlex Elder struct scatterlist *sg; 4099dd441e4SAlex Elder 4103eeabea6SAlex Elder WARN_ON(which >= trans->rsvd_count); 4119dd441e4SAlex Elder 412df833050SAlex Elder /* Commands are quite different from data transfer requests. 413df833050SAlex Elder * Their payloads come from a pool whose memory is allocated 414df833050SAlex Elder * using dma_alloc_coherent(). We therefore do *not* map them 415df833050SAlex Elder * for DMA (unlike what we do for pages and skbs). 416df833050SAlex Elder * 417df833050SAlex Elder * When a transaction completes, the SGL is normally unmapped. 418df833050SAlex Elder * A command transaction has direction DMA_NONE, which tells 419df833050SAlex Elder * gsi_trans_complete() to skip the unmapping step. 420df833050SAlex Elder * 421df833050SAlex Elder * The only things we use directly in a command scatter/gather 422df833050SAlex Elder * entry are the DMA address and length. We still need the SG 423df833050SAlex Elder * table flags to be maintained though, so assign a NULL page 424df833050SAlex Elder * pointer for that purpose. 4259dd441e4SAlex Elder */ 4269dd441e4SAlex Elder sg = &trans->sgl[which]; 427df833050SAlex Elder sg_assign_page(sg, NULL); 4289dd441e4SAlex Elder sg_dma_address(sg) = addr; 429df833050SAlex Elder sg_dma_len(sg) = size; 4309dd441e4SAlex Elder 4318797972aSAlex Elder trans->cmd_opcode[which] = opcode; 4329dd441e4SAlex Elder } 4339dd441e4SAlex Elder 4349dd441e4SAlex Elder /* Add a page transfer to a transaction. It will fill the only TRE. */ 4359dd441e4SAlex Elder int gsi_trans_page_add(struct gsi_trans *trans, struct page *page, u32 size, 4369dd441e4SAlex Elder u32 offset) 4379dd441e4SAlex Elder { 4389dd441e4SAlex Elder struct scatterlist *sg = &trans->sgl[0]; 4399dd441e4SAlex Elder int ret; 4409dd441e4SAlex Elder 4413eeabea6SAlex Elder if (WARN_ON(trans->rsvd_count != 1)) 4425bc55884SAlex Elder return -EINVAL; 4433eeabea6SAlex Elder if (WARN_ON(trans->used_count)) 4445bc55884SAlex Elder return -EINVAL; 4459dd441e4SAlex Elder 4469dd441e4SAlex Elder sg_set_page(sg, page, size, offset); 4479dd441e4SAlex Elder ret = dma_map_sg(trans->gsi->dev, sg, 1, trans->direction); 4489dd441e4SAlex Elder if (!ret) 4499dd441e4SAlex Elder return -ENOMEM; 4509dd441e4SAlex Elder 4513eeabea6SAlex Elder trans->used_count++; /* Transaction now owns the (DMA mapped) page */ 4529dd441e4SAlex Elder 4539dd441e4SAlex Elder return 0; 4549dd441e4SAlex Elder } 4559dd441e4SAlex Elder 4569dd441e4SAlex Elder /* Add an SKB transfer to a transaction. No other TREs will be used. */ 4579dd441e4SAlex Elder int gsi_trans_skb_add(struct gsi_trans *trans, struct sk_buff *skb) 4589dd441e4SAlex Elder { 4599dd441e4SAlex Elder struct scatterlist *sg = &trans->sgl[0]; 4603eeabea6SAlex Elder u32 used_count; 4619dd441e4SAlex Elder int ret; 4629dd441e4SAlex Elder 4633eeabea6SAlex Elder if (WARN_ON(trans->rsvd_count != 1)) 4645bc55884SAlex Elder return -EINVAL; 4653eeabea6SAlex Elder if (WARN_ON(trans->used_count)) 4665bc55884SAlex Elder return -EINVAL; 4679dd441e4SAlex Elder 4689dd441e4SAlex Elder /* skb->len will not be 0 (checked early) */ 4699dd441e4SAlex Elder ret = skb_to_sgvec(skb, sg, 0, skb->len); 4709dd441e4SAlex Elder if (ret < 0) 4719dd441e4SAlex Elder return ret; 4723eeabea6SAlex Elder used_count = ret; 4739dd441e4SAlex Elder 4743eeabea6SAlex Elder ret = dma_map_sg(trans->gsi->dev, sg, used_count, trans->direction); 4759dd441e4SAlex Elder if (!ret) 4769dd441e4SAlex Elder return -ENOMEM; 4779dd441e4SAlex Elder 4783eeabea6SAlex Elder /* Transaction now owns the (DMA mapped) skb */ 4793eeabea6SAlex Elder trans->used_count += used_count; 4809dd441e4SAlex Elder 4819dd441e4SAlex Elder return 0; 4829dd441e4SAlex Elder } 4839dd441e4SAlex Elder 4849dd441e4SAlex Elder /* Compute the length/opcode value to use for a TRE */ 4859dd441e4SAlex Elder static __le16 gsi_tre_len_opcode(enum ipa_cmd_opcode opcode, u32 len) 4869dd441e4SAlex Elder { 4879dd441e4SAlex Elder return opcode == IPA_CMD_NONE ? cpu_to_le16((u16)len) 4889dd441e4SAlex Elder : cpu_to_le16((u16)opcode); 4899dd441e4SAlex Elder } 4909dd441e4SAlex Elder 4919dd441e4SAlex Elder /* Compute the flags value to use for a given TRE */ 4929dd441e4SAlex Elder static __le32 gsi_tre_flags(bool last_tre, bool bei, enum ipa_cmd_opcode opcode) 4939dd441e4SAlex Elder { 4949dd441e4SAlex Elder enum gsi_tre_type tre_type; 4959dd441e4SAlex Elder u32 tre_flags; 4969dd441e4SAlex Elder 4979dd441e4SAlex Elder tre_type = opcode == IPA_CMD_NONE ? GSI_RE_XFER : GSI_RE_IMMD_CMD; 4989dd441e4SAlex Elder tre_flags = u32_encode_bits(tre_type, TRE_FLAGS_TYPE_FMASK); 4999dd441e4SAlex Elder 5009dd441e4SAlex Elder /* Last TRE contains interrupt flags */ 5019dd441e4SAlex Elder if (last_tre) { 5029dd441e4SAlex Elder /* All transactions end in a transfer completion interrupt */ 5039dd441e4SAlex Elder tre_flags |= TRE_FLAGS_IEOT_FMASK; 5049dd441e4SAlex Elder /* Don't interrupt when outbound commands are acknowledged */ 5059dd441e4SAlex Elder if (bei) 5069dd441e4SAlex Elder tre_flags |= TRE_FLAGS_BEI_FMASK; 5079dd441e4SAlex Elder } else { /* All others indicate there's more to come */ 5089dd441e4SAlex Elder tre_flags |= TRE_FLAGS_CHAIN_FMASK; 5099dd441e4SAlex Elder } 5109dd441e4SAlex Elder 5119dd441e4SAlex Elder return cpu_to_le32(tre_flags); 5129dd441e4SAlex Elder } 5139dd441e4SAlex Elder 5149dd441e4SAlex Elder static void gsi_trans_tre_fill(struct gsi_tre *dest_tre, dma_addr_t addr, 5159dd441e4SAlex Elder u32 len, bool last_tre, bool bei, 5169dd441e4SAlex Elder enum ipa_cmd_opcode opcode) 5179dd441e4SAlex Elder { 5189dd441e4SAlex Elder struct gsi_tre tre; 5199dd441e4SAlex Elder 5209dd441e4SAlex Elder tre.addr = cpu_to_le64(addr); 5219dd441e4SAlex Elder tre.len_opcode = gsi_tre_len_opcode(opcode, len); 5229dd441e4SAlex Elder tre.reserved = 0; 5239dd441e4SAlex Elder tre.flags = gsi_tre_flags(last_tre, bei, opcode); 5249dd441e4SAlex Elder 5259dd441e4SAlex Elder /* ARM64 can write 16 bytes as a unit with a single instruction. 5269dd441e4SAlex Elder * Doing the assignment this way is an attempt to make that happen. 5279dd441e4SAlex Elder */ 5289dd441e4SAlex Elder *dest_tre = tre; 5299dd441e4SAlex Elder } 5309dd441e4SAlex Elder 5319dd441e4SAlex Elder /** 5329dd441e4SAlex Elder * __gsi_trans_commit() - Common GSI transaction commit code 5339dd441e4SAlex Elder * @trans: Transaction to commit 5349dd441e4SAlex Elder * @ring_db: Whether to tell the hardware about these queued transfers 5359dd441e4SAlex Elder * 5369dd441e4SAlex Elder * Formats channel ring TRE entries based on the content of the scatterlist. 5379dd441e4SAlex Elder * Maps a transaction pointer to the last ring entry used for the transaction, 538*ace5dc61SAlex Elder * so it can be recovered when it completes. Moves the transaction to 539*ace5dc61SAlex Elder * pending state. Finally, updates the channel ring pointer and optionally 5409dd441e4SAlex Elder * rings the doorbell. 5419dd441e4SAlex Elder */ 5429dd441e4SAlex Elder static void __gsi_trans_commit(struct gsi_trans *trans, bool ring_db) 5439dd441e4SAlex Elder { 5449dd441e4SAlex Elder struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id]; 5452295947bSAlex Elder struct gsi_ring *tre_ring = &channel->tre_ring; 5469dd441e4SAlex Elder enum ipa_cmd_opcode opcode = IPA_CMD_NONE; 5479dd441e4SAlex Elder bool bei = channel->toward_ipa; 5489dd441e4SAlex Elder struct gsi_tre *dest_tre; 5499dd441e4SAlex Elder struct scatterlist *sg; 5509dd441e4SAlex Elder u32 byte_count = 0; 5518797972aSAlex Elder u8 *cmd_opcode; 5529dd441e4SAlex Elder u32 avail; 5539dd441e4SAlex Elder u32 i; 5549dd441e4SAlex Elder 5553eeabea6SAlex Elder WARN_ON(!trans->used_count); 5569dd441e4SAlex Elder 5579dd441e4SAlex Elder /* Consume the entries. If we cross the end of the ring while 5589dd441e4SAlex Elder * filling them we'll switch to the beginning to finish. 5599dd441e4SAlex Elder * If there is no info array we're doing a simple data 5609dd441e4SAlex Elder * transfer request, whose opcode is IPA_CMD_NONE. 5619dd441e4SAlex Elder */ 5628797972aSAlex Elder cmd_opcode = channel->command ? &trans->cmd_opcode[0] : NULL; 5632295947bSAlex Elder avail = tre_ring->count - tre_ring->index % tre_ring->count; 5642295947bSAlex Elder dest_tre = gsi_ring_virt(tre_ring, tre_ring->index); 5653eeabea6SAlex Elder for_each_sg(trans->sgl, sg, trans->used_count, i) { 5663eeabea6SAlex Elder bool last_tre = i == trans->used_count - 1; 5679dd441e4SAlex Elder dma_addr_t addr = sg_dma_address(sg); 5689dd441e4SAlex Elder u32 len = sg_dma_len(sg); 5699dd441e4SAlex Elder 5709dd441e4SAlex Elder byte_count += len; 5719dd441e4SAlex Elder if (!avail--) 5722295947bSAlex Elder dest_tre = gsi_ring_virt(tre_ring, 0); 5738797972aSAlex Elder if (cmd_opcode) 5748797972aSAlex Elder opcode = *cmd_opcode++; 5759dd441e4SAlex Elder 5769dd441e4SAlex Elder gsi_trans_tre_fill(dest_tre, addr, len, last_tre, bei, opcode); 5779dd441e4SAlex Elder dest_tre++; 5789dd441e4SAlex Elder } 5798eec7831SAlex Elder /* Associate the TRE with the transaction */ 5808eec7831SAlex Elder gsi_trans_map(trans, tre_ring->index); 5818eec7831SAlex Elder 5823eeabea6SAlex Elder tre_ring->index += trans->used_count; 5839dd441e4SAlex Elder 5849dd441e4SAlex Elder trans->len = byte_count; 5854e0f28e9SAlex Elder if (channel->toward_ipa) 5864e0f28e9SAlex Elder gsi_trans_tx_committed(trans); 5879dd441e4SAlex Elder 588b63f507cSAlex Elder gsi_trans_move_committed(trans); 5899dd441e4SAlex Elder 5909dd441e4SAlex Elder /* Ring doorbell if requested, or if all TREs are allocated */ 5919dd441e4SAlex Elder if (ring_db || !atomic_read(&channel->trans_info.tre_avail)) { 5929dd441e4SAlex Elder /* Report what we're handing off to hardware for TX channels */ 5939dd441e4SAlex Elder if (channel->toward_ipa) 594bcec9ecbSAlex Elder gsi_trans_tx_queued(trans); 595b63f507cSAlex Elder gsi_trans_move_pending(trans); 5969dd441e4SAlex Elder gsi_channel_doorbell(channel); 5979dd441e4SAlex Elder } 5989dd441e4SAlex Elder } 5999dd441e4SAlex Elder 6009dd441e4SAlex Elder /* Commit a GSI transaction */ 6019dd441e4SAlex Elder void gsi_trans_commit(struct gsi_trans *trans, bool ring_db) 6029dd441e4SAlex Elder { 6033eeabea6SAlex Elder if (trans->used_count) 6049dd441e4SAlex Elder __gsi_trans_commit(trans, ring_db); 6059dd441e4SAlex Elder else 6069dd441e4SAlex Elder gsi_trans_free(trans); 6079dd441e4SAlex Elder } 6089dd441e4SAlex Elder 6099dd441e4SAlex Elder /* Commit a GSI transaction and wait for it to complete */ 6109dd441e4SAlex Elder void gsi_trans_commit_wait(struct gsi_trans *trans) 6119dd441e4SAlex Elder { 6123eeabea6SAlex Elder if (!trans->used_count) 6139dd441e4SAlex Elder goto out_trans_free; 6149dd441e4SAlex Elder 6159dd441e4SAlex Elder refcount_inc(&trans->refcount); 6169dd441e4SAlex Elder 6179dd441e4SAlex Elder __gsi_trans_commit(trans, true); 6189dd441e4SAlex Elder 6199dd441e4SAlex Elder wait_for_completion(&trans->completion); 6209dd441e4SAlex Elder 6219dd441e4SAlex Elder out_trans_free: 6229dd441e4SAlex Elder gsi_trans_free(trans); 6239dd441e4SAlex Elder } 6249dd441e4SAlex Elder 6259dd441e4SAlex Elder /* Process the completion of a transaction; called while polling */ 6269dd441e4SAlex Elder void gsi_trans_complete(struct gsi_trans *trans) 6279dd441e4SAlex Elder { 6289dd441e4SAlex Elder /* If the entire SGL was mapped when added, unmap it now */ 6299dd441e4SAlex Elder if (trans->direction != DMA_NONE) 6303eeabea6SAlex Elder dma_unmap_sg(trans->gsi->dev, trans->sgl, trans->used_count, 6319dd441e4SAlex Elder trans->direction); 6329dd441e4SAlex Elder 6339dd441e4SAlex Elder ipa_gsi_trans_complete(trans); 6349dd441e4SAlex Elder 6359dd441e4SAlex Elder complete(&trans->completion); 6369dd441e4SAlex Elder 6379dd441e4SAlex Elder gsi_trans_free(trans); 6389dd441e4SAlex Elder } 6399dd441e4SAlex Elder 6409dd441e4SAlex Elder /* Cancel a channel's pending transactions */ 6419dd441e4SAlex Elder void gsi_channel_trans_cancel_pending(struct gsi_channel *channel) 6429dd441e4SAlex Elder { 6439dd441e4SAlex Elder struct gsi_trans_info *trans_info = &channel->trans_info; 6440c126ec3SAlex Elder u16 trans_id = trans_info->pending_id; 6459dd441e4SAlex Elder 6469dd441e4SAlex Elder /* channel->gsi->mutex is held by caller */ 6479dd441e4SAlex Elder 6480c126ec3SAlex Elder /* If there are no pending transactions, we're done */ 6490c126ec3SAlex Elder if (trans_id == trans_info->committed_id) 6500c126ec3SAlex Elder return; 6518672bab7SAlex Elder 6520c126ec3SAlex Elder /* Mark all pending transactions cancelled */ 6530c126ec3SAlex Elder do { 6540c126ec3SAlex Elder struct gsi_trans *trans; 6550c126ec3SAlex Elder 6560c126ec3SAlex Elder trans = &trans_info->trans[trans_id % channel->tre_count]; 6570c126ec3SAlex Elder trans->cancelled = true; 6580c126ec3SAlex Elder } while (++trans_id != trans_info->committed_id); 6590c126ec3SAlex Elder 6600c126ec3SAlex Elder /* All pending transactions are now completed */ 6618672bab7SAlex Elder trans_info->pending_id = trans_info->committed_id; 6628672bab7SAlex Elder 6639dd441e4SAlex Elder /* Schedule NAPI polling to complete the cancelled transactions */ 6649dd441e4SAlex Elder napi_schedule(&channel->napi); 6659dd441e4SAlex Elder } 6669dd441e4SAlex Elder 6679dd441e4SAlex Elder /* Issue a command to read a single byte from a channel */ 6689dd441e4SAlex Elder int gsi_trans_read_byte(struct gsi *gsi, u32 channel_id, dma_addr_t addr) 6699dd441e4SAlex Elder { 6709dd441e4SAlex Elder struct gsi_channel *channel = &gsi->channel[channel_id]; 6712295947bSAlex Elder struct gsi_ring *tre_ring = &channel->tre_ring; 6729dd441e4SAlex Elder struct gsi_trans_info *trans_info; 6739dd441e4SAlex Elder struct gsi_tre *dest_tre; 6749dd441e4SAlex Elder 6759dd441e4SAlex Elder trans_info = &channel->trans_info; 6769dd441e4SAlex Elder 6779dd441e4SAlex Elder /* First reserve the TRE, if possible */ 6789dd441e4SAlex Elder if (!gsi_trans_tre_reserve(trans_info, 1)) 6799dd441e4SAlex Elder return -EBUSY; 6809dd441e4SAlex Elder 6817c0d97e4SJiang Jian /* Now fill the reserved TRE and tell the hardware */ 6829dd441e4SAlex Elder 6832295947bSAlex Elder dest_tre = gsi_ring_virt(tre_ring, tre_ring->index); 6849dd441e4SAlex Elder gsi_trans_tre_fill(dest_tre, addr, 1, true, false, IPA_CMD_NONE); 6859dd441e4SAlex Elder 6862295947bSAlex Elder tre_ring->index++; 6879dd441e4SAlex Elder gsi_channel_doorbell(channel); 6889dd441e4SAlex Elder 6899dd441e4SAlex Elder return 0; 6909dd441e4SAlex Elder } 6919dd441e4SAlex Elder 6929dd441e4SAlex Elder /* Mark a gsi_trans_read_byte() request done */ 6939dd441e4SAlex Elder void gsi_trans_read_byte_done(struct gsi *gsi, u32 channel_id) 6949dd441e4SAlex Elder { 6959dd441e4SAlex Elder struct gsi_channel *channel = &gsi->channel[channel_id]; 6969dd441e4SAlex Elder 6979dd441e4SAlex Elder gsi_trans_tre_release(&channel->trans_info, 1); 6989dd441e4SAlex Elder } 6999dd441e4SAlex Elder 7009dd441e4SAlex Elder /* Initialize a channel's GSI transaction info */ 7019dd441e4SAlex Elder int gsi_channel_trans_init(struct gsi *gsi, u32 channel_id) 7029dd441e4SAlex Elder { 7039dd441e4SAlex Elder struct gsi_channel *channel = &gsi->channel[channel_id]; 70449200658SAlex Elder u32 tre_count = channel->tre_count; 7059dd441e4SAlex Elder struct gsi_trans_info *trans_info; 7069dd441e4SAlex Elder u32 tre_max; 7079dd441e4SAlex Elder int ret; 7089dd441e4SAlex Elder 7099dd441e4SAlex Elder /* Ensure the size of a channel element is what's expected */ 7109dd441e4SAlex Elder BUILD_BUG_ON(sizeof(struct gsi_tre) != GSI_RING_ELEMENT_SIZE); 7119dd441e4SAlex Elder 7129dd441e4SAlex Elder trans_info = &channel->trans_info; 7139dd441e4SAlex Elder 71449200658SAlex Elder /* The tre_avail field is what ultimately limits the number of 71549200658SAlex Elder * outstanding transactions and their resources. A transaction 71649200658SAlex Elder * allocation succeeds only if the TREs available are sufficient 71749200658SAlex Elder * for what the transaction might need. 7189dd441e4SAlex Elder */ 7199dd441e4SAlex Elder tre_max = gsi_channel_tre_max(channel->gsi, channel_id); 72049200658SAlex Elder atomic_set(&trans_info->tre_avail, tre_max); 7219dd441e4SAlex Elder 72249200658SAlex Elder /* We can't use more TREs than the number available in the ring. 72349200658SAlex Elder * This limits the number of transactions that can be outstanding. 72449200658SAlex Elder * Worst case is one TRE per transaction (but we actually limit 72549200658SAlex Elder * it to something a little less than that). By allocating a 72649200658SAlex Elder * power-of-two number of transactions we can use an index 72749200658SAlex Elder * modulo that number to determine the next one that's free. 72849200658SAlex Elder * Transactions are allocated one at a time. 72949200658SAlex Elder */ 73012382d11SAlex Elder trans_info->trans = kcalloc(tre_count, sizeof(*trans_info->trans), 73112382d11SAlex Elder GFP_KERNEL); 73212382d11SAlex Elder if (!trans_info->trans) 73349200658SAlex Elder return -ENOMEM; 73441e2a2c0SAlex Elder trans_info->free_id = 0; /* all modulo channel->tre_count */ 73541e2a2c0SAlex Elder trans_info->allocated_id = 0; 736fc95d958SAlex Elder trans_info->committed_id = 0; 737eeff7c14SAlex Elder trans_info->pending_id = 0; 738949cd0b5SAlex Elder trans_info->completed_id = 0; 739fd3bd039SAlex Elder trans_info->polled_id = 0; 74049200658SAlex Elder 74149200658SAlex Elder /* A completion event contains a pointer to the TRE that caused 74249200658SAlex Elder * the event (which will be the last one used by the transaction). 74349200658SAlex Elder * Each entry in this map records the transaction associated 74449200658SAlex Elder * with a corresponding completed TRE. 74549200658SAlex Elder */ 74649200658SAlex Elder trans_info->map = kcalloc(tre_count, sizeof(*trans_info->map), 74749200658SAlex Elder GFP_KERNEL); 74849200658SAlex Elder if (!trans_info->map) { 74949200658SAlex Elder ret = -ENOMEM; 75049200658SAlex Elder goto err_trans_free; 75149200658SAlex Elder } 7529dd441e4SAlex Elder 7539dd441e4SAlex Elder /* A transaction uses a scatterlist array to represent the data 7549dd441e4SAlex Elder * transfers implemented by the transaction. Each scatterlist 7559dd441e4SAlex Elder * element is used to fill a single TRE when the transaction is 7569dd441e4SAlex Elder * committed. So we need as many scatterlist elements as the 7579dd441e4SAlex Elder * maximum number of TREs that can be outstanding. 7589dd441e4SAlex Elder */ 7599dd441e4SAlex Elder ret = gsi_trans_pool_init(&trans_info->sg_pool, 7609dd441e4SAlex Elder sizeof(struct scatterlist), 76188e03057SAlex Elder tre_max, channel->trans_tre_max); 7629dd441e4SAlex Elder if (ret) 76349200658SAlex Elder goto err_map_free; 7649dd441e4SAlex Elder 7659dd441e4SAlex Elder 7669dd441e4SAlex Elder return 0; 7679dd441e4SAlex Elder 76849200658SAlex Elder err_map_free: 7699dd441e4SAlex Elder kfree(trans_info->map); 77049200658SAlex Elder err_trans_free: 77112382d11SAlex Elder kfree(trans_info->trans); 7729dd441e4SAlex Elder 7739dd441e4SAlex Elder dev_err(gsi->dev, "error %d initializing channel %u transactions\n", 7749dd441e4SAlex Elder ret, channel_id); 7759dd441e4SAlex Elder 7769dd441e4SAlex Elder return ret; 7779dd441e4SAlex Elder } 7789dd441e4SAlex Elder 7799dd441e4SAlex Elder /* Inverse of gsi_channel_trans_init() */ 7809dd441e4SAlex Elder void gsi_channel_trans_exit(struct gsi_channel *channel) 7819dd441e4SAlex Elder { 7829dd441e4SAlex Elder struct gsi_trans_info *trans_info = &channel->trans_info; 7839dd441e4SAlex Elder 7849dd441e4SAlex Elder gsi_trans_pool_exit(&trans_info->sg_pool); 78512382d11SAlex Elder kfree(trans_info->trans); 7869dd441e4SAlex Elder kfree(trans_info->map); 7879dd441e4SAlex Elder } 788