xref: /openbmc/linux/drivers/net/ipa/gsi_trans.c (revision 949cd0b5)
19dd441e4SAlex Elder // SPDX-License-Identifier: GPL-2.0
29dd441e4SAlex Elder 
39dd441e4SAlex Elder /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
49dd441e4SAlex Elder  * Copyright (C) 2019-2020 Linaro Ltd.
59dd441e4SAlex Elder  */
69dd441e4SAlex Elder 
79dd441e4SAlex Elder #include <linux/types.h>
89dd441e4SAlex Elder #include <linux/bits.h>
99dd441e4SAlex Elder #include <linux/bitfield.h>
109dd441e4SAlex Elder #include <linux/refcount.h>
119dd441e4SAlex Elder #include <linux/scatterlist.h>
129dd441e4SAlex Elder #include <linux/dma-direction.h>
139dd441e4SAlex Elder 
149dd441e4SAlex Elder #include "gsi.h"
159dd441e4SAlex Elder #include "gsi_private.h"
169dd441e4SAlex Elder #include "gsi_trans.h"
179dd441e4SAlex Elder #include "ipa_gsi.h"
189dd441e4SAlex Elder #include "ipa_data.h"
199dd441e4SAlex Elder #include "ipa_cmd.h"
209dd441e4SAlex Elder 
219dd441e4SAlex Elder /**
229dd441e4SAlex Elder  * DOC: GSI Transactions
239dd441e4SAlex Elder  *
249dd441e4SAlex Elder  * A GSI transaction abstracts the behavior of a GSI channel by representing
259dd441e4SAlex Elder  * everything about a related group of IPA commands in a single structure.
269dd441e4SAlex Elder  * (A "command" in this sense is either a data transfer or an IPA immediate
279dd441e4SAlex Elder  * command.)  Most details of interaction with the GSI hardware are managed
289dd441e4SAlex Elder  * by the GSI transaction core, allowing users to simply describe commands
299dd441e4SAlex Elder  * to be performed.  When a transaction has completed a callback function
309dd441e4SAlex Elder  * (dependent on the type of endpoint associated with the channel) allows
319dd441e4SAlex Elder  * cleanup of resources associated with the transaction.
329dd441e4SAlex Elder  *
339dd441e4SAlex Elder  * To perform a command (or set of them), a user of the GSI transaction
349dd441e4SAlex Elder  * interface allocates a transaction, indicating the number of TREs required
359dd441e4SAlex Elder  * (one per command).  If sufficient TREs are available, they are reserved
369dd441e4SAlex Elder  * for use in the transaction and the allocation succeeds.  This way
379dd441e4SAlex Elder  * exhaustion of the available TREs in a channel ring is detected
389dd441e4SAlex Elder  * as early as possible.  All resources required to complete a transaction
399dd441e4SAlex Elder  * are allocated at transaction allocation time.
409dd441e4SAlex Elder  *
419dd441e4SAlex Elder  * Commands performed as part of a transaction are represented in an array
429dd441e4SAlex Elder  * of Linux scatterlist structures.  This array is allocated with the
439dd441e4SAlex Elder  * transaction, and its entries are initialized using standard scatterlist
449dd441e4SAlex Elder  * functions (such as sg_set_buf() or skb_to_sgvec()).
459dd441e4SAlex Elder  *
469dd441e4SAlex Elder  * Once a transaction's scatterlist structures have been initialized, the
479dd441e4SAlex Elder  * transaction is committed.  The caller is responsible for mapping buffers
489dd441e4SAlex Elder  * for DMA if necessary, and this should be done *before* allocating
499dd441e4SAlex Elder  * the transaction.  Between a successful allocation and commit of a
509dd441e4SAlex Elder  * transaction no errors should occur.
519dd441e4SAlex Elder  *
529dd441e4SAlex Elder  * Committing transfers ownership of the entire transaction to the GSI
539dd441e4SAlex Elder  * transaction core.  The GSI transaction code formats the content of
549dd441e4SAlex Elder  * the scatterlist array into the channel ring buffer and informs the
559dd441e4SAlex Elder  * hardware that new TREs are available to process.
569dd441e4SAlex Elder  *
579dd441e4SAlex Elder  * The last TRE in each transaction is marked to interrupt the AP when the
589dd441e4SAlex Elder  * GSI hardware has completed it.  Because transfers described by TREs are
599dd441e4SAlex Elder  * performed strictly in order, signaling the completion of just the last
609dd441e4SAlex Elder  * TRE in the transaction is sufficient to indicate the full transaction
619dd441e4SAlex Elder  * is complete.
629dd441e4SAlex Elder  *
639dd441e4SAlex Elder  * When a transaction is complete, ipa_gsi_trans_complete() is called by the
649dd441e4SAlex Elder  * GSI code into the IPA layer, allowing it to perform any final cleanup
659dd441e4SAlex Elder  * required before the transaction is freed.
669dd441e4SAlex Elder  */
679dd441e4SAlex Elder 
689dd441e4SAlex Elder /* Hardware values representing a transfer element type */
699dd441e4SAlex Elder enum gsi_tre_type {
709dd441e4SAlex Elder 	GSI_RE_XFER	= 0x2,
719dd441e4SAlex Elder 	GSI_RE_IMMD_CMD	= 0x3,
729dd441e4SAlex Elder };
739dd441e4SAlex Elder 
749dd441e4SAlex Elder /* An entry in a channel ring */
759dd441e4SAlex Elder struct gsi_tre {
769dd441e4SAlex Elder 	__le64 addr;		/* DMA address */
779dd441e4SAlex Elder 	__le16 len_opcode;	/* length in bytes or enum IPA_CMD_* */
789dd441e4SAlex Elder 	__le16 reserved;
799dd441e4SAlex Elder 	__le32 flags;		/* TRE_FLAGS_* */
809dd441e4SAlex Elder };
819dd441e4SAlex Elder 
829dd441e4SAlex Elder /* gsi_tre->flags mask values (in CPU byte order) */
839dd441e4SAlex Elder #define TRE_FLAGS_CHAIN_FMASK	GENMASK(0, 0)
849dd441e4SAlex Elder #define TRE_FLAGS_IEOT_FMASK	GENMASK(9, 9)
859dd441e4SAlex Elder #define TRE_FLAGS_BEI_FMASK	GENMASK(10, 10)
869dd441e4SAlex Elder #define TRE_FLAGS_TYPE_FMASK	GENMASK(23, 16)
879dd441e4SAlex Elder 
889dd441e4SAlex Elder int gsi_trans_pool_init(struct gsi_trans_pool *pool, size_t size, u32 count,
899dd441e4SAlex Elder 			u32 max_alloc)
909dd441e4SAlex Elder {
919dd441e4SAlex Elder 	void *virt;
929dd441e4SAlex Elder 
937ad3bd52SAlex Elder 	if (!size)
949dd441e4SAlex Elder 		return -EINVAL;
959dd441e4SAlex Elder 	if (count < max_alloc)
969dd441e4SAlex Elder 		return -EINVAL;
979dd441e4SAlex Elder 	if (!max_alloc)
989dd441e4SAlex Elder 		return -EINVAL;
999dd441e4SAlex Elder 
1009dd441e4SAlex Elder 	/* By allocating a few extra entries in our pool (one less
1019dd441e4SAlex Elder 	 * than the maximum number that will be requested in a
1029dd441e4SAlex Elder 	 * single allocation), we can always satisfy requests without
1039dd441e4SAlex Elder 	 * ever worrying about straddling the end of the pool array.
1049dd441e4SAlex Elder 	 * If there aren't enough entries starting at the free index,
1059dd441e4SAlex Elder 	 * we just allocate free entries from the beginning of the pool.
1069dd441e4SAlex Elder 	 */
1079dd441e4SAlex Elder 	virt = kcalloc(count + max_alloc - 1, size, GFP_KERNEL);
1089dd441e4SAlex Elder 	if (!virt)
1099dd441e4SAlex Elder 		return -ENOMEM;
1109dd441e4SAlex Elder 
1119dd441e4SAlex Elder 	pool->base = virt;
1129dd441e4SAlex Elder 	/* If the allocator gave us any extra memory, use it */
1139dd441e4SAlex Elder 	pool->count = ksize(pool->base) / size;
1149dd441e4SAlex Elder 	pool->free = 0;
1159dd441e4SAlex Elder 	pool->max_alloc = max_alloc;
1169dd441e4SAlex Elder 	pool->size = size;
1179dd441e4SAlex Elder 	pool->addr = 0;		/* Only used for DMA pools */
1189dd441e4SAlex Elder 
1199dd441e4SAlex Elder 	return 0;
1209dd441e4SAlex Elder }
1219dd441e4SAlex Elder 
1229dd441e4SAlex Elder void gsi_trans_pool_exit(struct gsi_trans_pool *pool)
1239dd441e4SAlex Elder {
1249dd441e4SAlex Elder 	kfree(pool->base);
1259dd441e4SAlex Elder 	memset(pool, 0, sizeof(*pool));
1269dd441e4SAlex Elder }
1279dd441e4SAlex Elder 
1289dd441e4SAlex Elder /* Allocate the requested number of (zeroed) entries from the pool */
1299dd441e4SAlex Elder /* Home-grown DMA pool.  This way we can preallocate and use the tre_count
1309dd441e4SAlex Elder  * to guarantee allocations will succeed.  Even though we specify max_alloc
1319dd441e4SAlex Elder  * (and it can be more than one), we only allow allocation of a single
1329dd441e4SAlex Elder  * element from a DMA pool.
1339dd441e4SAlex Elder  */
1349dd441e4SAlex Elder int gsi_trans_pool_init_dma(struct device *dev, struct gsi_trans_pool *pool,
1359dd441e4SAlex Elder 			    size_t size, u32 count, u32 max_alloc)
1369dd441e4SAlex Elder {
1379dd441e4SAlex Elder 	size_t total_size;
1389dd441e4SAlex Elder 	dma_addr_t addr;
1399dd441e4SAlex Elder 	void *virt;
1409dd441e4SAlex Elder 
1417ad3bd52SAlex Elder 	if (!size)
1429dd441e4SAlex Elder 		return -EINVAL;
1439dd441e4SAlex Elder 	if (count < max_alloc)
1449dd441e4SAlex Elder 		return -EINVAL;
1459dd441e4SAlex Elder 	if (!max_alloc)
1469dd441e4SAlex Elder 		return -EINVAL;
1479dd441e4SAlex Elder 
1489dd441e4SAlex Elder 	/* Don't let allocations cross a power-of-two boundary */
1499dd441e4SAlex Elder 	size = __roundup_pow_of_two(size);
1509dd441e4SAlex Elder 	total_size = (count + max_alloc - 1) * size;
1519dd441e4SAlex Elder 
15219aaf72cSAlex Elder 	/* The allocator will give us a power-of-2 number of pages
15319aaf72cSAlex Elder 	 * sufficient to satisfy our request.  Round up our requested
15419aaf72cSAlex Elder 	 * size to avoid any unused space in the allocation.  This way
15519aaf72cSAlex Elder 	 * gsi_trans_pool_exit_dma() can assume the total allocated
1561130b252SAlex Elder 	 * size is exactly (count * size).
1579dd441e4SAlex Elder 	 */
1589dd441e4SAlex Elder 	total_size = get_order(total_size) << PAGE_SHIFT;
1599dd441e4SAlex Elder 
1609dd441e4SAlex Elder 	virt = dma_alloc_coherent(dev, total_size, &addr, GFP_KERNEL);
1619dd441e4SAlex Elder 	if (!virt)
1629dd441e4SAlex Elder 		return -ENOMEM;
1639dd441e4SAlex Elder 
1649dd441e4SAlex Elder 	pool->base = virt;
1659dd441e4SAlex Elder 	pool->count = total_size / size;
1669dd441e4SAlex Elder 	pool->free = 0;
1679dd441e4SAlex Elder 	pool->size = size;
1689dd441e4SAlex Elder 	pool->max_alloc = max_alloc;
1699dd441e4SAlex Elder 	pool->addr = addr;
1709dd441e4SAlex Elder 
1719dd441e4SAlex Elder 	return 0;
1729dd441e4SAlex Elder }
1739dd441e4SAlex Elder 
1749dd441e4SAlex Elder void gsi_trans_pool_exit_dma(struct device *dev, struct gsi_trans_pool *pool)
1759dd441e4SAlex Elder {
1761130b252SAlex Elder 	size_t total_size = pool->count * pool->size;
1771130b252SAlex Elder 
1781130b252SAlex Elder 	dma_free_coherent(dev, total_size, pool->base, pool->addr);
1799dd441e4SAlex Elder 	memset(pool, 0, sizeof(*pool));
1809dd441e4SAlex Elder }
1819dd441e4SAlex Elder 
1829dd441e4SAlex Elder /* Return the byte offset of the next free entry in the pool */
1839dd441e4SAlex Elder static u32 gsi_trans_pool_alloc_common(struct gsi_trans_pool *pool, u32 count)
1849dd441e4SAlex Elder {
1859dd441e4SAlex Elder 	u32 offset;
1869dd441e4SAlex Elder 
1875bc55884SAlex Elder 	WARN_ON(!count);
1885bc55884SAlex Elder 	WARN_ON(count > pool->max_alloc);
1899dd441e4SAlex Elder 
1909dd441e4SAlex Elder 	/* Allocate from beginning if wrap would occur */
1919dd441e4SAlex Elder 	if (count > pool->count - pool->free)
1929dd441e4SAlex Elder 		pool->free = 0;
1939dd441e4SAlex Elder 
1949dd441e4SAlex Elder 	offset = pool->free * pool->size;
1959dd441e4SAlex Elder 	pool->free += count;
1969dd441e4SAlex Elder 	memset(pool->base + offset, 0, count * pool->size);
1979dd441e4SAlex Elder 
1989dd441e4SAlex Elder 	return offset;
1999dd441e4SAlex Elder }
2009dd441e4SAlex Elder 
2019dd441e4SAlex Elder /* Allocate a contiguous block of zeroed entries from a pool */
2029dd441e4SAlex Elder void *gsi_trans_pool_alloc(struct gsi_trans_pool *pool, u32 count)
2039dd441e4SAlex Elder {
2049dd441e4SAlex Elder 	return pool->base + gsi_trans_pool_alloc_common(pool, count);
2059dd441e4SAlex Elder }
2069dd441e4SAlex Elder 
2079dd441e4SAlex Elder /* Allocate a single zeroed entry from a DMA pool */
2089dd441e4SAlex Elder void *gsi_trans_pool_alloc_dma(struct gsi_trans_pool *pool, dma_addr_t *addr)
2099dd441e4SAlex Elder {
2109dd441e4SAlex Elder 	u32 offset = gsi_trans_pool_alloc_common(pool, 1);
2119dd441e4SAlex Elder 
2129dd441e4SAlex Elder 	*addr = pool->addr + offset;
2139dd441e4SAlex Elder 
2149dd441e4SAlex Elder 	return pool->base + offset;
2159dd441e4SAlex Elder }
2169dd441e4SAlex Elder 
2178eec7831SAlex Elder /* Map a TRE ring entry index to the transaction it is associated with */
2188eec7831SAlex Elder static void gsi_trans_map(struct gsi_trans *trans, u32 index)
2199dd441e4SAlex Elder {
2208eec7831SAlex Elder 	struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
2218eec7831SAlex Elder 
2228eec7831SAlex Elder 	/* The completion event will indicate the last TRE used */
2238eec7831SAlex Elder 	index += trans->used_count - 1;
2248eec7831SAlex Elder 
2259dd441e4SAlex Elder 	/* Note: index *must* be used modulo the ring count here */
2269dd441e4SAlex Elder 	channel->trans_info.map[index % channel->tre_ring.count] = trans;
2279dd441e4SAlex Elder }
2289dd441e4SAlex Elder 
2299dd441e4SAlex Elder /* Return the transaction mapped to a given ring entry */
2309dd441e4SAlex Elder struct gsi_trans *
2319dd441e4SAlex Elder gsi_channel_trans_mapped(struct gsi_channel *channel, u32 index)
2329dd441e4SAlex Elder {
2339dd441e4SAlex Elder 	/* Note: index *must* be used modulo the ring count here */
2349dd441e4SAlex Elder 	return channel->trans_info.map[index % channel->tre_ring.count];
2359dd441e4SAlex Elder }
2369dd441e4SAlex Elder 
2379dd441e4SAlex Elder /* Return the oldest completed transaction for a channel (or null) */
2389dd441e4SAlex Elder struct gsi_trans *gsi_channel_trans_complete(struct gsi_channel *channel)
2399dd441e4SAlex Elder {
2409dd441e4SAlex Elder 	return list_first_entry_or_null(&channel->trans_info.complete,
2419dd441e4SAlex Elder 					struct gsi_trans, links);
2429dd441e4SAlex Elder }
2439dd441e4SAlex Elder 
244b63f507cSAlex Elder /* Move a transaction from the allocated list to the committed list */
245b63f507cSAlex Elder static void gsi_trans_move_committed(struct gsi_trans *trans)
2469dd441e4SAlex Elder {
2479dd441e4SAlex Elder 	struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
2489dd441e4SAlex Elder 	struct gsi_trans_info *trans_info = &channel->trans_info;
2499dd441e4SAlex Elder 
2509dd441e4SAlex Elder 	spin_lock_bh(&trans_info->spinlock);
2519dd441e4SAlex Elder 
252b63f507cSAlex Elder 	list_move_tail(&trans->links, &trans_info->committed);
253b63f507cSAlex Elder 
254b63f507cSAlex Elder 	spin_unlock_bh(&trans_info->spinlock);
25541e2a2c0SAlex Elder 
25641e2a2c0SAlex Elder 	/* This allocated transaction is now committed */
25741e2a2c0SAlex Elder 	trans_info->allocated_id++;
258b63f507cSAlex Elder }
259b63f507cSAlex Elder 
260b63f507cSAlex Elder /* Move transactions from the committed list to the pending list */
261b63f507cSAlex Elder static void gsi_trans_move_pending(struct gsi_trans *trans)
262b63f507cSAlex Elder {
263b63f507cSAlex Elder 	struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
264b63f507cSAlex Elder 	struct gsi_trans_info *trans_info = &channel->trans_info;
265fc95d958SAlex Elder 	u16 trans_index = trans - &trans_info->trans[0];
266b63f507cSAlex Elder 	struct list_head list;
267fc95d958SAlex Elder 	u16 delta;
268b63f507cSAlex Elder 
269b63f507cSAlex Elder 	spin_lock_bh(&trans_info->spinlock);
270b63f507cSAlex Elder 
271b63f507cSAlex Elder 	/* Move this transaction and all predecessors to the pending list */
272b63f507cSAlex Elder 	list_cut_position(&list, &trans_info->committed, &trans->links);
273b63f507cSAlex Elder 	list_splice_tail(&list, &trans_info->pending);
2749dd441e4SAlex Elder 
2759dd441e4SAlex Elder 	spin_unlock_bh(&trans_info->spinlock);
276fc95d958SAlex Elder 
277fc95d958SAlex Elder 	/* These committed transactions are now pending */
278fc95d958SAlex Elder 	delta = trans_index - trans_info->committed_id + 1;
279fc95d958SAlex Elder 	trans_info->committed_id += delta % channel->tre_count;
2809dd441e4SAlex Elder }
2819dd441e4SAlex Elder 
2829dd441e4SAlex Elder /* Move a transaction and all of its predecessors from the pending list
2839dd441e4SAlex Elder  * to the completed list.
2849dd441e4SAlex Elder  */
2859dd441e4SAlex Elder void gsi_trans_move_complete(struct gsi_trans *trans)
2869dd441e4SAlex Elder {
2879dd441e4SAlex Elder 	struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
2889dd441e4SAlex Elder 	struct gsi_trans_info *trans_info = &channel->trans_info;
289eeff7c14SAlex Elder 	u16 trans_index = trans - trans_info->trans;
2909dd441e4SAlex Elder 	struct list_head list;
291eeff7c14SAlex Elder 	u16 delta;
2929dd441e4SAlex Elder 
2939dd441e4SAlex Elder 	spin_lock_bh(&trans_info->spinlock);
2949dd441e4SAlex Elder 
2959dd441e4SAlex Elder 	/* Move this transaction and all predecessors to completed list */
2969dd441e4SAlex Elder 	list_cut_position(&list, &trans_info->pending, &trans->links);
2979dd441e4SAlex Elder 	list_splice_tail(&list, &trans_info->complete);
2989dd441e4SAlex Elder 
299*949cd0b5SAlex Elder 	trans = list_first_entry(&trans_info->complete,
300eeff7c14SAlex Elder 				 struct gsi_trans, links);
301eeff7c14SAlex Elder 
3029dd441e4SAlex Elder 	spin_unlock_bh(&trans_info->spinlock);
303eeff7c14SAlex Elder 
304eeff7c14SAlex Elder 	/* These pending transactions are now completed */
305eeff7c14SAlex Elder 	delta = trans_index - trans_info->pending_id + 1;
306eeff7c14SAlex Elder 	delta %= channel->tre_count;
307eeff7c14SAlex Elder 	trans_info->pending_id += delta;
308eeff7c14SAlex Elder 
309*949cd0b5SAlex Elder 	WARN_ON(trans_info->completed_id == trans_info->pending_id);
310*949cd0b5SAlex Elder 	trans_index = trans_info->completed_id % channel->tre_count;
311eeff7c14SAlex Elder 	WARN_ON(trans != &trans_info->trans[trans_index]);
3129dd441e4SAlex Elder }
3139dd441e4SAlex Elder 
3149dd441e4SAlex Elder /* Move a transaction from the completed list to the polled list */
3159dd441e4SAlex Elder void gsi_trans_move_polled(struct gsi_trans *trans)
3169dd441e4SAlex Elder {
3179dd441e4SAlex Elder 	struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
3189dd441e4SAlex Elder 	struct gsi_trans_info *trans_info = &channel->trans_info;
319*949cd0b5SAlex Elder 	u16 trans_index;
3209dd441e4SAlex Elder 
3219dd441e4SAlex Elder 	spin_lock_bh(&trans_info->spinlock);
3229dd441e4SAlex Elder 
3239dd441e4SAlex Elder 	list_move_tail(&trans->links, &trans_info->polled);
3249dd441e4SAlex Elder 
325*949cd0b5SAlex Elder 	trans = list_first_entry_or_null(&trans_info->complete,
326*949cd0b5SAlex Elder 					 struct gsi_trans, links);
327*949cd0b5SAlex Elder 
3289dd441e4SAlex Elder 	spin_unlock_bh(&trans_info->spinlock);
329*949cd0b5SAlex Elder 
330*949cd0b5SAlex Elder 	/* This completed transaction is now polled */
331*949cd0b5SAlex Elder 	trans_info->completed_id++;
332*949cd0b5SAlex Elder 
333*949cd0b5SAlex Elder 	if (trans) {
334*949cd0b5SAlex Elder 		trans_index = trans_info->completed_id % channel->tre_count;
335*949cd0b5SAlex Elder 		WARN_ON(trans != &trans_info->trans[trans_index]);
336*949cd0b5SAlex Elder 	} else {
337*949cd0b5SAlex Elder 		WARN_ON(trans_info->completed_id !=
338*949cd0b5SAlex Elder 			trans_info->pending_id);
339*949cd0b5SAlex Elder 	}
3409dd441e4SAlex Elder }
3419dd441e4SAlex Elder 
3429dd441e4SAlex Elder /* Reserve some number of TREs on a channel.  Returns true if successful */
3439dd441e4SAlex Elder static bool
3449dd441e4SAlex Elder gsi_trans_tre_reserve(struct gsi_trans_info *trans_info, u32 tre_count)
3459dd441e4SAlex Elder {
3469dd441e4SAlex Elder 	int avail = atomic_read(&trans_info->tre_avail);
3479dd441e4SAlex Elder 	int new;
3489dd441e4SAlex Elder 
3499dd441e4SAlex Elder 	do {
3509dd441e4SAlex Elder 		new = avail - (int)tre_count;
3519dd441e4SAlex Elder 		if (unlikely(new < 0))
3529dd441e4SAlex Elder 			return false;
3539dd441e4SAlex Elder 	} while (!atomic_try_cmpxchg(&trans_info->tre_avail, &avail, new));
3549dd441e4SAlex Elder 
3559dd441e4SAlex Elder 	return true;
3569dd441e4SAlex Elder }
3579dd441e4SAlex Elder 
3589dd441e4SAlex Elder /* Release previously-reserved TRE entries to a channel */
3599dd441e4SAlex Elder static void
3609dd441e4SAlex Elder gsi_trans_tre_release(struct gsi_trans_info *trans_info, u32 tre_count)
3619dd441e4SAlex Elder {
3629dd441e4SAlex Elder 	atomic_add(tre_count, &trans_info->tre_avail);
3639dd441e4SAlex Elder }
3649dd441e4SAlex Elder 
3655fc7f9baSAlex Elder /* Return true if no transactions are allocated, false otherwise */
3665fc7f9baSAlex Elder bool gsi_channel_trans_idle(struct gsi *gsi, u32 channel_id)
3675fc7f9baSAlex Elder {
3685fc7f9baSAlex Elder 	u32 tre_max = gsi_channel_tre_max(gsi, channel_id);
3695fc7f9baSAlex Elder 	struct gsi_trans_info *trans_info;
3705fc7f9baSAlex Elder 
3715fc7f9baSAlex Elder 	trans_info = &gsi->channel[channel_id].trans_info;
3725fc7f9baSAlex Elder 
3735fc7f9baSAlex Elder 	return atomic_read(&trans_info->tre_avail) == tre_max;
3745fc7f9baSAlex Elder }
3755fc7f9baSAlex Elder 
3769dd441e4SAlex Elder /* Allocate a GSI transaction on a channel */
3779dd441e4SAlex Elder struct gsi_trans *gsi_channel_trans_alloc(struct gsi *gsi, u32 channel_id,
3789dd441e4SAlex Elder 					  u32 tre_count,
3799dd441e4SAlex Elder 					  enum dma_data_direction direction)
3809dd441e4SAlex Elder {
3819dd441e4SAlex Elder 	struct gsi_channel *channel = &gsi->channel[channel_id];
3829dd441e4SAlex Elder 	struct gsi_trans_info *trans_info;
3839dd441e4SAlex Elder 	struct gsi_trans *trans;
38412382d11SAlex Elder 	u16 trans_index;
3859dd441e4SAlex Elder 
38688e03057SAlex Elder 	if (WARN_ON(tre_count > channel->trans_tre_max))
3875bc55884SAlex Elder 		return NULL;
3889dd441e4SAlex Elder 
3899dd441e4SAlex Elder 	trans_info = &channel->trans_info;
3909dd441e4SAlex Elder 
39112382d11SAlex Elder 	/* If we can't reserve the TREs for the transaction, we're done */
3929dd441e4SAlex Elder 	if (!gsi_trans_tre_reserve(trans_info, tre_count))
3939dd441e4SAlex Elder 		return NULL;
3949dd441e4SAlex Elder 
39512382d11SAlex Elder 	trans_index = trans_info->free_id % channel->tre_count;
39612382d11SAlex Elder 	trans = &trans_info->trans[trans_index];
39712382d11SAlex Elder 	memset(trans, 0, sizeof(*trans));
39812382d11SAlex Elder 
39912382d11SAlex Elder 	/* Initialize non-zero fields in the transaction */
4009dd441e4SAlex Elder 	trans->gsi = gsi;
4019dd441e4SAlex Elder 	trans->channel_id = channel_id;
4023eeabea6SAlex Elder 	trans->rsvd_count = tre_count;
4039dd441e4SAlex Elder 	init_completion(&trans->completion);
4049dd441e4SAlex Elder 
405616c4a83SAlex Elder 	/* Allocate the scatterlist */
4069dd441e4SAlex Elder 	trans->sgl = gsi_trans_pool_alloc(&trans_info->sg_pool, tre_count);
4079dd441e4SAlex Elder 	sg_init_marker(trans->sgl, tre_count);
4089dd441e4SAlex Elder 
4099dd441e4SAlex Elder 	trans->direction = direction;
41012382d11SAlex Elder 	refcount_set(&trans->refcount, 1);
41112382d11SAlex Elder 
41212382d11SAlex Elder 	/* This free transaction will now be allocated */
41312382d11SAlex Elder 	trans_info->free_id++;
4149dd441e4SAlex Elder 
4159dd441e4SAlex Elder 	spin_lock_bh(&trans_info->spinlock);
4169dd441e4SAlex Elder 
4179dd441e4SAlex Elder 	list_add_tail(&trans->links, &trans_info->alloc);
4189dd441e4SAlex Elder 
4199dd441e4SAlex Elder 	spin_unlock_bh(&trans_info->spinlock);
4209dd441e4SAlex Elder 
4219dd441e4SAlex Elder 	return trans;
4229dd441e4SAlex Elder }
4239dd441e4SAlex Elder 
424064c9c32SAlex Elder /* Free a previously-allocated transaction */
4259dd441e4SAlex Elder void gsi_trans_free(struct gsi_trans *trans)
4269dd441e4SAlex Elder {
427064c9c32SAlex Elder 	refcount_t *refcount = &trans->refcount;
4289dd441e4SAlex Elder 	struct gsi_trans_info *trans_info;
429064c9c32SAlex Elder 	bool last;
4309dd441e4SAlex Elder 
431064c9c32SAlex Elder 	/* We must hold the lock to release the last reference */
432064c9c32SAlex Elder 	if (refcount_dec_not_one(refcount))
4339dd441e4SAlex Elder 		return;
4349dd441e4SAlex Elder 
4359dd441e4SAlex Elder 	trans_info = &trans->gsi->channel[trans->channel_id].trans_info;
4369dd441e4SAlex Elder 
4379dd441e4SAlex Elder 	spin_lock_bh(&trans_info->spinlock);
4389dd441e4SAlex Elder 
439064c9c32SAlex Elder 	/* Reference might have been added before we got the lock */
440064c9c32SAlex Elder 	last = refcount_dec_and_test(refcount);
441064c9c32SAlex Elder 	if (last)
4429dd441e4SAlex Elder 		list_del(&trans->links);
4439dd441e4SAlex Elder 
4449dd441e4SAlex Elder 	spin_unlock_bh(&trans_info->spinlock);
4459dd441e4SAlex Elder 
446064c9c32SAlex Elder 	if (!last)
447064c9c32SAlex Elder 		return;
448064c9c32SAlex Elder 
449eeff7c14SAlex Elder 	/* Unused transactions are allocated but never committed, pending,
450*949cd0b5SAlex Elder 	 * completed, or polled.
451eeff7c14SAlex Elder 	 */
452fc95d958SAlex Elder 	if (!trans->used_count) {
45341e2a2c0SAlex Elder 		trans_info->allocated_id++;
454fc95d958SAlex Elder 		trans_info->committed_id++;
455eeff7c14SAlex Elder 		trans_info->pending_id++;
456*949cd0b5SAlex Elder 		trans_info->completed_id++;
457fc95d958SAlex Elder 	} else {
4589dd441e4SAlex Elder 		ipa_gsi_trans_release(trans);
459fc95d958SAlex Elder 	}
4609dd441e4SAlex Elder 
4619dd441e4SAlex Elder 	/* Releasing the reserved TREs implicitly frees the sgl[] and
4629dd441e4SAlex Elder 	 * (if present) info[] arrays, plus the transaction itself.
4639dd441e4SAlex Elder 	 */
4643eeabea6SAlex Elder 	gsi_trans_tre_release(trans_info, trans->rsvd_count);
4659dd441e4SAlex Elder }
4669dd441e4SAlex Elder 
4679dd441e4SAlex Elder /* Add an immediate command to a transaction */
4689dd441e4SAlex Elder void gsi_trans_cmd_add(struct gsi_trans *trans, void *buf, u32 size,
4694de284b7SAlex Elder 		       dma_addr_t addr, enum ipa_cmd_opcode opcode)
4709dd441e4SAlex Elder {
4713eeabea6SAlex Elder 	u32 which = trans->used_count++;
4729dd441e4SAlex Elder 	struct scatterlist *sg;
4739dd441e4SAlex Elder 
4743eeabea6SAlex Elder 	WARN_ON(which >= trans->rsvd_count);
4759dd441e4SAlex Elder 
476df833050SAlex Elder 	/* Commands are quite different from data transfer requests.
477df833050SAlex Elder 	 * Their payloads come from a pool whose memory is allocated
478df833050SAlex Elder 	 * using dma_alloc_coherent().  We therefore do *not* map them
479df833050SAlex Elder 	 * for DMA (unlike what we do for pages and skbs).
480df833050SAlex Elder 	 *
481df833050SAlex Elder 	 * When a transaction completes, the SGL is normally unmapped.
482df833050SAlex Elder 	 * A command transaction has direction DMA_NONE, which tells
483df833050SAlex Elder 	 * gsi_trans_complete() to skip the unmapping step.
484df833050SAlex Elder 	 *
485df833050SAlex Elder 	 * The only things we use directly in a command scatter/gather
486df833050SAlex Elder 	 * entry are the DMA address and length.  We still need the SG
487df833050SAlex Elder 	 * table flags to be maintained though, so assign a NULL page
488df833050SAlex Elder 	 * pointer for that purpose.
4899dd441e4SAlex Elder 	 */
4909dd441e4SAlex Elder 	sg = &trans->sgl[which];
491df833050SAlex Elder 	sg_assign_page(sg, NULL);
4929dd441e4SAlex Elder 	sg_dma_address(sg) = addr;
493df833050SAlex Elder 	sg_dma_len(sg) = size;
4949dd441e4SAlex Elder 
4958797972aSAlex Elder 	trans->cmd_opcode[which] = opcode;
4969dd441e4SAlex Elder }
4979dd441e4SAlex Elder 
4989dd441e4SAlex Elder /* Add a page transfer to a transaction.  It will fill the only TRE. */
4999dd441e4SAlex Elder int gsi_trans_page_add(struct gsi_trans *trans, struct page *page, u32 size,
5009dd441e4SAlex Elder 		       u32 offset)
5019dd441e4SAlex Elder {
5029dd441e4SAlex Elder 	struct scatterlist *sg = &trans->sgl[0];
5039dd441e4SAlex Elder 	int ret;
5049dd441e4SAlex Elder 
5053eeabea6SAlex Elder 	if (WARN_ON(trans->rsvd_count != 1))
5065bc55884SAlex Elder 		return -EINVAL;
5073eeabea6SAlex Elder 	if (WARN_ON(trans->used_count))
5085bc55884SAlex Elder 		return -EINVAL;
5099dd441e4SAlex Elder 
5109dd441e4SAlex Elder 	sg_set_page(sg, page, size, offset);
5119dd441e4SAlex Elder 	ret = dma_map_sg(trans->gsi->dev, sg, 1, trans->direction);
5129dd441e4SAlex Elder 	if (!ret)
5139dd441e4SAlex Elder 		return -ENOMEM;
5149dd441e4SAlex Elder 
5153eeabea6SAlex Elder 	trans->used_count++;	/* Transaction now owns the (DMA mapped) page */
5169dd441e4SAlex Elder 
5179dd441e4SAlex Elder 	return 0;
5189dd441e4SAlex Elder }
5199dd441e4SAlex Elder 
5209dd441e4SAlex Elder /* Add an SKB transfer to a transaction.  No other TREs will be used. */
5219dd441e4SAlex Elder int gsi_trans_skb_add(struct gsi_trans *trans, struct sk_buff *skb)
5229dd441e4SAlex Elder {
5239dd441e4SAlex Elder 	struct scatterlist *sg = &trans->sgl[0];
5243eeabea6SAlex Elder 	u32 used_count;
5259dd441e4SAlex Elder 	int ret;
5269dd441e4SAlex Elder 
5273eeabea6SAlex Elder 	if (WARN_ON(trans->rsvd_count != 1))
5285bc55884SAlex Elder 		return -EINVAL;
5293eeabea6SAlex Elder 	if (WARN_ON(trans->used_count))
5305bc55884SAlex Elder 		return -EINVAL;
5319dd441e4SAlex Elder 
5329dd441e4SAlex Elder 	/* skb->len will not be 0 (checked early) */
5339dd441e4SAlex Elder 	ret = skb_to_sgvec(skb, sg, 0, skb->len);
5349dd441e4SAlex Elder 	if (ret < 0)
5359dd441e4SAlex Elder 		return ret;
5363eeabea6SAlex Elder 	used_count = ret;
5379dd441e4SAlex Elder 
5383eeabea6SAlex Elder 	ret = dma_map_sg(trans->gsi->dev, sg, used_count, trans->direction);
5399dd441e4SAlex Elder 	if (!ret)
5409dd441e4SAlex Elder 		return -ENOMEM;
5419dd441e4SAlex Elder 
5423eeabea6SAlex Elder 	/* Transaction now owns the (DMA mapped) skb */
5433eeabea6SAlex Elder 	trans->used_count += used_count;
5449dd441e4SAlex Elder 
5459dd441e4SAlex Elder 	return 0;
5469dd441e4SAlex Elder }
5479dd441e4SAlex Elder 
5489dd441e4SAlex Elder /* Compute the length/opcode value to use for a TRE */
5499dd441e4SAlex Elder static __le16 gsi_tre_len_opcode(enum ipa_cmd_opcode opcode, u32 len)
5509dd441e4SAlex Elder {
5519dd441e4SAlex Elder 	return opcode == IPA_CMD_NONE ? cpu_to_le16((u16)len)
5529dd441e4SAlex Elder 				      : cpu_to_le16((u16)opcode);
5539dd441e4SAlex Elder }
5549dd441e4SAlex Elder 
5559dd441e4SAlex Elder /* Compute the flags value to use for a given TRE */
5569dd441e4SAlex Elder static __le32 gsi_tre_flags(bool last_tre, bool bei, enum ipa_cmd_opcode opcode)
5579dd441e4SAlex Elder {
5589dd441e4SAlex Elder 	enum gsi_tre_type tre_type;
5599dd441e4SAlex Elder 	u32 tre_flags;
5609dd441e4SAlex Elder 
5619dd441e4SAlex Elder 	tre_type = opcode == IPA_CMD_NONE ? GSI_RE_XFER : GSI_RE_IMMD_CMD;
5629dd441e4SAlex Elder 	tre_flags = u32_encode_bits(tre_type, TRE_FLAGS_TYPE_FMASK);
5639dd441e4SAlex Elder 
5649dd441e4SAlex Elder 	/* Last TRE contains interrupt flags */
5659dd441e4SAlex Elder 	if (last_tre) {
5669dd441e4SAlex Elder 		/* All transactions end in a transfer completion interrupt */
5679dd441e4SAlex Elder 		tre_flags |= TRE_FLAGS_IEOT_FMASK;
5689dd441e4SAlex Elder 		/* Don't interrupt when outbound commands are acknowledged */
5699dd441e4SAlex Elder 		if (bei)
5709dd441e4SAlex Elder 			tre_flags |= TRE_FLAGS_BEI_FMASK;
5719dd441e4SAlex Elder 	} else {	/* All others indicate there's more to come */
5729dd441e4SAlex Elder 		tre_flags |= TRE_FLAGS_CHAIN_FMASK;
5739dd441e4SAlex Elder 	}
5749dd441e4SAlex Elder 
5759dd441e4SAlex Elder 	return cpu_to_le32(tre_flags);
5769dd441e4SAlex Elder }
5779dd441e4SAlex Elder 
5789dd441e4SAlex Elder static void gsi_trans_tre_fill(struct gsi_tre *dest_tre, dma_addr_t addr,
5799dd441e4SAlex Elder 			       u32 len, bool last_tre, bool bei,
5809dd441e4SAlex Elder 			       enum ipa_cmd_opcode opcode)
5819dd441e4SAlex Elder {
5829dd441e4SAlex Elder 	struct gsi_tre tre;
5839dd441e4SAlex Elder 
5849dd441e4SAlex Elder 	tre.addr = cpu_to_le64(addr);
5859dd441e4SAlex Elder 	tre.len_opcode = gsi_tre_len_opcode(opcode, len);
5869dd441e4SAlex Elder 	tre.reserved = 0;
5879dd441e4SAlex Elder 	tre.flags = gsi_tre_flags(last_tre, bei, opcode);
5889dd441e4SAlex Elder 
5899dd441e4SAlex Elder 	/* ARM64 can write 16 bytes as a unit with a single instruction.
5909dd441e4SAlex Elder 	 * Doing the assignment this way is an attempt to make that happen.
5919dd441e4SAlex Elder 	 */
5929dd441e4SAlex Elder 	*dest_tre = tre;
5939dd441e4SAlex Elder }
5949dd441e4SAlex Elder 
5959dd441e4SAlex Elder /**
5969dd441e4SAlex Elder  * __gsi_trans_commit() - Common GSI transaction commit code
5979dd441e4SAlex Elder  * @trans:	Transaction to commit
5989dd441e4SAlex Elder  * @ring_db:	Whether to tell the hardware about these queued transfers
5999dd441e4SAlex Elder  *
6009dd441e4SAlex Elder  * Formats channel ring TRE entries based on the content of the scatterlist.
6019dd441e4SAlex Elder  * Maps a transaction pointer to the last ring entry used for the transaction,
6029dd441e4SAlex Elder  * so it can be recovered when it completes.  Moves the transaction to the
6039dd441e4SAlex Elder  * pending list.  Finally, updates the channel ring pointer and optionally
6049dd441e4SAlex Elder  * rings the doorbell.
6059dd441e4SAlex Elder  */
6069dd441e4SAlex Elder static void __gsi_trans_commit(struct gsi_trans *trans, bool ring_db)
6079dd441e4SAlex Elder {
6089dd441e4SAlex Elder 	struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
6092295947bSAlex Elder 	struct gsi_ring *tre_ring = &channel->tre_ring;
6109dd441e4SAlex Elder 	enum ipa_cmd_opcode opcode = IPA_CMD_NONE;
6119dd441e4SAlex Elder 	bool bei = channel->toward_ipa;
6129dd441e4SAlex Elder 	struct gsi_tre *dest_tre;
6139dd441e4SAlex Elder 	struct scatterlist *sg;
6149dd441e4SAlex Elder 	u32 byte_count = 0;
6158797972aSAlex Elder 	u8 *cmd_opcode;
6169dd441e4SAlex Elder 	u32 avail;
6179dd441e4SAlex Elder 	u32 i;
6189dd441e4SAlex Elder 
6193eeabea6SAlex Elder 	WARN_ON(!trans->used_count);
6209dd441e4SAlex Elder 
6219dd441e4SAlex Elder 	/* Consume the entries.  If we cross the end of the ring while
6229dd441e4SAlex Elder 	 * filling them we'll switch to the beginning to finish.
6239dd441e4SAlex Elder 	 * If there is no info array we're doing a simple data
6249dd441e4SAlex Elder 	 * transfer request, whose opcode is IPA_CMD_NONE.
6259dd441e4SAlex Elder 	 */
6268797972aSAlex Elder 	cmd_opcode = channel->command ? &trans->cmd_opcode[0] : NULL;
6272295947bSAlex Elder 	avail = tre_ring->count - tre_ring->index % tre_ring->count;
6282295947bSAlex Elder 	dest_tre = gsi_ring_virt(tre_ring, tre_ring->index);
6293eeabea6SAlex Elder 	for_each_sg(trans->sgl, sg, trans->used_count, i) {
6303eeabea6SAlex Elder 		bool last_tre = i == trans->used_count - 1;
6319dd441e4SAlex Elder 		dma_addr_t addr = sg_dma_address(sg);
6329dd441e4SAlex Elder 		u32 len = sg_dma_len(sg);
6339dd441e4SAlex Elder 
6349dd441e4SAlex Elder 		byte_count += len;
6359dd441e4SAlex Elder 		if (!avail--)
6362295947bSAlex Elder 			dest_tre = gsi_ring_virt(tre_ring, 0);
6378797972aSAlex Elder 		if (cmd_opcode)
6388797972aSAlex Elder 			opcode = *cmd_opcode++;
6399dd441e4SAlex Elder 
6409dd441e4SAlex Elder 		gsi_trans_tre_fill(dest_tre, addr, len, last_tre, bei, opcode);
6419dd441e4SAlex Elder 		dest_tre++;
6429dd441e4SAlex Elder 	}
6438eec7831SAlex Elder 	/* Associate the TRE with the transaction */
6448eec7831SAlex Elder 	gsi_trans_map(trans, tre_ring->index);
6458eec7831SAlex Elder 
6463eeabea6SAlex Elder 	tre_ring->index += trans->used_count;
6479dd441e4SAlex Elder 
6489dd441e4SAlex Elder 	trans->len = byte_count;
6494e0f28e9SAlex Elder 	if (channel->toward_ipa)
6504e0f28e9SAlex Elder 		gsi_trans_tx_committed(trans);
6519dd441e4SAlex Elder 
652b63f507cSAlex Elder 	gsi_trans_move_committed(trans);
6539dd441e4SAlex Elder 
6549dd441e4SAlex Elder 	/* Ring doorbell if requested, or if all TREs are allocated */
6559dd441e4SAlex Elder 	if (ring_db || !atomic_read(&channel->trans_info.tre_avail)) {
6569dd441e4SAlex Elder 		/* Report what we're handing off to hardware for TX channels */
6579dd441e4SAlex Elder 		if (channel->toward_ipa)
658bcec9ecbSAlex Elder 			gsi_trans_tx_queued(trans);
659b63f507cSAlex Elder 		gsi_trans_move_pending(trans);
6609dd441e4SAlex Elder 		gsi_channel_doorbell(channel);
6619dd441e4SAlex Elder 	}
6629dd441e4SAlex Elder }
6639dd441e4SAlex Elder 
6649dd441e4SAlex Elder /* Commit a GSI transaction */
6659dd441e4SAlex Elder void gsi_trans_commit(struct gsi_trans *trans, bool ring_db)
6669dd441e4SAlex Elder {
6673eeabea6SAlex Elder 	if (trans->used_count)
6689dd441e4SAlex Elder 		__gsi_trans_commit(trans, ring_db);
6699dd441e4SAlex Elder 	else
6709dd441e4SAlex Elder 		gsi_trans_free(trans);
6719dd441e4SAlex Elder }
6729dd441e4SAlex Elder 
6739dd441e4SAlex Elder /* Commit a GSI transaction and wait for it to complete */
6749dd441e4SAlex Elder void gsi_trans_commit_wait(struct gsi_trans *trans)
6759dd441e4SAlex Elder {
6763eeabea6SAlex Elder 	if (!trans->used_count)
6779dd441e4SAlex Elder 		goto out_trans_free;
6789dd441e4SAlex Elder 
6799dd441e4SAlex Elder 	refcount_inc(&trans->refcount);
6809dd441e4SAlex Elder 
6819dd441e4SAlex Elder 	__gsi_trans_commit(trans, true);
6829dd441e4SAlex Elder 
6839dd441e4SAlex Elder 	wait_for_completion(&trans->completion);
6849dd441e4SAlex Elder 
6859dd441e4SAlex Elder out_trans_free:
6869dd441e4SAlex Elder 	gsi_trans_free(trans);
6879dd441e4SAlex Elder }
6889dd441e4SAlex Elder 
6899dd441e4SAlex Elder /* Process the completion of a transaction; called while polling */
6909dd441e4SAlex Elder void gsi_trans_complete(struct gsi_trans *trans)
6919dd441e4SAlex Elder {
6929dd441e4SAlex Elder 	/* If the entire SGL was mapped when added, unmap it now */
6939dd441e4SAlex Elder 	if (trans->direction != DMA_NONE)
6943eeabea6SAlex Elder 		dma_unmap_sg(trans->gsi->dev, trans->sgl, trans->used_count,
6959dd441e4SAlex Elder 			     trans->direction);
6969dd441e4SAlex Elder 
6979dd441e4SAlex Elder 	ipa_gsi_trans_complete(trans);
6989dd441e4SAlex Elder 
6999dd441e4SAlex Elder 	complete(&trans->completion);
7009dd441e4SAlex Elder 
7019dd441e4SAlex Elder 	gsi_trans_free(trans);
7029dd441e4SAlex Elder }
7039dd441e4SAlex Elder 
7049dd441e4SAlex Elder /* Cancel a channel's pending transactions */
7059dd441e4SAlex Elder void gsi_channel_trans_cancel_pending(struct gsi_channel *channel)
7069dd441e4SAlex Elder {
7079dd441e4SAlex Elder 	struct gsi_trans_info *trans_info = &channel->trans_info;
7089dd441e4SAlex Elder 	struct gsi_trans *trans;
7099dd441e4SAlex Elder 	bool cancelled;
7109dd441e4SAlex Elder 
7119dd441e4SAlex Elder 	/* channel->gsi->mutex is held by caller */
7129dd441e4SAlex Elder 	spin_lock_bh(&trans_info->spinlock);
7139dd441e4SAlex Elder 
7149dd441e4SAlex Elder 	cancelled = !list_empty(&trans_info->pending);
7159dd441e4SAlex Elder 	list_for_each_entry(trans, &trans_info->pending, links)
7169dd441e4SAlex Elder 		trans->cancelled = true;
7179dd441e4SAlex Elder 
7189dd441e4SAlex Elder 	list_splice_tail_init(&trans_info->pending, &trans_info->complete);
7199dd441e4SAlex Elder 
7209dd441e4SAlex Elder 	spin_unlock_bh(&trans_info->spinlock);
7219dd441e4SAlex Elder 
7229dd441e4SAlex Elder 	/* Schedule NAPI polling to complete the cancelled transactions */
7239dd441e4SAlex Elder 	if (cancelled)
7249dd441e4SAlex Elder 		napi_schedule(&channel->napi);
7259dd441e4SAlex Elder }
7269dd441e4SAlex Elder 
7279dd441e4SAlex Elder /* Issue a command to read a single byte from a channel */
7289dd441e4SAlex Elder int gsi_trans_read_byte(struct gsi *gsi, u32 channel_id, dma_addr_t addr)
7299dd441e4SAlex Elder {
7309dd441e4SAlex Elder 	struct gsi_channel *channel = &gsi->channel[channel_id];
7312295947bSAlex Elder 	struct gsi_ring *tre_ring = &channel->tre_ring;
7329dd441e4SAlex Elder 	struct gsi_trans_info *trans_info;
7339dd441e4SAlex Elder 	struct gsi_tre *dest_tre;
7349dd441e4SAlex Elder 
7359dd441e4SAlex Elder 	trans_info = &channel->trans_info;
7369dd441e4SAlex Elder 
7379dd441e4SAlex Elder 	/* First reserve the TRE, if possible */
7389dd441e4SAlex Elder 	if (!gsi_trans_tre_reserve(trans_info, 1))
7399dd441e4SAlex Elder 		return -EBUSY;
7409dd441e4SAlex Elder 
7417c0d97e4SJiang Jian 	/* Now fill the reserved TRE and tell the hardware */
7429dd441e4SAlex Elder 
7432295947bSAlex Elder 	dest_tre = gsi_ring_virt(tre_ring, tre_ring->index);
7449dd441e4SAlex Elder 	gsi_trans_tre_fill(dest_tre, addr, 1, true, false, IPA_CMD_NONE);
7459dd441e4SAlex Elder 
7462295947bSAlex Elder 	tre_ring->index++;
7479dd441e4SAlex Elder 	gsi_channel_doorbell(channel);
7489dd441e4SAlex Elder 
7499dd441e4SAlex Elder 	return 0;
7509dd441e4SAlex Elder }
7519dd441e4SAlex Elder 
7529dd441e4SAlex Elder /* Mark a gsi_trans_read_byte() request done */
7539dd441e4SAlex Elder void gsi_trans_read_byte_done(struct gsi *gsi, u32 channel_id)
7549dd441e4SAlex Elder {
7559dd441e4SAlex Elder 	struct gsi_channel *channel = &gsi->channel[channel_id];
7569dd441e4SAlex Elder 
7579dd441e4SAlex Elder 	gsi_trans_tre_release(&channel->trans_info, 1);
7589dd441e4SAlex Elder }
7599dd441e4SAlex Elder 
7609dd441e4SAlex Elder /* Initialize a channel's GSI transaction info */
7619dd441e4SAlex Elder int gsi_channel_trans_init(struct gsi *gsi, u32 channel_id)
7629dd441e4SAlex Elder {
7639dd441e4SAlex Elder 	struct gsi_channel *channel = &gsi->channel[channel_id];
76449200658SAlex Elder 	u32 tre_count = channel->tre_count;
7659dd441e4SAlex Elder 	struct gsi_trans_info *trans_info;
7669dd441e4SAlex Elder 	u32 tre_max;
7679dd441e4SAlex Elder 	int ret;
7689dd441e4SAlex Elder 
7699dd441e4SAlex Elder 	/* Ensure the size of a channel element is what's expected */
7709dd441e4SAlex Elder 	BUILD_BUG_ON(sizeof(struct gsi_tre) != GSI_RING_ELEMENT_SIZE);
7719dd441e4SAlex Elder 
7729dd441e4SAlex Elder 	trans_info = &channel->trans_info;
7739dd441e4SAlex Elder 
77449200658SAlex Elder 	/* The tre_avail field is what ultimately limits the number of
77549200658SAlex Elder 	 * outstanding transactions and their resources.  A transaction
77649200658SAlex Elder 	 * allocation succeeds only if the TREs available are sufficient
77749200658SAlex Elder 	 * for what the transaction might need.
7789dd441e4SAlex Elder 	 */
7799dd441e4SAlex Elder 	tre_max = gsi_channel_tre_max(channel->gsi, channel_id);
78049200658SAlex Elder 	atomic_set(&trans_info->tre_avail, tre_max);
7819dd441e4SAlex Elder 
78249200658SAlex Elder 	/* We can't use more TREs than the number available in the ring.
78349200658SAlex Elder 	 * This limits the number of transactions that can be outstanding.
78449200658SAlex Elder 	 * Worst case is one TRE per transaction (but we actually limit
78549200658SAlex Elder 	 * it to something a little less than that).  By allocating a
78649200658SAlex Elder 	 * power-of-two number of transactions we can use an index
78749200658SAlex Elder 	 * modulo that number to determine the next one that's free.
78849200658SAlex Elder 	 * Transactions are allocated one at a time.
78949200658SAlex Elder 	 */
79012382d11SAlex Elder 	trans_info->trans = kcalloc(tre_count, sizeof(*trans_info->trans),
79112382d11SAlex Elder 				    GFP_KERNEL);
79212382d11SAlex Elder 	if (!trans_info->trans)
79349200658SAlex Elder 		return -ENOMEM;
79441e2a2c0SAlex Elder 	trans_info->free_id = 0;	/* all modulo channel->tre_count */
79541e2a2c0SAlex Elder 	trans_info->allocated_id = 0;
796fc95d958SAlex Elder 	trans_info->committed_id = 0;
797eeff7c14SAlex Elder 	trans_info->pending_id = 0;
798*949cd0b5SAlex Elder 	trans_info->completed_id = 0;
79949200658SAlex Elder 
80049200658SAlex Elder 	/* A completion event contains a pointer to the TRE that caused
80149200658SAlex Elder 	 * the event (which will be the last one used by the transaction).
80249200658SAlex Elder 	 * Each entry in this map records the transaction associated
80349200658SAlex Elder 	 * with a corresponding completed TRE.
80449200658SAlex Elder 	 */
80549200658SAlex Elder 	trans_info->map = kcalloc(tre_count, sizeof(*trans_info->map),
80649200658SAlex Elder 				  GFP_KERNEL);
80749200658SAlex Elder 	if (!trans_info->map) {
80849200658SAlex Elder 		ret = -ENOMEM;
80949200658SAlex Elder 		goto err_trans_free;
81049200658SAlex Elder 	}
8119dd441e4SAlex Elder 
8129dd441e4SAlex Elder 	/* A transaction uses a scatterlist array to represent the data
8139dd441e4SAlex Elder 	 * transfers implemented by the transaction.  Each scatterlist
8149dd441e4SAlex Elder 	 * element is used to fill a single TRE when the transaction is
8159dd441e4SAlex Elder 	 * committed.  So we need as many scatterlist elements as the
8169dd441e4SAlex Elder 	 * maximum number of TREs that can be outstanding.
8179dd441e4SAlex Elder 	 */
8189dd441e4SAlex Elder 	ret = gsi_trans_pool_init(&trans_info->sg_pool,
8199dd441e4SAlex Elder 				  sizeof(struct scatterlist),
82088e03057SAlex Elder 				  tre_max, channel->trans_tre_max);
8219dd441e4SAlex Elder 	if (ret)
82249200658SAlex Elder 		goto err_map_free;
8239dd441e4SAlex Elder 
8249dd441e4SAlex Elder 	spin_lock_init(&trans_info->spinlock);
8259dd441e4SAlex Elder 	INIT_LIST_HEAD(&trans_info->alloc);
826b63f507cSAlex Elder 	INIT_LIST_HEAD(&trans_info->committed);
8279dd441e4SAlex Elder 	INIT_LIST_HEAD(&trans_info->pending);
8289dd441e4SAlex Elder 	INIT_LIST_HEAD(&trans_info->complete);
8299dd441e4SAlex Elder 	INIT_LIST_HEAD(&trans_info->polled);
8309dd441e4SAlex Elder 
8319dd441e4SAlex Elder 	return 0;
8329dd441e4SAlex Elder 
83349200658SAlex Elder err_map_free:
8349dd441e4SAlex Elder 	kfree(trans_info->map);
83549200658SAlex Elder err_trans_free:
83612382d11SAlex Elder 	kfree(trans_info->trans);
8379dd441e4SAlex Elder 
8389dd441e4SAlex Elder 	dev_err(gsi->dev, "error %d initializing channel %u transactions\n",
8399dd441e4SAlex Elder 		ret, channel_id);
8409dd441e4SAlex Elder 
8419dd441e4SAlex Elder 	return ret;
8429dd441e4SAlex Elder }
8439dd441e4SAlex Elder 
8449dd441e4SAlex Elder /* Inverse of gsi_channel_trans_init() */
8459dd441e4SAlex Elder void gsi_channel_trans_exit(struct gsi_channel *channel)
8469dd441e4SAlex Elder {
8479dd441e4SAlex Elder 	struct gsi_trans_info *trans_info = &channel->trans_info;
8489dd441e4SAlex Elder 
8499dd441e4SAlex Elder 	gsi_trans_pool_exit(&trans_info->sg_pool);
85012382d11SAlex Elder 	kfree(trans_info->trans);
8519dd441e4SAlex Elder 	kfree(trans_info->map);
8529dd441e4SAlex Elder }
853