1 /* 2 * AT86RF230/RF231 driver 3 * 4 * Copyright (C) 2009-2012 Siemens AG 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 8 * as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * Written by: 16 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> 17 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com> 18 * Alexander Aring <aar@pengutronix.de> 19 */ 20 #include <linux/kernel.h> 21 #include <linux/module.h> 22 #include <linux/interrupt.h> 23 #include <linux/irq.h> 24 #include <linux/gpio.h> 25 #include <linux/delay.h> 26 #include <linux/spinlock.h> 27 #include <linux/spi/spi.h> 28 #include <linux/spi/at86rf230.h> 29 #include <linux/regmap.h> 30 #include <linux/skbuff.h> 31 #include <linux/of_gpio.h> 32 #include <linux/ieee802154.h> 33 34 #include <net/mac802154.h> 35 #include <net/cfg802154.h> 36 37 struct at86rf230_local; 38 /* at86rf2xx chip depend data. 39 * All timings are in us. 40 */ 41 struct at86rf2xx_chip_data { 42 u16 t_sleep_cycle; 43 u16 t_channel_switch; 44 u16 t_reset_to_off; 45 u16 t_off_to_aack; 46 u16 t_off_to_tx_on; 47 u16 t_frame; 48 u16 t_p_ack; 49 /* completion timeout for tx in msecs */ 50 u16 t_tx_timeout; 51 int rssi_base_val; 52 53 int (*set_channel)(struct at86rf230_local *, u8, u8); 54 int (*get_desense_steps)(struct at86rf230_local *, s32); 55 }; 56 57 #define AT86RF2XX_MAX_BUF (127 + 3) 58 59 struct at86rf230_state_change { 60 struct at86rf230_local *lp; 61 62 struct spi_message msg; 63 struct spi_transfer trx; 64 u8 buf[AT86RF2XX_MAX_BUF]; 65 66 void (*complete)(void *context); 67 u8 from_state; 68 u8 to_state; 69 70 bool irq_enable; 71 }; 72 73 struct at86rf230_local { 74 struct spi_device *spi; 75 76 struct ieee802154_hw *hw; 77 struct at86rf2xx_chip_data *data; 78 struct regmap *regmap; 79 80 struct completion state_complete; 81 struct at86rf230_state_change state; 82 83 struct at86rf230_state_change irq; 84 85 bool tx_aret; 86 s8 max_frame_retries; 87 bool is_tx; 88 /* spinlock for is_tx protection */ 89 spinlock_t lock; 90 struct sk_buff *tx_skb; 91 struct at86rf230_state_change tx; 92 }; 93 94 #define RG_TRX_STATUS (0x01) 95 #define SR_TRX_STATUS 0x01, 0x1f, 0 96 #define SR_RESERVED_01_3 0x01, 0x20, 5 97 #define SR_CCA_STATUS 0x01, 0x40, 6 98 #define SR_CCA_DONE 0x01, 0x80, 7 99 #define RG_TRX_STATE (0x02) 100 #define SR_TRX_CMD 0x02, 0x1f, 0 101 #define SR_TRAC_STATUS 0x02, 0xe0, 5 102 #define RG_TRX_CTRL_0 (0x03) 103 #define SR_CLKM_CTRL 0x03, 0x07, 0 104 #define SR_CLKM_SHA_SEL 0x03, 0x08, 3 105 #define SR_PAD_IO_CLKM 0x03, 0x30, 4 106 #define SR_PAD_IO 0x03, 0xc0, 6 107 #define RG_TRX_CTRL_1 (0x04) 108 #define SR_IRQ_POLARITY 0x04, 0x01, 0 109 #define SR_IRQ_MASK_MODE 0x04, 0x02, 1 110 #define SR_SPI_CMD_MODE 0x04, 0x0c, 2 111 #define SR_RX_BL_CTRL 0x04, 0x10, 4 112 #define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5 113 #define SR_IRQ_2_EXT_EN 0x04, 0x40, 6 114 #define SR_PA_EXT_EN 0x04, 0x80, 7 115 #define RG_PHY_TX_PWR (0x05) 116 #define SR_TX_PWR 0x05, 0x0f, 0 117 #define SR_PA_LT 0x05, 0x30, 4 118 #define SR_PA_BUF_LT 0x05, 0xc0, 6 119 #define RG_PHY_RSSI (0x06) 120 #define SR_RSSI 0x06, 0x1f, 0 121 #define SR_RND_VALUE 0x06, 0x60, 5 122 #define SR_RX_CRC_VALID 0x06, 0x80, 7 123 #define RG_PHY_ED_LEVEL (0x07) 124 #define SR_ED_LEVEL 0x07, 0xff, 0 125 #define RG_PHY_CC_CCA (0x08) 126 #define SR_CHANNEL 0x08, 0x1f, 0 127 #define SR_CCA_MODE 0x08, 0x60, 5 128 #define SR_CCA_REQUEST 0x08, 0x80, 7 129 #define RG_CCA_THRES (0x09) 130 #define SR_CCA_ED_THRES 0x09, 0x0f, 0 131 #define SR_RESERVED_09_1 0x09, 0xf0, 4 132 #define RG_RX_CTRL (0x0a) 133 #define SR_PDT_THRES 0x0a, 0x0f, 0 134 #define SR_RESERVED_0a_1 0x0a, 0xf0, 4 135 #define RG_SFD_VALUE (0x0b) 136 #define SR_SFD_VALUE 0x0b, 0xff, 0 137 #define RG_TRX_CTRL_2 (0x0c) 138 #define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0 139 #define SR_SUB_MODE 0x0c, 0x04, 2 140 #define SR_BPSK_QPSK 0x0c, 0x08, 3 141 #define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4 142 #define SR_RESERVED_0c_5 0x0c, 0x60, 5 143 #define SR_RX_SAFE_MODE 0x0c, 0x80, 7 144 #define RG_ANT_DIV (0x0d) 145 #define SR_ANT_CTRL 0x0d, 0x03, 0 146 #define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2 147 #define SR_ANT_DIV_EN 0x0d, 0x08, 3 148 #define SR_RESERVED_0d_2 0x0d, 0x70, 4 149 #define SR_ANT_SEL 0x0d, 0x80, 7 150 #define RG_IRQ_MASK (0x0e) 151 #define SR_IRQ_MASK 0x0e, 0xff, 0 152 #define RG_IRQ_STATUS (0x0f) 153 #define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0 154 #define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1 155 #define SR_IRQ_2_RX_START 0x0f, 0x04, 2 156 #define SR_IRQ_3_TRX_END 0x0f, 0x08, 3 157 #define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4 158 #define SR_IRQ_5_AMI 0x0f, 0x20, 5 159 #define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6 160 #define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7 161 #define RG_VREG_CTRL (0x10) 162 #define SR_RESERVED_10_6 0x10, 0x03, 0 163 #define SR_DVDD_OK 0x10, 0x04, 2 164 #define SR_DVREG_EXT 0x10, 0x08, 3 165 #define SR_RESERVED_10_3 0x10, 0x30, 4 166 #define SR_AVDD_OK 0x10, 0x40, 6 167 #define SR_AVREG_EXT 0x10, 0x80, 7 168 #define RG_BATMON (0x11) 169 #define SR_BATMON_VTH 0x11, 0x0f, 0 170 #define SR_BATMON_HR 0x11, 0x10, 4 171 #define SR_BATMON_OK 0x11, 0x20, 5 172 #define SR_RESERVED_11_1 0x11, 0xc0, 6 173 #define RG_XOSC_CTRL (0x12) 174 #define SR_XTAL_TRIM 0x12, 0x0f, 0 175 #define SR_XTAL_MODE 0x12, 0xf0, 4 176 #define RG_RX_SYN (0x15) 177 #define SR_RX_PDT_LEVEL 0x15, 0x0f, 0 178 #define SR_RESERVED_15_2 0x15, 0x70, 4 179 #define SR_RX_PDT_DIS 0x15, 0x80, 7 180 #define RG_XAH_CTRL_1 (0x17) 181 #define SR_RESERVED_17_8 0x17, 0x01, 0 182 #define SR_AACK_PROM_MODE 0x17, 0x02, 1 183 #define SR_AACK_ACK_TIME 0x17, 0x04, 2 184 #define SR_RESERVED_17_5 0x17, 0x08, 3 185 #define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4 186 #define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5 187 #define SR_CSMA_LBT_MODE 0x17, 0x40, 6 188 #define SR_RESERVED_17_1 0x17, 0x80, 7 189 #define RG_FTN_CTRL (0x18) 190 #define SR_RESERVED_18_2 0x18, 0x7f, 0 191 #define SR_FTN_START 0x18, 0x80, 7 192 #define RG_PLL_CF (0x1a) 193 #define SR_RESERVED_1a_2 0x1a, 0x7f, 0 194 #define SR_PLL_CF_START 0x1a, 0x80, 7 195 #define RG_PLL_DCU (0x1b) 196 #define SR_RESERVED_1b_3 0x1b, 0x3f, 0 197 #define SR_RESERVED_1b_2 0x1b, 0x40, 6 198 #define SR_PLL_DCU_START 0x1b, 0x80, 7 199 #define RG_PART_NUM (0x1c) 200 #define SR_PART_NUM 0x1c, 0xff, 0 201 #define RG_VERSION_NUM (0x1d) 202 #define SR_VERSION_NUM 0x1d, 0xff, 0 203 #define RG_MAN_ID_0 (0x1e) 204 #define SR_MAN_ID_0 0x1e, 0xff, 0 205 #define RG_MAN_ID_1 (0x1f) 206 #define SR_MAN_ID_1 0x1f, 0xff, 0 207 #define RG_SHORT_ADDR_0 (0x20) 208 #define SR_SHORT_ADDR_0 0x20, 0xff, 0 209 #define RG_SHORT_ADDR_1 (0x21) 210 #define SR_SHORT_ADDR_1 0x21, 0xff, 0 211 #define RG_PAN_ID_0 (0x22) 212 #define SR_PAN_ID_0 0x22, 0xff, 0 213 #define RG_PAN_ID_1 (0x23) 214 #define SR_PAN_ID_1 0x23, 0xff, 0 215 #define RG_IEEE_ADDR_0 (0x24) 216 #define SR_IEEE_ADDR_0 0x24, 0xff, 0 217 #define RG_IEEE_ADDR_1 (0x25) 218 #define SR_IEEE_ADDR_1 0x25, 0xff, 0 219 #define RG_IEEE_ADDR_2 (0x26) 220 #define SR_IEEE_ADDR_2 0x26, 0xff, 0 221 #define RG_IEEE_ADDR_3 (0x27) 222 #define SR_IEEE_ADDR_3 0x27, 0xff, 0 223 #define RG_IEEE_ADDR_4 (0x28) 224 #define SR_IEEE_ADDR_4 0x28, 0xff, 0 225 #define RG_IEEE_ADDR_5 (0x29) 226 #define SR_IEEE_ADDR_5 0x29, 0xff, 0 227 #define RG_IEEE_ADDR_6 (0x2a) 228 #define SR_IEEE_ADDR_6 0x2a, 0xff, 0 229 #define RG_IEEE_ADDR_7 (0x2b) 230 #define SR_IEEE_ADDR_7 0x2b, 0xff, 0 231 #define RG_XAH_CTRL_0 (0x2c) 232 #define SR_SLOTTED_OPERATION 0x2c, 0x01, 0 233 #define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1 234 #define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4 235 #define RG_CSMA_SEED_0 (0x2d) 236 #define SR_CSMA_SEED_0 0x2d, 0xff, 0 237 #define RG_CSMA_SEED_1 (0x2e) 238 #define SR_CSMA_SEED_1 0x2e, 0x07, 0 239 #define SR_AACK_I_AM_COORD 0x2e, 0x08, 3 240 #define SR_AACK_DIS_ACK 0x2e, 0x10, 4 241 #define SR_AACK_SET_PD 0x2e, 0x20, 5 242 #define SR_AACK_FVN_MODE 0x2e, 0xc0, 6 243 #define RG_CSMA_BE (0x2f) 244 #define SR_MIN_BE 0x2f, 0x0f, 0 245 #define SR_MAX_BE 0x2f, 0xf0, 4 246 247 #define CMD_REG 0x80 248 #define CMD_REG_MASK 0x3f 249 #define CMD_WRITE 0x40 250 #define CMD_FB 0x20 251 252 #define IRQ_BAT_LOW (1 << 7) 253 #define IRQ_TRX_UR (1 << 6) 254 #define IRQ_AMI (1 << 5) 255 #define IRQ_CCA_ED (1 << 4) 256 #define IRQ_TRX_END (1 << 3) 257 #define IRQ_RX_START (1 << 2) 258 #define IRQ_PLL_UNL (1 << 1) 259 #define IRQ_PLL_LOCK (1 << 0) 260 261 #define IRQ_ACTIVE_HIGH 0 262 #define IRQ_ACTIVE_LOW 1 263 264 #define STATE_P_ON 0x00 /* BUSY */ 265 #define STATE_BUSY_RX 0x01 266 #define STATE_BUSY_TX 0x02 267 #define STATE_FORCE_TRX_OFF 0x03 268 #define STATE_FORCE_TX_ON 0x04 /* IDLE */ 269 /* 0x05 */ /* INVALID_PARAMETER */ 270 #define STATE_RX_ON 0x06 271 /* 0x07 */ /* SUCCESS */ 272 #define STATE_TRX_OFF 0x08 273 #define STATE_TX_ON 0x09 274 /* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */ 275 #define STATE_SLEEP 0x0F 276 #define STATE_PREP_DEEP_SLEEP 0x10 277 #define STATE_BUSY_RX_AACK 0x11 278 #define STATE_BUSY_TX_ARET 0x12 279 #define STATE_RX_AACK_ON 0x16 280 #define STATE_TX_ARET_ON 0x19 281 #define STATE_RX_ON_NOCLK 0x1C 282 #define STATE_RX_AACK_ON_NOCLK 0x1D 283 #define STATE_BUSY_RX_AACK_NOCLK 0x1E 284 #define STATE_TRANSITION_IN_PROGRESS 0x1F 285 286 #define AT86RF2XX_NUMREGS 0x3F 287 288 static void 289 at86rf230_async_state_change(struct at86rf230_local *lp, 290 struct at86rf230_state_change *ctx, 291 const u8 state, void (*complete)(void *context), 292 const bool irq_enable); 293 294 static inline int 295 __at86rf230_write(struct at86rf230_local *lp, 296 unsigned int addr, unsigned int data) 297 { 298 return regmap_write(lp->regmap, addr, data); 299 } 300 301 static inline int 302 __at86rf230_read(struct at86rf230_local *lp, 303 unsigned int addr, unsigned int *data) 304 { 305 return regmap_read(lp->regmap, addr, data); 306 } 307 308 static inline int 309 at86rf230_read_subreg(struct at86rf230_local *lp, 310 unsigned int addr, unsigned int mask, 311 unsigned int shift, unsigned int *data) 312 { 313 int rc; 314 315 rc = __at86rf230_read(lp, addr, data); 316 if (rc > 0) 317 *data = (*data & mask) >> shift; 318 319 return rc; 320 } 321 322 static inline int 323 at86rf230_write_subreg(struct at86rf230_local *lp, 324 unsigned int addr, unsigned int mask, 325 unsigned int shift, unsigned int data) 326 { 327 return regmap_update_bits(lp->regmap, addr, mask, data << shift); 328 } 329 330 static bool 331 at86rf230_reg_writeable(struct device *dev, unsigned int reg) 332 { 333 switch (reg) { 334 case RG_TRX_STATE: 335 case RG_TRX_CTRL_0: 336 case RG_TRX_CTRL_1: 337 case RG_PHY_TX_PWR: 338 case RG_PHY_ED_LEVEL: 339 case RG_PHY_CC_CCA: 340 case RG_CCA_THRES: 341 case RG_RX_CTRL: 342 case RG_SFD_VALUE: 343 case RG_TRX_CTRL_2: 344 case RG_ANT_DIV: 345 case RG_IRQ_MASK: 346 case RG_VREG_CTRL: 347 case RG_BATMON: 348 case RG_XOSC_CTRL: 349 case RG_RX_SYN: 350 case RG_XAH_CTRL_1: 351 case RG_FTN_CTRL: 352 case RG_PLL_CF: 353 case RG_PLL_DCU: 354 case RG_SHORT_ADDR_0: 355 case RG_SHORT_ADDR_1: 356 case RG_PAN_ID_0: 357 case RG_PAN_ID_1: 358 case RG_IEEE_ADDR_0: 359 case RG_IEEE_ADDR_1: 360 case RG_IEEE_ADDR_2: 361 case RG_IEEE_ADDR_3: 362 case RG_IEEE_ADDR_4: 363 case RG_IEEE_ADDR_5: 364 case RG_IEEE_ADDR_6: 365 case RG_IEEE_ADDR_7: 366 case RG_XAH_CTRL_0: 367 case RG_CSMA_SEED_0: 368 case RG_CSMA_SEED_1: 369 case RG_CSMA_BE: 370 return true; 371 default: 372 return false; 373 } 374 } 375 376 static bool 377 at86rf230_reg_readable(struct device *dev, unsigned int reg) 378 { 379 bool rc; 380 381 /* all writeable are also readable */ 382 rc = at86rf230_reg_writeable(dev, reg); 383 if (rc) 384 return rc; 385 386 /* readonly regs */ 387 switch (reg) { 388 case RG_TRX_STATUS: 389 case RG_PHY_RSSI: 390 case RG_IRQ_STATUS: 391 case RG_PART_NUM: 392 case RG_VERSION_NUM: 393 case RG_MAN_ID_1: 394 case RG_MAN_ID_0: 395 return true; 396 default: 397 return false; 398 } 399 } 400 401 static bool 402 at86rf230_reg_volatile(struct device *dev, unsigned int reg) 403 { 404 /* can be changed during runtime */ 405 switch (reg) { 406 case RG_TRX_STATUS: 407 case RG_TRX_STATE: 408 case RG_PHY_RSSI: 409 case RG_PHY_ED_LEVEL: 410 case RG_IRQ_STATUS: 411 case RG_VREG_CTRL: 412 return true; 413 default: 414 return false; 415 } 416 } 417 418 static bool 419 at86rf230_reg_precious(struct device *dev, unsigned int reg) 420 { 421 /* don't clear irq line on read */ 422 switch (reg) { 423 case RG_IRQ_STATUS: 424 return true; 425 default: 426 return false; 427 } 428 } 429 430 static struct regmap_config at86rf230_regmap_spi_config = { 431 .reg_bits = 8, 432 .val_bits = 8, 433 .write_flag_mask = CMD_REG | CMD_WRITE, 434 .read_flag_mask = CMD_REG, 435 .cache_type = REGCACHE_RBTREE, 436 .max_register = AT86RF2XX_NUMREGS, 437 .writeable_reg = at86rf230_reg_writeable, 438 .readable_reg = at86rf230_reg_readable, 439 .volatile_reg = at86rf230_reg_volatile, 440 .precious_reg = at86rf230_reg_precious, 441 }; 442 443 static void 444 at86rf230_async_error_recover(void *context) 445 { 446 struct at86rf230_state_change *ctx = context; 447 struct at86rf230_local *lp = ctx->lp; 448 449 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL, false); 450 ieee802154_wake_queue(lp->hw); 451 } 452 453 static void 454 at86rf230_async_error(struct at86rf230_local *lp, 455 struct at86rf230_state_change *ctx, int rc) 456 { 457 dev_err(&lp->spi->dev, "spi_async error %d\n", rc); 458 459 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF, 460 at86rf230_async_error_recover, false); 461 } 462 463 /* Generic function to get some register value in async mode */ 464 static void 465 at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg, 466 struct at86rf230_state_change *ctx, 467 void (*complete)(void *context), 468 const bool irq_enable) 469 { 470 int rc; 471 472 u8 *tx_buf = ctx->buf; 473 474 tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG; 475 ctx->trx.len = 2; 476 ctx->msg.complete = complete; 477 ctx->irq_enable = irq_enable; 478 rc = spi_async(lp->spi, &ctx->msg); 479 if (rc) { 480 if (irq_enable) 481 enable_irq(lp->spi->irq); 482 483 at86rf230_async_error(lp, ctx, rc); 484 } 485 } 486 487 static void 488 at86rf230_async_state_assert(void *context) 489 { 490 struct at86rf230_state_change *ctx = context; 491 struct at86rf230_local *lp = ctx->lp; 492 const u8 *buf = ctx->buf; 493 const u8 trx_state = buf[1] & 0x1f; 494 495 /* Assert state change */ 496 if (trx_state != ctx->to_state) { 497 /* Special handling if transceiver state is in 498 * STATE_BUSY_RX_AACK and a SHR was detected. 499 */ 500 if (trx_state == STATE_BUSY_RX_AACK) { 501 /* Undocumented race condition. If we send a state 502 * change to STATE_RX_AACK_ON the transceiver could 503 * change his state automatically to STATE_BUSY_RX_AACK 504 * if a SHR was detected. This is not an error, but we 505 * can't assert this. 506 */ 507 if (ctx->to_state == STATE_RX_AACK_ON) 508 goto done; 509 510 /* If we change to STATE_TX_ON without forcing and 511 * transceiver state is STATE_BUSY_RX_AACK, we wait 512 * 'tFrame + tPAck' receiving time. In this time the 513 * PDU should be received. If the transceiver is still 514 * in STATE_BUSY_RX_AACK, we run a force state change 515 * to STATE_TX_ON. This is a timeout handling, if the 516 * transceiver stucks in STATE_BUSY_RX_AACK. 517 */ 518 if (ctx->to_state == STATE_TX_ON) { 519 at86rf230_async_state_change(lp, ctx, 520 STATE_FORCE_TX_ON, 521 ctx->complete, 522 ctx->irq_enable); 523 return; 524 } 525 } 526 527 528 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n", 529 ctx->from_state, ctx->to_state, trx_state); 530 } 531 532 done: 533 if (ctx->complete) 534 ctx->complete(context); 535 } 536 537 /* Do state change timing delay. */ 538 static void 539 at86rf230_async_state_delay(void *context) 540 { 541 struct at86rf230_state_change *ctx = context; 542 struct at86rf230_local *lp = ctx->lp; 543 struct at86rf2xx_chip_data *c = lp->data; 544 bool force = false; 545 546 /* The force state changes are will show as normal states in the 547 * state status subregister. We change the to_state to the 548 * corresponding one and remember if it was a force change, this 549 * differs if we do a state change from STATE_BUSY_RX_AACK. 550 */ 551 switch (ctx->to_state) { 552 case STATE_FORCE_TX_ON: 553 ctx->to_state = STATE_TX_ON; 554 force = true; 555 break; 556 case STATE_FORCE_TRX_OFF: 557 ctx->to_state = STATE_TRX_OFF; 558 force = true; 559 break; 560 default: 561 break; 562 } 563 564 switch (ctx->from_state) { 565 case STATE_TRX_OFF: 566 switch (ctx->to_state) { 567 case STATE_RX_AACK_ON: 568 usleep_range(c->t_off_to_aack, c->t_off_to_aack + 10); 569 goto change; 570 case STATE_TX_ON: 571 usleep_range(c->t_off_to_tx_on, 572 c->t_off_to_tx_on + 10); 573 goto change; 574 default: 575 break; 576 } 577 break; 578 case STATE_BUSY_RX_AACK: 579 switch (ctx->to_state) { 580 case STATE_TX_ON: 581 /* Wait for worst case receiving time if we 582 * didn't make a force change from BUSY_RX_AACK 583 * to TX_ON. 584 */ 585 if (!force) { 586 usleep_range(c->t_frame + c->t_p_ack, 587 c->t_frame + c->t_p_ack + 1000); 588 goto change; 589 } 590 break; 591 default: 592 break; 593 } 594 break; 595 /* Default value, means RESET state */ 596 case STATE_P_ON: 597 switch (ctx->to_state) { 598 case STATE_TRX_OFF: 599 usleep_range(c->t_reset_to_off, c->t_reset_to_off + 10); 600 goto change; 601 default: 602 break; 603 } 604 break; 605 default: 606 break; 607 } 608 609 /* Default delay is 1us in the most cases */ 610 udelay(1); 611 612 change: 613 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, 614 at86rf230_async_state_assert, 615 ctx->irq_enable); 616 } 617 618 static void 619 at86rf230_async_state_change_start(void *context) 620 { 621 struct at86rf230_state_change *ctx = context; 622 struct at86rf230_local *lp = ctx->lp; 623 u8 *buf = ctx->buf; 624 const u8 trx_state = buf[1] & 0x1f; 625 int rc; 626 627 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */ 628 if (trx_state == STATE_TRANSITION_IN_PROGRESS) { 629 udelay(1); 630 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, 631 at86rf230_async_state_change_start, 632 ctx->irq_enable); 633 return; 634 } 635 636 /* Check if we already are in the state which we change in */ 637 if (trx_state == ctx->to_state) { 638 if (ctx->complete) 639 ctx->complete(context); 640 return; 641 } 642 643 /* Set current state to the context of state change */ 644 ctx->from_state = trx_state; 645 646 /* Going into the next step for a state change which do a timing 647 * relevant delay. 648 */ 649 buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE; 650 buf[1] = ctx->to_state; 651 ctx->trx.len = 2; 652 ctx->msg.complete = at86rf230_async_state_delay; 653 rc = spi_async(lp->spi, &ctx->msg); 654 if (rc) { 655 if (ctx->irq_enable) 656 enable_irq(lp->spi->irq); 657 658 at86rf230_async_error(lp, &lp->state, rc); 659 } 660 } 661 662 static void 663 at86rf230_async_state_change(struct at86rf230_local *lp, 664 struct at86rf230_state_change *ctx, 665 const u8 state, void (*complete)(void *context), 666 const bool irq_enable) 667 { 668 /* Initialization for the state change context */ 669 ctx->to_state = state; 670 ctx->complete = complete; 671 ctx->irq_enable = irq_enable; 672 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, 673 at86rf230_async_state_change_start, 674 irq_enable); 675 } 676 677 static void 678 at86rf230_sync_state_change_complete(void *context) 679 { 680 struct at86rf230_state_change *ctx = context; 681 struct at86rf230_local *lp = ctx->lp; 682 683 complete(&lp->state_complete); 684 } 685 686 /* This function do a sync framework above the async state change. 687 * Some callbacks of the IEEE 802.15.4 driver interface need to be 688 * handled synchronously. 689 */ 690 static int 691 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state) 692 { 693 int rc; 694 695 at86rf230_async_state_change(lp, &lp->state, state, 696 at86rf230_sync_state_change_complete, 697 false); 698 699 rc = wait_for_completion_timeout(&lp->state_complete, 700 msecs_to_jiffies(100)); 701 if (!rc) { 702 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT); 703 return -ETIMEDOUT; 704 } 705 706 return 0; 707 } 708 709 static void 710 at86rf230_tx_complete(void *context) 711 { 712 struct at86rf230_state_change *ctx = context; 713 struct at86rf230_local *lp = ctx->lp; 714 struct sk_buff *skb = lp->tx_skb; 715 716 enable_irq(lp->spi->irq); 717 718 if (lp->max_frame_retries <= 0) 719 ieee802154_xmit_complete(lp->hw, skb, true); 720 else 721 ieee802154_xmit_complete(lp->hw, skb, false); 722 } 723 724 static void 725 at86rf230_tx_on(void *context) 726 { 727 struct at86rf230_state_change *ctx = context; 728 struct at86rf230_local *lp = ctx->lp; 729 730 at86rf230_async_state_change(lp, &lp->irq, STATE_RX_AACK_ON, 731 at86rf230_tx_complete, true); 732 } 733 734 static void 735 at86rf230_tx_trac_error(void *context) 736 { 737 struct at86rf230_state_change *ctx = context; 738 struct at86rf230_local *lp = ctx->lp; 739 740 at86rf230_async_state_change(lp, ctx, STATE_TX_ON, 741 at86rf230_tx_on, true); 742 } 743 744 static void 745 at86rf230_tx_trac_check(void *context) 746 { 747 struct at86rf230_state_change *ctx = context; 748 struct at86rf230_local *lp = ctx->lp; 749 const u8 *buf = ctx->buf; 750 const u8 trac = (buf[1] & 0xe0) >> 5; 751 752 /* If trac status is different than zero we need to do a state change 753 * to STATE_FORCE_TRX_OFF then STATE_TX_ON to recover the transceiver 754 * state to TX_ON. 755 */ 756 if (trac) { 757 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF, 758 at86rf230_tx_trac_error, true); 759 return; 760 } 761 762 at86rf230_tx_on(context); 763 } 764 765 766 static void 767 at86rf230_tx_trac_status(void *context) 768 { 769 struct at86rf230_state_change *ctx = context; 770 struct at86rf230_local *lp = ctx->lp; 771 772 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx, 773 at86rf230_tx_trac_check, true); 774 } 775 776 static void 777 at86rf230_rx(struct at86rf230_local *lp, 778 const u8 *data, const u8 len, const u8 lqi) 779 { 780 struct sk_buff *skb; 781 u8 rx_local_buf[AT86RF2XX_MAX_BUF]; 782 783 memcpy(rx_local_buf, data, len); 784 enable_irq(lp->spi->irq); 785 786 skb = dev_alloc_skb(IEEE802154_MTU); 787 if (!skb) { 788 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n"); 789 return; 790 } 791 792 memcpy(skb_put(skb, len), rx_local_buf, len); 793 ieee802154_rx_irqsafe(lp->hw, skb, lqi); 794 } 795 796 static void 797 at86rf230_rx_read_frame_complete(void *context) 798 { 799 struct at86rf230_state_change *ctx = context; 800 struct at86rf230_local *lp = ctx->lp; 801 const u8 *buf = lp->irq.buf; 802 u8 len = buf[1]; 803 804 if (!ieee802154_is_valid_psdu_len(len)) { 805 dev_vdbg(&lp->spi->dev, "corrupted frame received\n"); 806 len = IEEE802154_MTU; 807 } 808 809 at86rf230_rx(lp, buf + 2, len, buf[2 + len]); 810 } 811 812 static void 813 at86rf230_rx_read_frame(struct at86rf230_local *lp) 814 { 815 int rc; 816 817 u8 *buf = lp->irq.buf; 818 819 buf[0] = CMD_FB; 820 lp->irq.trx.len = AT86RF2XX_MAX_BUF; 821 lp->irq.msg.complete = at86rf230_rx_read_frame_complete; 822 rc = spi_async(lp->spi, &lp->irq.msg); 823 if (rc) { 824 enable_irq(lp->spi->irq); 825 at86rf230_async_error(lp, &lp->irq, rc); 826 } 827 } 828 829 static void 830 at86rf230_rx_trac_check(void *context) 831 { 832 struct at86rf230_state_change *ctx = context; 833 struct at86rf230_local *lp = ctx->lp; 834 835 /* Possible check on trac status here. This could be useful to make 836 * some stats why receive is failed. Not used at the moment, but it's 837 * maybe timing relevant. Datasheet doesn't say anything about this. 838 * The programming guide say do it so. 839 */ 840 841 at86rf230_rx_read_frame(lp); 842 } 843 844 static void 845 at86rf230_irq_trx_end(struct at86rf230_local *lp) 846 { 847 spin_lock(&lp->lock); 848 if (lp->is_tx) { 849 lp->is_tx = 0; 850 spin_unlock(&lp->lock); 851 852 if (lp->tx_aret) 853 at86rf230_async_state_change(lp, &lp->irq, 854 STATE_FORCE_TX_ON, 855 at86rf230_tx_trac_status, 856 true); 857 else 858 at86rf230_async_state_change(lp, &lp->irq, 859 STATE_RX_AACK_ON, 860 at86rf230_tx_complete, 861 true); 862 } else { 863 spin_unlock(&lp->lock); 864 at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq, 865 at86rf230_rx_trac_check, true); 866 } 867 } 868 869 static void 870 at86rf230_irq_status(void *context) 871 { 872 struct at86rf230_state_change *ctx = context; 873 struct at86rf230_local *lp = ctx->lp; 874 const u8 *buf = lp->irq.buf; 875 const u8 irq = buf[1]; 876 877 if (irq & IRQ_TRX_END) { 878 at86rf230_irq_trx_end(lp); 879 } else { 880 enable_irq(lp->spi->irq); 881 dev_err(&lp->spi->dev, "not supported irq %02x received\n", 882 irq); 883 } 884 } 885 886 static irqreturn_t at86rf230_isr(int irq, void *data) 887 { 888 struct at86rf230_local *lp = data; 889 struct at86rf230_state_change *ctx = &lp->irq; 890 u8 *buf = ctx->buf; 891 int rc; 892 893 disable_irq_nosync(irq); 894 895 buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG; 896 ctx->trx.len = 2; 897 ctx->msg.complete = at86rf230_irq_status; 898 rc = spi_async(lp->spi, &ctx->msg); 899 if (rc) { 900 enable_irq(irq); 901 at86rf230_async_error(lp, ctx, rc); 902 return IRQ_NONE; 903 } 904 905 return IRQ_HANDLED; 906 } 907 908 static void 909 at86rf230_write_frame_complete(void *context) 910 { 911 struct at86rf230_state_change *ctx = context; 912 struct at86rf230_local *lp = ctx->lp; 913 u8 *buf = ctx->buf; 914 int rc; 915 916 buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE; 917 buf[1] = STATE_BUSY_TX; 918 ctx->trx.len = 2; 919 ctx->msg.complete = NULL; 920 rc = spi_async(lp->spi, &ctx->msg); 921 if (rc) 922 at86rf230_async_error(lp, ctx, rc); 923 } 924 925 static void 926 at86rf230_write_frame(void *context) 927 { 928 struct at86rf230_state_change *ctx = context; 929 struct at86rf230_local *lp = ctx->lp; 930 struct sk_buff *skb = lp->tx_skb; 931 u8 *buf = lp->tx.buf; 932 int rc; 933 934 spin_lock(&lp->lock); 935 lp->is_tx = 1; 936 spin_unlock(&lp->lock); 937 938 buf[0] = CMD_FB | CMD_WRITE; 939 buf[1] = skb->len + 2; 940 memcpy(buf + 2, skb->data, skb->len); 941 lp->tx.trx.len = skb->len + 2; 942 lp->tx.msg.complete = at86rf230_write_frame_complete; 943 rc = spi_async(lp->spi, &lp->tx.msg); 944 if (rc) 945 at86rf230_async_error(lp, ctx, rc); 946 } 947 948 static void 949 at86rf230_xmit_tx_on(void *context) 950 { 951 struct at86rf230_state_change *ctx = context; 952 struct at86rf230_local *lp = ctx->lp; 953 954 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON, 955 at86rf230_write_frame, false); 956 } 957 958 static int 959 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb) 960 { 961 struct at86rf230_local *lp = hw->priv; 962 struct at86rf230_state_change *ctx = &lp->tx; 963 964 void (*tx_complete)(void *context) = at86rf230_write_frame; 965 966 lp->tx_skb = skb; 967 968 /* In ARET mode we need to go into STATE_TX_ARET_ON after we 969 * are in STATE_TX_ON. The pfad differs here, so we change 970 * the complete handler. 971 */ 972 if (lp->tx_aret) 973 tx_complete = at86rf230_xmit_tx_on; 974 975 at86rf230_async_state_change(lp, ctx, STATE_TX_ON, tx_complete, false); 976 977 return 0; 978 } 979 980 static int 981 at86rf230_ed(struct ieee802154_hw *hw, u8 *level) 982 { 983 BUG_ON(!level); 984 *level = 0xbe; 985 return 0; 986 } 987 988 static int 989 at86rf230_start(struct ieee802154_hw *hw) 990 { 991 return at86rf230_sync_state_change(hw->priv, STATE_RX_AACK_ON); 992 } 993 994 static void 995 at86rf230_stop(struct ieee802154_hw *hw) 996 { 997 at86rf230_sync_state_change(hw->priv, STATE_FORCE_TRX_OFF); 998 } 999 1000 static int 1001 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel) 1002 { 1003 return at86rf230_write_subreg(lp, SR_CHANNEL, channel); 1004 } 1005 1006 static int 1007 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel) 1008 { 1009 int rc; 1010 1011 if (channel == 0) 1012 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0); 1013 else 1014 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1); 1015 if (rc < 0) 1016 return rc; 1017 1018 if (page == 0) { 1019 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0); 1020 lp->data->rssi_base_val = -100; 1021 } else { 1022 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1); 1023 lp->data->rssi_base_val = -98; 1024 } 1025 if (rc < 0) 1026 return rc; 1027 1028 /* This sets the symbol_duration according frequency on the 212. 1029 * TODO move this handling while set channel and page in cfg802154. 1030 * We can do that, this timings are according 802.15.4 standard. 1031 * If we do that in cfg802154, this is a more generic calculation. 1032 * 1033 * This should also protected from ifs_timer. Means cancel timer and 1034 * init with a new value. For now, this is okay. 1035 */ 1036 if (channel == 0) { 1037 if (page == 0) { 1038 /* SUB:0 and BPSK:0 -> BPSK-20 */ 1039 lp->hw->phy->symbol_duration = 50; 1040 } else { 1041 /* SUB:1 and BPSK:0 -> BPSK-40 */ 1042 lp->hw->phy->symbol_duration = 25; 1043 } 1044 } else { 1045 if (page == 0) 1046 /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */ 1047 lp->hw->phy->symbol_duration = 40; 1048 else 1049 /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */ 1050 lp->hw->phy->symbol_duration = 16; 1051 } 1052 1053 lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD * 1054 lp->hw->phy->symbol_duration; 1055 lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD * 1056 lp->hw->phy->symbol_duration; 1057 1058 return at86rf230_write_subreg(lp, SR_CHANNEL, channel); 1059 } 1060 1061 static int 1062 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel) 1063 { 1064 struct at86rf230_local *lp = hw->priv; 1065 int rc; 1066 1067 rc = lp->data->set_channel(lp, page, channel); 1068 /* Wait for PLL */ 1069 usleep_range(lp->data->t_channel_switch, 1070 lp->data->t_channel_switch + 10); 1071 return rc; 1072 } 1073 1074 static int 1075 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw, 1076 struct ieee802154_hw_addr_filt *filt, 1077 unsigned long changed) 1078 { 1079 struct at86rf230_local *lp = hw->priv; 1080 1081 if (changed & IEEE802154_AFILT_SADDR_CHANGED) { 1082 u16 addr = le16_to_cpu(filt->short_addr); 1083 1084 dev_vdbg(&lp->spi->dev, 1085 "at86rf230_set_hw_addr_filt called for saddr\n"); 1086 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr); 1087 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8); 1088 } 1089 1090 if (changed & IEEE802154_AFILT_PANID_CHANGED) { 1091 u16 pan = le16_to_cpu(filt->pan_id); 1092 1093 dev_vdbg(&lp->spi->dev, 1094 "at86rf230_set_hw_addr_filt called for pan id\n"); 1095 __at86rf230_write(lp, RG_PAN_ID_0, pan); 1096 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8); 1097 } 1098 1099 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) { 1100 u8 i, addr[8]; 1101 1102 memcpy(addr, &filt->ieee_addr, 8); 1103 dev_vdbg(&lp->spi->dev, 1104 "at86rf230_set_hw_addr_filt called for IEEE addr\n"); 1105 for (i = 0; i < 8; i++) 1106 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]); 1107 } 1108 1109 if (changed & IEEE802154_AFILT_PANC_CHANGED) { 1110 dev_vdbg(&lp->spi->dev, 1111 "at86rf230_set_hw_addr_filt called for panc change\n"); 1112 if (filt->pan_coord) 1113 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1); 1114 else 1115 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0); 1116 } 1117 1118 return 0; 1119 } 1120 1121 static int 1122 at86rf230_set_txpower(struct ieee802154_hw *hw, int db) 1123 { 1124 struct at86rf230_local *lp = hw->priv; 1125 1126 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five 1127 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of 1128 * 0dB. 1129 * thus, supported values for db range from -26 to 5, for 31dB of 1130 * reduction to 0dB of reduction. 1131 */ 1132 if (db > 5 || db < -26) 1133 return -EINVAL; 1134 1135 db = -(db - 5); 1136 1137 return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db); 1138 } 1139 1140 static int 1141 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on) 1142 { 1143 struct at86rf230_local *lp = hw->priv; 1144 1145 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on); 1146 } 1147 1148 static int 1149 at86rf230_set_cca_mode(struct ieee802154_hw *hw, u8 mode) 1150 { 1151 struct at86rf230_local *lp = hw->priv; 1152 1153 return at86rf230_write_subreg(lp, SR_CCA_MODE, mode); 1154 } 1155 1156 static int 1157 at86rf212_get_desens_steps(struct at86rf230_local *lp, s32 level) 1158 { 1159 return (level - lp->data->rssi_base_val) * 100 / 207; 1160 } 1161 1162 static int 1163 at86rf23x_get_desens_steps(struct at86rf230_local *lp, s32 level) 1164 { 1165 return (level - lp->data->rssi_base_val) / 2; 1166 } 1167 1168 static int 1169 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 level) 1170 { 1171 struct at86rf230_local *lp = hw->priv; 1172 1173 if (level < lp->data->rssi_base_val || level > 30) 1174 return -EINVAL; 1175 1176 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, 1177 lp->data->get_desense_steps(lp, level)); 1178 } 1179 1180 static int 1181 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be, 1182 u8 retries) 1183 { 1184 struct at86rf230_local *lp = hw->priv; 1185 int rc; 1186 1187 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be); 1188 if (rc) 1189 return rc; 1190 1191 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be); 1192 if (rc) 1193 return rc; 1194 1195 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries); 1196 } 1197 1198 static int 1199 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries) 1200 { 1201 struct at86rf230_local *lp = hw->priv; 1202 int rc = 0; 1203 1204 lp->tx_aret = retries >= 0; 1205 lp->max_frame_retries = retries; 1206 1207 if (retries >= 0) 1208 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries); 1209 1210 return rc; 1211 } 1212 1213 static int 1214 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on) 1215 { 1216 struct at86rf230_local *lp = hw->priv; 1217 int rc; 1218 1219 if (on) { 1220 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1); 1221 if (rc < 0) 1222 return rc; 1223 1224 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1); 1225 if (rc < 0) 1226 return rc; 1227 } else { 1228 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0); 1229 if (rc < 0) 1230 return rc; 1231 1232 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0); 1233 if (rc < 0) 1234 return rc; 1235 } 1236 1237 return 0; 1238 } 1239 1240 static const struct ieee802154_ops at86rf230_ops = { 1241 .owner = THIS_MODULE, 1242 .xmit_async = at86rf230_xmit, 1243 .ed = at86rf230_ed, 1244 .set_channel = at86rf230_channel, 1245 .start = at86rf230_start, 1246 .stop = at86rf230_stop, 1247 .set_hw_addr_filt = at86rf230_set_hw_addr_filt, 1248 .set_txpower = at86rf230_set_txpower, 1249 .set_lbt = at86rf230_set_lbt, 1250 .set_cca_mode = at86rf230_set_cca_mode, 1251 .set_cca_ed_level = at86rf230_set_cca_ed_level, 1252 .set_csma_params = at86rf230_set_csma_params, 1253 .set_frame_retries = at86rf230_set_frame_retries, 1254 .set_promiscuous_mode = at86rf230_set_promiscuous_mode, 1255 }; 1256 1257 static struct at86rf2xx_chip_data at86rf233_data = { 1258 .t_sleep_cycle = 330, 1259 .t_channel_switch = 11, 1260 .t_reset_to_off = 26, 1261 .t_off_to_aack = 80, 1262 .t_off_to_tx_on = 80, 1263 .t_frame = 4096, 1264 .t_p_ack = 545, 1265 .t_tx_timeout = 2000, 1266 .rssi_base_val = -91, 1267 .set_channel = at86rf23x_set_channel, 1268 .get_desense_steps = at86rf23x_get_desens_steps 1269 }; 1270 1271 static struct at86rf2xx_chip_data at86rf231_data = { 1272 .t_sleep_cycle = 330, 1273 .t_channel_switch = 24, 1274 .t_reset_to_off = 37, 1275 .t_off_to_aack = 110, 1276 .t_off_to_tx_on = 110, 1277 .t_frame = 4096, 1278 .t_p_ack = 545, 1279 .t_tx_timeout = 2000, 1280 .rssi_base_val = -91, 1281 .set_channel = at86rf23x_set_channel, 1282 .get_desense_steps = at86rf23x_get_desens_steps 1283 }; 1284 1285 static struct at86rf2xx_chip_data at86rf212_data = { 1286 .t_sleep_cycle = 330, 1287 .t_channel_switch = 11, 1288 .t_reset_to_off = 26, 1289 .t_off_to_aack = 200, 1290 .t_off_to_tx_on = 200, 1291 .t_frame = 4096, 1292 .t_p_ack = 545, 1293 .t_tx_timeout = 2000, 1294 .rssi_base_val = -100, 1295 .set_channel = at86rf212_set_channel, 1296 .get_desense_steps = at86rf212_get_desens_steps 1297 }; 1298 1299 static int at86rf230_hw_init(struct at86rf230_local *lp) 1300 { 1301 int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH; 1302 unsigned int dvdd; 1303 u8 csma_seed[2]; 1304 1305 rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF); 1306 if (rc) 1307 return rc; 1308 1309 irq_type = irq_get_trigger_type(lp->spi->irq); 1310 if (irq_type == IRQ_TYPE_EDGE_FALLING) 1311 irq_pol = IRQ_ACTIVE_LOW; 1312 1313 rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol); 1314 if (rc) 1315 return rc; 1316 1317 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1); 1318 if (rc) 1319 return rc; 1320 1321 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END); 1322 if (rc) 1323 return rc; 1324 1325 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed)); 1326 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]); 1327 if (rc) 1328 return rc; 1329 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]); 1330 if (rc) 1331 return rc; 1332 1333 /* CLKM changes are applied immediately */ 1334 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00); 1335 if (rc) 1336 return rc; 1337 1338 /* Turn CLKM Off */ 1339 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00); 1340 if (rc) 1341 return rc; 1342 /* Wait the next SLEEP cycle */ 1343 usleep_range(lp->data->t_sleep_cycle, 1344 lp->data->t_sleep_cycle + 100); 1345 1346 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd); 1347 if (rc) 1348 return rc; 1349 if (!dvdd) { 1350 dev_err(&lp->spi->dev, "DVDD error\n"); 1351 return -EINVAL; 1352 } 1353 1354 /* Force setting slotted operation bit to 0. Sometimes the atben 1355 * sets this bit and I don't know why. We set this always force 1356 * to zero while probing. 1357 */ 1358 return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0); 1359 } 1360 1361 static struct at86rf230_platform_data * 1362 at86rf230_get_pdata(struct spi_device *spi) 1363 { 1364 struct at86rf230_platform_data *pdata; 1365 1366 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) 1367 return spi->dev.platform_data; 1368 1369 pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL); 1370 if (!pdata) 1371 goto done; 1372 1373 pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0); 1374 pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0); 1375 1376 spi->dev.platform_data = pdata; 1377 done: 1378 return pdata; 1379 } 1380 1381 static int 1382 at86rf230_detect_device(struct at86rf230_local *lp) 1383 { 1384 unsigned int part, version, val; 1385 u16 man_id = 0; 1386 const char *chip; 1387 int rc; 1388 1389 rc = __at86rf230_read(lp, RG_MAN_ID_0, &val); 1390 if (rc) 1391 return rc; 1392 man_id |= val; 1393 1394 rc = __at86rf230_read(lp, RG_MAN_ID_1, &val); 1395 if (rc) 1396 return rc; 1397 man_id |= (val << 8); 1398 1399 rc = __at86rf230_read(lp, RG_PART_NUM, &part); 1400 if (rc) 1401 return rc; 1402 1403 rc = __at86rf230_read(lp, RG_PART_NUM, &version); 1404 if (rc) 1405 return rc; 1406 1407 if (man_id != 0x001f) { 1408 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n", 1409 man_id >> 8, man_id & 0xFF); 1410 return -EINVAL; 1411 } 1412 1413 lp->hw->extra_tx_headroom = 0; 1414 lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM | IEEE802154_HW_AACK | 1415 IEEE802154_HW_TXPOWER | IEEE802154_HW_ARET | 1416 IEEE802154_HW_AFILT | IEEE802154_HW_PROMISCUOUS; 1417 1418 switch (part) { 1419 case 2: 1420 chip = "at86rf230"; 1421 rc = -ENOTSUPP; 1422 break; 1423 case 3: 1424 chip = "at86rf231"; 1425 lp->data = &at86rf231_data; 1426 lp->hw->phy->channels_supported[0] = 0x7FFF800; 1427 lp->hw->phy->current_channel = 11; 1428 lp->hw->phy->symbol_duration = 16; 1429 break; 1430 case 7: 1431 chip = "at86rf212"; 1432 if (version == 1) { 1433 lp->data = &at86rf212_data; 1434 lp->hw->flags |= IEEE802154_HW_LBT; 1435 lp->hw->phy->channels_supported[0] = 0x00007FF; 1436 lp->hw->phy->channels_supported[2] = 0x00007FF; 1437 lp->hw->phy->current_channel = 5; 1438 lp->hw->phy->symbol_duration = 25; 1439 } else { 1440 rc = -ENOTSUPP; 1441 } 1442 break; 1443 case 11: 1444 chip = "at86rf233"; 1445 lp->data = &at86rf233_data; 1446 lp->hw->phy->channels_supported[0] = 0x7FFF800; 1447 lp->hw->phy->current_channel = 13; 1448 lp->hw->phy->symbol_duration = 16; 1449 break; 1450 default: 1451 chip = "unkown"; 1452 rc = -ENOTSUPP; 1453 break; 1454 } 1455 1456 dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version); 1457 1458 return rc; 1459 } 1460 1461 static void 1462 at86rf230_setup_spi_messages(struct at86rf230_local *lp) 1463 { 1464 lp->state.lp = lp; 1465 spi_message_init(&lp->state.msg); 1466 lp->state.msg.context = &lp->state; 1467 lp->state.trx.tx_buf = lp->state.buf; 1468 lp->state.trx.rx_buf = lp->state.buf; 1469 spi_message_add_tail(&lp->state.trx, &lp->state.msg); 1470 1471 lp->irq.lp = lp; 1472 spi_message_init(&lp->irq.msg); 1473 lp->irq.msg.context = &lp->irq; 1474 lp->irq.trx.tx_buf = lp->irq.buf; 1475 lp->irq.trx.rx_buf = lp->irq.buf; 1476 spi_message_add_tail(&lp->irq.trx, &lp->irq.msg); 1477 1478 lp->tx.lp = lp; 1479 spi_message_init(&lp->tx.msg); 1480 lp->tx.msg.context = &lp->tx; 1481 lp->tx.trx.tx_buf = lp->tx.buf; 1482 lp->tx.trx.rx_buf = lp->tx.buf; 1483 spi_message_add_tail(&lp->tx.trx, &lp->tx.msg); 1484 } 1485 1486 static int at86rf230_probe(struct spi_device *spi) 1487 { 1488 struct at86rf230_platform_data *pdata; 1489 struct ieee802154_hw *hw; 1490 struct at86rf230_local *lp; 1491 unsigned int status; 1492 int rc, irq_type; 1493 1494 if (!spi->irq) { 1495 dev_err(&spi->dev, "no IRQ specified\n"); 1496 return -EINVAL; 1497 } 1498 1499 pdata = at86rf230_get_pdata(spi); 1500 if (!pdata) { 1501 dev_err(&spi->dev, "no platform_data\n"); 1502 return -EINVAL; 1503 } 1504 1505 if (gpio_is_valid(pdata->rstn)) { 1506 rc = devm_gpio_request_one(&spi->dev, pdata->rstn, 1507 GPIOF_OUT_INIT_HIGH, "rstn"); 1508 if (rc) 1509 return rc; 1510 } 1511 1512 if (gpio_is_valid(pdata->slp_tr)) { 1513 rc = devm_gpio_request_one(&spi->dev, pdata->slp_tr, 1514 GPIOF_OUT_INIT_LOW, "slp_tr"); 1515 if (rc) 1516 return rc; 1517 } 1518 1519 /* Reset */ 1520 if (gpio_is_valid(pdata->rstn)) { 1521 udelay(1); 1522 gpio_set_value(pdata->rstn, 0); 1523 udelay(1); 1524 gpio_set_value(pdata->rstn, 1); 1525 usleep_range(120, 240); 1526 } 1527 1528 hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops); 1529 if (!hw) 1530 return -ENOMEM; 1531 1532 lp = hw->priv; 1533 lp->hw = hw; 1534 lp->spi = spi; 1535 hw->parent = &spi->dev; 1536 hw->vif_data_size = sizeof(*lp); 1537 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr); 1538 1539 lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config); 1540 if (IS_ERR(lp->regmap)) { 1541 rc = PTR_ERR(lp->regmap); 1542 dev_err(&spi->dev, "Failed to allocate register map: %d\n", 1543 rc); 1544 goto free_dev; 1545 } 1546 1547 at86rf230_setup_spi_messages(lp); 1548 1549 rc = at86rf230_detect_device(lp); 1550 if (rc < 0) 1551 goto free_dev; 1552 1553 spin_lock_init(&lp->lock); 1554 init_completion(&lp->state_complete); 1555 1556 spi_set_drvdata(spi, lp); 1557 1558 rc = at86rf230_hw_init(lp); 1559 if (rc) 1560 goto free_dev; 1561 1562 /* Read irq status register to reset irq line */ 1563 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status); 1564 if (rc) 1565 goto free_dev; 1566 1567 irq_type = irq_get_trigger_type(spi->irq); 1568 if (!irq_type) 1569 irq_type = IRQF_TRIGGER_RISING; 1570 1571 rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr, 1572 IRQF_SHARED | irq_type, dev_name(&spi->dev), lp); 1573 if (rc) 1574 goto free_dev; 1575 1576 rc = ieee802154_register_hw(lp->hw); 1577 if (rc) 1578 goto free_dev; 1579 1580 return rc; 1581 1582 free_dev: 1583 ieee802154_free_hw(lp->hw); 1584 1585 return rc; 1586 } 1587 1588 static int at86rf230_remove(struct spi_device *spi) 1589 { 1590 struct at86rf230_local *lp = spi_get_drvdata(spi); 1591 1592 /* mask all at86rf230 irq's */ 1593 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0); 1594 ieee802154_unregister_hw(lp->hw); 1595 ieee802154_free_hw(lp->hw); 1596 dev_dbg(&spi->dev, "unregistered at86rf230\n"); 1597 1598 return 0; 1599 } 1600 1601 static const struct of_device_id at86rf230_of_match[] = { 1602 { .compatible = "atmel,at86rf230", }, 1603 { .compatible = "atmel,at86rf231", }, 1604 { .compatible = "atmel,at86rf233", }, 1605 { .compatible = "atmel,at86rf212", }, 1606 { }, 1607 }; 1608 MODULE_DEVICE_TABLE(of, at86rf230_of_match); 1609 1610 static const struct spi_device_id at86rf230_device_id[] = { 1611 { .name = "at86rf230", }, 1612 { .name = "at86rf231", }, 1613 { .name = "at86rf233", }, 1614 { .name = "at86rf212", }, 1615 { }, 1616 }; 1617 MODULE_DEVICE_TABLE(spi, at86rf230_device_id); 1618 1619 static struct spi_driver at86rf230_driver = { 1620 .id_table = at86rf230_device_id, 1621 .driver = { 1622 .of_match_table = of_match_ptr(at86rf230_of_match), 1623 .name = "at86rf230", 1624 .owner = THIS_MODULE, 1625 }, 1626 .probe = at86rf230_probe, 1627 .remove = at86rf230_remove, 1628 }; 1629 1630 module_spi_driver(at86rf230_driver); 1631 1632 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver"); 1633 MODULE_LICENSE("GPL v2"); 1634