1 /* 2 * AT86RF230/RF231 driver 3 * 4 * Copyright (C) 2009-2012 Siemens AG 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 8 * as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * Written by: 16 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> 17 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com> 18 * Alexander Aring <aar@pengutronix.de> 19 */ 20 #include <linux/kernel.h> 21 #include <linux/module.h> 22 #include <linux/hrtimer.h> 23 #include <linux/jiffies.h> 24 #include <linux/interrupt.h> 25 #include <linux/irq.h> 26 #include <linux/gpio.h> 27 #include <linux/delay.h> 28 #include <linux/spi/spi.h> 29 #include <linux/spi/at86rf230.h> 30 #include <linux/regmap.h> 31 #include <linux/skbuff.h> 32 #include <linux/of_gpio.h> 33 #include <linux/ieee802154.h> 34 #include <linux/debugfs.h> 35 36 #include <net/mac802154.h> 37 #include <net/cfg802154.h> 38 39 #include "at86rf230.h" 40 41 struct at86rf230_local; 42 /* at86rf2xx chip depend data. 43 * All timings are in us. 44 */ 45 struct at86rf2xx_chip_data { 46 u16 t_sleep_cycle; 47 u16 t_channel_switch; 48 u16 t_reset_to_off; 49 u16 t_off_to_aack; 50 u16 t_off_to_tx_on; 51 u16 t_off_to_sleep; 52 u16 t_sleep_to_off; 53 u16 t_frame; 54 u16 t_p_ack; 55 int rssi_base_val; 56 57 int (*set_channel)(struct at86rf230_local *, u8, u8); 58 int (*set_txpower)(struct at86rf230_local *, s32); 59 }; 60 61 #define AT86RF2XX_MAX_BUF (127 + 3) 62 /* tx retries to access the TX_ON state 63 * if it's above then force change will be started. 64 * 65 * We assume the max_frame_retries (7) value of 802.15.4 here. 66 */ 67 #define AT86RF2XX_MAX_TX_RETRIES 7 68 /* We use the recommended 5 minutes timeout to recalibrate */ 69 #define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ) 70 71 struct at86rf230_state_change { 72 struct at86rf230_local *lp; 73 int irq; 74 75 struct hrtimer timer; 76 struct spi_message msg; 77 struct spi_transfer trx; 78 u8 buf[AT86RF2XX_MAX_BUF]; 79 80 void (*complete)(void *context); 81 u8 from_state; 82 u8 to_state; 83 84 bool free; 85 }; 86 87 struct at86rf230_trac { 88 u64 success; 89 u64 success_data_pending; 90 u64 success_wait_for_ack; 91 u64 channel_access_failure; 92 u64 no_ack; 93 u64 invalid; 94 }; 95 96 struct at86rf230_local { 97 struct spi_device *spi; 98 99 struct ieee802154_hw *hw; 100 struct at86rf2xx_chip_data *data; 101 struct regmap *regmap; 102 int slp_tr; 103 bool sleep; 104 105 struct completion state_complete; 106 struct at86rf230_state_change state; 107 108 unsigned long cal_timeout; 109 bool is_tx; 110 bool is_tx_from_off; 111 u8 tx_retry; 112 struct sk_buff *tx_skb; 113 struct at86rf230_state_change tx; 114 115 struct at86rf230_trac trac; 116 }; 117 118 #define AT86RF2XX_NUMREGS 0x3F 119 120 static void 121 at86rf230_async_state_change(struct at86rf230_local *lp, 122 struct at86rf230_state_change *ctx, 123 const u8 state, void (*complete)(void *context)); 124 125 static inline void 126 at86rf230_sleep(struct at86rf230_local *lp) 127 { 128 if (gpio_is_valid(lp->slp_tr)) { 129 gpio_set_value(lp->slp_tr, 1); 130 usleep_range(lp->data->t_off_to_sleep, 131 lp->data->t_off_to_sleep + 10); 132 lp->sleep = true; 133 } 134 } 135 136 static inline void 137 at86rf230_awake(struct at86rf230_local *lp) 138 { 139 if (gpio_is_valid(lp->slp_tr)) { 140 gpio_set_value(lp->slp_tr, 0); 141 usleep_range(lp->data->t_sleep_to_off, 142 lp->data->t_sleep_to_off + 100); 143 lp->sleep = false; 144 } 145 } 146 147 static inline int 148 __at86rf230_write(struct at86rf230_local *lp, 149 unsigned int addr, unsigned int data) 150 { 151 bool sleep = lp->sleep; 152 int ret; 153 154 /* awake for register setting if sleep */ 155 if (sleep) 156 at86rf230_awake(lp); 157 158 ret = regmap_write(lp->regmap, addr, data); 159 160 /* sleep again if was sleeping */ 161 if (sleep) 162 at86rf230_sleep(lp); 163 164 return ret; 165 } 166 167 static inline int 168 __at86rf230_read(struct at86rf230_local *lp, 169 unsigned int addr, unsigned int *data) 170 { 171 bool sleep = lp->sleep; 172 int ret; 173 174 /* awake for register setting if sleep */ 175 if (sleep) 176 at86rf230_awake(lp); 177 178 ret = regmap_read(lp->regmap, addr, data); 179 180 /* sleep again if was sleeping */ 181 if (sleep) 182 at86rf230_sleep(lp); 183 184 return ret; 185 } 186 187 static inline int 188 at86rf230_read_subreg(struct at86rf230_local *lp, 189 unsigned int addr, unsigned int mask, 190 unsigned int shift, unsigned int *data) 191 { 192 int rc; 193 194 rc = __at86rf230_read(lp, addr, data); 195 if (!rc) 196 *data = (*data & mask) >> shift; 197 198 return rc; 199 } 200 201 static inline int 202 at86rf230_write_subreg(struct at86rf230_local *lp, 203 unsigned int addr, unsigned int mask, 204 unsigned int shift, unsigned int data) 205 { 206 bool sleep = lp->sleep; 207 int ret; 208 209 /* awake for register setting if sleep */ 210 if (sleep) 211 at86rf230_awake(lp); 212 213 ret = regmap_update_bits(lp->regmap, addr, mask, data << shift); 214 215 /* sleep again if was sleeping */ 216 if (sleep) 217 at86rf230_sleep(lp); 218 219 return ret; 220 } 221 222 static inline void 223 at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp) 224 { 225 gpio_set_value(lp->slp_tr, 1); 226 udelay(1); 227 gpio_set_value(lp->slp_tr, 0); 228 } 229 230 static bool 231 at86rf230_reg_writeable(struct device *dev, unsigned int reg) 232 { 233 switch (reg) { 234 case RG_TRX_STATE: 235 case RG_TRX_CTRL_0: 236 case RG_TRX_CTRL_1: 237 case RG_PHY_TX_PWR: 238 case RG_PHY_ED_LEVEL: 239 case RG_PHY_CC_CCA: 240 case RG_CCA_THRES: 241 case RG_RX_CTRL: 242 case RG_SFD_VALUE: 243 case RG_TRX_CTRL_2: 244 case RG_ANT_DIV: 245 case RG_IRQ_MASK: 246 case RG_VREG_CTRL: 247 case RG_BATMON: 248 case RG_XOSC_CTRL: 249 case RG_RX_SYN: 250 case RG_XAH_CTRL_1: 251 case RG_FTN_CTRL: 252 case RG_PLL_CF: 253 case RG_PLL_DCU: 254 case RG_SHORT_ADDR_0: 255 case RG_SHORT_ADDR_1: 256 case RG_PAN_ID_0: 257 case RG_PAN_ID_1: 258 case RG_IEEE_ADDR_0: 259 case RG_IEEE_ADDR_1: 260 case RG_IEEE_ADDR_2: 261 case RG_IEEE_ADDR_3: 262 case RG_IEEE_ADDR_4: 263 case RG_IEEE_ADDR_5: 264 case RG_IEEE_ADDR_6: 265 case RG_IEEE_ADDR_7: 266 case RG_XAH_CTRL_0: 267 case RG_CSMA_SEED_0: 268 case RG_CSMA_SEED_1: 269 case RG_CSMA_BE: 270 return true; 271 default: 272 return false; 273 } 274 } 275 276 static bool 277 at86rf230_reg_readable(struct device *dev, unsigned int reg) 278 { 279 bool rc; 280 281 /* all writeable are also readable */ 282 rc = at86rf230_reg_writeable(dev, reg); 283 if (rc) 284 return rc; 285 286 /* readonly regs */ 287 switch (reg) { 288 case RG_TRX_STATUS: 289 case RG_PHY_RSSI: 290 case RG_IRQ_STATUS: 291 case RG_PART_NUM: 292 case RG_VERSION_NUM: 293 case RG_MAN_ID_1: 294 case RG_MAN_ID_0: 295 return true; 296 default: 297 return false; 298 } 299 } 300 301 static bool 302 at86rf230_reg_volatile(struct device *dev, unsigned int reg) 303 { 304 /* can be changed during runtime */ 305 switch (reg) { 306 case RG_TRX_STATUS: 307 case RG_TRX_STATE: 308 case RG_PHY_RSSI: 309 case RG_PHY_ED_LEVEL: 310 case RG_IRQ_STATUS: 311 case RG_VREG_CTRL: 312 case RG_PLL_CF: 313 case RG_PLL_DCU: 314 return true; 315 default: 316 return false; 317 } 318 } 319 320 static bool 321 at86rf230_reg_precious(struct device *dev, unsigned int reg) 322 { 323 /* don't clear irq line on read */ 324 switch (reg) { 325 case RG_IRQ_STATUS: 326 return true; 327 default: 328 return false; 329 } 330 } 331 332 static const struct regmap_config at86rf230_regmap_spi_config = { 333 .reg_bits = 8, 334 .val_bits = 8, 335 .write_flag_mask = CMD_REG | CMD_WRITE, 336 .read_flag_mask = CMD_REG, 337 .cache_type = REGCACHE_RBTREE, 338 .max_register = AT86RF2XX_NUMREGS, 339 .writeable_reg = at86rf230_reg_writeable, 340 .readable_reg = at86rf230_reg_readable, 341 .volatile_reg = at86rf230_reg_volatile, 342 .precious_reg = at86rf230_reg_precious, 343 }; 344 345 static void 346 at86rf230_async_error_recover(void *context) 347 { 348 struct at86rf230_state_change *ctx = context; 349 struct at86rf230_local *lp = ctx->lp; 350 351 lp->is_tx = 0; 352 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL); 353 ieee802154_wake_queue(lp->hw); 354 if (ctx->free) 355 kfree(ctx); 356 } 357 358 static inline void 359 at86rf230_async_error(struct at86rf230_local *lp, 360 struct at86rf230_state_change *ctx, int rc) 361 { 362 dev_err(&lp->spi->dev, "spi_async error %d\n", rc); 363 364 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF, 365 at86rf230_async_error_recover); 366 } 367 368 /* Generic function to get some register value in async mode */ 369 static void 370 at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg, 371 struct at86rf230_state_change *ctx, 372 void (*complete)(void *context)) 373 { 374 int rc; 375 376 u8 *tx_buf = ctx->buf; 377 378 tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG; 379 ctx->msg.complete = complete; 380 rc = spi_async(lp->spi, &ctx->msg); 381 if (rc) 382 at86rf230_async_error(lp, ctx, rc); 383 } 384 385 static void 386 at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val, 387 struct at86rf230_state_change *ctx, 388 void (*complete)(void *context)) 389 { 390 int rc; 391 392 ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE; 393 ctx->buf[1] = val; 394 ctx->msg.complete = complete; 395 rc = spi_async(lp->spi, &ctx->msg); 396 if (rc) 397 at86rf230_async_error(lp, ctx, rc); 398 } 399 400 static void 401 at86rf230_async_state_assert(void *context) 402 { 403 struct at86rf230_state_change *ctx = context; 404 struct at86rf230_local *lp = ctx->lp; 405 const u8 *buf = ctx->buf; 406 const u8 trx_state = buf[1] & TRX_STATE_MASK; 407 408 /* Assert state change */ 409 if (trx_state != ctx->to_state) { 410 /* Special handling if transceiver state is in 411 * STATE_BUSY_RX_AACK and a SHR was detected. 412 */ 413 if (trx_state == STATE_BUSY_RX_AACK) { 414 /* Undocumented race condition. If we send a state 415 * change to STATE_RX_AACK_ON the transceiver could 416 * change his state automatically to STATE_BUSY_RX_AACK 417 * if a SHR was detected. This is not an error, but we 418 * can't assert this. 419 */ 420 if (ctx->to_state == STATE_RX_AACK_ON) 421 goto done; 422 423 /* If we change to STATE_TX_ON without forcing and 424 * transceiver state is STATE_BUSY_RX_AACK, we wait 425 * 'tFrame + tPAck' receiving time. In this time the 426 * PDU should be received. If the transceiver is still 427 * in STATE_BUSY_RX_AACK, we run a force state change 428 * to STATE_TX_ON. This is a timeout handling, if the 429 * transceiver stucks in STATE_BUSY_RX_AACK. 430 * 431 * Additional we do several retries to try to get into 432 * TX_ON state without forcing. If the retries are 433 * higher or equal than AT86RF2XX_MAX_TX_RETRIES we 434 * will do a force change. 435 */ 436 if (ctx->to_state == STATE_TX_ON || 437 ctx->to_state == STATE_TRX_OFF) { 438 u8 state = ctx->to_state; 439 440 if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES) 441 state = STATE_FORCE_TRX_OFF; 442 lp->tx_retry++; 443 444 at86rf230_async_state_change(lp, ctx, state, 445 ctx->complete); 446 return; 447 } 448 } 449 450 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n", 451 ctx->from_state, ctx->to_state, trx_state); 452 } 453 454 done: 455 if (ctx->complete) 456 ctx->complete(context); 457 } 458 459 static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer) 460 { 461 struct at86rf230_state_change *ctx = 462 container_of(timer, struct at86rf230_state_change, timer); 463 struct at86rf230_local *lp = ctx->lp; 464 465 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, 466 at86rf230_async_state_assert); 467 468 return HRTIMER_NORESTART; 469 } 470 471 /* Do state change timing delay. */ 472 static void 473 at86rf230_async_state_delay(void *context) 474 { 475 struct at86rf230_state_change *ctx = context; 476 struct at86rf230_local *lp = ctx->lp; 477 struct at86rf2xx_chip_data *c = lp->data; 478 bool force = false; 479 ktime_t tim; 480 481 /* The force state changes are will show as normal states in the 482 * state status subregister. We change the to_state to the 483 * corresponding one and remember if it was a force change, this 484 * differs if we do a state change from STATE_BUSY_RX_AACK. 485 */ 486 switch (ctx->to_state) { 487 case STATE_FORCE_TX_ON: 488 ctx->to_state = STATE_TX_ON; 489 force = true; 490 break; 491 case STATE_FORCE_TRX_OFF: 492 ctx->to_state = STATE_TRX_OFF; 493 force = true; 494 break; 495 default: 496 break; 497 } 498 499 switch (ctx->from_state) { 500 case STATE_TRX_OFF: 501 switch (ctx->to_state) { 502 case STATE_RX_AACK_ON: 503 tim = ktime_set(0, c->t_off_to_aack * NSEC_PER_USEC); 504 /* state change from TRX_OFF to RX_AACK_ON to do a 505 * calibration, we need to reset the timeout for the 506 * next one. 507 */ 508 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT; 509 goto change; 510 case STATE_TX_ARET_ON: 511 case STATE_TX_ON: 512 tim = ktime_set(0, c->t_off_to_tx_on * NSEC_PER_USEC); 513 /* state change from TRX_OFF to TX_ON or ARET_ON to do 514 * a calibration, we need to reset the timeout for the 515 * next one. 516 */ 517 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT; 518 goto change; 519 default: 520 break; 521 } 522 break; 523 case STATE_BUSY_RX_AACK: 524 switch (ctx->to_state) { 525 case STATE_TRX_OFF: 526 case STATE_TX_ON: 527 /* Wait for worst case receiving time if we 528 * didn't make a force change from BUSY_RX_AACK 529 * to TX_ON or TRX_OFF. 530 */ 531 if (!force) { 532 tim = ktime_set(0, (c->t_frame + c->t_p_ack) * 533 NSEC_PER_USEC); 534 goto change; 535 } 536 break; 537 default: 538 break; 539 } 540 break; 541 /* Default value, means RESET state */ 542 case STATE_P_ON: 543 switch (ctx->to_state) { 544 case STATE_TRX_OFF: 545 tim = ktime_set(0, c->t_reset_to_off * NSEC_PER_USEC); 546 goto change; 547 default: 548 break; 549 } 550 break; 551 default: 552 break; 553 } 554 555 /* Default delay is 1us in the most cases */ 556 udelay(1); 557 at86rf230_async_state_timer(&ctx->timer); 558 return; 559 560 change: 561 hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL); 562 } 563 564 static void 565 at86rf230_async_state_change_start(void *context) 566 { 567 struct at86rf230_state_change *ctx = context; 568 struct at86rf230_local *lp = ctx->lp; 569 u8 *buf = ctx->buf; 570 const u8 trx_state = buf[1] & TRX_STATE_MASK; 571 572 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */ 573 if (trx_state == STATE_TRANSITION_IN_PROGRESS) { 574 udelay(1); 575 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, 576 at86rf230_async_state_change_start); 577 return; 578 } 579 580 /* Check if we already are in the state which we change in */ 581 if (trx_state == ctx->to_state) { 582 if (ctx->complete) 583 ctx->complete(context); 584 return; 585 } 586 587 /* Set current state to the context of state change */ 588 ctx->from_state = trx_state; 589 590 /* Going into the next step for a state change which do a timing 591 * relevant delay. 592 */ 593 at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx, 594 at86rf230_async_state_delay); 595 } 596 597 static void 598 at86rf230_async_state_change(struct at86rf230_local *lp, 599 struct at86rf230_state_change *ctx, 600 const u8 state, void (*complete)(void *context)) 601 { 602 /* Initialization for the state change context */ 603 ctx->to_state = state; 604 ctx->complete = complete; 605 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, 606 at86rf230_async_state_change_start); 607 } 608 609 static void 610 at86rf230_sync_state_change_complete(void *context) 611 { 612 struct at86rf230_state_change *ctx = context; 613 struct at86rf230_local *lp = ctx->lp; 614 615 complete(&lp->state_complete); 616 } 617 618 /* This function do a sync framework above the async state change. 619 * Some callbacks of the IEEE 802.15.4 driver interface need to be 620 * handled synchronously. 621 */ 622 static int 623 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state) 624 { 625 unsigned long rc; 626 627 at86rf230_async_state_change(lp, &lp->state, state, 628 at86rf230_sync_state_change_complete); 629 630 rc = wait_for_completion_timeout(&lp->state_complete, 631 msecs_to_jiffies(100)); 632 if (!rc) { 633 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT); 634 return -ETIMEDOUT; 635 } 636 637 return 0; 638 } 639 640 static void 641 at86rf230_tx_complete(void *context) 642 { 643 struct at86rf230_state_change *ctx = context; 644 struct at86rf230_local *lp = ctx->lp; 645 646 ieee802154_xmit_complete(lp->hw, lp->tx_skb, false); 647 kfree(ctx); 648 } 649 650 static void 651 at86rf230_tx_on(void *context) 652 { 653 struct at86rf230_state_change *ctx = context; 654 struct at86rf230_local *lp = ctx->lp; 655 656 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, 657 at86rf230_tx_complete); 658 } 659 660 static void 661 at86rf230_tx_trac_check(void *context) 662 { 663 struct at86rf230_state_change *ctx = context; 664 struct at86rf230_local *lp = ctx->lp; 665 666 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) { 667 u8 trac = TRAC_MASK(ctx->buf[1]); 668 669 switch (trac) { 670 case TRAC_SUCCESS: 671 lp->trac.success++; 672 break; 673 case TRAC_SUCCESS_DATA_PENDING: 674 lp->trac.success_data_pending++; 675 break; 676 case TRAC_CHANNEL_ACCESS_FAILURE: 677 lp->trac.channel_access_failure++; 678 break; 679 case TRAC_NO_ACK: 680 lp->trac.no_ack++; 681 break; 682 case TRAC_INVALID: 683 lp->trac.invalid++; 684 break; 685 default: 686 WARN_ONCE(1, "received tx trac status %d\n", trac); 687 break; 688 } 689 } 690 691 at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on); 692 } 693 694 static void 695 at86rf230_rx_read_frame_complete(void *context) 696 { 697 struct at86rf230_state_change *ctx = context; 698 struct at86rf230_local *lp = ctx->lp; 699 const u8 *buf = ctx->buf; 700 struct sk_buff *skb; 701 u8 len, lqi; 702 703 len = buf[1]; 704 if (!ieee802154_is_valid_psdu_len(len)) { 705 dev_vdbg(&lp->spi->dev, "corrupted frame received\n"); 706 len = IEEE802154_MTU; 707 } 708 lqi = buf[2 + len]; 709 710 skb = dev_alloc_skb(IEEE802154_MTU); 711 if (!skb) { 712 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n"); 713 kfree(ctx); 714 return; 715 } 716 717 memcpy(skb_put(skb, len), buf + 2, len); 718 ieee802154_rx_irqsafe(lp->hw, skb, lqi); 719 kfree(ctx); 720 } 721 722 static void 723 at86rf230_rx_trac_check(void *context) 724 { 725 struct at86rf230_state_change *ctx = context; 726 struct at86rf230_local *lp = ctx->lp; 727 u8 *buf = ctx->buf; 728 int rc; 729 730 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) { 731 u8 trac = TRAC_MASK(buf[1]); 732 733 switch (trac) { 734 case TRAC_SUCCESS: 735 lp->trac.success++; 736 break; 737 case TRAC_SUCCESS_WAIT_FOR_ACK: 738 lp->trac.success_wait_for_ack++; 739 break; 740 case TRAC_INVALID: 741 lp->trac.invalid++; 742 break; 743 default: 744 WARN_ONCE(1, "received rx trac status %d\n", trac); 745 break; 746 } 747 } 748 749 buf[0] = CMD_FB; 750 ctx->trx.len = AT86RF2XX_MAX_BUF; 751 ctx->msg.complete = at86rf230_rx_read_frame_complete; 752 rc = spi_async(lp->spi, &ctx->msg); 753 if (rc) { 754 ctx->trx.len = 2; 755 at86rf230_async_error(lp, ctx, rc); 756 } 757 } 758 759 static void 760 at86rf230_irq_trx_end(void *context) 761 { 762 struct at86rf230_state_change *ctx = context; 763 struct at86rf230_local *lp = ctx->lp; 764 765 if (lp->is_tx) { 766 lp->is_tx = 0; 767 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx, 768 at86rf230_tx_trac_check); 769 } else { 770 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx, 771 at86rf230_rx_trac_check); 772 } 773 } 774 775 static void 776 at86rf230_irq_status(void *context) 777 { 778 struct at86rf230_state_change *ctx = context; 779 struct at86rf230_local *lp = ctx->lp; 780 const u8 *buf = ctx->buf; 781 u8 irq = buf[1]; 782 783 enable_irq(lp->spi->irq); 784 785 if (irq & IRQ_TRX_END) { 786 at86rf230_irq_trx_end(ctx); 787 } else { 788 dev_err(&lp->spi->dev, "not supported irq %02x received\n", 789 irq); 790 kfree(ctx); 791 } 792 } 793 794 static void 795 at86rf230_setup_spi_messages(struct at86rf230_local *lp, 796 struct at86rf230_state_change *state) 797 { 798 state->lp = lp; 799 state->irq = lp->spi->irq; 800 spi_message_init(&state->msg); 801 state->msg.context = state; 802 state->trx.len = 2; 803 state->trx.tx_buf = state->buf; 804 state->trx.rx_buf = state->buf; 805 spi_message_add_tail(&state->trx, &state->msg); 806 hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 807 state->timer.function = at86rf230_async_state_timer; 808 } 809 810 static irqreturn_t at86rf230_isr(int irq, void *data) 811 { 812 struct at86rf230_local *lp = data; 813 struct at86rf230_state_change *ctx; 814 int rc; 815 816 disable_irq_nosync(irq); 817 818 ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC); 819 if (!ctx) { 820 enable_irq(irq); 821 return IRQ_NONE; 822 } 823 824 at86rf230_setup_spi_messages(lp, ctx); 825 /* tell on error handling to free ctx */ 826 ctx->free = true; 827 828 ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG; 829 ctx->msg.complete = at86rf230_irq_status; 830 rc = spi_async(lp->spi, &ctx->msg); 831 if (rc) { 832 at86rf230_async_error(lp, ctx, rc); 833 enable_irq(irq); 834 return IRQ_NONE; 835 } 836 837 return IRQ_HANDLED; 838 } 839 840 static void 841 at86rf230_write_frame_complete(void *context) 842 { 843 struct at86rf230_state_change *ctx = context; 844 struct at86rf230_local *lp = ctx->lp; 845 846 ctx->trx.len = 2; 847 848 if (gpio_is_valid(lp->slp_tr)) 849 at86rf230_slp_tr_rising_edge(lp); 850 else 851 at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx, 852 NULL); 853 } 854 855 static void 856 at86rf230_write_frame(void *context) 857 { 858 struct at86rf230_state_change *ctx = context; 859 struct at86rf230_local *lp = ctx->lp; 860 struct sk_buff *skb = lp->tx_skb; 861 u8 *buf = ctx->buf; 862 int rc; 863 864 lp->is_tx = 1; 865 866 buf[0] = CMD_FB | CMD_WRITE; 867 buf[1] = skb->len + 2; 868 memcpy(buf + 2, skb->data, skb->len); 869 ctx->trx.len = skb->len + 2; 870 ctx->msg.complete = at86rf230_write_frame_complete; 871 rc = spi_async(lp->spi, &ctx->msg); 872 if (rc) { 873 ctx->trx.len = 2; 874 at86rf230_async_error(lp, ctx, rc); 875 } 876 } 877 878 static void 879 at86rf230_xmit_tx_on(void *context) 880 { 881 struct at86rf230_state_change *ctx = context; 882 struct at86rf230_local *lp = ctx->lp; 883 884 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON, 885 at86rf230_write_frame); 886 } 887 888 static void 889 at86rf230_xmit_start(void *context) 890 { 891 struct at86rf230_state_change *ctx = context; 892 struct at86rf230_local *lp = ctx->lp; 893 894 /* check if we change from off state */ 895 if (lp->is_tx_from_off) { 896 lp->is_tx_from_off = false; 897 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON, 898 at86rf230_write_frame); 899 } else { 900 at86rf230_async_state_change(lp, ctx, STATE_TX_ON, 901 at86rf230_xmit_tx_on); 902 } 903 } 904 905 static int 906 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb) 907 { 908 struct at86rf230_local *lp = hw->priv; 909 struct at86rf230_state_change *ctx = &lp->tx; 910 911 lp->tx_skb = skb; 912 lp->tx_retry = 0; 913 914 /* After 5 minutes in PLL and the same frequency we run again the 915 * calibration loops which is recommended by at86rf2xx datasheets. 916 * 917 * The calibration is initiate by a state change from TRX_OFF 918 * to TX_ON, the lp->cal_timeout should be reinit by state_delay 919 * function then to start in the next 5 minutes. 920 */ 921 if (time_is_before_jiffies(lp->cal_timeout)) { 922 lp->is_tx_from_off = true; 923 at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF, 924 at86rf230_xmit_start); 925 } else { 926 at86rf230_xmit_start(ctx); 927 } 928 929 return 0; 930 } 931 932 static int 933 at86rf230_ed(struct ieee802154_hw *hw, u8 *level) 934 { 935 BUG_ON(!level); 936 *level = 0xbe; 937 return 0; 938 } 939 940 static int 941 at86rf230_start(struct ieee802154_hw *hw) 942 { 943 struct at86rf230_local *lp = hw->priv; 944 945 /* reset trac stats on start */ 946 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) 947 memset(&lp->trac, 0, sizeof(struct at86rf230_trac)); 948 949 at86rf230_awake(lp); 950 enable_irq(lp->spi->irq); 951 952 return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON); 953 } 954 955 static void 956 at86rf230_stop(struct ieee802154_hw *hw) 957 { 958 struct at86rf230_local *lp = hw->priv; 959 u8 csma_seed[2]; 960 961 at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF); 962 963 disable_irq(lp->spi->irq); 964 965 /* It's recommended to set random new csma_seeds before sleep state. 966 * Makes only sense in the stop callback, not doing this inside of 967 * at86rf230_sleep, this is also used when we don't transmit afterwards 968 * when calling start callback again. 969 */ 970 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed)); 971 at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]); 972 at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]); 973 974 at86rf230_sleep(lp); 975 } 976 977 static int 978 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel) 979 { 980 return at86rf230_write_subreg(lp, SR_CHANNEL, channel); 981 } 982 983 #define AT86RF2XX_MAX_ED_LEVELS 0xF 984 static const s32 at86rf23x_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = { 985 -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300, 986 -7100, -6900, -6700, -6500, -6300, -6100, 987 }; 988 989 static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = { 990 -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, 991 -8000, -7800, -7600, -7400, -7200, -7000, 992 }; 993 994 static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = { 995 -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000, 996 -7800, -7600, -7400, -7200, -7000, -6800, 997 }; 998 999 static inline int 1000 at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val) 1001 { 1002 unsigned int cca_ed_thres; 1003 int rc; 1004 1005 rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres); 1006 if (rc < 0) 1007 return rc; 1008 1009 switch (rssi_base_val) { 1010 case -98: 1011 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98; 1012 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98); 1013 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres]; 1014 break; 1015 case -100: 1016 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100; 1017 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100); 1018 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres]; 1019 break; 1020 default: 1021 WARN_ON(1); 1022 } 1023 1024 return 0; 1025 } 1026 1027 static int 1028 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel) 1029 { 1030 int rc; 1031 1032 if (channel == 0) 1033 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0); 1034 else 1035 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1); 1036 if (rc < 0) 1037 return rc; 1038 1039 if (page == 0) { 1040 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0); 1041 lp->data->rssi_base_val = -100; 1042 } else { 1043 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1); 1044 lp->data->rssi_base_val = -98; 1045 } 1046 if (rc < 0) 1047 return rc; 1048 1049 rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val); 1050 if (rc < 0) 1051 return rc; 1052 1053 /* This sets the symbol_duration according frequency on the 212. 1054 * TODO move this handling while set channel and page in cfg802154. 1055 * We can do that, this timings are according 802.15.4 standard. 1056 * If we do that in cfg802154, this is a more generic calculation. 1057 * 1058 * This should also protected from ifs_timer. Means cancel timer and 1059 * init with a new value. For now, this is okay. 1060 */ 1061 if (channel == 0) { 1062 if (page == 0) { 1063 /* SUB:0 and BPSK:0 -> BPSK-20 */ 1064 lp->hw->phy->symbol_duration = 50; 1065 } else { 1066 /* SUB:1 and BPSK:0 -> BPSK-40 */ 1067 lp->hw->phy->symbol_duration = 25; 1068 } 1069 } else { 1070 if (page == 0) 1071 /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */ 1072 lp->hw->phy->symbol_duration = 40; 1073 else 1074 /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */ 1075 lp->hw->phy->symbol_duration = 16; 1076 } 1077 1078 lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD * 1079 lp->hw->phy->symbol_duration; 1080 lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD * 1081 lp->hw->phy->symbol_duration; 1082 1083 return at86rf230_write_subreg(lp, SR_CHANNEL, channel); 1084 } 1085 1086 static int 1087 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel) 1088 { 1089 struct at86rf230_local *lp = hw->priv; 1090 int rc; 1091 1092 rc = lp->data->set_channel(lp, page, channel); 1093 /* Wait for PLL */ 1094 usleep_range(lp->data->t_channel_switch, 1095 lp->data->t_channel_switch + 10); 1096 1097 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT; 1098 return rc; 1099 } 1100 1101 static int 1102 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw, 1103 struct ieee802154_hw_addr_filt *filt, 1104 unsigned long changed) 1105 { 1106 struct at86rf230_local *lp = hw->priv; 1107 1108 if (changed & IEEE802154_AFILT_SADDR_CHANGED) { 1109 u16 addr = le16_to_cpu(filt->short_addr); 1110 1111 dev_vdbg(&lp->spi->dev, 1112 "at86rf230_set_hw_addr_filt called for saddr\n"); 1113 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr); 1114 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8); 1115 } 1116 1117 if (changed & IEEE802154_AFILT_PANID_CHANGED) { 1118 u16 pan = le16_to_cpu(filt->pan_id); 1119 1120 dev_vdbg(&lp->spi->dev, 1121 "at86rf230_set_hw_addr_filt called for pan id\n"); 1122 __at86rf230_write(lp, RG_PAN_ID_0, pan); 1123 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8); 1124 } 1125 1126 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) { 1127 u8 i, addr[8]; 1128 1129 memcpy(addr, &filt->ieee_addr, 8); 1130 dev_vdbg(&lp->spi->dev, 1131 "at86rf230_set_hw_addr_filt called for IEEE addr\n"); 1132 for (i = 0; i < 8; i++) 1133 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]); 1134 } 1135 1136 if (changed & IEEE802154_AFILT_PANC_CHANGED) { 1137 dev_vdbg(&lp->spi->dev, 1138 "at86rf230_set_hw_addr_filt called for panc change\n"); 1139 if (filt->pan_coord) 1140 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1); 1141 else 1142 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0); 1143 } 1144 1145 return 0; 1146 } 1147 1148 #define AT86RF23X_MAX_TX_POWERS 0xF 1149 static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = { 1150 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600, 1151 -800, -1200, -1700, 1152 }; 1153 1154 static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = { 1155 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700, 1156 -900, -1200, -1700, 1157 }; 1158 1159 #define AT86RF212_MAX_TX_POWERS 0x1F 1160 static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = { 1161 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700, 1162 -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700, 1163 -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600, 1164 }; 1165 1166 static int 1167 at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm) 1168 { 1169 u32 i; 1170 1171 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) { 1172 if (lp->hw->phy->supported.tx_powers[i] == mbm) 1173 return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i); 1174 } 1175 1176 return -EINVAL; 1177 } 1178 1179 static int 1180 at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm) 1181 { 1182 u32 i; 1183 1184 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) { 1185 if (lp->hw->phy->supported.tx_powers[i] == mbm) 1186 return at86rf230_write_subreg(lp, SR_TX_PWR_212, i); 1187 } 1188 1189 return -EINVAL; 1190 } 1191 1192 static int 1193 at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm) 1194 { 1195 struct at86rf230_local *lp = hw->priv; 1196 1197 return lp->data->set_txpower(lp, mbm); 1198 } 1199 1200 static int 1201 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on) 1202 { 1203 struct at86rf230_local *lp = hw->priv; 1204 1205 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on); 1206 } 1207 1208 static int 1209 at86rf230_set_cca_mode(struct ieee802154_hw *hw, 1210 const struct wpan_phy_cca *cca) 1211 { 1212 struct at86rf230_local *lp = hw->priv; 1213 u8 val; 1214 1215 /* mapping 802.15.4 to driver spec */ 1216 switch (cca->mode) { 1217 case NL802154_CCA_ENERGY: 1218 val = 1; 1219 break; 1220 case NL802154_CCA_CARRIER: 1221 val = 2; 1222 break; 1223 case NL802154_CCA_ENERGY_CARRIER: 1224 switch (cca->opt) { 1225 case NL802154_CCA_OPT_ENERGY_CARRIER_AND: 1226 val = 3; 1227 break; 1228 case NL802154_CCA_OPT_ENERGY_CARRIER_OR: 1229 val = 0; 1230 break; 1231 default: 1232 return -EINVAL; 1233 } 1234 break; 1235 default: 1236 return -EINVAL; 1237 } 1238 1239 return at86rf230_write_subreg(lp, SR_CCA_MODE, val); 1240 } 1241 1242 1243 static int 1244 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm) 1245 { 1246 struct at86rf230_local *lp = hw->priv; 1247 u32 i; 1248 1249 for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) { 1250 if (hw->phy->supported.cca_ed_levels[i] == mbm) 1251 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i); 1252 } 1253 1254 return -EINVAL; 1255 } 1256 1257 static int 1258 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be, 1259 u8 retries) 1260 { 1261 struct at86rf230_local *lp = hw->priv; 1262 int rc; 1263 1264 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be); 1265 if (rc) 1266 return rc; 1267 1268 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be); 1269 if (rc) 1270 return rc; 1271 1272 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries); 1273 } 1274 1275 static int 1276 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries) 1277 { 1278 struct at86rf230_local *lp = hw->priv; 1279 1280 return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries); 1281 } 1282 1283 static int 1284 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on) 1285 { 1286 struct at86rf230_local *lp = hw->priv; 1287 int rc; 1288 1289 if (on) { 1290 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1); 1291 if (rc < 0) 1292 return rc; 1293 1294 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1); 1295 if (rc < 0) 1296 return rc; 1297 } else { 1298 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0); 1299 if (rc < 0) 1300 return rc; 1301 1302 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0); 1303 if (rc < 0) 1304 return rc; 1305 } 1306 1307 return 0; 1308 } 1309 1310 static const struct ieee802154_ops at86rf230_ops = { 1311 .owner = THIS_MODULE, 1312 .xmit_async = at86rf230_xmit, 1313 .ed = at86rf230_ed, 1314 .set_channel = at86rf230_channel, 1315 .start = at86rf230_start, 1316 .stop = at86rf230_stop, 1317 .set_hw_addr_filt = at86rf230_set_hw_addr_filt, 1318 .set_txpower = at86rf230_set_txpower, 1319 .set_lbt = at86rf230_set_lbt, 1320 .set_cca_mode = at86rf230_set_cca_mode, 1321 .set_cca_ed_level = at86rf230_set_cca_ed_level, 1322 .set_csma_params = at86rf230_set_csma_params, 1323 .set_frame_retries = at86rf230_set_frame_retries, 1324 .set_promiscuous_mode = at86rf230_set_promiscuous_mode, 1325 }; 1326 1327 static struct at86rf2xx_chip_data at86rf233_data = { 1328 .t_sleep_cycle = 330, 1329 .t_channel_switch = 11, 1330 .t_reset_to_off = 26, 1331 .t_off_to_aack = 80, 1332 .t_off_to_tx_on = 80, 1333 .t_off_to_sleep = 35, 1334 .t_sleep_to_off = 210, 1335 .t_frame = 4096, 1336 .t_p_ack = 545, 1337 .rssi_base_val = -91, 1338 .set_channel = at86rf23x_set_channel, 1339 .set_txpower = at86rf23x_set_txpower, 1340 }; 1341 1342 static struct at86rf2xx_chip_data at86rf231_data = { 1343 .t_sleep_cycle = 330, 1344 .t_channel_switch = 24, 1345 .t_reset_to_off = 37, 1346 .t_off_to_aack = 110, 1347 .t_off_to_tx_on = 110, 1348 .t_off_to_sleep = 35, 1349 .t_sleep_to_off = 380, 1350 .t_frame = 4096, 1351 .t_p_ack = 545, 1352 .rssi_base_val = -91, 1353 .set_channel = at86rf23x_set_channel, 1354 .set_txpower = at86rf23x_set_txpower, 1355 }; 1356 1357 static struct at86rf2xx_chip_data at86rf212_data = { 1358 .t_sleep_cycle = 330, 1359 .t_channel_switch = 11, 1360 .t_reset_to_off = 26, 1361 .t_off_to_aack = 200, 1362 .t_off_to_tx_on = 200, 1363 .t_off_to_sleep = 35, 1364 .t_sleep_to_off = 380, 1365 .t_frame = 4096, 1366 .t_p_ack = 545, 1367 .rssi_base_val = -100, 1368 .set_channel = at86rf212_set_channel, 1369 .set_txpower = at86rf212_set_txpower, 1370 }; 1371 1372 static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim) 1373 { 1374 int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH; 1375 unsigned int dvdd; 1376 u8 csma_seed[2]; 1377 1378 rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF); 1379 if (rc) 1380 return rc; 1381 1382 irq_type = irq_get_trigger_type(lp->spi->irq); 1383 if (irq_type == IRQ_TYPE_EDGE_FALLING || 1384 irq_type == IRQ_TYPE_LEVEL_LOW) 1385 irq_pol = IRQ_ACTIVE_LOW; 1386 1387 rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol); 1388 if (rc) 1389 return rc; 1390 1391 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1); 1392 if (rc) 1393 return rc; 1394 1395 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END); 1396 if (rc) 1397 return rc; 1398 1399 /* reset values differs in at86rf231 and at86rf233 */ 1400 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0); 1401 if (rc) 1402 return rc; 1403 1404 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed)); 1405 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]); 1406 if (rc) 1407 return rc; 1408 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]); 1409 if (rc) 1410 return rc; 1411 1412 /* CLKM changes are applied immediately */ 1413 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00); 1414 if (rc) 1415 return rc; 1416 1417 /* Turn CLKM Off */ 1418 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00); 1419 if (rc) 1420 return rc; 1421 /* Wait the next SLEEP cycle */ 1422 usleep_range(lp->data->t_sleep_cycle, 1423 lp->data->t_sleep_cycle + 100); 1424 1425 /* xtal_trim value is calculated by: 1426 * CL = 0.5 * (CX + CTRIM + CPAR) 1427 * 1428 * whereas: 1429 * CL = capacitor of used crystal 1430 * CX = connected capacitors at xtal pins 1431 * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF, 1432 * but this is different on each board setup. You need to fine 1433 * tuning this value via CTRIM. 1434 * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is 1435 * 0 pF upto 4.5 pF. 1436 * 1437 * Examples: 1438 * atben transceiver: 1439 * 1440 * CL = 8 pF 1441 * CX = 12 pF 1442 * CPAR = 3 pF (We assume the magic constant from datasheet) 1443 * CTRIM = 0.9 pF 1444 * 1445 * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF 1446 * 1447 * xtal_trim = 0x3 1448 * 1449 * openlabs transceiver: 1450 * 1451 * CL = 16 pF 1452 * CX = 22 pF 1453 * CPAR = 3 pF (We assume the magic constant from datasheet) 1454 * CTRIM = 4.5 pF 1455 * 1456 * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF 1457 * 1458 * xtal_trim = 0xf 1459 */ 1460 rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim); 1461 if (rc) 1462 return rc; 1463 1464 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd); 1465 if (rc) 1466 return rc; 1467 if (!dvdd) { 1468 dev_err(&lp->spi->dev, "DVDD error\n"); 1469 return -EINVAL; 1470 } 1471 1472 /* Force setting slotted operation bit to 0. Sometimes the atben 1473 * sets this bit and I don't know why. We set this always force 1474 * to zero while probing. 1475 */ 1476 return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0); 1477 } 1478 1479 static int 1480 at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr, 1481 u8 *xtal_trim) 1482 { 1483 struct at86rf230_platform_data *pdata = spi->dev.platform_data; 1484 int ret; 1485 1486 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) { 1487 if (!pdata) 1488 return -ENOENT; 1489 1490 *rstn = pdata->rstn; 1491 *slp_tr = pdata->slp_tr; 1492 *xtal_trim = pdata->xtal_trim; 1493 return 0; 1494 } 1495 1496 *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0); 1497 *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0); 1498 ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim); 1499 if (ret < 0 && ret != -EINVAL) 1500 return ret; 1501 1502 return 0; 1503 } 1504 1505 static int 1506 at86rf230_detect_device(struct at86rf230_local *lp) 1507 { 1508 unsigned int part, version, val; 1509 u16 man_id = 0; 1510 const char *chip; 1511 int rc; 1512 1513 rc = __at86rf230_read(lp, RG_MAN_ID_0, &val); 1514 if (rc) 1515 return rc; 1516 man_id |= val; 1517 1518 rc = __at86rf230_read(lp, RG_MAN_ID_1, &val); 1519 if (rc) 1520 return rc; 1521 man_id |= (val << 8); 1522 1523 rc = __at86rf230_read(lp, RG_PART_NUM, &part); 1524 if (rc) 1525 return rc; 1526 1527 rc = __at86rf230_read(lp, RG_VERSION_NUM, &version); 1528 if (rc) 1529 return rc; 1530 1531 if (man_id != 0x001f) { 1532 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n", 1533 man_id >> 8, man_id & 0xFF); 1534 return -EINVAL; 1535 } 1536 1537 lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM | 1538 IEEE802154_HW_CSMA_PARAMS | 1539 IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT | 1540 IEEE802154_HW_PROMISCUOUS; 1541 1542 lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER | 1543 WPAN_PHY_FLAG_CCA_ED_LEVEL | 1544 WPAN_PHY_FLAG_CCA_MODE; 1545 1546 lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) | 1547 BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER); 1548 lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) | 1549 BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR); 1550 1551 lp->hw->phy->supported.cca_ed_levels = at86rf23x_ed_levels; 1552 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf23x_ed_levels); 1553 1554 lp->hw->phy->cca.mode = NL802154_CCA_ENERGY; 1555 1556 switch (part) { 1557 case 2: 1558 chip = "at86rf230"; 1559 rc = -ENOTSUPP; 1560 goto not_supp; 1561 case 3: 1562 chip = "at86rf231"; 1563 lp->data = &at86rf231_data; 1564 lp->hw->phy->supported.channels[0] = 0x7FFF800; 1565 lp->hw->phy->current_channel = 11; 1566 lp->hw->phy->symbol_duration = 16; 1567 lp->hw->phy->supported.tx_powers = at86rf231_powers; 1568 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers); 1569 break; 1570 case 7: 1571 chip = "at86rf212"; 1572 lp->data = &at86rf212_data; 1573 lp->hw->flags |= IEEE802154_HW_LBT; 1574 lp->hw->phy->supported.channels[0] = 0x00007FF; 1575 lp->hw->phy->supported.channels[2] = 0x00007FF; 1576 lp->hw->phy->current_channel = 5; 1577 lp->hw->phy->symbol_duration = 25; 1578 lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH; 1579 lp->hw->phy->supported.tx_powers = at86rf212_powers; 1580 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers); 1581 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100; 1582 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100); 1583 break; 1584 case 11: 1585 chip = "at86rf233"; 1586 lp->data = &at86rf233_data; 1587 lp->hw->phy->supported.channels[0] = 0x7FFF800; 1588 lp->hw->phy->current_channel = 13; 1589 lp->hw->phy->symbol_duration = 16; 1590 lp->hw->phy->supported.tx_powers = at86rf233_powers; 1591 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers); 1592 break; 1593 default: 1594 chip = "unknown"; 1595 rc = -ENOTSUPP; 1596 goto not_supp; 1597 } 1598 1599 lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7]; 1600 lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0]; 1601 1602 not_supp: 1603 dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version); 1604 1605 return rc; 1606 } 1607 1608 #ifdef CONFIG_IEEE802154_AT86RF230_DEBUGFS 1609 static struct dentry *at86rf230_debugfs_root; 1610 1611 static int at86rf230_stats_show(struct seq_file *file, void *offset) 1612 { 1613 struct at86rf230_local *lp = file->private; 1614 1615 seq_printf(file, "SUCCESS:\t\t%8llu\n", lp->trac.success); 1616 seq_printf(file, "SUCCESS_DATA_PENDING:\t%8llu\n", 1617 lp->trac.success_data_pending); 1618 seq_printf(file, "SUCCESS_WAIT_FOR_ACK:\t%8llu\n", 1619 lp->trac.success_wait_for_ack); 1620 seq_printf(file, "CHANNEL_ACCESS_FAILURE:\t%8llu\n", 1621 lp->trac.channel_access_failure); 1622 seq_printf(file, "NO_ACK:\t\t\t%8llu\n", lp->trac.no_ack); 1623 seq_printf(file, "INVALID:\t\t%8llu\n", lp->trac.invalid); 1624 return 0; 1625 } 1626 1627 static int at86rf230_stats_open(struct inode *inode, struct file *file) 1628 { 1629 return single_open(file, at86rf230_stats_show, inode->i_private); 1630 } 1631 1632 static const struct file_operations at86rf230_stats_fops = { 1633 .open = at86rf230_stats_open, 1634 .read = seq_read, 1635 .llseek = seq_lseek, 1636 .release = single_release, 1637 }; 1638 1639 static int at86rf230_debugfs_init(struct at86rf230_local *lp) 1640 { 1641 char debugfs_dir_name[DNAME_INLINE_LEN + 1] = "at86rf230-"; 1642 struct dentry *stats; 1643 1644 strncat(debugfs_dir_name, dev_name(&lp->spi->dev), DNAME_INLINE_LEN); 1645 1646 at86rf230_debugfs_root = debugfs_create_dir(debugfs_dir_name, NULL); 1647 if (!at86rf230_debugfs_root) 1648 return -ENOMEM; 1649 1650 stats = debugfs_create_file("trac_stats", S_IRUGO, 1651 at86rf230_debugfs_root, lp, 1652 &at86rf230_stats_fops); 1653 if (!stats) 1654 return -ENOMEM; 1655 1656 return 0; 1657 } 1658 1659 static void at86rf230_debugfs_remove(void) 1660 { 1661 debugfs_remove_recursive(at86rf230_debugfs_root); 1662 } 1663 #else 1664 static int at86rf230_debugfs_init(struct at86rf230_local *lp) { return 0; } 1665 static void at86rf230_debugfs_remove(void) { } 1666 #endif 1667 1668 static int at86rf230_probe(struct spi_device *spi) 1669 { 1670 struct ieee802154_hw *hw; 1671 struct at86rf230_local *lp; 1672 unsigned int status; 1673 int rc, irq_type, rstn, slp_tr; 1674 u8 xtal_trim = 0; 1675 1676 if (!spi->irq) { 1677 dev_err(&spi->dev, "no IRQ specified\n"); 1678 return -EINVAL; 1679 } 1680 1681 rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim); 1682 if (rc < 0) { 1683 dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc); 1684 return rc; 1685 } 1686 1687 if (gpio_is_valid(rstn)) { 1688 rc = devm_gpio_request_one(&spi->dev, rstn, 1689 GPIOF_OUT_INIT_HIGH, "rstn"); 1690 if (rc) 1691 return rc; 1692 } 1693 1694 if (gpio_is_valid(slp_tr)) { 1695 rc = devm_gpio_request_one(&spi->dev, slp_tr, 1696 GPIOF_OUT_INIT_LOW, "slp_tr"); 1697 if (rc) 1698 return rc; 1699 } 1700 1701 /* Reset */ 1702 if (gpio_is_valid(rstn)) { 1703 udelay(1); 1704 gpio_set_value(rstn, 0); 1705 udelay(1); 1706 gpio_set_value(rstn, 1); 1707 usleep_range(120, 240); 1708 } 1709 1710 hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops); 1711 if (!hw) 1712 return -ENOMEM; 1713 1714 lp = hw->priv; 1715 lp->hw = hw; 1716 lp->spi = spi; 1717 lp->slp_tr = slp_tr; 1718 hw->parent = &spi->dev; 1719 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr); 1720 1721 lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config); 1722 if (IS_ERR(lp->regmap)) { 1723 rc = PTR_ERR(lp->regmap); 1724 dev_err(&spi->dev, "Failed to allocate register map: %d\n", 1725 rc); 1726 goto free_dev; 1727 } 1728 1729 at86rf230_setup_spi_messages(lp, &lp->state); 1730 at86rf230_setup_spi_messages(lp, &lp->tx); 1731 1732 rc = at86rf230_detect_device(lp); 1733 if (rc < 0) 1734 goto free_dev; 1735 1736 init_completion(&lp->state_complete); 1737 1738 spi_set_drvdata(spi, lp); 1739 1740 rc = at86rf230_hw_init(lp, xtal_trim); 1741 if (rc) 1742 goto free_dev; 1743 1744 /* Read irq status register to reset irq line */ 1745 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status); 1746 if (rc) 1747 goto free_dev; 1748 1749 irq_type = irq_get_trigger_type(spi->irq); 1750 if (!irq_type) 1751 irq_type = IRQF_TRIGGER_HIGH; 1752 1753 rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr, 1754 IRQF_SHARED | irq_type, dev_name(&spi->dev), lp); 1755 if (rc) 1756 goto free_dev; 1757 1758 /* disable_irq by default and wait for starting hardware */ 1759 disable_irq(spi->irq); 1760 1761 /* going into sleep by default */ 1762 at86rf230_sleep(lp); 1763 1764 rc = at86rf230_debugfs_init(lp); 1765 if (rc) 1766 goto free_dev; 1767 1768 rc = ieee802154_register_hw(lp->hw); 1769 if (rc) 1770 goto free_debugfs; 1771 1772 return rc; 1773 1774 free_debugfs: 1775 at86rf230_debugfs_remove(); 1776 free_dev: 1777 ieee802154_free_hw(lp->hw); 1778 1779 return rc; 1780 } 1781 1782 static int at86rf230_remove(struct spi_device *spi) 1783 { 1784 struct at86rf230_local *lp = spi_get_drvdata(spi); 1785 1786 /* mask all at86rf230 irq's */ 1787 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0); 1788 ieee802154_unregister_hw(lp->hw); 1789 ieee802154_free_hw(lp->hw); 1790 at86rf230_debugfs_remove(); 1791 dev_dbg(&spi->dev, "unregistered at86rf230\n"); 1792 1793 return 0; 1794 } 1795 1796 static const struct of_device_id at86rf230_of_match[] = { 1797 { .compatible = "atmel,at86rf230", }, 1798 { .compatible = "atmel,at86rf231", }, 1799 { .compatible = "atmel,at86rf233", }, 1800 { .compatible = "atmel,at86rf212", }, 1801 { }, 1802 }; 1803 MODULE_DEVICE_TABLE(of, at86rf230_of_match); 1804 1805 static const struct spi_device_id at86rf230_device_id[] = { 1806 { .name = "at86rf230", }, 1807 { .name = "at86rf231", }, 1808 { .name = "at86rf233", }, 1809 { .name = "at86rf212", }, 1810 { }, 1811 }; 1812 MODULE_DEVICE_TABLE(spi, at86rf230_device_id); 1813 1814 static struct spi_driver at86rf230_driver = { 1815 .id_table = at86rf230_device_id, 1816 .driver = { 1817 .of_match_table = of_match_ptr(at86rf230_of_match), 1818 .name = "at86rf230", 1819 }, 1820 .probe = at86rf230_probe, 1821 .remove = at86rf230_remove, 1822 }; 1823 1824 module_spi_driver(at86rf230_driver); 1825 1826 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver"); 1827 MODULE_LICENSE("GPL v2"); 1828