1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * AT86RF230/RF231 driver
4  *
5  * Copyright (C) 2009-2012 Siemens AG
6  *
7  * Written by:
8  * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
9  * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
10  * Alexander Aring <aar@pengutronix.de>
11  */
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/hrtimer.h>
15 #include <linux/jiffies.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/gpio.h>
19 #include <linux/delay.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/at86rf230.h>
22 #include <linux/regmap.h>
23 #include <linux/skbuff.h>
24 #include <linux/of_gpio.h>
25 #include <linux/ieee802154.h>
26 #include <linux/debugfs.h>
27 
28 #include <net/mac802154.h>
29 #include <net/cfg802154.h>
30 
31 #include "at86rf230.h"
32 
33 struct at86rf230_local;
34 /* at86rf2xx chip depend data.
35  * All timings are in us.
36  */
37 struct at86rf2xx_chip_data {
38 	u16 t_sleep_cycle;
39 	u16 t_channel_switch;
40 	u16 t_reset_to_off;
41 	u16 t_off_to_aack;
42 	u16 t_off_to_tx_on;
43 	u16 t_off_to_sleep;
44 	u16 t_sleep_to_off;
45 	u16 t_frame;
46 	u16 t_p_ack;
47 	int rssi_base_val;
48 
49 	int (*set_channel)(struct at86rf230_local *, u8, u8);
50 	int (*set_txpower)(struct at86rf230_local *, s32);
51 };
52 
53 #define AT86RF2XX_MAX_BUF		(127 + 3)
54 /* tx retries to access the TX_ON state
55  * if it's above then force change will be started.
56  *
57  * We assume the max_frame_retries (7) value of 802.15.4 here.
58  */
59 #define AT86RF2XX_MAX_TX_RETRIES	7
60 /* We use the recommended 5 minutes timeout to recalibrate */
61 #define AT86RF2XX_CAL_LOOP_TIMEOUT	(5 * 60 * HZ)
62 
63 struct at86rf230_state_change {
64 	struct at86rf230_local *lp;
65 	int irq;
66 
67 	struct hrtimer timer;
68 	struct spi_message msg;
69 	struct spi_transfer trx;
70 	u8 buf[AT86RF2XX_MAX_BUF];
71 
72 	void (*complete)(void *context);
73 	u8 from_state;
74 	u8 to_state;
75 
76 	bool free;
77 };
78 
79 struct at86rf230_trac {
80 	u64 success;
81 	u64 success_data_pending;
82 	u64 success_wait_for_ack;
83 	u64 channel_access_failure;
84 	u64 no_ack;
85 	u64 invalid;
86 };
87 
88 struct at86rf230_local {
89 	struct spi_device *spi;
90 
91 	struct ieee802154_hw *hw;
92 	struct at86rf2xx_chip_data *data;
93 	struct regmap *regmap;
94 	int slp_tr;
95 	bool sleep;
96 
97 	struct completion state_complete;
98 	struct at86rf230_state_change state;
99 
100 	unsigned long cal_timeout;
101 	bool is_tx;
102 	bool is_tx_from_off;
103 	bool was_tx;
104 	u8 tx_retry;
105 	struct sk_buff *tx_skb;
106 	struct at86rf230_state_change tx;
107 
108 	struct at86rf230_trac trac;
109 };
110 
111 #define AT86RF2XX_NUMREGS 0x3F
112 
113 static void
114 at86rf230_async_state_change(struct at86rf230_local *lp,
115 			     struct at86rf230_state_change *ctx,
116 			     const u8 state, void (*complete)(void *context));
117 
118 static inline void
119 at86rf230_sleep(struct at86rf230_local *lp)
120 {
121 	if (gpio_is_valid(lp->slp_tr)) {
122 		gpio_set_value(lp->slp_tr, 1);
123 		usleep_range(lp->data->t_off_to_sleep,
124 			     lp->data->t_off_to_sleep + 10);
125 		lp->sleep = true;
126 	}
127 }
128 
129 static inline void
130 at86rf230_awake(struct at86rf230_local *lp)
131 {
132 	if (gpio_is_valid(lp->slp_tr)) {
133 		gpio_set_value(lp->slp_tr, 0);
134 		usleep_range(lp->data->t_sleep_to_off,
135 			     lp->data->t_sleep_to_off + 100);
136 		lp->sleep = false;
137 	}
138 }
139 
140 static inline int
141 __at86rf230_write(struct at86rf230_local *lp,
142 		  unsigned int addr, unsigned int data)
143 {
144 	bool sleep = lp->sleep;
145 	int ret;
146 
147 	/* awake for register setting if sleep */
148 	if (sleep)
149 		at86rf230_awake(lp);
150 
151 	ret = regmap_write(lp->regmap, addr, data);
152 
153 	/* sleep again if was sleeping */
154 	if (sleep)
155 		at86rf230_sleep(lp);
156 
157 	return ret;
158 }
159 
160 static inline int
161 __at86rf230_read(struct at86rf230_local *lp,
162 		 unsigned int addr, unsigned int *data)
163 {
164 	bool sleep = lp->sleep;
165 	int ret;
166 
167 	/* awake for register setting if sleep */
168 	if (sleep)
169 		at86rf230_awake(lp);
170 
171 	ret = regmap_read(lp->regmap, addr, data);
172 
173 	/* sleep again if was sleeping */
174 	if (sleep)
175 		at86rf230_sleep(lp);
176 
177 	return ret;
178 }
179 
180 static inline int
181 at86rf230_read_subreg(struct at86rf230_local *lp,
182 		      unsigned int addr, unsigned int mask,
183 		      unsigned int shift, unsigned int *data)
184 {
185 	int rc;
186 
187 	rc = __at86rf230_read(lp, addr, data);
188 	if (!rc)
189 		*data = (*data & mask) >> shift;
190 
191 	return rc;
192 }
193 
194 static inline int
195 at86rf230_write_subreg(struct at86rf230_local *lp,
196 		       unsigned int addr, unsigned int mask,
197 		       unsigned int shift, unsigned int data)
198 {
199 	bool sleep = lp->sleep;
200 	int ret;
201 
202 	/* awake for register setting if sleep */
203 	if (sleep)
204 		at86rf230_awake(lp);
205 
206 	ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
207 
208 	/* sleep again if was sleeping */
209 	if (sleep)
210 		at86rf230_sleep(lp);
211 
212 	return ret;
213 }
214 
215 static inline void
216 at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
217 {
218 	gpio_set_value(lp->slp_tr, 1);
219 	udelay(1);
220 	gpio_set_value(lp->slp_tr, 0);
221 }
222 
223 static bool
224 at86rf230_reg_writeable(struct device *dev, unsigned int reg)
225 {
226 	switch (reg) {
227 	case RG_TRX_STATE:
228 	case RG_TRX_CTRL_0:
229 	case RG_TRX_CTRL_1:
230 	case RG_PHY_TX_PWR:
231 	case RG_PHY_ED_LEVEL:
232 	case RG_PHY_CC_CCA:
233 	case RG_CCA_THRES:
234 	case RG_RX_CTRL:
235 	case RG_SFD_VALUE:
236 	case RG_TRX_CTRL_2:
237 	case RG_ANT_DIV:
238 	case RG_IRQ_MASK:
239 	case RG_VREG_CTRL:
240 	case RG_BATMON:
241 	case RG_XOSC_CTRL:
242 	case RG_RX_SYN:
243 	case RG_XAH_CTRL_1:
244 	case RG_FTN_CTRL:
245 	case RG_PLL_CF:
246 	case RG_PLL_DCU:
247 	case RG_SHORT_ADDR_0:
248 	case RG_SHORT_ADDR_1:
249 	case RG_PAN_ID_0:
250 	case RG_PAN_ID_1:
251 	case RG_IEEE_ADDR_0:
252 	case RG_IEEE_ADDR_1:
253 	case RG_IEEE_ADDR_2:
254 	case RG_IEEE_ADDR_3:
255 	case RG_IEEE_ADDR_4:
256 	case RG_IEEE_ADDR_5:
257 	case RG_IEEE_ADDR_6:
258 	case RG_IEEE_ADDR_7:
259 	case RG_XAH_CTRL_0:
260 	case RG_CSMA_SEED_0:
261 	case RG_CSMA_SEED_1:
262 	case RG_CSMA_BE:
263 		return true;
264 	default:
265 		return false;
266 	}
267 }
268 
269 static bool
270 at86rf230_reg_readable(struct device *dev, unsigned int reg)
271 {
272 	bool rc;
273 
274 	/* all writeable are also readable */
275 	rc = at86rf230_reg_writeable(dev, reg);
276 	if (rc)
277 		return rc;
278 
279 	/* readonly regs */
280 	switch (reg) {
281 	case RG_TRX_STATUS:
282 	case RG_PHY_RSSI:
283 	case RG_IRQ_STATUS:
284 	case RG_PART_NUM:
285 	case RG_VERSION_NUM:
286 	case RG_MAN_ID_1:
287 	case RG_MAN_ID_0:
288 		return true;
289 	default:
290 		return false;
291 	}
292 }
293 
294 static bool
295 at86rf230_reg_volatile(struct device *dev, unsigned int reg)
296 {
297 	/* can be changed during runtime */
298 	switch (reg) {
299 	case RG_TRX_STATUS:
300 	case RG_TRX_STATE:
301 	case RG_PHY_RSSI:
302 	case RG_PHY_ED_LEVEL:
303 	case RG_IRQ_STATUS:
304 	case RG_VREG_CTRL:
305 	case RG_PLL_CF:
306 	case RG_PLL_DCU:
307 		return true;
308 	default:
309 		return false;
310 	}
311 }
312 
313 static bool
314 at86rf230_reg_precious(struct device *dev, unsigned int reg)
315 {
316 	/* don't clear irq line on read */
317 	switch (reg) {
318 	case RG_IRQ_STATUS:
319 		return true;
320 	default:
321 		return false;
322 	}
323 }
324 
325 static const struct regmap_config at86rf230_regmap_spi_config = {
326 	.reg_bits = 8,
327 	.val_bits = 8,
328 	.write_flag_mask = CMD_REG | CMD_WRITE,
329 	.read_flag_mask = CMD_REG,
330 	.cache_type = REGCACHE_RBTREE,
331 	.max_register = AT86RF2XX_NUMREGS,
332 	.writeable_reg = at86rf230_reg_writeable,
333 	.readable_reg = at86rf230_reg_readable,
334 	.volatile_reg = at86rf230_reg_volatile,
335 	.precious_reg = at86rf230_reg_precious,
336 };
337 
338 static void
339 at86rf230_async_error_recover_complete(void *context)
340 {
341 	struct at86rf230_state_change *ctx = context;
342 	struct at86rf230_local *lp = ctx->lp;
343 
344 	if (ctx->free)
345 		kfree(ctx);
346 
347 	if (lp->was_tx) {
348 		lp->was_tx = 0;
349 		dev_kfree_skb_any(lp->tx_skb);
350 		ieee802154_wake_queue(lp->hw);
351 	}
352 }
353 
354 static void
355 at86rf230_async_error_recover(void *context)
356 {
357 	struct at86rf230_state_change *ctx = context;
358 	struct at86rf230_local *lp = ctx->lp;
359 
360 	if (lp->is_tx) {
361 		lp->was_tx = 1;
362 		lp->is_tx = 0;
363 	}
364 
365 	at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
366 				     at86rf230_async_error_recover_complete);
367 }
368 
369 static inline void
370 at86rf230_async_error(struct at86rf230_local *lp,
371 		      struct at86rf230_state_change *ctx, int rc)
372 {
373 	dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
374 
375 	at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
376 				     at86rf230_async_error_recover);
377 }
378 
379 /* Generic function to get some register value in async mode */
380 static void
381 at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg,
382 			 struct at86rf230_state_change *ctx,
383 			 void (*complete)(void *context))
384 {
385 	int rc;
386 
387 	u8 *tx_buf = ctx->buf;
388 
389 	tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
390 	ctx->msg.complete = complete;
391 	rc = spi_async(lp->spi, &ctx->msg);
392 	if (rc)
393 		at86rf230_async_error(lp, ctx, rc);
394 }
395 
396 static void
397 at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val,
398 			  struct at86rf230_state_change *ctx,
399 			  void (*complete)(void *context))
400 {
401 	int rc;
402 
403 	ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
404 	ctx->buf[1] = val;
405 	ctx->msg.complete = complete;
406 	rc = spi_async(lp->spi, &ctx->msg);
407 	if (rc)
408 		at86rf230_async_error(lp, ctx, rc);
409 }
410 
411 static void
412 at86rf230_async_state_assert(void *context)
413 {
414 	struct at86rf230_state_change *ctx = context;
415 	struct at86rf230_local *lp = ctx->lp;
416 	const u8 *buf = ctx->buf;
417 	const u8 trx_state = buf[1] & TRX_STATE_MASK;
418 
419 	/* Assert state change */
420 	if (trx_state != ctx->to_state) {
421 		/* Special handling if transceiver state is in
422 		 * STATE_BUSY_RX_AACK and a SHR was detected.
423 		 */
424 		if  (trx_state == STATE_BUSY_RX_AACK) {
425 			/* Undocumented race condition. If we send a state
426 			 * change to STATE_RX_AACK_ON the transceiver could
427 			 * change his state automatically to STATE_BUSY_RX_AACK
428 			 * if a SHR was detected. This is not an error, but we
429 			 * can't assert this.
430 			 */
431 			if (ctx->to_state == STATE_RX_AACK_ON)
432 				goto done;
433 
434 			/* If we change to STATE_TX_ON without forcing and
435 			 * transceiver state is STATE_BUSY_RX_AACK, we wait
436 			 * 'tFrame + tPAck' receiving time. In this time the
437 			 * PDU should be received. If the transceiver is still
438 			 * in STATE_BUSY_RX_AACK, we run a force state change
439 			 * to STATE_TX_ON. This is a timeout handling, if the
440 			 * transceiver stucks in STATE_BUSY_RX_AACK.
441 			 *
442 			 * Additional we do several retries to try to get into
443 			 * TX_ON state without forcing. If the retries are
444 			 * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
445 			 * will do a force change.
446 			 */
447 			if (ctx->to_state == STATE_TX_ON ||
448 			    ctx->to_state == STATE_TRX_OFF) {
449 				u8 state = ctx->to_state;
450 
451 				if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
452 					state = STATE_FORCE_TRX_OFF;
453 				lp->tx_retry++;
454 
455 				at86rf230_async_state_change(lp, ctx, state,
456 							     ctx->complete);
457 				return;
458 			}
459 		}
460 
461 		dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
462 			 ctx->from_state, ctx->to_state, trx_state);
463 	}
464 
465 done:
466 	if (ctx->complete)
467 		ctx->complete(context);
468 }
469 
470 static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
471 {
472 	struct at86rf230_state_change *ctx =
473 		container_of(timer, struct at86rf230_state_change, timer);
474 	struct at86rf230_local *lp = ctx->lp;
475 
476 	at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
477 				 at86rf230_async_state_assert);
478 
479 	return HRTIMER_NORESTART;
480 }
481 
482 /* Do state change timing delay. */
483 static void
484 at86rf230_async_state_delay(void *context)
485 {
486 	struct at86rf230_state_change *ctx = context;
487 	struct at86rf230_local *lp = ctx->lp;
488 	struct at86rf2xx_chip_data *c = lp->data;
489 	bool force = false;
490 	ktime_t tim;
491 
492 	/* The force state changes are will show as normal states in the
493 	 * state status subregister. We change the to_state to the
494 	 * corresponding one and remember if it was a force change, this
495 	 * differs if we do a state change from STATE_BUSY_RX_AACK.
496 	 */
497 	switch (ctx->to_state) {
498 	case STATE_FORCE_TX_ON:
499 		ctx->to_state = STATE_TX_ON;
500 		force = true;
501 		break;
502 	case STATE_FORCE_TRX_OFF:
503 		ctx->to_state = STATE_TRX_OFF;
504 		force = true;
505 		break;
506 	default:
507 		break;
508 	}
509 
510 	switch (ctx->from_state) {
511 	case STATE_TRX_OFF:
512 		switch (ctx->to_state) {
513 		case STATE_RX_AACK_ON:
514 			tim = c->t_off_to_aack * NSEC_PER_USEC;
515 			/* state change from TRX_OFF to RX_AACK_ON to do a
516 			 * calibration, we need to reset the timeout for the
517 			 * next one.
518 			 */
519 			lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
520 			goto change;
521 		case STATE_TX_ARET_ON:
522 		case STATE_TX_ON:
523 			tim = c->t_off_to_tx_on * NSEC_PER_USEC;
524 			/* state change from TRX_OFF to TX_ON or ARET_ON to do
525 			 * a calibration, we need to reset the timeout for the
526 			 * next one.
527 			 */
528 			lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
529 			goto change;
530 		default:
531 			break;
532 		}
533 		break;
534 	case STATE_BUSY_RX_AACK:
535 		switch (ctx->to_state) {
536 		case STATE_TRX_OFF:
537 		case STATE_TX_ON:
538 			/* Wait for worst case receiving time if we
539 			 * didn't make a force change from BUSY_RX_AACK
540 			 * to TX_ON or TRX_OFF.
541 			 */
542 			if (!force) {
543 				tim = (c->t_frame + c->t_p_ack) * NSEC_PER_USEC;
544 				goto change;
545 			}
546 			break;
547 		default:
548 			break;
549 		}
550 		break;
551 	/* Default value, means RESET state */
552 	case STATE_P_ON:
553 		switch (ctx->to_state) {
554 		case STATE_TRX_OFF:
555 			tim = c->t_reset_to_off * NSEC_PER_USEC;
556 			goto change;
557 		default:
558 			break;
559 		}
560 		break;
561 	default:
562 		break;
563 	}
564 
565 	/* Default delay is 1us in the most cases */
566 	udelay(1);
567 	at86rf230_async_state_timer(&ctx->timer);
568 	return;
569 
570 change:
571 	hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
572 }
573 
574 static void
575 at86rf230_async_state_change_start(void *context)
576 {
577 	struct at86rf230_state_change *ctx = context;
578 	struct at86rf230_local *lp = ctx->lp;
579 	u8 *buf = ctx->buf;
580 	const u8 trx_state = buf[1] & TRX_STATE_MASK;
581 
582 	/* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
583 	if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
584 		udelay(1);
585 		at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
586 					 at86rf230_async_state_change_start);
587 		return;
588 	}
589 
590 	/* Check if we already are in the state which we change in */
591 	if (trx_state == ctx->to_state) {
592 		if (ctx->complete)
593 			ctx->complete(context);
594 		return;
595 	}
596 
597 	/* Set current state to the context of state change */
598 	ctx->from_state = trx_state;
599 
600 	/* Going into the next step for a state change which do a timing
601 	 * relevant delay.
602 	 */
603 	at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx,
604 				  at86rf230_async_state_delay);
605 }
606 
607 static void
608 at86rf230_async_state_change(struct at86rf230_local *lp,
609 			     struct at86rf230_state_change *ctx,
610 			     const u8 state, void (*complete)(void *context))
611 {
612 	/* Initialization for the state change context */
613 	ctx->to_state = state;
614 	ctx->complete = complete;
615 	at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
616 				 at86rf230_async_state_change_start);
617 }
618 
619 static void
620 at86rf230_sync_state_change_complete(void *context)
621 {
622 	struct at86rf230_state_change *ctx = context;
623 	struct at86rf230_local *lp = ctx->lp;
624 
625 	complete(&lp->state_complete);
626 }
627 
628 /* This function do a sync framework above the async state change.
629  * Some callbacks of the IEEE 802.15.4 driver interface need to be
630  * handled synchronously.
631  */
632 static int
633 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
634 {
635 	unsigned long rc;
636 
637 	at86rf230_async_state_change(lp, &lp->state, state,
638 				     at86rf230_sync_state_change_complete);
639 
640 	rc = wait_for_completion_timeout(&lp->state_complete,
641 					 msecs_to_jiffies(100));
642 	if (!rc) {
643 		at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
644 		return -ETIMEDOUT;
645 	}
646 
647 	return 0;
648 }
649 
650 static void
651 at86rf230_tx_complete(void *context)
652 {
653 	struct at86rf230_state_change *ctx = context;
654 	struct at86rf230_local *lp = ctx->lp;
655 
656 	ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
657 	kfree(ctx);
658 }
659 
660 static void
661 at86rf230_tx_on(void *context)
662 {
663 	struct at86rf230_state_change *ctx = context;
664 	struct at86rf230_local *lp = ctx->lp;
665 
666 	at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
667 				     at86rf230_tx_complete);
668 }
669 
670 static void
671 at86rf230_tx_trac_check(void *context)
672 {
673 	struct at86rf230_state_change *ctx = context;
674 	struct at86rf230_local *lp = ctx->lp;
675 
676 	if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
677 		u8 trac = TRAC_MASK(ctx->buf[1]);
678 
679 		switch (trac) {
680 		case TRAC_SUCCESS:
681 			lp->trac.success++;
682 			break;
683 		case TRAC_SUCCESS_DATA_PENDING:
684 			lp->trac.success_data_pending++;
685 			break;
686 		case TRAC_CHANNEL_ACCESS_FAILURE:
687 			lp->trac.channel_access_failure++;
688 			break;
689 		case TRAC_NO_ACK:
690 			lp->trac.no_ack++;
691 			break;
692 		case TRAC_INVALID:
693 			lp->trac.invalid++;
694 			break;
695 		default:
696 			WARN_ONCE(1, "received tx trac status %d\n", trac);
697 			break;
698 		}
699 	}
700 
701 	at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on);
702 }
703 
704 static void
705 at86rf230_rx_read_frame_complete(void *context)
706 {
707 	struct at86rf230_state_change *ctx = context;
708 	struct at86rf230_local *lp = ctx->lp;
709 	const u8 *buf = ctx->buf;
710 	struct sk_buff *skb;
711 	u8 len, lqi;
712 
713 	len = buf[1];
714 	if (!ieee802154_is_valid_psdu_len(len)) {
715 		dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
716 		len = IEEE802154_MTU;
717 	}
718 	lqi = buf[2 + len];
719 
720 	skb = dev_alloc_skb(IEEE802154_MTU);
721 	if (!skb) {
722 		dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
723 		kfree(ctx);
724 		return;
725 	}
726 
727 	skb_put_data(skb, buf + 2, len);
728 	ieee802154_rx_irqsafe(lp->hw, skb, lqi);
729 	kfree(ctx);
730 }
731 
732 static void
733 at86rf230_rx_trac_check(void *context)
734 {
735 	struct at86rf230_state_change *ctx = context;
736 	struct at86rf230_local *lp = ctx->lp;
737 	u8 *buf = ctx->buf;
738 	int rc;
739 
740 	if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
741 		u8 trac = TRAC_MASK(buf[1]);
742 
743 		switch (trac) {
744 		case TRAC_SUCCESS:
745 			lp->trac.success++;
746 			break;
747 		case TRAC_SUCCESS_WAIT_FOR_ACK:
748 			lp->trac.success_wait_for_ack++;
749 			break;
750 		case TRAC_INVALID:
751 			lp->trac.invalid++;
752 			break;
753 		default:
754 			WARN_ONCE(1, "received rx trac status %d\n", trac);
755 			break;
756 		}
757 	}
758 
759 	buf[0] = CMD_FB;
760 	ctx->trx.len = AT86RF2XX_MAX_BUF;
761 	ctx->msg.complete = at86rf230_rx_read_frame_complete;
762 	rc = spi_async(lp->spi, &ctx->msg);
763 	if (rc) {
764 		ctx->trx.len = 2;
765 		at86rf230_async_error(lp, ctx, rc);
766 	}
767 }
768 
769 static void
770 at86rf230_irq_trx_end(void *context)
771 {
772 	struct at86rf230_state_change *ctx = context;
773 	struct at86rf230_local *lp = ctx->lp;
774 
775 	if (lp->is_tx) {
776 		lp->is_tx = 0;
777 		at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
778 					 at86rf230_tx_trac_check);
779 	} else {
780 		at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
781 					 at86rf230_rx_trac_check);
782 	}
783 }
784 
785 static void
786 at86rf230_irq_status(void *context)
787 {
788 	struct at86rf230_state_change *ctx = context;
789 	struct at86rf230_local *lp = ctx->lp;
790 	const u8 *buf = ctx->buf;
791 	u8 irq = buf[1];
792 
793 	enable_irq(lp->spi->irq);
794 
795 	if (irq & IRQ_TRX_END) {
796 		at86rf230_irq_trx_end(ctx);
797 	} else {
798 		dev_err(&lp->spi->dev, "not supported irq %02x received\n",
799 			irq);
800 		kfree(ctx);
801 	}
802 }
803 
804 static void
805 at86rf230_setup_spi_messages(struct at86rf230_local *lp,
806 			     struct at86rf230_state_change *state)
807 {
808 	state->lp = lp;
809 	state->irq = lp->spi->irq;
810 	spi_message_init(&state->msg);
811 	state->msg.context = state;
812 	state->trx.len = 2;
813 	state->trx.tx_buf = state->buf;
814 	state->trx.rx_buf = state->buf;
815 	spi_message_add_tail(&state->trx, &state->msg);
816 	hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
817 	state->timer.function = at86rf230_async_state_timer;
818 }
819 
820 static irqreturn_t at86rf230_isr(int irq, void *data)
821 {
822 	struct at86rf230_local *lp = data;
823 	struct at86rf230_state_change *ctx;
824 	int rc;
825 
826 	disable_irq_nosync(irq);
827 
828 	ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC);
829 	if (!ctx) {
830 		enable_irq(irq);
831 		return IRQ_NONE;
832 	}
833 
834 	at86rf230_setup_spi_messages(lp, ctx);
835 	/* tell on error handling to free ctx */
836 	ctx->free = true;
837 
838 	ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
839 	ctx->msg.complete = at86rf230_irq_status;
840 	rc = spi_async(lp->spi, &ctx->msg);
841 	if (rc) {
842 		at86rf230_async_error(lp, ctx, rc);
843 		enable_irq(irq);
844 		return IRQ_NONE;
845 	}
846 
847 	return IRQ_HANDLED;
848 }
849 
850 static void
851 at86rf230_write_frame_complete(void *context)
852 {
853 	struct at86rf230_state_change *ctx = context;
854 	struct at86rf230_local *lp = ctx->lp;
855 
856 	ctx->trx.len = 2;
857 
858 	if (gpio_is_valid(lp->slp_tr))
859 		at86rf230_slp_tr_rising_edge(lp);
860 	else
861 		at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx,
862 					  NULL);
863 }
864 
865 static void
866 at86rf230_write_frame(void *context)
867 {
868 	struct at86rf230_state_change *ctx = context;
869 	struct at86rf230_local *lp = ctx->lp;
870 	struct sk_buff *skb = lp->tx_skb;
871 	u8 *buf = ctx->buf;
872 	int rc;
873 
874 	lp->is_tx = 1;
875 
876 	buf[0] = CMD_FB | CMD_WRITE;
877 	buf[1] = skb->len + 2;
878 	memcpy(buf + 2, skb->data, skb->len);
879 	ctx->trx.len = skb->len + 2;
880 	ctx->msg.complete = at86rf230_write_frame_complete;
881 	rc = spi_async(lp->spi, &ctx->msg);
882 	if (rc) {
883 		ctx->trx.len = 2;
884 		at86rf230_async_error(lp, ctx, rc);
885 	}
886 }
887 
888 static void
889 at86rf230_xmit_tx_on(void *context)
890 {
891 	struct at86rf230_state_change *ctx = context;
892 	struct at86rf230_local *lp = ctx->lp;
893 
894 	at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
895 				     at86rf230_write_frame);
896 }
897 
898 static void
899 at86rf230_xmit_start(void *context)
900 {
901 	struct at86rf230_state_change *ctx = context;
902 	struct at86rf230_local *lp = ctx->lp;
903 
904 	/* check if we change from off state */
905 	if (lp->is_tx_from_off)
906 		at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
907 					     at86rf230_write_frame);
908 	else
909 		at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
910 					     at86rf230_xmit_tx_on);
911 }
912 
913 static int
914 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
915 {
916 	struct at86rf230_local *lp = hw->priv;
917 	struct at86rf230_state_change *ctx = &lp->tx;
918 
919 	lp->tx_skb = skb;
920 	lp->tx_retry = 0;
921 
922 	/* After 5 minutes in PLL and the same frequency we run again the
923 	 * calibration loops which is recommended by at86rf2xx datasheets.
924 	 *
925 	 * The calibration is initiate by a state change from TRX_OFF
926 	 * to TX_ON, the lp->cal_timeout should be reinit by state_delay
927 	 * function then to start in the next 5 minutes.
928 	 */
929 	if (time_is_before_jiffies(lp->cal_timeout)) {
930 		lp->is_tx_from_off = true;
931 		at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
932 					     at86rf230_xmit_start);
933 	} else {
934 		lp->is_tx_from_off = false;
935 		at86rf230_xmit_start(ctx);
936 	}
937 
938 	return 0;
939 }
940 
941 static int
942 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
943 {
944 	WARN_ON(!level);
945 	*level = 0xbe;
946 	return 0;
947 }
948 
949 static int
950 at86rf230_start(struct ieee802154_hw *hw)
951 {
952 	struct at86rf230_local *lp = hw->priv;
953 
954 	/* reset trac stats on start */
955 	if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS))
956 		memset(&lp->trac, 0, sizeof(struct at86rf230_trac));
957 
958 	at86rf230_awake(lp);
959 	enable_irq(lp->spi->irq);
960 
961 	return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
962 }
963 
964 static void
965 at86rf230_stop(struct ieee802154_hw *hw)
966 {
967 	struct at86rf230_local *lp = hw->priv;
968 	u8 csma_seed[2];
969 
970 	at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
971 
972 	disable_irq(lp->spi->irq);
973 
974 	/* It's recommended to set random new csma_seeds before sleep state.
975 	 * Makes only sense in the stop callback, not doing this inside of
976 	 * at86rf230_sleep, this is also used when we don't transmit afterwards
977 	 * when calling start callback again.
978 	 */
979 	get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
980 	at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
981 	at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
982 
983 	at86rf230_sleep(lp);
984 }
985 
986 static int
987 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
988 {
989 	return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
990 }
991 
992 #define AT86RF2XX_MAX_ED_LEVELS 0xF
993 static const s32 at86rf233_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
994 	-9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000, -7800, -7600,
995 	-7400, -7200, -7000, -6800, -6600, -6400,
996 };
997 
998 static const s32 at86rf231_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
999 	-9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
1000 	-7100, -6900, -6700, -6500, -6300, -6100,
1001 };
1002 
1003 static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
1004 	-10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
1005 	-8000, -7800, -7600, -7400, -7200, -7000,
1006 };
1007 
1008 static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
1009 	-9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
1010 	-7800, -7600, -7400, -7200, -7000, -6800,
1011 };
1012 
1013 static inline int
1014 at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
1015 {
1016 	unsigned int cca_ed_thres;
1017 	int rc;
1018 
1019 	rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
1020 	if (rc < 0)
1021 		return rc;
1022 
1023 	switch (rssi_base_val) {
1024 	case -98:
1025 		lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
1026 		lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
1027 		lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
1028 		break;
1029 	case -100:
1030 		lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1031 		lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1032 		lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
1033 		break;
1034 	default:
1035 		WARN_ON(1);
1036 	}
1037 
1038 	return 0;
1039 }
1040 
1041 static int
1042 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1043 {
1044 	int rc;
1045 
1046 	if (channel == 0)
1047 		rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1048 	else
1049 		rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1050 	if (rc < 0)
1051 		return rc;
1052 
1053 	if (page == 0) {
1054 		rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1055 		lp->data->rssi_base_val = -100;
1056 	} else {
1057 		rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1058 		lp->data->rssi_base_val = -98;
1059 	}
1060 	if (rc < 0)
1061 		return rc;
1062 
1063 	rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
1064 	if (rc < 0)
1065 		return rc;
1066 
1067 	/* This sets the symbol_duration according frequency on the 212.
1068 	 * TODO move this handling while set channel and page in cfg802154.
1069 	 * We can do that, this timings are according 802.15.4 standard.
1070 	 * If we do that in cfg802154, this is a more generic calculation.
1071 	 *
1072 	 * This should also protected from ifs_timer. Means cancel timer and
1073 	 * init with a new value. For now, this is okay.
1074 	 */
1075 	if (channel == 0) {
1076 		if (page == 0) {
1077 			/* SUB:0 and BPSK:0 -> BPSK-20 */
1078 			lp->hw->phy->symbol_duration = 50;
1079 		} else {
1080 			/* SUB:1 and BPSK:0 -> BPSK-40 */
1081 			lp->hw->phy->symbol_duration = 25;
1082 		}
1083 	} else {
1084 		if (page == 0)
1085 			/* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1086 			lp->hw->phy->symbol_duration = 40;
1087 		else
1088 			/* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1089 			lp->hw->phy->symbol_duration = 16;
1090 	}
1091 
1092 	lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
1093 				   lp->hw->phy->symbol_duration;
1094 	lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
1095 				   lp->hw->phy->symbol_duration;
1096 
1097 	return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1098 }
1099 
1100 static int
1101 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1102 {
1103 	struct at86rf230_local *lp = hw->priv;
1104 	int rc;
1105 
1106 	rc = lp->data->set_channel(lp, page, channel);
1107 	/* Wait for PLL */
1108 	usleep_range(lp->data->t_channel_switch,
1109 		     lp->data->t_channel_switch + 10);
1110 
1111 	lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
1112 	return rc;
1113 }
1114 
1115 static int
1116 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1117 			   struct ieee802154_hw_addr_filt *filt,
1118 			   unsigned long changed)
1119 {
1120 	struct at86rf230_local *lp = hw->priv;
1121 
1122 	if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1123 		u16 addr = le16_to_cpu(filt->short_addr);
1124 
1125 		dev_vdbg(&lp->spi->dev, "%s called for saddr\n", __func__);
1126 		__at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1127 		__at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1128 	}
1129 
1130 	if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1131 		u16 pan = le16_to_cpu(filt->pan_id);
1132 
1133 		dev_vdbg(&lp->spi->dev, "%s called for pan id\n", __func__);
1134 		__at86rf230_write(lp, RG_PAN_ID_0, pan);
1135 		__at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1136 	}
1137 
1138 	if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1139 		u8 i, addr[8];
1140 
1141 		memcpy(addr, &filt->ieee_addr, 8);
1142 		dev_vdbg(&lp->spi->dev, "%s called for IEEE addr\n", __func__);
1143 		for (i = 0; i < 8; i++)
1144 			__at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1145 	}
1146 
1147 	if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1148 		dev_vdbg(&lp->spi->dev, "%s called for panc change\n", __func__);
1149 		if (filt->pan_coord)
1150 			at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1151 		else
1152 			at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1153 	}
1154 
1155 	return 0;
1156 }
1157 
1158 #define AT86RF23X_MAX_TX_POWERS 0xF
1159 static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1160 	400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
1161 	-800, -1200, -1700,
1162 };
1163 
1164 static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1165 	300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
1166 	-900, -1200, -1700,
1167 };
1168 
1169 #define AT86RF212_MAX_TX_POWERS 0x1F
1170 static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
1171 	500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
1172 	-800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
1173 	-1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
1174 };
1175 
1176 static int
1177 at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
1178 {
1179 	u32 i;
1180 
1181 	for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1182 		if (lp->hw->phy->supported.tx_powers[i] == mbm)
1183 			return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
1184 	}
1185 
1186 	return -EINVAL;
1187 }
1188 
1189 static int
1190 at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
1191 {
1192 	u32 i;
1193 
1194 	for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1195 		if (lp->hw->phy->supported.tx_powers[i] == mbm)
1196 			return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
1197 	}
1198 
1199 	return -EINVAL;
1200 }
1201 
1202 static int
1203 at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
1204 {
1205 	struct at86rf230_local *lp = hw->priv;
1206 
1207 	return lp->data->set_txpower(lp, mbm);
1208 }
1209 
1210 static int
1211 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1212 {
1213 	struct at86rf230_local *lp = hw->priv;
1214 
1215 	return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1216 }
1217 
1218 static int
1219 at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1220 		       const struct wpan_phy_cca *cca)
1221 {
1222 	struct at86rf230_local *lp = hw->priv;
1223 	u8 val;
1224 
1225 	/* mapping 802.15.4 to driver spec */
1226 	switch (cca->mode) {
1227 	case NL802154_CCA_ENERGY:
1228 		val = 1;
1229 		break;
1230 	case NL802154_CCA_CARRIER:
1231 		val = 2;
1232 		break;
1233 	case NL802154_CCA_ENERGY_CARRIER:
1234 		switch (cca->opt) {
1235 		case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1236 			val = 3;
1237 			break;
1238 		case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1239 			val = 0;
1240 			break;
1241 		default:
1242 			return -EINVAL;
1243 		}
1244 		break;
1245 	default:
1246 		return -EINVAL;
1247 	}
1248 
1249 	return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1250 }
1251 
1252 static int
1253 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
1254 {
1255 	struct at86rf230_local *lp = hw->priv;
1256 	u32 i;
1257 
1258 	for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
1259 		if (hw->phy->supported.cca_ed_levels[i] == mbm)
1260 			return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
1261 	}
1262 
1263 	return -EINVAL;
1264 }
1265 
1266 static int
1267 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1268 			  u8 retries)
1269 {
1270 	struct at86rf230_local *lp = hw->priv;
1271 	int rc;
1272 
1273 	rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1274 	if (rc)
1275 		return rc;
1276 
1277 	rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1278 	if (rc)
1279 		return rc;
1280 
1281 	return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1282 }
1283 
1284 static int
1285 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1286 {
1287 	struct at86rf230_local *lp = hw->priv;
1288 
1289 	return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1290 }
1291 
1292 static int
1293 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1294 {
1295 	struct at86rf230_local *lp = hw->priv;
1296 	int rc;
1297 
1298 	if (on) {
1299 		rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1300 		if (rc < 0)
1301 			return rc;
1302 
1303 		rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1304 		if (rc < 0)
1305 			return rc;
1306 	} else {
1307 		rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1308 		if (rc < 0)
1309 			return rc;
1310 
1311 		rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1312 		if (rc < 0)
1313 			return rc;
1314 	}
1315 
1316 	return 0;
1317 }
1318 
1319 static const struct ieee802154_ops at86rf230_ops = {
1320 	.owner = THIS_MODULE,
1321 	.xmit_async = at86rf230_xmit,
1322 	.ed = at86rf230_ed,
1323 	.set_channel = at86rf230_channel,
1324 	.start = at86rf230_start,
1325 	.stop = at86rf230_stop,
1326 	.set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1327 	.set_txpower = at86rf230_set_txpower,
1328 	.set_lbt = at86rf230_set_lbt,
1329 	.set_cca_mode = at86rf230_set_cca_mode,
1330 	.set_cca_ed_level = at86rf230_set_cca_ed_level,
1331 	.set_csma_params = at86rf230_set_csma_params,
1332 	.set_frame_retries = at86rf230_set_frame_retries,
1333 	.set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1334 };
1335 
1336 static struct at86rf2xx_chip_data at86rf233_data = {
1337 	.t_sleep_cycle = 330,
1338 	.t_channel_switch = 11,
1339 	.t_reset_to_off = 26,
1340 	.t_off_to_aack = 80,
1341 	.t_off_to_tx_on = 80,
1342 	.t_off_to_sleep = 35,
1343 	.t_sleep_to_off = 1000,
1344 	.t_frame = 4096,
1345 	.t_p_ack = 545,
1346 	.rssi_base_val = -94,
1347 	.set_channel = at86rf23x_set_channel,
1348 	.set_txpower = at86rf23x_set_txpower,
1349 };
1350 
1351 static struct at86rf2xx_chip_data at86rf231_data = {
1352 	.t_sleep_cycle = 330,
1353 	.t_channel_switch = 24,
1354 	.t_reset_to_off = 37,
1355 	.t_off_to_aack = 110,
1356 	.t_off_to_tx_on = 110,
1357 	.t_off_to_sleep = 35,
1358 	.t_sleep_to_off = 1000,
1359 	.t_frame = 4096,
1360 	.t_p_ack = 545,
1361 	.rssi_base_val = -91,
1362 	.set_channel = at86rf23x_set_channel,
1363 	.set_txpower = at86rf23x_set_txpower,
1364 };
1365 
1366 static struct at86rf2xx_chip_data at86rf212_data = {
1367 	.t_sleep_cycle = 330,
1368 	.t_channel_switch = 11,
1369 	.t_reset_to_off = 26,
1370 	.t_off_to_aack = 200,
1371 	.t_off_to_tx_on = 200,
1372 	.t_off_to_sleep = 35,
1373 	.t_sleep_to_off = 1000,
1374 	.t_frame = 4096,
1375 	.t_p_ack = 545,
1376 	.rssi_base_val = -100,
1377 	.set_channel = at86rf212_set_channel,
1378 	.set_txpower = at86rf212_set_txpower,
1379 };
1380 
1381 static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1382 {
1383 	int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1384 	unsigned int dvdd;
1385 	u8 csma_seed[2];
1386 
1387 	rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1388 	if (rc)
1389 		return rc;
1390 
1391 	irq_type = irq_get_trigger_type(lp->spi->irq);
1392 	if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1393 	    irq_type == IRQ_TYPE_LEVEL_LOW)
1394 		irq_pol = IRQ_ACTIVE_LOW;
1395 
1396 	rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1397 	if (rc)
1398 		return rc;
1399 
1400 	rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1401 	if (rc)
1402 		return rc;
1403 
1404 	rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1405 	if (rc)
1406 		return rc;
1407 
1408 	/* reset values differs in at86rf231 and at86rf233 */
1409 	rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1410 	if (rc)
1411 		return rc;
1412 
1413 	get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1414 	rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1415 	if (rc)
1416 		return rc;
1417 	rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1418 	if (rc)
1419 		return rc;
1420 
1421 	/* CLKM changes are applied immediately */
1422 	rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1423 	if (rc)
1424 		return rc;
1425 
1426 	/* Turn CLKM Off */
1427 	rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1428 	if (rc)
1429 		return rc;
1430 	/* Wait the next SLEEP cycle */
1431 	usleep_range(lp->data->t_sleep_cycle,
1432 		     lp->data->t_sleep_cycle + 100);
1433 
1434 	/* xtal_trim value is calculated by:
1435 	 * CL = 0.5 * (CX + CTRIM + CPAR)
1436 	 *
1437 	 * whereas:
1438 	 * CL = capacitor of used crystal
1439 	 * CX = connected capacitors at xtal pins
1440 	 * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1441 	 *	  but this is different on each board setup. You need to fine
1442 	 *	  tuning this value via CTRIM.
1443 	 * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1444 	 *	   0 pF upto 4.5 pF.
1445 	 *
1446 	 * Examples:
1447 	 * atben transceiver:
1448 	 *
1449 	 * CL = 8 pF
1450 	 * CX = 12 pF
1451 	 * CPAR = 3 pF (We assume the magic constant from datasheet)
1452 	 * CTRIM = 0.9 pF
1453 	 *
1454 	 * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1455 	 *
1456 	 * xtal_trim = 0x3
1457 	 *
1458 	 * openlabs transceiver:
1459 	 *
1460 	 * CL = 16 pF
1461 	 * CX = 22 pF
1462 	 * CPAR = 3 pF (We assume the magic constant from datasheet)
1463 	 * CTRIM = 4.5 pF
1464 	 *
1465 	 * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1466 	 *
1467 	 * xtal_trim = 0xf
1468 	 */
1469 	rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1470 	if (rc)
1471 		return rc;
1472 
1473 	rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1474 	if (rc)
1475 		return rc;
1476 	if (!dvdd) {
1477 		dev_err(&lp->spi->dev, "DVDD error\n");
1478 		return -EINVAL;
1479 	}
1480 
1481 	/* Force setting slotted operation bit to 0. Sometimes the atben
1482 	 * sets this bit and I don't know why. We set this always force
1483 	 * to zero while probing.
1484 	 */
1485 	return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1486 }
1487 
1488 static int
1489 at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
1490 		    u8 *xtal_trim)
1491 {
1492 	struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1493 	int ret;
1494 
1495 	if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
1496 		if (!pdata)
1497 			return -ENOENT;
1498 
1499 		*rstn = pdata->rstn;
1500 		*slp_tr = pdata->slp_tr;
1501 		*xtal_trim = pdata->xtal_trim;
1502 		return 0;
1503 	}
1504 
1505 	*rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1506 	*slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1507 	ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
1508 	if (ret < 0 && ret != -EINVAL)
1509 		return ret;
1510 
1511 	return 0;
1512 }
1513 
1514 static int
1515 at86rf230_detect_device(struct at86rf230_local *lp)
1516 {
1517 	unsigned int part, version, val;
1518 	u16 man_id = 0;
1519 	const char *chip;
1520 	int rc;
1521 
1522 	rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1523 	if (rc)
1524 		return rc;
1525 	man_id |= val;
1526 
1527 	rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1528 	if (rc)
1529 		return rc;
1530 	man_id |= (val << 8);
1531 
1532 	rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1533 	if (rc)
1534 		return rc;
1535 
1536 	rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1537 	if (rc)
1538 		return rc;
1539 
1540 	if (man_id != 0x001f) {
1541 		dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1542 			man_id >> 8, man_id & 0xFF);
1543 		return -EINVAL;
1544 	}
1545 
1546 	lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
1547 			IEEE802154_HW_CSMA_PARAMS |
1548 			IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
1549 			IEEE802154_HW_PROMISCUOUS;
1550 
1551 	lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
1552 			     WPAN_PHY_FLAG_CCA_ED_LEVEL |
1553 			     WPAN_PHY_FLAG_CCA_MODE;
1554 
1555 	lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
1556 		BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
1557 	lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
1558 		BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
1559 
1560 	lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1561 
1562 	switch (part) {
1563 	case 2:
1564 		chip = "at86rf230";
1565 		rc = -ENOTSUPP;
1566 		goto not_supp;
1567 	case 3:
1568 		chip = "at86rf231";
1569 		lp->data = &at86rf231_data;
1570 		lp->hw->phy->supported.channels[0] = 0x7FFF800;
1571 		lp->hw->phy->current_channel = 11;
1572 		lp->hw->phy->symbol_duration = 16;
1573 		lp->hw->phy->supported.tx_powers = at86rf231_powers;
1574 		lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
1575 		lp->hw->phy->supported.cca_ed_levels = at86rf231_ed_levels;
1576 		lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf231_ed_levels);
1577 		break;
1578 	case 7:
1579 		chip = "at86rf212";
1580 		lp->data = &at86rf212_data;
1581 		lp->hw->flags |= IEEE802154_HW_LBT;
1582 		lp->hw->phy->supported.channels[0] = 0x00007FF;
1583 		lp->hw->phy->supported.channels[2] = 0x00007FF;
1584 		lp->hw->phy->current_channel = 5;
1585 		lp->hw->phy->symbol_duration = 25;
1586 		lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
1587 		lp->hw->phy->supported.tx_powers = at86rf212_powers;
1588 		lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
1589 		lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1590 		lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1591 		break;
1592 	case 11:
1593 		chip = "at86rf233";
1594 		lp->data = &at86rf233_data;
1595 		lp->hw->phy->supported.channels[0] = 0x7FFF800;
1596 		lp->hw->phy->current_channel = 13;
1597 		lp->hw->phy->symbol_duration = 16;
1598 		lp->hw->phy->supported.tx_powers = at86rf233_powers;
1599 		lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
1600 		lp->hw->phy->supported.cca_ed_levels = at86rf233_ed_levels;
1601 		lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf233_ed_levels);
1602 		break;
1603 	default:
1604 		chip = "unknown";
1605 		rc = -ENOTSUPP;
1606 		goto not_supp;
1607 	}
1608 
1609 	lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
1610 	lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
1611 
1612 not_supp:
1613 	dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1614 
1615 	return rc;
1616 }
1617 
1618 #ifdef CONFIG_IEEE802154_AT86RF230_DEBUGFS
1619 static struct dentry *at86rf230_debugfs_root;
1620 
1621 static int at86rf230_stats_show(struct seq_file *file, void *offset)
1622 {
1623 	struct at86rf230_local *lp = file->private;
1624 
1625 	seq_printf(file, "SUCCESS:\t\t%8llu\n", lp->trac.success);
1626 	seq_printf(file, "SUCCESS_DATA_PENDING:\t%8llu\n",
1627 		   lp->trac.success_data_pending);
1628 	seq_printf(file, "SUCCESS_WAIT_FOR_ACK:\t%8llu\n",
1629 		   lp->trac.success_wait_for_ack);
1630 	seq_printf(file, "CHANNEL_ACCESS_FAILURE:\t%8llu\n",
1631 		   lp->trac.channel_access_failure);
1632 	seq_printf(file, "NO_ACK:\t\t\t%8llu\n", lp->trac.no_ack);
1633 	seq_printf(file, "INVALID:\t\t%8llu\n", lp->trac.invalid);
1634 	return 0;
1635 }
1636 DEFINE_SHOW_ATTRIBUTE(at86rf230_stats);
1637 
1638 static void at86rf230_debugfs_init(struct at86rf230_local *lp)
1639 {
1640 	char debugfs_dir_name[DNAME_INLINE_LEN + 1] = "at86rf230-";
1641 
1642 	strncat(debugfs_dir_name, dev_name(&lp->spi->dev), DNAME_INLINE_LEN);
1643 
1644 	at86rf230_debugfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
1645 
1646 	debugfs_create_file("trac_stats", 0444, at86rf230_debugfs_root, lp,
1647 			    &at86rf230_stats_fops);
1648 }
1649 
1650 static void at86rf230_debugfs_remove(void)
1651 {
1652 	debugfs_remove_recursive(at86rf230_debugfs_root);
1653 }
1654 #else
1655 static void at86rf230_debugfs_init(struct at86rf230_local *lp) { }
1656 static void at86rf230_debugfs_remove(void) { }
1657 #endif
1658 
1659 static int at86rf230_probe(struct spi_device *spi)
1660 {
1661 	struct ieee802154_hw *hw;
1662 	struct at86rf230_local *lp;
1663 	unsigned int status;
1664 	int rc, irq_type, rstn, slp_tr;
1665 	u8 xtal_trim = 0;
1666 
1667 	if (!spi->irq) {
1668 		dev_err(&spi->dev, "no IRQ specified\n");
1669 		return -EINVAL;
1670 	}
1671 
1672 	rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
1673 	if (rc < 0) {
1674 		dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
1675 		return rc;
1676 	}
1677 
1678 	if (gpio_is_valid(rstn)) {
1679 		rc = devm_gpio_request_one(&spi->dev, rstn,
1680 					   GPIOF_OUT_INIT_HIGH, "rstn");
1681 		if (rc)
1682 			return rc;
1683 	}
1684 
1685 	if (gpio_is_valid(slp_tr)) {
1686 		rc = devm_gpio_request_one(&spi->dev, slp_tr,
1687 					   GPIOF_OUT_INIT_LOW, "slp_tr");
1688 		if (rc)
1689 			return rc;
1690 	}
1691 
1692 	/* Reset */
1693 	if (gpio_is_valid(rstn)) {
1694 		udelay(1);
1695 		gpio_set_value_cansleep(rstn, 0);
1696 		udelay(1);
1697 		gpio_set_value_cansleep(rstn, 1);
1698 		usleep_range(120, 240);
1699 	}
1700 
1701 	hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1702 	if (!hw)
1703 		return -ENOMEM;
1704 
1705 	lp = hw->priv;
1706 	lp->hw = hw;
1707 	lp->spi = spi;
1708 	lp->slp_tr = slp_tr;
1709 	hw->parent = &spi->dev;
1710 	ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1711 
1712 	lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1713 	if (IS_ERR(lp->regmap)) {
1714 		rc = PTR_ERR(lp->regmap);
1715 		dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1716 			rc);
1717 		goto free_dev;
1718 	}
1719 
1720 	at86rf230_setup_spi_messages(lp, &lp->state);
1721 	at86rf230_setup_spi_messages(lp, &lp->tx);
1722 
1723 	rc = at86rf230_detect_device(lp);
1724 	if (rc < 0)
1725 		goto free_dev;
1726 
1727 	init_completion(&lp->state_complete);
1728 
1729 	spi_set_drvdata(spi, lp);
1730 
1731 	rc = at86rf230_hw_init(lp, xtal_trim);
1732 	if (rc)
1733 		goto free_dev;
1734 
1735 	/* Read irq status register to reset irq line */
1736 	rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1737 	if (rc)
1738 		goto free_dev;
1739 
1740 	irq_type = irq_get_trigger_type(spi->irq);
1741 	if (!irq_type)
1742 		irq_type = IRQF_TRIGGER_HIGH;
1743 
1744 	rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1745 			      IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1746 	if (rc)
1747 		goto free_dev;
1748 
1749 	/* disable_irq by default and wait for starting hardware */
1750 	disable_irq(spi->irq);
1751 
1752 	/* going into sleep by default */
1753 	at86rf230_sleep(lp);
1754 
1755 	at86rf230_debugfs_init(lp);
1756 
1757 	rc = ieee802154_register_hw(lp->hw);
1758 	if (rc)
1759 		goto free_debugfs;
1760 
1761 	return rc;
1762 
1763 free_debugfs:
1764 	at86rf230_debugfs_remove();
1765 free_dev:
1766 	ieee802154_free_hw(lp->hw);
1767 
1768 	return rc;
1769 }
1770 
1771 static int at86rf230_remove(struct spi_device *spi)
1772 {
1773 	struct at86rf230_local *lp = spi_get_drvdata(spi);
1774 
1775 	/* mask all at86rf230 irq's */
1776 	at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1777 	ieee802154_unregister_hw(lp->hw);
1778 	ieee802154_free_hw(lp->hw);
1779 	at86rf230_debugfs_remove();
1780 	dev_dbg(&spi->dev, "unregistered at86rf230\n");
1781 
1782 	return 0;
1783 }
1784 
1785 static const struct of_device_id at86rf230_of_match[] = {
1786 	{ .compatible = "atmel,at86rf230", },
1787 	{ .compatible = "atmel,at86rf231", },
1788 	{ .compatible = "atmel,at86rf233", },
1789 	{ .compatible = "atmel,at86rf212", },
1790 	{ },
1791 };
1792 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1793 
1794 static const struct spi_device_id at86rf230_device_id[] = {
1795 	{ .name = "at86rf230", },
1796 	{ .name = "at86rf231", },
1797 	{ .name = "at86rf233", },
1798 	{ .name = "at86rf212", },
1799 	{ },
1800 };
1801 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1802 
1803 static struct spi_driver at86rf230_driver = {
1804 	.id_table = at86rf230_device_id,
1805 	.driver = {
1806 		.of_match_table = of_match_ptr(at86rf230_of_match),
1807 		.name	= "at86rf230",
1808 	},
1809 	.probe      = at86rf230_probe,
1810 	.remove     = at86rf230_remove,
1811 };
1812 
1813 module_spi_driver(at86rf230_driver);
1814 
1815 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1816 MODULE_LICENSE("GPL v2");
1817