1 /* 2 * AT86RF230/RF231 driver 3 * 4 * Copyright (C) 2009-2012 Siemens AG 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 8 * as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program; if not, write to the Free Software Foundation, Inc., 17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Written by: 20 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> 21 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com> 22 * Alexander Aring <aar@pengutronix.de> 23 */ 24 #include <linux/kernel.h> 25 #include <linux/module.h> 26 #include <linux/interrupt.h> 27 #include <linux/irq.h> 28 #include <linux/gpio.h> 29 #include <linux/delay.h> 30 #include <linux/spinlock.h> 31 #include <linux/spi/spi.h> 32 #include <linux/spi/at86rf230.h> 33 #include <linux/regmap.h> 34 #include <linux/skbuff.h> 35 #include <linux/of_gpio.h> 36 37 #include <net/ieee802154.h> 38 #include <net/mac802154.h> 39 #include <net/wpan-phy.h> 40 41 struct at86rf230_local; 42 /* at86rf2xx chip depend data. 43 * All timings are in us. 44 */ 45 struct at86rf2xx_chip_data { 46 u16 t_sleep_cycle; 47 u16 t_channel_switch; 48 u16 t_reset_to_off; 49 u16 t_off_to_aack; 50 u16 t_off_to_tx_on; 51 u16 t_frame; 52 u16 t_p_ack; 53 /* short interframe spacing time */ 54 u16 t_sifs; 55 /* long interframe spacing time */ 56 u16 t_lifs; 57 /* completion timeout for tx in msecs */ 58 u16 t_tx_timeout; 59 int rssi_base_val; 60 61 int (*set_channel)(struct at86rf230_local *, int, int); 62 int (*get_desense_steps)(struct at86rf230_local *, s32); 63 }; 64 65 #define AT86RF2XX_MAX_BUF (127 + 3) 66 67 struct at86rf230_state_change { 68 struct at86rf230_local *lp; 69 70 struct spi_message msg; 71 struct spi_transfer trx; 72 u8 buf[AT86RF2XX_MAX_BUF]; 73 74 void (*complete)(void *context); 75 u8 from_state; 76 u8 to_state; 77 }; 78 79 struct at86rf230_local { 80 struct spi_device *spi; 81 82 struct ieee802154_dev *dev; 83 struct at86rf2xx_chip_data *data; 84 struct regmap *regmap; 85 86 struct completion state_complete; 87 struct at86rf230_state_change state; 88 89 struct at86rf230_state_change irq; 90 91 bool tx_aret; 92 bool is_tx; 93 /* spinlock for is_tx protection */ 94 spinlock_t lock; 95 struct completion tx_complete; 96 struct sk_buff *tx_skb; 97 struct at86rf230_state_change tx; 98 }; 99 100 #define RG_TRX_STATUS (0x01) 101 #define SR_TRX_STATUS 0x01, 0x1f, 0 102 #define SR_RESERVED_01_3 0x01, 0x20, 5 103 #define SR_CCA_STATUS 0x01, 0x40, 6 104 #define SR_CCA_DONE 0x01, 0x80, 7 105 #define RG_TRX_STATE (0x02) 106 #define SR_TRX_CMD 0x02, 0x1f, 0 107 #define SR_TRAC_STATUS 0x02, 0xe0, 5 108 #define RG_TRX_CTRL_0 (0x03) 109 #define SR_CLKM_CTRL 0x03, 0x07, 0 110 #define SR_CLKM_SHA_SEL 0x03, 0x08, 3 111 #define SR_PAD_IO_CLKM 0x03, 0x30, 4 112 #define SR_PAD_IO 0x03, 0xc0, 6 113 #define RG_TRX_CTRL_1 (0x04) 114 #define SR_IRQ_POLARITY 0x04, 0x01, 0 115 #define SR_IRQ_MASK_MODE 0x04, 0x02, 1 116 #define SR_SPI_CMD_MODE 0x04, 0x0c, 2 117 #define SR_RX_BL_CTRL 0x04, 0x10, 4 118 #define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5 119 #define SR_IRQ_2_EXT_EN 0x04, 0x40, 6 120 #define SR_PA_EXT_EN 0x04, 0x80, 7 121 #define RG_PHY_TX_PWR (0x05) 122 #define SR_TX_PWR 0x05, 0x0f, 0 123 #define SR_PA_LT 0x05, 0x30, 4 124 #define SR_PA_BUF_LT 0x05, 0xc0, 6 125 #define RG_PHY_RSSI (0x06) 126 #define SR_RSSI 0x06, 0x1f, 0 127 #define SR_RND_VALUE 0x06, 0x60, 5 128 #define SR_RX_CRC_VALID 0x06, 0x80, 7 129 #define RG_PHY_ED_LEVEL (0x07) 130 #define SR_ED_LEVEL 0x07, 0xff, 0 131 #define RG_PHY_CC_CCA (0x08) 132 #define SR_CHANNEL 0x08, 0x1f, 0 133 #define SR_CCA_MODE 0x08, 0x60, 5 134 #define SR_CCA_REQUEST 0x08, 0x80, 7 135 #define RG_CCA_THRES (0x09) 136 #define SR_CCA_ED_THRES 0x09, 0x0f, 0 137 #define SR_RESERVED_09_1 0x09, 0xf0, 4 138 #define RG_RX_CTRL (0x0a) 139 #define SR_PDT_THRES 0x0a, 0x0f, 0 140 #define SR_RESERVED_0a_1 0x0a, 0xf0, 4 141 #define RG_SFD_VALUE (0x0b) 142 #define SR_SFD_VALUE 0x0b, 0xff, 0 143 #define RG_TRX_CTRL_2 (0x0c) 144 #define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0 145 #define SR_SUB_MODE 0x0c, 0x04, 2 146 #define SR_BPSK_QPSK 0x0c, 0x08, 3 147 #define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4 148 #define SR_RESERVED_0c_5 0x0c, 0x60, 5 149 #define SR_RX_SAFE_MODE 0x0c, 0x80, 7 150 #define RG_ANT_DIV (0x0d) 151 #define SR_ANT_CTRL 0x0d, 0x03, 0 152 #define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2 153 #define SR_ANT_DIV_EN 0x0d, 0x08, 3 154 #define SR_RESERVED_0d_2 0x0d, 0x70, 4 155 #define SR_ANT_SEL 0x0d, 0x80, 7 156 #define RG_IRQ_MASK (0x0e) 157 #define SR_IRQ_MASK 0x0e, 0xff, 0 158 #define RG_IRQ_STATUS (0x0f) 159 #define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0 160 #define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1 161 #define SR_IRQ_2_RX_START 0x0f, 0x04, 2 162 #define SR_IRQ_3_TRX_END 0x0f, 0x08, 3 163 #define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4 164 #define SR_IRQ_5_AMI 0x0f, 0x20, 5 165 #define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6 166 #define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7 167 #define RG_VREG_CTRL (0x10) 168 #define SR_RESERVED_10_6 0x10, 0x03, 0 169 #define SR_DVDD_OK 0x10, 0x04, 2 170 #define SR_DVREG_EXT 0x10, 0x08, 3 171 #define SR_RESERVED_10_3 0x10, 0x30, 4 172 #define SR_AVDD_OK 0x10, 0x40, 6 173 #define SR_AVREG_EXT 0x10, 0x80, 7 174 #define RG_BATMON (0x11) 175 #define SR_BATMON_VTH 0x11, 0x0f, 0 176 #define SR_BATMON_HR 0x11, 0x10, 4 177 #define SR_BATMON_OK 0x11, 0x20, 5 178 #define SR_RESERVED_11_1 0x11, 0xc0, 6 179 #define RG_XOSC_CTRL (0x12) 180 #define SR_XTAL_TRIM 0x12, 0x0f, 0 181 #define SR_XTAL_MODE 0x12, 0xf0, 4 182 #define RG_RX_SYN (0x15) 183 #define SR_RX_PDT_LEVEL 0x15, 0x0f, 0 184 #define SR_RESERVED_15_2 0x15, 0x70, 4 185 #define SR_RX_PDT_DIS 0x15, 0x80, 7 186 #define RG_XAH_CTRL_1 (0x17) 187 #define SR_RESERVED_17_8 0x17, 0x01, 0 188 #define SR_AACK_PROM_MODE 0x17, 0x02, 1 189 #define SR_AACK_ACK_TIME 0x17, 0x04, 2 190 #define SR_RESERVED_17_5 0x17, 0x08, 3 191 #define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4 192 #define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5 193 #define SR_CSMA_LBT_MODE 0x17, 0x40, 6 194 #define SR_RESERVED_17_1 0x17, 0x80, 7 195 #define RG_FTN_CTRL (0x18) 196 #define SR_RESERVED_18_2 0x18, 0x7f, 0 197 #define SR_FTN_START 0x18, 0x80, 7 198 #define RG_PLL_CF (0x1a) 199 #define SR_RESERVED_1a_2 0x1a, 0x7f, 0 200 #define SR_PLL_CF_START 0x1a, 0x80, 7 201 #define RG_PLL_DCU (0x1b) 202 #define SR_RESERVED_1b_3 0x1b, 0x3f, 0 203 #define SR_RESERVED_1b_2 0x1b, 0x40, 6 204 #define SR_PLL_DCU_START 0x1b, 0x80, 7 205 #define RG_PART_NUM (0x1c) 206 #define SR_PART_NUM 0x1c, 0xff, 0 207 #define RG_VERSION_NUM (0x1d) 208 #define SR_VERSION_NUM 0x1d, 0xff, 0 209 #define RG_MAN_ID_0 (0x1e) 210 #define SR_MAN_ID_0 0x1e, 0xff, 0 211 #define RG_MAN_ID_1 (0x1f) 212 #define SR_MAN_ID_1 0x1f, 0xff, 0 213 #define RG_SHORT_ADDR_0 (0x20) 214 #define SR_SHORT_ADDR_0 0x20, 0xff, 0 215 #define RG_SHORT_ADDR_1 (0x21) 216 #define SR_SHORT_ADDR_1 0x21, 0xff, 0 217 #define RG_PAN_ID_0 (0x22) 218 #define SR_PAN_ID_0 0x22, 0xff, 0 219 #define RG_PAN_ID_1 (0x23) 220 #define SR_PAN_ID_1 0x23, 0xff, 0 221 #define RG_IEEE_ADDR_0 (0x24) 222 #define SR_IEEE_ADDR_0 0x24, 0xff, 0 223 #define RG_IEEE_ADDR_1 (0x25) 224 #define SR_IEEE_ADDR_1 0x25, 0xff, 0 225 #define RG_IEEE_ADDR_2 (0x26) 226 #define SR_IEEE_ADDR_2 0x26, 0xff, 0 227 #define RG_IEEE_ADDR_3 (0x27) 228 #define SR_IEEE_ADDR_3 0x27, 0xff, 0 229 #define RG_IEEE_ADDR_4 (0x28) 230 #define SR_IEEE_ADDR_4 0x28, 0xff, 0 231 #define RG_IEEE_ADDR_5 (0x29) 232 #define SR_IEEE_ADDR_5 0x29, 0xff, 0 233 #define RG_IEEE_ADDR_6 (0x2a) 234 #define SR_IEEE_ADDR_6 0x2a, 0xff, 0 235 #define RG_IEEE_ADDR_7 (0x2b) 236 #define SR_IEEE_ADDR_7 0x2b, 0xff, 0 237 #define RG_XAH_CTRL_0 (0x2c) 238 #define SR_SLOTTED_OPERATION 0x2c, 0x01, 0 239 #define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1 240 #define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4 241 #define RG_CSMA_SEED_0 (0x2d) 242 #define SR_CSMA_SEED_0 0x2d, 0xff, 0 243 #define RG_CSMA_SEED_1 (0x2e) 244 #define SR_CSMA_SEED_1 0x2e, 0x07, 0 245 #define SR_AACK_I_AM_COORD 0x2e, 0x08, 3 246 #define SR_AACK_DIS_ACK 0x2e, 0x10, 4 247 #define SR_AACK_SET_PD 0x2e, 0x20, 5 248 #define SR_AACK_FVN_MODE 0x2e, 0xc0, 6 249 #define RG_CSMA_BE (0x2f) 250 #define SR_MIN_BE 0x2f, 0x0f, 0 251 #define SR_MAX_BE 0x2f, 0xf0, 4 252 253 #define CMD_REG 0x80 254 #define CMD_REG_MASK 0x3f 255 #define CMD_WRITE 0x40 256 #define CMD_FB 0x20 257 258 #define IRQ_BAT_LOW (1 << 7) 259 #define IRQ_TRX_UR (1 << 6) 260 #define IRQ_AMI (1 << 5) 261 #define IRQ_CCA_ED (1 << 4) 262 #define IRQ_TRX_END (1 << 3) 263 #define IRQ_RX_START (1 << 2) 264 #define IRQ_PLL_UNL (1 << 1) 265 #define IRQ_PLL_LOCK (1 << 0) 266 267 #define IRQ_ACTIVE_HIGH 0 268 #define IRQ_ACTIVE_LOW 1 269 270 #define STATE_P_ON 0x00 /* BUSY */ 271 #define STATE_BUSY_RX 0x01 272 #define STATE_BUSY_TX 0x02 273 #define STATE_FORCE_TRX_OFF 0x03 274 #define STATE_FORCE_TX_ON 0x04 /* IDLE */ 275 /* 0x05 */ /* INVALID_PARAMETER */ 276 #define STATE_RX_ON 0x06 277 /* 0x07 */ /* SUCCESS */ 278 #define STATE_TRX_OFF 0x08 279 #define STATE_TX_ON 0x09 280 /* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */ 281 #define STATE_SLEEP 0x0F 282 #define STATE_PREP_DEEP_SLEEP 0x10 283 #define STATE_BUSY_RX_AACK 0x11 284 #define STATE_BUSY_TX_ARET 0x12 285 #define STATE_RX_AACK_ON 0x16 286 #define STATE_TX_ARET_ON 0x19 287 #define STATE_RX_ON_NOCLK 0x1C 288 #define STATE_RX_AACK_ON_NOCLK 0x1D 289 #define STATE_BUSY_RX_AACK_NOCLK 0x1E 290 #define STATE_TRANSITION_IN_PROGRESS 0x1F 291 292 #define AT86RF2XX_NUMREGS 0x3F 293 294 static int 295 at86rf230_async_state_change(struct at86rf230_local *lp, 296 struct at86rf230_state_change *ctx, 297 const u8 state, void (*complete)(void *context)); 298 299 static inline int 300 __at86rf230_write(struct at86rf230_local *lp, 301 unsigned int addr, unsigned int data) 302 { 303 return regmap_write(lp->regmap, addr, data); 304 } 305 306 static inline int 307 __at86rf230_read(struct at86rf230_local *lp, 308 unsigned int addr, unsigned int *data) 309 { 310 return regmap_read(lp->regmap, addr, data); 311 } 312 313 static inline int 314 at86rf230_read_subreg(struct at86rf230_local *lp, 315 unsigned int addr, unsigned int mask, 316 unsigned int shift, unsigned int *data) 317 { 318 int rc; 319 320 rc = __at86rf230_read(lp, addr, data); 321 if (rc > 0) 322 *data = (*data & mask) >> shift; 323 324 return rc; 325 } 326 327 static inline int 328 at86rf230_write_subreg(struct at86rf230_local *lp, 329 unsigned int addr, unsigned int mask, 330 unsigned int shift, unsigned int data) 331 { 332 return regmap_update_bits(lp->regmap, addr, mask, data << shift); 333 } 334 335 static bool 336 at86rf230_reg_writeable(struct device *dev, unsigned int reg) 337 { 338 switch (reg) { 339 case RG_TRX_STATE: 340 case RG_TRX_CTRL_0: 341 case RG_TRX_CTRL_1: 342 case RG_PHY_TX_PWR: 343 case RG_PHY_ED_LEVEL: 344 case RG_PHY_CC_CCA: 345 case RG_CCA_THRES: 346 case RG_RX_CTRL: 347 case RG_SFD_VALUE: 348 case RG_TRX_CTRL_2: 349 case RG_ANT_DIV: 350 case RG_IRQ_MASK: 351 case RG_VREG_CTRL: 352 case RG_BATMON: 353 case RG_XOSC_CTRL: 354 case RG_RX_SYN: 355 case RG_XAH_CTRL_1: 356 case RG_FTN_CTRL: 357 case RG_PLL_CF: 358 case RG_PLL_DCU: 359 case RG_SHORT_ADDR_0: 360 case RG_SHORT_ADDR_1: 361 case RG_PAN_ID_0: 362 case RG_PAN_ID_1: 363 case RG_IEEE_ADDR_0: 364 case RG_IEEE_ADDR_1: 365 case RG_IEEE_ADDR_2: 366 case RG_IEEE_ADDR_3: 367 case RG_IEEE_ADDR_4: 368 case RG_IEEE_ADDR_5: 369 case RG_IEEE_ADDR_6: 370 case RG_IEEE_ADDR_7: 371 case RG_XAH_CTRL_0: 372 case RG_CSMA_SEED_0: 373 case RG_CSMA_SEED_1: 374 case RG_CSMA_BE: 375 return true; 376 default: 377 return false; 378 } 379 } 380 381 static bool 382 at86rf230_reg_readable(struct device *dev, unsigned int reg) 383 { 384 bool rc; 385 386 /* all writeable are also readable */ 387 rc = at86rf230_reg_writeable(dev, reg); 388 if (rc) 389 return rc; 390 391 /* readonly regs */ 392 switch (reg) { 393 case RG_TRX_STATUS: 394 case RG_PHY_RSSI: 395 case RG_IRQ_STATUS: 396 case RG_PART_NUM: 397 case RG_VERSION_NUM: 398 case RG_MAN_ID_1: 399 case RG_MAN_ID_0: 400 return true; 401 default: 402 return false; 403 } 404 } 405 406 static bool 407 at86rf230_reg_volatile(struct device *dev, unsigned int reg) 408 { 409 /* can be changed during runtime */ 410 switch (reg) { 411 case RG_TRX_STATUS: 412 case RG_TRX_STATE: 413 case RG_PHY_RSSI: 414 case RG_PHY_ED_LEVEL: 415 case RG_IRQ_STATUS: 416 case RG_VREG_CTRL: 417 return true; 418 default: 419 return false; 420 } 421 } 422 423 static bool 424 at86rf230_reg_precious(struct device *dev, unsigned int reg) 425 { 426 /* don't clear irq line on read */ 427 switch (reg) { 428 case RG_IRQ_STATUS: 429 return true; 430 default: 431 return false; 432 } 433 } 434 435 static struct regmap_config at86rf230_regmap_spi_config = { 436 .reg_bits = 8, 437 .val_bits = 8, 438 .write_flag_mask = CMD_REG | CMD_WRITE, 439 .read_flag_mask = CMD_REG, 440 .cache_type = REGCACHE_RBTREE, 441 .max_register = AT86RF2XX_NUMREGS, 442 .writeable_reg = at86rf230_reg_writeable, 443 .readable_reg = at86rf230_reg_readable, 444 .volatile_reg = at86rf230_reg_volatile, 445 .precious_reg = at86rf230_reg_precious, 446 }; 447 448 static void 449 at86rf230_async_error_recover(void *context) 450 { 451 struct at86rf230_state_change *ctx = context; 452 struct at86rf230_local *lp = ctx->lp; 453 454 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL); 455 } 456 457 static void 458 at86rf230_async_error(struct at86rf230_local *lp, 459 struct at86rf230_state_change *ctx, int rc) 460 { 461 dev_err(&lp->spi->dev, "spi_async error %d\n", rc); 462 463 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF, 464 at86rf230_async_error_recover); 465 } 466 467 /* Generic function to get some register value in async mode */ 468 static int 469 at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg, 470 struct at86rf230_state_change *ctx, 471 void (*complete)(void *context)) 472 { 473 u8 *tx_buf = ctx->buf; 474 475 tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG; 476 ctx->trx.len = 2; 477 ctx->msg.complete = complete; 478 return spi_async(lp->spi, &ctx->msg); 479 } 480 481 static void 482 at86rf230_async_state_assert(void *context) 483 { 484 struct at86rf230_state_change *ctx = context; 485 struct at86rf230_local *lp = ctx->lp; 486 const u8 *buf = ctx->buf; 487 const u8 trx_state = buf[1] & 0x1f; 488 489 /* Assert state change */ 490 if (trx_state != ctx->to_state) { 491 /* Special handling if transceiver state is in 492 * STATE_BUSY_RX_AACK and a SHR was detected. 493 */ 494 if (trx_state == STATE_BUSY_RX_AACK) { 495 /* Undocumented race condition. If we send a state 496 * change to STATE_RX_AACK_ON the transceiver could 497 * change his state automatically to STATE_BUSY_RX_AACK 498 * if a SHR was detected. This is not an error, but we 499 * can't assert this. 500 */ 501 if (ctx->to_state == STATE_RX_AACK_ON) 502 goto done; 503 504 /* If we change to STATE_TX_ON without forcing and 505 * transceiver state is STATE_BUSY_RX_AACK, we wait 506 * 'tFrame + tPAck' receiving time. In this time the 507 * PDU should be received. If the transceiver is still 508 * in STATE_BUSY_RX_AACK, we run a force state change 509 * to STATE_TX_ON. This is a timeout handling, if the 510 * transceiver stucks in STATE_BUSY_RX_AACK. 511 */ 512 if (ctx->to_state == STATE_TX_ON) { 513 at86rf230_async_state_change(lp, ctx, 514 STATE_FORCE_TX_ON, 515 ctx->complete); 516 return; 517 } 518 } 519 520 521 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n", 522 ctx->from_state, ctx->to_state, trx_state); 523 } 524 525 done: 526 if (ctx->complete) 527 ctx->complete(context); 528 } 529 530 /* Do state change timing delay. */ 531 static void 532 at86rf230_async_state_delay(void *context) 533 { 534 struct at86rf230_state_change *ctx = context; 535 struct at86rf230_local *lp = ctx->lp; 536 struct at86rf2xx_chip_data *c = lp->data; 537 bool force = false; 538 int rc; 539 540 /* The force state changes are will show as normal states in the 541 * state status subregister. We change the to_state to the 542 * corresponding one and remember if it was a force change, this 543 * differs if we do a state change from STATE_BUSY_RX_AACK. 544 */ 545 switch (ctx->to_state) { 546 case STATE_FORCE_TX_ON: 547 ctx->to_state = STATE_TX_ON; 548 force = true; 549 break; 550 case STATE_FORCE_TRX_OFF: 551 ctx->to_state = STATE_TRX_OFF; 552 force = true; 553 break; 554 default: 555 break; 556 } 557 558 switch (ctx->from_state) { 559 case STATE_TRX_OFF: 560 switch (ctx->to_state) { 561 case STATE_RX_AACK_ON: 562 usleep_range(c->t_off_to_aack, c->t_off_to_aack + 10); 563 goto change; 564 case STATE_TX_ON: 565 usleep_range(c->t_off_to_tx_on, 566 c->t_off_to_tx_on + 10); 567 goto change; 568 default: 569 break; 570 } 571 break; 572 case STATE_BUSY_RX_AACK: 573 switch (ctx->to_state) { 574 case STATE_TX_ON: 575 /* Wait for worst case receiving time if we 576 * didn't make a force change from BUSY_RX_AACK 577 * to TX_ON. 578 */ 579 if (!force) { 580 usleep_range(c->t_frame + c->t_p_ack, 581 c->t_frame + c->t_p_ack + 1000); 582 goto change; 583 } 584 break; 585 default: 586 break; 587 } 588 break; 589 /* Default value, means RESET state */ 590 case STATE_P_ON: 591 switch (ctx->to_state) { 592 case STATE_TRX_OFF: 593 usleep_range(c->t_reset_to_off, c->t_reset_to_off + 10); 594 goto change; 595 default: 596 break; 597 } 598 break; 599 default: 600 break; 601 } 602 603 /* Default delay is 1us in the most cases */ 604 udelay(1); 605 606 change: 607 rc = at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, 608 at86rf230_async_state_assert); 609 if (rc) 610 dev_err(&lp->spi->dev, "spi_async error %d\n", rc); 611 } 612 613 static void 614 at86rf230_async_state_change_start(void *context) 615 { 616 struct at86rf230_state_change *ctx = context; 617 struct at86rf230_local *lp = ctx->lp; 618 u8 *buf = ctx->buf; 619 const u8 trx_state = buf[1] & 0x1f; 620 int rc; 621 622 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */ 623 if (trx_state == STATE_TRANSITION_IN_PROGRESS) { 624 udelay(1); 625 rc = at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, 626 at86rf230_async_state_change_start); 627 if (rc) 628 dev_err(&lp->spi->dev, "spi_async error %d\n", rc); 629 return; 630 } 631 632 /* Check if we already are in the state which we change in */ 633 if (trx_state == ctx->to_state) { 634 if (ctx->complete) 635 ctx->complete(context); 636 return; 637 } 638 639 /* Set current state to the context of state change */ 640 ctx->from_state = trx_state; 641 642 /* Going into the next step for a state change which do a timing 643 * relevant delay. 644 */ 645 buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE; 646 buf[1] = ctx->to_state; 647 ctx->trx.len = 2; 648 ctx->msg.complete = at86rf230_async_state_delay; 649 rc = spi_async(lp->spi, &ctx->msg); 650 if (rc) 651 dev_err(&lp->spi->dev, "spi_async error %d\n", rc); 652 } 653 654 static int 655 at86rf230_async_state_change(struct at86rf230_local *lp, 656 struct at86rf230_state_change *ctx, 657 const u8 state, void (*complete)(void *context)) 658 { 659 /* Initialization for the state change context */ 660 ctx->to_state = state; 661 ctx->complete = complete; 662 return at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, 663 at86rf230_async_state_change_start); 664 } 665 666 static void 667 at86rf230_sync_state_change_complete(void *context) 668 { 669 struct at86rf230_state_change *ctx = context; 670 struct at86rf230_local *lp = ctx->lp; 671 672 complete(&lp->state_complete); 673 } 674 675 /* This function do a sync framework above the async state change. 676 * Some callbacks of the IEEE 802.15.4 driver interface need to be 677 * handled synchronously. 678 */ 679 static int 680 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state) 681 { 682 int rc; 683 684 rc = at86rf230_async_state_change(lp, &lp->state, state, 685 at86rf230_sync_state_change_complete); 686 if (rc) { 687 at86rf230_async_error(lp, &lp->state, rc); 688 return rc; 689 } 690 691 rc = wait_for_completion_timeout(&lp->state_complete, 692 msecs_to_jiffies(100)); 693 if (!rc) 694 return -ETIMEDOUT; 695 696 return 0; 697 } 698 699 static void 700 at86rf230_tx_complete(void *context) 701 { 702 struct at86rf230_state_change *ctx = context; 703 struct at86rf230_local *lp = ctx->lp; 704 705 complete(&lp->tx_complete); 706 } 707 708 static void 709 at86rf230_tx_on(void *context) 710 { 711 struct at86rf230_state_change *ctx = context; 712 struct at86rf230_local *lp = ctx->lp; 713 int rc; 714 715 rc = at86rf230_async_state_change(lp, &lp->irq, STATE_RX_AACK_ON, 716 at86rf230_tx_complete); 717 if (rc) 718 at86rf230_async_error(lp, ctx, rc); 719 } 720 721 static void 722 at86rf230_tx_trac_error(void *context) 723 { 724 struct at86rf230_state_change *ctx = context; 725 struct at86rf230_local *lp = ctx->lp; 726 int rc; 727 728 rc = at86rf230_async_state_change(lp, ctx, STATE_TX_ON, 729 at86rf230_tx_on); 730 if (rc) 731 at86rf230_async_error(lp, ctx, rc); 732 } 733 734 static void 735 at86rf230_tx_trac_check(void *context) 736 { 737 struct at86rf230_state_change *ctx = context; 738 struct at86rf230_local *lp = ctx->lp; 739 const u8 *buf = ctx->buf; 740 const u8 trac = (buf[1] & 0xe0) >> 5; 741 int rc; 742 743 /* If trac status is different than zero we need to do a state change 744 * to STATE_FORCE_TRX_OFF then STATE_TX_ON to recover the transceiver 745 * state to TX_ON. 746 */ 747 if (trac) { 748 rc = at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF, 749 at86rf230_tx_trac_error); 750 if (rc) 751 at86rf230_async_error(lp, ctx, rc); 752 return; 753 } 754 755 at86rf230_tx_on(context); 756 } 757 758 759 static void 760 at86rf230_tx_trac_status(void *context) 761 { 762 struct at86rf230_state_change *ctx = context; 763 struct at86rf230_local *lp = ctx->lp; 764 int rc; 765 766 rc = at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx, 767 at86rf230_tx_trac_check); 768 if (rc) 769 at86rf230_async_error(lp, ctx, rc); 770 } 771 772 static void 773 at86rf230_rx(struct at86rf230_local *lp, 774 const u8 *data, u8 len) 775 { 776 u8 lqi; 777 struct sk_buff *skb; 778 u8 rx_local_buf[AT86RF2XX_MAX_BUF]; 779 780 if (len < 2) 781 return; 782 783 /* read full frame buffer and invalid lqi value to lowest 784 * indicator if frame was is in a corrupted state. 785 */ 786 if (len > IEEE802154_MTU) { 787 lqi = 0; 788 len = IEEE802154_MTU; 789 dev_vdbg(&lp->spi->dev, "corrupted frame received\n"); 790 } else { 791 lqi = data[len]; 792 } 793 794 memcpy(rx_local_buf, data, len); 795 enable_irq(lp->spi->irq); 796 797 skb = alloc_skb(IEEE802154_MTU, GFP_ATOMIC); 798 if (!skb) { 799 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n"); 800 return; 801 } 802 803 memcpy(skb_put(skb, len), rx_local_buf, len); 804 805 /* We do not put CRC into the frame */ 806 skb_trim(skb, len - 2); 807 808 ieee802154_rx_irqsafe(lp->dev, skb, lqi); 809 } 810 811 static void 812 at86rf230_rx_read_frame_complete(void *context) 813 { 814 struct at86rf230_state_change *ctx = context; 815 struct at86rf230_local *lp = ctx->lp; 816 const u8 *buf = lp->irq.buf; 817 const u8 len = buf[1]; 818 819 at86rf230_rx(lp, buf + 2, len); 820 } 821 822 static int 823 at86rf230_rx_read_frame(struct at86rf230_local *lp) 824 { 825 u8 *buf = lp->irq.buf; 826 827 buf[0] = CMD_FB; 828 lp->irq.trx.len = AT86RF2XX_MAX_BUF; 829 lp->irq.msg.complete = at86rf230_rx_read_frame_complete; 830 return spi_async(lp->spi, &lp->irq.msg); 831 } 832 833 static void 834 at86rf230_rx_trac_check(void *context) 835 { 836 struct at86rf230_state_change *ctx = context; 837 struct at86rf230_local *lp = ctx->lp; 838 int rc; 839 840 /* Possible check on trac status here. This could be useful to make 841 * some stats why receive is failed. Not used at the moment, but it's 842 * maybe timing relevant. Datasheet doesn't say anything about this. 843 * The programming guide say do it so. 844 */ 845 846 rc = at86rf230_rx_read_frame(lp); 847 if (rc) { 848 enable_irq(lp->spi->irq); 849 at86rf230_async_error(lp, ctx, rc); 850 } 851 } 852 853 static int 854 at86rf230_irq_trx_end(struct at86rf230_local *lp) 855 { 856 spin_lock(&lp->lock); 857 if (lp->is_tx) { 858 lp->is_tx = 0; 859 spin_unlock(&lp->lock); 860 enable_irq(lp->spi->irq); 861 862 if (lp->tx_aret) 863 return at86rf230_async_state_change(lp, &lp->irq, 864 STATE_FORCE_TX_ON, 865 at86rf230_tx_trac_status); 866 else 867 return at86rf230_async_state_change(lp, &lp->irq, 868 STATE_RX_AACK_ON, 869 at86rf230_tx_complete); 870 } else { 871 spin_unlock(&lp->lock); 872 return at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq, 873 at86rf230_rx_trac_check); 874 } 875 } 876 877 static void 878 at86rf230_irq_status(void *context) 879 { 880 struct at86rf230_state_change *ctx = context; 881 struct at86rf230_local *lp = ctx->lp; 882 const u8 *buf = lp->irq.buf; 883 const u8 irq = buf[1]; 884 int rc; 885 886 if (irq & IRQ_TRX_END) { 887 rc = at86rf230_irq_trx_end(lp); 888 if (rc) 889 at86rf230_async_error(lp, ctx, rc); 890 } else { 891 enable_irq(lp->spi->irq); 892 dev_err(&lp->spi->dev, "not supported irq %02x received\n", 893 irq); 894 } 895 } 896 897 static irqreturn_t at86rf230_isr(int irq, void *data) 898 { 899 struct at86rf230_local *lp = data; 900 struct at86rf230_state_change *ctx = &lp->irq; 901 u8 *buf = ctx->buf; 902 int rc; 903 904 disable_irq_nosync(lp->spi->irq); 905 906 buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG; 907 ctx->trx.len = 2; 908 ctx->msg.complete = at86rf230_irq_status; 909 rc = spi_async(lp->spi, &ctx->msg); 910 if (rc) { 911 at86rf230_async_error(lp, ctx, rc); 912 return IRQ_NONE; 913 } 914 915 return IRQ_HANDLED; 916 } 917 918 static void 919 at86rf230_write_frame_complete(void *context) 920 { 921 struct at86rf230_state_change *ctx = context; 922 struct at86rf230_local *lp = ctx->lp; 923 u8 *buf = ctx->buf; 924 int rc; 925 926 buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE; 927 buf[1] = STATE_BUSY_TX; 928 ctx->trx.len = 2; 929 ctx->msg.complete = NULL; 930 rc = spi_async(lp->spi, &ctx->msg); 931 if (rc) 932 at86rf230_async_error(lp, ctx, rc); 933 } 934 935 static void 936 at86rf230_write_frame(void *context) 937 { 938 struct at86rf230_state_change *ctx = context; 939 struct at86rf230_local *lp = ctx->lp; 940 struct sk_buff *skb = lp->tx_skb; 941 u8 *buf = lp->tx.buf; 942 int rc; 943 944 spin_lock(&lp->lock); 945 lp->is_tx = 1; 946 spin_unlock(&lp->lock); 947 948 buf[0] = CMD_FB | CMD_WRITE; 949 buf[1] = skb->len + 2; 950 memcpy(buf + 2, skb->data, skb->len); 951 lp->tx.trx.len = skb->len + 2; 952 lp->tx.msg.complete = at86rf230_write_frame_complete; 953 rc = spi_async(lp->spi, &lp->tx.msg); 954 if (rc) 955 at86rf230_async_error(lp, ctx, rc); 956 } 957 958 static void 959 at86rf230_xmit_tx_on(void *context) 960 { 961 struct at86rf230_state_change *ctx = context; 962 struct at86rf230_local *lp = ctx->lp; 963 int rc; 964 965 rc = at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON, 966 at86rf230_write_frame); 967 if (rc) 968 at86rf230_async_error(lp, ctx, rc); 969 } 970 971 static int 972 at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb) 973 { 974 struct at86rf230_local *lp = dev->priv; 975 struct at86rf230_state_change *ctx = &lp->tx; 976 977 void (*tx_complete)(void *context) = at86rf230_write_frame; 978 int rc; 979 980 lp->tx_skb = skb; 981 982 /* In ARET mode we need to go into STATE_TX_ARET_ON after we 983 * are in STATE_TX_ON. The pfad differs here, so we change 984 * the complete handler. 985 */ 986 if (lp->tx_aret) 987 tx_complete = at86rf230_xmit_tx_on; 988 989 rc = at86rf230_async_state_change(lp, ctx, STATE_TX_ON, 990 tx_complete); 991 if (rc) { 992 at86rf230_async_error(lp, ctx, rc); 993 return rc; 994 } 995 rc = wait_for_completion_interruptible_timeout(&lp->tx_complete, 996 msecs_to_jiffies(lp->data->t_tx_timeout)); 997 if (!rc) { 998 at86rf230_async_error(lp, ctx, rc); 999 return -ETIMEDOUT; 1000 } 1001 1002 /* Interfame spacing time, which is phy depend. 1003 * TODO 1004 * Move this handling in MAC 802.15.4 layer. 1005 * This is currently a workaround to avoid fragmenation issues. 1006 */ 1007 if (skb->len > 18) 1008 usleep_range(lp->data->t_lifs, lp->data->t_lifs + 10); 1009 else 1010 usleep_range(lp->data->t_sifs, lp->data->t_sifs + 10); 1011 1012 return 0; 1013 } 1014 1015 static int 1016 at86rf230_ed(struct ieee802154_dev *dev, u8 *level) 1017 { 1018 might_sleep(); 1019 BUG_ON(!level); 1020 *level = 0xbe; 1021 return 0; 1022 } 1023 1024 static int 1025 at86rf230_start(struct ieee802154_dev *dev) 1026 { 1027 return at86rf230_sync_state_change(dev->priv, STATE_RX_AACK_ON); 1028 } 1029 1030 static void 1031 at86rf230_stop(struct ieee802154_dev *dev) 1032 { 1033 at86rf230_sync_state_change(dev->priv, STATE_FORCE_TRX_OFF); 1034 } 1035 1036 static int 1037 at86rf23x_set_channel(struct at86rf230_local *lp, int page, int channel) 1038 { 1039 return at86rf230_write_subreg(lp, SR_CHANNEL, channel); 1040 } 1041 1042 static int 1043 at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel) 1044 { 1045 int rc; 1046 1047 if (channel == 0) 1048 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0); 1049 else 1050 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1); 1051 if (rc < 0) 1052 return rc; 1053 1054 if (page == 0) { 1055 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0); 1056 lp->data->rssi_base_val = -100; 1057 } else { 1058 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1); 1059 lp->data->rssi_base_val = -98; 1060 } 1061 if (rc < 0) 1062 return rc; 1063 1064 return at86rf230_write_subreg(lp, SR_CHANNEL, channel); 1065 } 1066 1067 static int 1068 at86rf230_channel(struct ieee802154_dev *dev, int page, int channel) 1069 { 1070 struct at86rf230_local *lp = dev->priv; 1071 int rc; 1072 1073 might_sleep(); 1074 1075 if (page < 0 || page > 31 || 1076 !(lp->dev->phy->channels_supported[page] & BIT(channel))) { 1077 WARN_ON(1); 1078 return -EINVAL; 1079 } 1080 1081 rc = lp->data->set_channel(lp, page, channel); 1082 if (rc < 0) 1083 return rc; 1084 1085 /* Wait for PLL */ 1086 usleep_range(lp->data->t_channel_switch, 1087 lp->data->t_channel_switch + 10); 1088 dev->phy->current_channel = channel; 1089 dev->phy->current_page = page; 1090 1091 return 0; 1092 } 1093 1094 static int 1095 at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev, 1096 struct ieee802154_hw_addr_filt *filt, 1097 unsigned long changed) 1098 { 1099 struct at86rf230_local *lp = dev->priv; 1100 1101 if (changed & IEEE802515_AFILT_SADDR_CHANGED) { 1102 u16 addr = le16_to_cpu(filt->short_addr); 1103 1104 dev_vdbg(&lp->spi->dev, 1105 "at86rf230_set_hw_addr_filt called for saddr\n"); 1106 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr); 1107 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8); 1108 } 1109 1110 if (changed & IEEE802515_AFILT_PANID_CHANGED) { 1111 u16 pan = le16_to_cpu(filt->pan_id); 1112 1113 dev_vdbg(&lp->spi->dev, 1114 "at86rf230_set_hw_addr_filt called for pan id\n"); 1115 __at86rf230_write(lp, RG_PAN_ID_0, pan); 1116 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8); 1117 } 1118 1119 if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) { 1120 u8 i, addr[8]; 1121 1122 memcpy(addr, &filt->ieee_addr, 8); 1123 dev_vdbg(&lp->spi->dev, 1124 "at86rf230_set_hw_addr_filt called for IEEE addr\n"); 1125 for (i = 0; i < 8; i++) 1126 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]); 1127 } 1128 1129 if (changed & IEEE802515_AFILT_PANC_CHANGED) { 1130 dev_vdbg(&lp->spi->dev, 1131 "at86rf230_set_hw_addr_filt called for panc change\n"); 1132 if (filt->pan_coord) 1133 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1); 1134 else 1135 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0); 1136 } 1137 1138 return 0; 1139 } 1140 1141 static int 1142 at86rf230_set_txpower(struct ieee802154_dev *dev, int db) 1143 { 1144 struct at86rf230_local *lp = dev->priv; 1145 1146 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five 1147 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of 1148 * 0dB. 1149 * thus, supported values for db range from -26 to 5, for 31dB of 1150 * reduction to 0dB of reduction. 1151 */ 1152 if (db > 5 || db < -26) 1153 return -EINVAL; 1154 1155 db = -(db - 5); 1156 1157 return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db); 1158 } 1159 1160 static int 1161 at86rf230_set_lbt(struct ieee802154_dev *dev, bool on) 1162 { 1163 struct at86rf230_local *lp = dev->priv; 1164 1165 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on); 1166 } 1167 1168 static int 1169 at86rf230_set_cca_mode(struct ieee802154_dev *dev, u8 mode) 1170 { 1171 struct at86rf230_local *lp = dev->priv; 1172 1173 return at86rf230_write_subreg(lp, SR_CCA_MODE, mode); 1174 } 1175 1176 static int 1177 at86rf212_get_desens_steps(struct at86rf230_local *lp, s32 level) 1178 { 1179 return (level - lp->data->rssi_base_val) * 100 / 207; 1180 } 1181 1182 static int 1183 at86rf23x_get_desens_steps(struct at86rf230_local *lp, s32 level) 1184 { 1185 return (level - lp->data->rssi_base_val) / 2; 1186 } 1187 1188 static int 1189 at86rf230_set_cca_ed_level(struct ieee802154_dev *dev, s32 level) 1190 { 1191 struct at86rf230_local *lp = dev->priv; 1192 1193 if (level < lp->data->rssi_base_val || level > 30) 1194 return -EINVAL; 1195 1196 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, 1197 lp->data->get_desense_steps(lp, level)); 1198 } 1199 1200 static int 1201 at86rf230_set_csma_params(struct ieee802154_dev *dev, u8 min_be, u8 max_be, 1202 u8 retries) 1203 { 1204 struct at86rf230_local *lp = dev->priv; 1205 int rc; 1206 1207 if (min_be > max_be || max_be > 8 || retries > 5) 1208 return -EINVAL; 1209 1210 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be); 1211 if (rc) 1212 return rc; 1213 1214 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be); 1215 if (rc) 1216 return rc; 1217 1218 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries); 1219 } 1220 1221 static int 1222 at86rf230_set_frame_retries(struct ieee802154_dev *dev, s8 retries) 1223 { 1224 struct at86rf230_local *lp = dev->priv; 1225 int rc = 0; 1226 1227 if (retries < -1 || retries > 15) 1228 return -EINVAL; 1229 1230 lp->tx_aret = retries >= 0; 1231 1232 if (retries >= 0) 1233 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries); 1234 1235 return rc; 1236 } 1237 1238 static struct ieee802154_ops at86rf230_ops = { 1239 .owner = THIS_MODULE, 1240 .xmit = at86rf230_xmit, 1241 .ed = at86rf230_ed, 1242 .set_channel = at86rf230_channel, 1243 .start = at86rf230_start, 1244 .stop = at86rf230_stop, 1245 .set_hw_addr_filt = at86rf230_set_hw_addr_filt, 1246 .set_txpower = at86rf230_set_txpower, 1247 .set_lbt = at86rf230_set_lbt, 1248 .set_cca_mode = at86rf230_set_cca_mode, 1249 .set_cca_ed_level = at86rf230_set_cca_ed_level, 1250 .set_csma_params = at86rf230_set_csma_params, 1251 .set_frame_retries = at86rf230_set_frame_retries, 1252 }; 1253 1254 static struct at86rf2xx_chip_data at86rf233_data = { 1255 .t_sleep_cycle = 330, 1256 .t_channel_switch = 11, 1257 .t_reset_to_off = 26, 1258 .t_off_to_aack = 80, 1259 .t_off_to_tx_on = 80, 1260 .t_frame = 4096, 1261 .t_p_ack = 545, 1262 .t_sifs = 192, 1263 .t_lifs = 480, 1264 .t_tx_timeout = 2000, 1265 .rssi_base_val = -91, 1266 .set_channel = at86rf23x_set_channel, 1267 .get_desense_steps = at86rf23x_get_desens_steps 1268 }; 1269 1270 static struct at86rf2xx_chip_data at86rf231_data = { 1271 .t_sleep_cycle = 330, 1272 .t_channel_switch = 24, 1273 .t_reset_to_off = 37, 1274 .t_off_to_aack = 110, 1275 .t_off_to_tx_on = 110, 1276 .t_frame = 4096, 1277 .t_p_ack = 545, 1278 .t_sifs = 192, 1279 .t_lifs = 480, 1280 .t_tx_timeout = 2000, 1281 .rssi_base_val = -91, 1282 .set_channel = at86rf23x_set_channel, 1283 .get_desense_steps = at86rf23x_get_desens_steps 1284 }; 1285 1286 static struct at86rf2xx_chip_data at86rf212_data = { 1287 .t_sleep_cycle = 330, 1288 .t_channel_switch = 11, 1289 .t_reset_to_off = 26, 1290 .t_off_to_aack = 200, 1291 .t_off_to_tx_on = 200, 1292 .t_frame = 4096, 1293 .t_p_ack = 545, 1294 .t_sifs = 192, 1295 .t_lifs = 480, 1296 .t_tx_timeout = 2000, 1297 .rssi_base_val = -100, 1298 .set_channel = at86rf212_set_channel, 1299 .get_desense_steps = at86rf212_get_desens_steps 1300 }; 1301 1302 static int at86rf230_hw_init(struct at86rf230_local *lp) 1303 { 1304 int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH; 1305 unsigned int dvdd; 1306 u8 csma_seed[2]; 1307 1308 rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF); 1309 if (rc) 1310 return rc; 1311 1312 irq_type = irq_get_trigger_type(lp->spi->irq); 1313 if (irq_type == IRQ_TYPE_EDGE_FALLING) 1314 irq_pol = IRQ_ACTIVE_LOW; 1315 1316 rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol); 1317 if (rc) 1318 return rc; 1319 1320 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1); 1321 if (rc) 1322 return rc; 1323 1324 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END); 1325 if (rc) 1326 return rc; 1327 1328 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed)); 1329 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]); 1330 if (rc) 1331 return rc; 1332 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]); 1333 if (rc) 1334 return rc; 1335 1336 /* CLKM changes are applied immediately */ 1337 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00); 1338 if (rc) 1339 return rc; 1340 1341 /* Turn CLKM Off */ 1342 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00); 1343 if (rc) 1344 return rc; 1345 /* Wait the next SLEEP cycle */ 1346 usleep_range(lp->data->t_sleep_cycle, 1347 lp->data->t_sleep_cycle + 100); 1348 1349 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd); 1350 if (rc) 1351 return rc; 1352 if (!dvdd) { 1353 dev_err(&lp->spi->dev, "DVDD error\n"); 1354 return -EINVAL; 1355 } 1356 1357 return 0; 1358 } 1359 1360 static struct at86rf230_platform_data * 1361 at86rf230_get_pdata(struct spi_device *spi) 1362 { 1363 struct at86rf230_platform_data *pdata; 1364 1365 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) 1366 return spi->dev.platform_data; 1367 1368 pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL); 1369 if (!pdata) 1370 goto done; 1371 1372 pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0); 1373 pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0); 1374 1375 spi->dev.platform_data = pdata; 1376 done: 1377 return pdata; 1378 } 1379 1380 static int 1381 at86rf230_detect_device(struct at86rf230_local *lp) 1382 { 1383 unsigned int part, version, val; 1384 u16 man_id = 0; 1385 const char *chip; 1386 int rc; 1387 1388 rc = __at86rf230_read(lp, RG_MAN_ID_0, &val); 1389 if (rc) 1390 return rc; 1391 man_id |= val; 1392 1393 rc = __at86rf230_read(lp, RG_MAN_ID_1, &val); 1394 if (rc) 1395 return rc; 1396 man_id |= (val << 8); 1397 1398 rc = __at86rf230_read(lp, RG_PART_NUM, &part); 1399 if (rc) 1400 return rc; 1401 1402 rc = __at86rf230_read(lp, RG_PART_NUM, &version); 1403 if (rc) 1404 return rc; 1405 1406 if (man_id != 0x001f) { 1407 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n", 1408 man_id >> 8, man_id & 0xFF); 1409 return -EINVAL; 1410 } 1411 1412 lp->dev->extra_tx_headroom = 0; 1413 lp->dev->flags = IEEE802154_HW_OMIT_CKSUM | IEEE802154_HW_AACK | 1414 IEEE802154_HW_TXPOWER | IEEE802154_HW_CSMA; 1415 1416 switch (part) { 1417 case 2: 1418 chip = "at86rf230"; 1419 rc = -ENOTSUPP; 1420 break; 1421 case 3: 1422 chip = "at86rf231"; 1423 lp->data = &at86rf231_data; 1424 lp->dev->phy->channels_supported[0] = 0x7FFF800; 1425 break; 1426 case 7: 1427 chip = "at86rf212"; 1428 if (version == 1) { 1429 lp->data = &at86rf212_data; 1430 lp->dev->flags |= IEEE802154_HW_LBT; 1431 lp->dev->phy->channels_supported[0] = 0x00007FF; 1432 lp->dev->phy->channels_supported[2] = 0x00007FF; 1433 } else { 1434 rc = -ENOTSUPP; 1435 } 1436 break; 1437 case 11: 1438 chip = "at86rf233"; 1439 lp->data = &at86rf233_data; 1440 lp->dev->phy->channels_supported[0] = 0x7FFF800; 1441 break; 1442 default: 1443 chip = "unkown"; 1444 rc = -ENOTSUPP; 1445 break; 1446 } 1447 1448 dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version); 1449 1450 return rc; 1451 } 1452 1453 static void 1454 at86rf230_setup_spi_messages(struct at86rf230_local *lp) 1455 { 1456 lp->state.lp = lp; 1457 spi_message_init(&lp->state.msg); 1458 lp->state.msg.context = &lp->state; 1459 lp->state.trx.tx_buf = lp->state.buf; 1460 lp->state.trx.rx_buf = lp->state.buf; 1461 spi_message_add_tail(&lp->state.trx, &lp->state.msg); 1462 1463 lp->irq.lp = lp; 1464 spi_message_init(&lp->irq.msg); 1465 lp->irq.msg.context = &lp->irq; 1466 lp->irq.trx.tx_buf = lp->irq.buf; 1467 lp->irq.trx.rx_buf = lp->irq.buf; 1468 spi_message_add_tail(&lp->irq.trx, &lp->irq.msg); 1469 1470 lp->tx.lp = lp; 1471 spi_message_init(&lp->tx.msg); 1472 lp->tx.msg.context = &lp->tx; 1473 lp->tx.trx.tx_buf = lp->tx.buf; 1474 lp->tx.trx.rx_buf = lp->tx.buf; 1475 spi_message_add_tail(&lp->tx.trx, &lp->tx.msg); 1476 } 1477 1478 static int at86rf230_probe(struct spi_device *spi) 1479 { 1480 struct at86rf230_platform_data *pdata; 1481 struct ieee802154_dev *dev; 1482 struct at86rf230_local *lp; 1483 unsigned int status; 1484 int rc, irq_type; 1485 1486 if (!spi->irq) { 1487 dev_err(&spi->dev, "no IRQ specified\n"); 1488 return -EINVAL; 1489 } 1490 1491 pdata = at86rf230_get_pdata(spi); 1492 if (!pdata) { 1493 dev_err(&spi->dev, "no platform_data\n"); 1494 return -EINVAL; 1495 } 1496 1497 if (gpio_is_valid(pdata->rstn)) { 1498 rc = devm_gpio_request_one(&spi->dev, pdata->rstn, 1499 GPIOF_OUT_INIT_HIGH, "rstn"); 1500 if (rc) 1501 return rc; 1502 } 1503 1504 if (gpio_is_valid(pdata->slp_tr)) { 1505 rc = devm_gpio_request_one(&spi->dev, pdata->slp_tr, 1506 GPIOF_OUT_INIT_LOW, "slp_tr"); 1507 if (rc) 1508 return rc; 1509 } 1510 1511 /* Reset */ 1512 if (gpio_is_valid(pdata->rstn)) { 1513 udelay(1); 1514 gpio_set_value(pdata->rstn, 0); 1515 udelay(1); 1516 gpio_set_value(pdata->rstn, 1); 1517 usleep_range(120, 240); 1518 } 1519 1520 dev = ieee802154_alloc_device(sizeof(*lp), &at86rf230_ops); 1521 if (!dev) 1522 return -ENOMEM; 1523 1524 lp = dev->priv; 1525 lp->dev = dev; 1526 lp->spi = spi; 1527 dev->parent = &spi->dev; 1528 1529 lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config); 1530 if (IS_ERR(lp->regmap)) { 1531 rc = PTR_ERR(lp->regmap); 1532 dev_err(&spi->dev, "Failed to allocate register map: %d\n", 1533 rc); 1534 goto free_dev; 1535 } 1536 1537 at86rf230_setup_spi_messages(lp); 1538 1539 rc = at86rf230_detect_device(lp); 1540 if (rc < 0) 1541 goto free_dev; 1542 1543 spin_lock_init(&lp->lock); 1544 init_completion(&lp->tx_complete); 1545 init_completion(&lp->state_complete); 1546 1547 spi_set_drvdata(spi, lp); 1548 1549 rc = at86rf230_hw_init(lp); 1550 if (rc) 1551 goto free_dev; 1552 1553 /* Read irq status register to reset irq line */ 1554 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status); 1555 if (rc) 1556 goto free_dev; 1557 1558 irq_type = irq_get_trigger_type(spi->irq); 1559 if (!irq_type) 1560 irq_type = IRQF_TRIGGER_RISING; 1561 1562 rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr, 1563 IRQF_SHARED | irq_type, dev_name(&spi->dev), lp); 1564 if (rc) 1565 goto free_dev; 1566 1567 rc = ieee802154_register_device(lp->dev); 1568 if (rc) 1569 goto free_dev; 1570 1571 return rc; 1572 1573 free_dev: 1574 ieee802154_free_device(lp->dev); 1575 1576 return rc; 1577 } 1578 1579 static int at86rf230_remove(struct spi_device *spi) 1580 { 1581 struct at86rf230_local *lp = spi_get_drvdata(spi); 1582 1583 /* mask all at86rf230 irq's */ 1584 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0); 1585 ieee802154_unregister_device(lp->dev); 1586 ieee802154_free_device(lp->dev); 1587 dev_dbg(&spi->dev, "unregistered at86rf230\n"); 1588 1589 return 0; 1590 } 1591 1592 static const struct of_device_id at86rf230_of_match[] = { 1593 { .compatible = "atmel,at86rf230", }, 1594 { .compatible = "atmel,at86rf231", }, 1595 { .compatible = "atmel,at86rf233", }, 1596 { .compatible = "atmel,at86rf212", }, 1597 { }, 1598 }; 1599 MODULE_DEVICE_TABLE(of, at86rf230_of_match); 1600 1601 static const struct spi_device_id at86rf230_device_id[] = { 1602 { .name = "at86rf230", }, 1603 { .name = "at86rf231", }, 1604 { .name = "at86rf233", }, 1605 { .name = "at86rf212", }, 1606 { }, 1607 }; 1608 MODULE_DEVICE_TABLE(spi, at86rf230_device_id); 1609 1610 static struct spi_driver at86rf230_driver = { 1611 .id_table = at86rf230_device_id, 1612 .driver = { 1613 .of_match_table = of_match_ptr(at86rf230_of_match), 1614 .name = "at86rf230", 1615 .owner = THIS_MODULE, 1616 }, 1617 .probe = at86rf230_probe, 1618 .remove = at86rf230_remove, 1619 }; 1620 1621 module_spi_driver(at86rf230_driver); 1622 1623 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver"); 1624 MODULE_LICENSE("GPL v2"); 1625