1 #define RCS_ID "$Id: scc.c,v 1.75 1998/11/04 15:15:01 jreuter Exp jreuter $" 2 3 #define VERSION "3.0" 4 5 /* 6 * Please use z8530drv-utils-3.0 with this version. 7 * ------------------ 8 * 9 * You can find a subset of the documentation in 10 * Documentation/networking/device_drivers/hamradio/z8530drv.rst. 11 */ 12 13 /* 14 ******************************************************************** 15 * SCC.C - Linux driver for Z8530 based HDLC cards for AX.25 * 16 ******************************************************************** 17 18 19 ******************************************************************** 20 21 Copyright (c) 1993, 2000 Joerg Reuter DL1BKE 22 23 portions (c) 1993 Guido ten Dolle PE1NNZ 24 25 ******************************************************************** 26 27 The driver and the programs in the archive are UNDER CONSTRUCTION. 28 The code is likely to fail, and so your kernel could --- even 29 a whole network. 30 31 This driver is intended for Amateur Radio use. If you are running it 32 for commercial purposes, please drop me a note. I am nosy... 33 34 ...BUT: 35 36 ! You m u s t recognize the appropriate legislations of your country ! 37 ! before you connect a radio to the SCC board and start to transmit or ! 38 ! receive. The GPL allows you to use the d r i v e r, NOT the RADIO! ! 39 40 For non-Amateur-Radio use please note that you might need a special 41 allowance/licence from the designer of the SCC Board and/or the 42 MODEM. 43 44 This program is free software; you can redistribute it and/or modify 45 it under the terms of the (modified) GNU General Public License 46 delivered with the Linux kernel source. 47 48 This program is distributed in the hope that it will be useful, 49 but WITHOUT ANY WARRANTY; without even the implied warranty of 50 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 51 GNU General Public License for more details. 52 53 You should find a copy of the GNU General Public License in 54 /usr/src/linux/COPYING; 55 56 ******************************************************************** 57 58 59 Incomplete history of z8530drv: 60 ------------------------------- 61 62 1994-09-13 started to write the driver, rescued most of my own 63 code (and Hans Alblas' memory buffer pool concept) from 64 an earlier project "sccdrv" which was initiated by 65 Guido ten Dolle. Not much of the old driver survived, 66 though. The first version I put my hands on was sccdrv1.3 67 from August 1993. The memory buffer pool concept 68 appeared in an unauthorized sccdrv version (1.5) from 69 August 1994. 70 71 1995-01-31 changed copyright notice to GPL without limitations. 72 73 . 74 . <SNIP> 75 . 76 77 1996-10-05 New semester, new driver... 78 79 * KISS TNC emulator removed (TTY driver) 80 * Source moved to drivers/net/ 81 * Includes Z8530 defines from drivers/net/z8530.h 82 * Uses sk_buffer memory management 83 * Reduced overhead of /proc/net/z8530drv output 84 * Streamlined quite a lot things 85 * Invents brand new bugs... ;-) 86 87 The move to version number 3.0 reflects theses changes. 88 You can use 'kissbridge' if you need a KISS TNC emulator. 89 90 1996-12-13 Fixed for Linux networking changes. (G4KLX) 91 1997-01-08 Fixed the remaining problems. 92 1997-04-02 Hopefully fixed the problems with the new *_timer() 93 routines, added calibration code. 94 1997-10-12 Made SCC_DELAY a CONFIG option, added CONFIG_SCC_TRXECHO 95 1998-01-29 Small fix to avoid lock-up on initialization 96 1998-09-29 Fixed the "grouping" bugs, tx_inhibit works again, 97 using dev->tx_queue_len now instead of MAXQUEUE now. 98 1998-10-21 Postponed the spinlock changes, would need a lot of 99 testing I currently don't have the time to. Softdcd doesn't 100 work. 101 1998-11-04 Softdcd does not work correctly in DPLL mode, in fact it 102 never did. The DPLL locks on noise, the SYNC unit sees 103 flags that aren't... Restarting the DPLL does not help 104 either, it resynchronizes too slow and the first received 105 frame gets lost. 106 2000-02-13 Fixed for new network driver interface changes, still 107 does TX timeouts itself since it uses its own queue 108 scheme. 109 110 Thanks to all who contributed to this driver with ideas and bug 111 reports! 112 113 NB -- if you find errors, change something, please let me know 114 first before you distribute it... And please don't touch 115 the version number. Just replace my callsign in 116 "v3.0.dl1bke" with your own. Just to avoid confusion... 117 118 If you want to add your modification to the linux distribution 119 please (!) contact me first. 120 121 New versions of the driver will be announced on the linux-hams 122 mailing list on vger.kernel.org. To subscribe send an e-mail 123 to majordomo@vger.kernel.org with the following line in 124 the body of the mail: 125 126 subscribe linux-hams 127 128 The content of the "Subject" field will be ignored. 129 130 vy 73, 131 Joerg Reuter ampr-net: dl1bke@db0pra.ampr.org 132 AX-25 : DL1BKE @ DB0ABH.#BAY.DEU.EU 133 Internet: jreuter@yaina.de 134 www : http://yaina.de/jreuter 135 */ 136 137 /* ----------------------------------------------------------------------- */ 138 139 #undef SCC_LDELAY /* slow it even a bit more down */ 140 #undef SCC_DONT_CHECK /* don't look if the SCCs you specified are available */ 141 142 #define SCC_MAXCHIPS 4 /* number of max. supported chips */ 143 #define SCC_BUFSIZE 384 /* must not exceed 4096 */ 144 #undef SCC_DEBUG 145 146 #define SCC_DEFAULT_CLOCK 4915200 147 /* default pclock if nothing is specified */ 148 149 /* ----------------------------------------------------------------------- */ 150 151 #include <linux/module.h> 152 #include <linux/errno.h> 153 #include <linux/signal.h> 154 #include <linux/timer.h> 155 #include <linux/interrupt.h> 156 #include <linux/ioport.h> 157 #include <linux/string.h> 158 #include <linux/in.h> 159 #include <linux/fcntl.h> 160 #include <linux/ptrace.h> 161 #include <linux/delay.h> 162 #include <linux/skbuff.h> 163 #include <linux/netdevice.h> 164 #include <linux/rtnetlink.h> 165 #include <linux/if_ether.h> 166 #include <linux/if_arp.h> 167 #include <linux/socket.h> 168 #include <linux/init.h> 169 #include <linux/scc.h> 170 #include <linux/ctype.h> 171 #include <linux/kernel.h> 172 #include <linux/proc_fs.h> 173 #include <linux/seq_file.h> 174 #include <linux/bitops.h> 175 176 #include <net/net_namespace.h> 177 #include <net/ax25.h> 178 179 #include <asm/irq.h> 180 #include <asm/io.h> 181 #include <linux/uaccess.h> 182 183 #include "z8530.h" 184 185 static const char banner[] __initconst = KERN_INFO \ 186 "AX.25: Z8530 SCC driver version "VERSION".dl1bke\n"; 187 188 static void t_dwait(struct timer_list *t); 189 static void t_txdelay(struct timer_list *t); 190 static void t_tail(struct timer_list *t); 191 static void t_busy(struct timer_list *); 192 static void t_maxkeyup(struct timer_list *); 193 static void t_idle(struct timer_list *t); 194 static void scc_tx_done(struct scc_channel *); 195 static void scc_start_tx_timer(struct scc_channel *, 196 void (*)(struct timer_list *), unsigned long); 197 static void scc_start_maxkeyup(struct scc_channel *); 198 static void scc_start_defer(struct scc_channel *); 199 200 static void z8530_init(void); 201 202 static void init_channel(struct scc_channel *scc); 203 static void scc_key_trx (struct scc_channel *scc, char tx); 204 static void scc_init_timer(struct scc_channel *scc); 205 206 static int scc_net_alloc(const char *name, struct scc_channel *scc); 207 static void scc_net_setup(struct net_device *dev); 208 static int scc_net_open(struct net_device *dev); 209 static int scc_net_close(struct net_device *dev); 210 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb); 211 static netdev_tx_t scc_net_tx(struct sk_buff *skb, 212 struct net_device *dev); 213 static int scc_net_siocdevprivate(struct net_device *dev, struct ifreq *ifr, 214 void __user *data, int cmd); 215 static int scc_net_set_mac_address(struct net_device *dev, void *addr); 216 static struct net_device_stats * scc_net_get_stats(struct net_device *dev); 217 218 static unsigned char SCC_DriverName[] = "scc"; 219 220 static struct irqflags { unsigned char used : 1; } Ivec[NR_IRQS]; 221 222 static struct scc_channel SCC_Info[2 * SCC_MAXCHIPS]; /* information per channel */ 223 224 static struct scc_ctrl { 225 io_port chan_A; 226 io_port chan_B; 227 int irq; 228 } SCC_ctrl[SCC_MAXCHIPS+1]; 229 230 static unsigned char Driver_Initialized; 231 static int Nchips; 232 static io_port Vector_Latch; 233 234 235 /* ******************************************************************** */ 236 /* * Port Access Functions * */ 237 /* ******************************************************************** */ 238 239 /* These provide interrupt save 2-step access to the Z8530 registers */ 240 241 static DEFINE_SPINLOCK(iolock); /* Guards paired accesses */ 242 243 static inline unsigned char InReg(io_port port, unsigned char reg) 244 { 245 unsigned long flags; 246 unsigned char r; 247 248 spin_lock_irqsave(&iolock, flags); 249 #ifdef SCC_LDELAY 250 Outb(port, reg); 251 udelay(SCC_LDELAY); 252 r=Inb(port); 253 udelay(SCC_LDELAY); 254 #else 255 Outb(port, reg); 256 r=Inb(port); 257 #endif 258 spin_unlock_irqrestore(&iolock, flags); 259 return r; 260 } 261 262 static inline void OutReg(io_port port, unsigned char reg, unsigned char val) 263 { 264 unsigned long flags; 265 266 spin_lock_irqsave(&iolock, flags); 267 #ifdef SCC_LDELAY 268 Outb(port, reg); udelay(SCC_LDELAY); 269 Outb(port, val); udelay(SCC_LDELAY); 270 #else 271 Outb(port, reg); 272 Outb(port, val); 273 #endif 274 spin_unlock_irqrestore(&iolock, flags); 275 } 276 277 static inline void wr(struct scc_channel *scc, unsigned char reg, 278 unsigned char val) 279 { 280 OutReg(scc->ctrl, reg, (scc->wreg[reg] = val)); 281 } 282 283 static inline void or(struct scc_channel *scc, unsigned char reg, unsigned char val) 284 { 285 OutReg(scc->ctrl, reg, (scc->wreg[reg] |= val)); 286 } 287 288 static inline void cl(struct scc_channel *scc, unsigned char reg, unsigned char val) 289 { 290 OutReg(scc->ctrl, reg, (scc->wreg[reg] &= ~val)); 291 } 292 293 /* ******************************************************************** */ 294 /* * Some useful macros * */ 295 /* ******************************************************************** */ 296 297 static inline void scc_discard_buffers(struct scc_channel *scc) 298 { 299 unsigned long flags; 300 301 spin_lock_irqsave(&scc->lock, flags); 302 if (scc->tx_buff != NULL) 303 { 304 dev_kfree_skb(scc->tx_buff); 305 scc->tx_buff = NULL; 306 } 307 308 while (!skb_queue_empty(&scc->tx_queue)) 309 dev_kfree_skb(skb_dequeue(&scc->tx_queue)); 310 311 spin_unlock_irqrestore(&scc->lock, flags); 312 } 313 314 315 316 /* ******************************************************************** */ 317 /* * Interrupt Service Routines * */ 318 /* ******************************************************************** */ 319 320 321 /* ----> subroutines for the interrupt handlers <---- */ 322 323 static inline void scc_notify(struct scc_channel *scc, int event) 324 { 325 struct sk_buff *skb; 326 char *bp; 327 328 if (scc->kiss.fulldup != KISS_DUPLEX_OPTIMA) 329 return; 330 331 skb = dev_alloc_skb(2); 332 if (skb != NULL) 333 { 334 bp = skb_put(skb, 2); 335 *bp++ = PARAM_HWEVENT; 336 *bp++ = event; 337 scc_net_rx(scc, skb); 338 } else 339 scc->stat.nospace++; 340 } 341 342 static inline void flush_rx_FIFO(struct scc_channel *scc) 343 { 344 int k; 345 346 for (k=0; k<3; k++) 347 Inb(scc->data); 348 349 if(scc->rx_buff != NULL) /* did we receive something? */ 350 { 351 scc->stat.rxerrs++; /* then count it as an error */ 352 dev_kfree_skb_irq(scc->rx_buff); 353 scc->rx_buff = NULL; 354 } 355 } 356 357 static void start_hunt(struct scc_channel *scc) 358 { 359 if ((scc->modem.clocksrc != CLK_EXTERNAL)) 360 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */ 361 or(scc,R3,ENT_HM|RxENABLE); /* enable the receiver, hunt mode */ 362 } 363 364 /* ----> four different interrupt handlers for Tx, Rx, changing of */ 365 /* DCD/CTS and Rx/Tx errors */ 366 367 /* Transmitter interrupt handler */ 368 static inline void scc_txint(struct scc_channel *scc) 369 { 370 struct sk_buff *skb; 371 372 scc->stat.txints++; 373 skb = scc->tx_buff; 374 375 /* send first octet */ 376 377 if (skb == NULL) 378 { 379 skb = skb_dequeue(&scc->tx_queue); 380 scc->tx_buff = skb; 381 netif_wake_queue(scc->dev); 382 383 if (skb == NULL) 384 { 385 scc_tx_done(scc); 386 Outb(scc->ctrl, RES_Tx_P); 387 return; 388 } 389 390 if (skb->len == 0) /* Paranoia... */ 391 { 392 dev_kfree_skb_irq(skb); 393 scc->tx_buff = NULL; 394 scc_tx_done(scc); 395 Outb(scc->ctrl, RES_Tx_P); 396 return; 397 } 398 399 scc->stat.tx_state = TXS_ACTIVE; 400 401 OutReg(scc->ctrl, R0, RES_Tx_CRC); 402 /* reset CRC generator */ 403 or(scc,R10,ABUNDER); /* re-install underrun protection */ 404 Outb(scc->data,*skb->data); /* send byte */ 405 skb_pull(skb, 1); 406 407 if (!scc->enhanced) /* reset EOM latch */ 408 Outb(scc->ctrl,RES_EOM_L); 409 return; 410 } 411 412 /* End Of Frame... */ 413 414 if (skb->len == 0) 415 { 416 Outb(scc->ctrl, RES_Tx_P); /* reset pending int */ 417 cl(scc, R10, ABUNDER); /* send CRC */ 418 dev_kfree_skb_irq(skb); 419 scc->tx_buff = NULL; 420 scc->stat.tx_state = TXS_NEWFRAME; /* next frame... */ 421 return; 422 } 423 424 /* send octet */ 425 426 Outb(scc->data,*skb->data); 427 skb_pull(skb, 1); 428 } 429 430 431 /* External/Status interrupt handler */ 432 static inline void scc_exint(struct scc_channel *scc) 433 { 434 unsigned char status,changes,chg_and_stat; 435 436 scc->stat.exints++; 437 438 status = InReg(scc->ctrl,R0); 439 changes = status ^ scc->status; 440 chg_and_stat = changes & status; 441 442 /* ABORT: generated whenever DCD drops while receiving */ 443 444 if (chg_and_stat & BRK_ABRT) /* Received an ABORT */ 445 flush_rx_FIFO(scc); 446 447 /* HUNT: software DCD; on = waiting for SYNC, off = receiving frame */ 448 449 if ((changes & SYNC_HUNT) && scc->kiss.softdcd) 450 { 451 if (status & SYNC_HUNT) 452 { 453 scc->dcd = 0; 454 flush_rx_FIFO(scc); 455 if ((scc->modem.clocksrc != CLK_EXTERNAL)) 456 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */ 457 } else { 458 scc->dcd = 1; 459 } 460 461 scc_notify(scc, scc->dcd? HWEV_DCD_OFF:HWEV_DCD_ON); 462 } 463 464 /* DCD: on = start to receive packet, off = ABORT condition */ 465 /* (a successfully received packet generates a special condition int) */ 466 467 if((changes & DCD) && !scc->kiss.softdcd) /* DCD input changed state */ 468 { 469 if(status & DCD) /* DCD is now ON */ 470 { 471 start_hunt(scc); 472 scc->dcd = 1; 473 } else { /* DCD is now OFF */ 474 cl(scc,R3,ENT_HM|RxENABLE); /* disable the receiver */ 475 flush_rx_FIFO(scc); 476 scc->dcd = 0; 477 } 478 479 scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF); 480 } 481 482 #ifdef notdef 483 /* CTS: use external TxDelay (what's that good for?!) 484 * Anyway: If we _could_ use it (BayCom USCC uses CTS for 485 * own purposes) we _should_ use the "autoenable" feature 486 * of the Z8530 and not this interrupt... 487 */ 488 489 if (chg_and_stat & CTS) /* CTS is now ON */ 490 { 491 if (scc->kiss.txdelay == 0) /* zero TXDELAY = wait for CTS */ 492 scc_start_tx_timer(scc, t_txdelay, 0); 493 } 494 #endif 495 496 if (scc->stat.tx_state == TXS_ACTIVE && (status & TxEOM)) 497 { 498 scc->stat.tx_under++; /* oops, an underrun! count 'em */ 499 Outb(scc->ctrl, RES_EXT_INT); /* reset ext/status interrupts */ 500 501 if (scc->tx_buff != NULL) 502 { 503 dev_kfree_skb_irq(scc->tx_buff); 504 scc->tx_buff = NULL; 505 } 506 507 or(scc,R10,ABUNDER); 508 scc_start_tx_timer(scc, t_txdelay, 0); /* restart transmission */ 509 } 510 511 scc->status = status; 512 Outb(scc->ctrl,RES_EXT_INT); 513 } 514 515 516 /* Receiver interrupt handler */ 517 static inline void scc_rxint(struct scc_channel *scc) 518 { 519 struct sk_buff *skb; 520 521 scc->stat.rxints++; 522 523 if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF) 524 { 525 Inb(scc->data); /* discard char */ 526 or(scc,R3,ENT_HM); /* enter hunt mode for next flag */ 527 return; 528 } 529 530 skb = scc->rx_buff; 531 532 if (skb == NULL) 533 { 534 skb = dev_alloc_skb(scc->stat.bufsize); 535 if (skb == NULL) 536 { 537 scc->dev_stat.rx_dropped++; 538 scc->stat.nospace++; 539 Inb(scc->data); 540 or(scc, R3, ENT_HM); 541 return; 542 } 543 544 scc->rx_buff = skb; 545 skb_put_u8(skb, 0); /* KISS data */ 546 } 547 548 if (skb->len >= scc->stat.bufsize) 549 { 550 #ifdef notdef 551 printk(KERN_DEBUG "z8530drv: oops, scc_rxint() received huge frame...\n"); 552 #endif 553 dev_kfree_skb_irq(skb); 554 scc->rx_buff = NULL; 555 Inb(scc->data); 556 or(scc, R3, ENT_HM); 557 return; 558 } 559 560 skb_put_u8(skb, Inb(scc->data)); 561 } 562 563 564 /* Receive Special Condition interrupt handler */ 565 static inline void scc_spint(struct scc_channel *scc) 566 { 567 unsigned char status; 568 struct sk_buff *skb; 569 570 scc->stat.spints++; 571 572 status = InReg(scc->ctrl,R1); /* read receiver status */ 573 574 Inb(scc->data); /* throw away Rx byte */ 575 skb = scc->rx_buff; 576 577 if(status & Rx_OVR) /* receiver overrun */ 578 { 579 scc->stat.rx_over++; /* count them */ 580 or(scc,R3,ENT_HM); /* enter hunt mode for next flag */ 581 582 if (skb != NULL) 583 dev_kfree_skb_irq(skb); 584 scc->rx_buff = skb = NULL; 585 } 586 587 if(status & END_FR && skb != NULL) /* end of frame */ 588 { 589 /* CRC okay, frame ends on 8 bit boundary and received something ? */ 590 591 if (!(status & CRC_ERR) && (status & 0xe) == RES8 && skb->len > 0) 592 { 593 /* ignore last received byte (first of the CRC bytes) */ 594 skb_trim(skb, skb->len-1); 595 scc_net_rx(scc, skb); 596 scc->rx_buff = NULL; 597 scc->stat.rxframes++; 598 } else { /* a bad frame */ 599 dev_kfree_skb_irq(skb); 600 scc->rx_buff = NULL; 601 scc->stat.rxerrs++; 602 } 603 } 604 605 Outb(scc->ctrl,ERR_RES); 606 } 607 608 609 /* ----> interrupt service routine for the Z8530 <---- */ 610 611 static void scc_isr_dispatch(struct scc_channel *scc, int vector) 612 { 613 spin_lock(&scc->lock); 614 switch (vector & VECTOR_MASK) 615 { 616 case TXINT: scc_txint(scc); break; 617 case EXINT: scc_exint(scc); break; 618 case RXINT: scc_rxint(scc); break; 619 case SPINT: scc_spint(scc); break; 620 } 621 spin_unlock(&scc->lock); 622 } 623 624 /* If the card has a latch for the interrupt vector (like the PA0HZP card) 625 use it to get the number of the chip that generated the int. 626 If not: poll all defined chips. 627 */ 628 629 #define SCC_IRQTIMEOUT 30000 630 631 static irqreturn_t scc_isr(int irq, void *dev_id) 632 { 633 int chip_irq = (long) dev_id; 634 unsigned char vector; 635 struct scc_channel *scc; 636 struct scc_ctrl *ctrl; 637 int k; 638 639 if (Vector_Latch) 640 { 641 for(k=0; k < SCC_IRQTIMEOUT; k++) 642 { 643 Outb(Vector_Latch, 0); /* Generate INTACK */ 644 645 /* Read the vector */ 646 if((vector=Inb(Vector_Latch)) >= 16 * Nchips) break; 647 if (vector & 0x01) break; 648 649 scc=&SCC_Info[vector >> 3 ^ 0x01]; 650 if (!scc->dev) break; 651 652 scc_isr_dispatch(scc, vector); 653 654 OutReg(scc->ctrl,R0,RES_H_IUS); /* Reset Highest IUS */ 655 } 656 657 if (k == SCC_IRQTIMEOUT) 658 printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?\n"); 659 660 return IRQ_HANDLED; 661 } 662 663 /* Find the SCC generating the interrupt by polling all attached SCCs 664 * reading RR3A (the interrupt pending register) 665 */ 666 667 ctrl = SCC_ctrl; 668 while (ctrl->chan_A) 669 { 670 if (ctrl->irq != chip_irq) 671 { 672 ctrl++; 673 continue; 674 } 675 676 scc = NULL; 677 for (k = 0; InReg(ctrl->chan_A,R3) && k < SCC_IRQTIMEOUT; k++) 678 { 679 vector=InReg(ctrl->chan_B,R2); /* Read the vector */ 680 if (vector & 0x01) break; 681 682 scc = &SCC_Info[vector >> 3 ^ 0x01]; 683 if (!scc->dev) break; 684 685 scc_isr_dispatch(scc, vector); 686 } 687 688 if (k == SCC_IRQTIMEOUT) 689 { 690 printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?!\n"); 691 break; 692 } 693 694 /* This looks weird and it is. At least the BayCom USCC doesn't 695 * use the Interrupt Daisy Chain, thus we'll have to start 696 * all over again to be sure not to miss an interrupt from 697 * (any of) the other chip(s)... 698 * Honestly, the situation *is* braindamaged... 699 */ 700 701 if (scc != NULL) 702 { 703 OutReg(scc->ctrl,R0,RES_H_IUS); 704 ctrl = SCC_ctrl; 705 } else 706 ctrl++; 707 } 708 return IRQ_HANDLED; 709 } 710 711 712 713 /* ******************************************************************** */ 714 /* * Init Channel */ 715 /* ******************************************************************** */ 716 717 718 /* ----> set SCC channel speed <---- */ 719 720 static inline void set_brg(struct scc_channel *scc, unsigned int tc) 721 { 722 cl(scc,R14,BRENABL); /* disable baudrate generator */ 723 wr(scc,R12,tc & 255); /* brg rate LOW */ 724 wr(scc,R13,tc >> 8); /* brg rate HIGH */ 725 or(scc,R14,BRENABL); /* enable baudrate generator */ 726 } 727 728 static inline void set_speed(struct scc_channel *scc) 729 { 730 unsigned long flags; 731 spin_lock_irqsave(&scc->lock, flags); 732 733 if (scc->modem.speed > 0) /* paranoia... */ 734 set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2); 735 736 spin_unlock_irqrestore(&scc->lock, flags); 737 } 738 739 740 /* ----> initialize a SCC channel <---- */ 741 742 static inline void init_brg(struct scc_channel *scc) 743 { 744 wr(scc, R14, BRSRC); /* BRG source = PCLK */ 745 OutReg(scc->ctrl, R14, SSBR|scc->wreg[R14]); /* DPLL source = BRG */ 746 OutReg(scc->ctrl, R14, SNRZI|scc->wreg[R14]); /* DPLL NRZI mode */ 747 } 748 749 /* 750 * Initialization according to the Z8530 manual (SGS-Thomson's version): 751 * 752 * 1. Modes and constants 753 * 754 * WR9 11000000 chip reset 755 * WR4 XXXXXXXX Tx/Rx control, async or sync mode 756 * WR1 0XX00X00 select W/REQ (optional) 757 * WR2 XXXXXXXX program interrupt vector 758 * WR3 XXXXXXX0 select Rx control 759 * WR5 XXXX0XXX select Tx control 760 * WR6 XXXXXXXX sync character 761 * WR7 XXXXXXXX sync character 762 * WR9 000X0XXX select interrupt control 763 * WR10 XXXXXXXX miscellaneous control (optional) 764 * WR11 XXXXXXXX clock control 765 * WR12 XXXXXXXX time constant lower byte (optional) 766 * WR13 XXXXXXXX time constant upper byte (optional) 767 * WR14 XXXXXXX0 miscellaneous control 768 * WR14 XXXSSSSS commands (optional) 769 * 770 * 2. Enables 771 * 772 * WR14 000SSSS1 baud rate enable 773 * WR3 SSSSSSS1 Rx enable 774 * WR5 SSSS1SSS Tx enable 775 * WR0 10000000 reset Tx CRG (optional) 776 * WR1 XSS00S00 DMA enable (optional) 777 * 778 * 3. Interrupt status 779 * 780 * WR15 XXXXXXXX enable external/status 781 * WR0 00010000 reset external status 782 * WR0 00010000 reset external status twice 783 * WR1 SSSXXSXX enable Rx, Tx and Ext/status 784 * WR9 000SXSSS enable master interrupt enable 785 * 786 * 1 = set to one, 0 = reset to zero 787 * X = user defined, S = same as previous init 788 * 789 * 790 * Note that the implementation differs in some points from above scheme. 791 * 792 */ 793 794 static void init_channel(struct scc_channel *scc) 795 { 796 del_timer(&scc->tx_t); 797 del_timer(&scc->tx_wdog); 798 799 disable_irq(scc->irq); 800 801 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ 802 wr(scc,R1,0); /* no W/REQ operation */ 803 wr(scc,R3,Rx8|RxCRC_ENAB); /* RX 8 bits/char, CRC, disabled */ 804 wr(scc,R5,Tx8|DTR|TxCRC_ENAB); /* TX 8 bits/char, disabled, DTR */ 805 wr(scc,R6,0); /* SDLC address zero (not used) */ 806 wr(scc,R7,FLAG); /* SDLC flag value */ 807 wr(scc,R9,VIS); /* vector includes status */ 808 wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */ 809 wr(scc,R14, 0); 810 811 812 /* set clock sources: 813 814 CLK_DPLL: normal halfduplex operation 815 816 RxClk: use DPLL 817 TxClk: use DPLL 818 TRxC mode DPLL output 819 820 CLK_EXTERNAL: external clocking (G3RUH or DF9IC modem) 821 822 BayCom: others: 823 824 TxClk = pin RTxC TxClk = pin TRxC 825 RxClk = pin TRxC RxClk = pin RTxC 826 827 828 CLK_DIVIDER: 829 RxClk = use DPLL 830 TxClk = pin RTxC 831 832 BayCom: others: 833 pin TRxC = DPLL pin TRxC = BRG 834 (RxClk * 1) (RxClk * 32) 835 */ 836 837 838 switch(scc->modem.clocksrc) 839 { 840 case CLK_DPLL: 841 wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); 842 init_brg(scc); 843 break; 844 845 case CLK_DIVIDER: 846 wr(scc, R11, ((scc->brand & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI); 847 init_brg(scc); 848 break; 849 850 case CLK_EXTERNAL: 851 wr(scc, R11, (scc->brand & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP); 852 OutReg(scc->ctrl, R14, DISDPLL); 853 break; 854 855 } 856 857 set_speed(scc); /* set baudrate */ 858 859 if(scc->enhanced) 860 { 861 or(scc,R15,SHDLCE|FIFOE); /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */ 862 wr(scc,R7,AUTOEOM); 863 } 864 865 if(scc->kiss.softdcd || (InReg(scc->ctrl,R0) & DCD)) 866 /* DCD is now ON */ 867 { 868 start_hunt(scc); 869 } 870 871 /* enable ABORT, DCD & SYNC/HUNT interrupts */ 872 873 wr(scc,R15, BRKIE|TxUIE|(scc->kiss.softdcd? SYNCIE:DCDIE)); 874 875 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */ 876 Outb(scc->ctrl,RES_EXT_INT); /* must be done twice */ 877 878 or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */ 879 880 scc->status = InReg(scc->ctrl,R0); /* read initial status */ 881 882 or(scc,R9,MIE); /* master interrupt enable */ 883 884 scc_init_timer(scc); 885 886 enable_irq(scc->irq); 887 } 888 889 890 891 892 /* ******************************************************************** */ 893 /* * SCC timer functions * */ 894 /* ******************************************************************** */ 895 896 897 /* ----> scc_key_trx sets the time constant for the baudrate 898 generator and keys the transmitter <---- */ 899 900 static void scc_key_trx(struct scc_channel *scc, char tx) 901 { 902 unsigned int time_const; 903 904 if (scc->brand & PRIMUS) 905 Outb(scc->ctrl + 4, scc->option | (tx? 0x80 : 0)); 906 907 if (scc->modem.speed < 300) 908 scc->modem.speed = 1200; 909 910 time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2; 911 912 disable_irq(scc->irq); 913 914 if (tx) 915 { 916 or(scc, R1, TxINT_ENAB); /* t_maxkeyup may have reset these */ 917 or(scc, R15, TxUIE); 918 } 919 920 if (scc->modem.clocksrc == CLK_DPLL) 921 { /* force simplex operation */ 922 if (tx) 923 { 924 #ifdef CONFIG_SCC_TRXECHO 925 cl(scc, R3, RxENABLE|ENT_HM); /* switch off receiver */ 926 cl(scc, R15, DCDIE|SYNCIE); /* No DCD changes, please */ 927 #endif 928 set_brg(scc, time_const); /* reprogram baudrate generator */ 929 930 /* DPLL -> Rx clk, BRG -> Tx CLK, TRxC mode output, TRxC = BRG */ 931 wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR); 932 933 /* By popular demand: tx_inhibit */ 934 if (scc->kiss.tx_inhibit) 935 { 936 or(scc,R5, TxENAB); 937 scc->wreg[R5] |= RTS; 938 } else { 939 or(scc,R5,RTS|TxENAB); /* set the RTS line and enable TX */ 940 } 941 } else { 942 cl(scc,R5,RTS|TxENAB); 943 944 set_brg(scc, time_const); /* reprogram baudrate generator */ 945 946 /* DPLL -> Rx clk, DPLL -> Tx CLK, TRxC mode output, TRxC = DPLL */ 947 wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); 948 949 #ifndef CONFIG_SCC_TRXECHO 950 if (scc->kiss.softdcd) 951 #endif 952 { 953 or(scc,R15, scc->kiss.softdcd? SYNCIE:DCDIE); 954 start_hunt(scc); 955 } 956 } 957 } else { 958 if (tx) 959 { 960 #ifdef CONFIG_SCC_TRXECHO 961 if (scc->kiss.fulldup == KISS_DUPLEX_HALF) 962 { 963 cl(scc, R3, RxENABLE); 964 cl(scc, R15, DCDIE|SYNCIE); 965 } 966 #endif 967 968 if (scc->kiss.tx_inhibit) 969 { 970 or(scc,R5, TxENAB); 971 scc->wreg[R5] |= RTS; 972 } else { 973 or(scc,R5,RTS|TxENAB); /* enable tx */ 974 } 975 } else { 976 cl(scc,R5,RTS|TxENAB); /* disable tx */ 977 978 if ((scc->kiss.fulldup == KISS_DUPLEX_HALF) && 979 #ifndef CONFIG_SCC_TRXECHO 980 scc->kiss.softdcd) 981 #else 982 1) 983 #endif 984 { 985 or(scc, R15, scc->kiss.softdcd? SYNCIE:DCDIE); 986 start_hunt(scc); 987 } 988 } 989 } 990 991 enable_irq(scc->irq); 992 } 993 994 995 /* ----> SCC timer interrupt handler and friends. <---- */ 996 997 static void __scc_start_tx_timer(struct scc_channel *scc, 998 void (*handler)(struct timer_list *t), 999 unsigned long when) 1000 { 1001 del_timer(&scc->tx_t); 1002 1003 if (when == 0) 1004 { 1005 handler(&scc->tx_t); 1006 } else 1007 if (when != TIMER_OFF) 1008 { 1009 scc->tx_t.function = handler; 1010 scc->tx_t.expires = jiffies + (when*HZ)/100; 1011 add_timer(&scc->tx_t); 1012 } 1013 } 1014 1015 static void scc_start_tx_timer(struct scc_channel *scc, 1016 void (*handler)(struct timer_list *t), 1017 unsigned long when) 1018 { 1019 unsigned long flags; 1020 1021 spin_lock_irqsave(&scc->lock, flags); 1022 __scc_start_tx_timer(scc, handler, when); 1023 spin_unlock_irqrestore(&scc->lock, flags); 1024 } 1025 1026 static void scc_start_defer(struct scc_channel *scc) 1027 { 1028 unsigned long flags; 1029 1030 spin_lock_irqsave(&scc->lock, flags); 1031 del_timer(&scc->tx_wdog); 1032 1033 if (scc->kiss.maxdefer != 0 && scc->kiss.maxdefer != TIMER_OFF) 1034 { 1035 scc->tx_wdog.function = t_busy; 1036 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxdefer; 1037 add_timer(&scc->tx_wdog); 1038 } 1039 spin_unlock_irqrestore(&scc->lock, flags); 1040 } 1041 1042 static void scc_start_maxkeyup(struct scc_channel *scc) 1043 { 1044 unsigned long flags; 1045 1046 spin_lock_irqsave(&scc->lock, flags); 1047 del_timer(&scc->tx_wdog); 1048 1049 if (scc->kiss.maxkeyup != 0 && scc->kiss.maxkeyup != TIMER_OFF) 1050 { 1051 scc->tx_wdog.function = t_maxkeyup; 1052 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxkeyup; 1053 add_timer(&scc->tx_wdog); 1054 } 1055 spin_unlock_irqrestore(&scc->lock, flags); 1056 } 1057 1058 /* 1059 * This is called from scc_txint() when there are no more frames to send. 1060 * Not exactly a timer function, but it is a close friend of the family... 1061 */ 1062 1063 static void scc_tx_done(struct scc_channel *scc) 1064 { 1065 /* 1066 * trx remains keyed in fulldup mode 2 until t_idle expires. 1067 */ 1068 1069 switch (scc->kiss.fulldup) 1070 { 1071 case KISS_DUPLEX_LINK: 1072 scc->stat.tx_state = TXS_IDLE2; 1073 if (scc->kiss.idletime != TIMER_OFF) 1074 scc_start_tx_timer(scc, t_idle, 1075 scc->kiss.idletime*100); 1076 break; 1077 case KISS_DUPLEX_OPTIMA: 1078 scc_notify(scc, HWEV_ALL_SENT); 1079 break; 1080 default: 1081 scc->stat.tx_state = TXS_BUSY; 1082 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime); 1083 } 1084 1085 netif_wake_queue(scc->dev); 1086 } 1087 1088 1089 static unsigned char Rand = 17; 1090 1091 static inline int is_grouped(struct scc_channel *scc) 1092 { 1093 int k; 1094 struct scc_channel *scc2; 1095 unsigned char grp1, grp2; 1096 1097 grp1 = scc->kiss.group; 1098 1099 for (k = 0; k < (Nchips * 2); k++) 1100 { 1101 scc2 = &SCC_Info[k]; 1102 grp2 = scc2->kiss.group; 1103 1104 if (scc2 == scc || !(scc2->dev && grp2)) 1105 continue; 1106 1107 if ((grp1 & 0x3f) == (grp2 & 0x3f)) 1108 { 1109 if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) ) 1110 return 1; 1111 1112 if ( (grp1 & RXGROUP) && scc2->dcd ) 1113 return 1; 1114 } 1115 } 1116 return 0; 1117 } 1118 1119 /* DWAIT and SLOTTIME expired 1120 * 1121 * fulldup == 0: DCD is active or Rand > P-persistence: start t_busy timer 1122 * else key trx and start txdelay 1123 * fulldup == 1: key trx and start txdelay 1124 * fulldup == 2: mintime expired, reset status or key trx and start txdelay 1125 */ 1126 1127 static void t_dwait(struct timer_list *t) 1128 { 1129 struct scc_channel *scc = from_timer(scc, t, tx_t); 1130 1131 if (scc->stat.tx_state == TXS_WAIT) /* maxkeyup or idle timeout */ 1132 { 1133 if (skb_queue_empty(&scc->tx_queue)) { /* nothing to send */ 1134 scc->stat.tx_state = TXS_IDLE; 1135 netif_wake_queue(scc->dev); /* t_maxkeyup locked it. */ 1136 return; 1137 } 1138 1139 scc->stat.tx_state = TXS_BUSY; 1140 } 1141 1142 if (scc->kiss.fulldup == KISS_DUPLEX_HALF) 1143 { 1144 Rand = Rand * 17 + 31; 1145 1146 if (scc->dcd || (scc->kiss.persist) < Rand || (scc->kiss.group && is_grouped(scc)) ) 1147 { 1148 scc_start_defer(scc); 1149 scc_start_tx_timer(scc, t_dwait, scc->kiss.slottime); 1150 return ; 1151 } 1152 } 1153 1154 if ( !(scc->wreg[R5] & RTS) ) 1155 { 1156 scc_key_trx(scc, TX_ON); 1157 scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay); 1158 } else { 1159 scc_start_tx_timer(scc, t_txdelay, 0); 1160 } 1161 } 1162 1163 1164 /* TXDELAY expired 1165 * 1166 * kick transmission by a fake scc_txint(scc), start 'maxkeyup' watchdog. 1167 */ 1168 1169 static void t_txdelay(struct timer_list *t) 1170 { 1171 struct scc_channel *scc = from_timer(scc, t, tx_t); 1172 1173 scc_start_maxkeyup(scc); 1174 1175 if (scc->tx_buff == NULL) 1176 { 1177 disable_irq(scc->irq); 1178 scc_txint(scc); 1179 enable_irq(scc->irq); 1180 } 1181 } 1182 1183 1184 /* TAILTIME expired 1185 * 1186 * switch off transmitter. If we were stopped by Maxkeyup restart 1187 * transmission after 'mintime' seconds 1188 */ 1189 1190 static void t_tail(struct timer_list *t) 1191 { 1192 struct scc_channel *scc = from_timer(scc, t, tx_t); 1193 unsigned long flags; 1194 1195 spin_lock_irqsave(&scc->lock, flags); 1196 del_timer(&scc->tx_wdog); 1197 scc_key_trx(scc, TX_OFF); 1198 spin_unlock_irqrestore(&scc->lock, flags); 1199 1200 if (scc->stat.tx_state == TXS_TIMEOUT) /* we had a timeout? */ 1201 { 1202 scc->stat.tx_state = TXS_WAIT; 1203 scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100); 1204 return; 1205 } 1206 1207 scc->stat.tx_state = TXS_IDLE; 1208 netif_wake_queue(scc->dev); 1209 } 1210 1211 1212 /* BUSY timeout 1213 * 1214 * throw away send buffers if DCD remains active too long. 1215 */ 1216 1217 static void t_busy(struct timer_list *t) 1218 { 1219 struct scc_channel *scc = from_timer(scc, t, tx_wdog); 1220 1221 del_timer(&scc->tx_t); 1222 netif_stop_queue(scc->dev); /* don't pile on the wabbit! */ 1223 1224 scc_discard_buffers(scc); 1225 scc->stat.txerrs++; 1226 scc->stat.tx_state = TXS_IDLE; 1227 1228 netif_wake_queue(scc->dev); 1229 } 1230 1231 /* MAXKEYUP timeout 1232 * 1233 * this is our watchdog. 1234 */ 1235 1236 static void t_maxkeyup(struct timer_list *t) 1237 { 1238 struct scc_channel *scc = from_timer(scc, t, tx_wdog); 1239 unsigned long flags; 1240 1241 spin_lock_irqsave(&scc->lock, flags); 1242 /* 1243 * let things settle down before we start to 1244 * accept new data. 1245 */ 1246 1247 netif_stop_queue(scc->dev); 1248 scc_discard_buffers(scc); 1249 1250 del_timer(&scc->tx_t); 1251 1252 cl(scc, R1, TxINT_ENAB); /* force an ABORT, but don't */ 1253 cl(scc, R15, TxUIE); /* count it. */ 1254 OutReg(scc->ctrl, R0, RES_Tx_P); 1255 1256 spin_unlock_irqrestore(&scc->lock, flags); 1257 1258 scc->stat.txerrs++; 1259 scc->stat.tx_state = TXS_TIMEOUT; 1260 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime); 1261 } 1262 1263 /* IDLE timeout 1264 * 1265 * in fulldup mode 2 it keys down the transmitter after 'idle' seconds 1266 * of inactivity. We will not restart transmission before 'mintime' 1267 * expires. 1268 */ 1269 1270 static void t_idle(struct timer_list *t) 1271 { 1272 struct scc_channel *scc = from_timer(scc, t, tx_t); 1273 1274 del_timer(&scc->tx_wdog); 1275 1276 scc_key_trx(scc, TX_OFF); 1277 if(scc->kiss.mintime) 1278 scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100); 1279 scc->stat.tx_state = TXS_WAIT; 1280 } 1281 1282 static void scc_init_timer(struct scc_channel *scc) 1283 { 1284 unsigned long flags; 1285 1286 spin_lock_irqsave(&scc->lock, flags); 1287 scc->stat.tx_state = TXS_IDLE; 1288 spin_unlock_irqrestore(&scc->lock, flags); 1289 } 1290 1291 1292 /* ******************************************************************** */ 1293 /* * Set/get L1 parameters * */ 1294 /* ******************************************************************** */ 1295 1296 1297 /* 1298 * this will set the "hardware" parameters through KISS commands or ioctl() 1299 */ 1300 1301 #define CAST(x) (unsigned long)(x) 1302 1303 static unsigned int scc_set_param(struct scc_channel *scc, unsigned int cmd, unsigned int arg) 1304 { 1305 switch (cmd) 1306 { 1307 case PARAM_TXDELAY: scc->kiss.txdelay=arg; break; 1308 case PARAM_PERSIST: scc->kiss.persist=arg; break; 1309 case PARAM_SLOTTIME: scc->kiss.slottime=arg; break; 1310 case PARAM_TXTAIL: scc->kiss.tailtime=arg; break; 1311 case PARAM_FULLDUP: scc->kiss.fulldup=arg; break; 1312 case PARAM_DTR: break; /* does someone need this? */ 1313 case PARAM_GROUP: scc->kiss.group=arg; break; 1314 case PARAM_IDLE: scc->kiss.idletime=arg; break; 1315 case PARAM_MIN: scc->kiss.mintime=arg; break; 1316 case PARAM_MAXKEY: scc->kiss.maxkeyup=arg; break; 1317 case PARAM_WAIT: scc->kiss.waittime=arg; break; 1318 case PARAM_MAXDEFER: scc->kiss.maxdefer=arg; break; 1319 case PARAM_TX: scc->kiss.tx_inhibit=arg; break; 1320 1321 case PARAM_SOFTDCD: 1322 scc->kiss.softdcd=arg; 1323 if (arg) 1324 { 1325 or(scc, R15, SYNCIE); 1326 cl(scc, R15, DCDIE); 1327 start_hunt(scc); 1328 } else { 1329 or(scc, R15, DCDIE); 1330 cl(scc, R15, SYNCIE); 1331 } 1332 break; 1333 1334 case PARAM_SPEED: 1335 if (arg < 256) 1336 scc->modem.speed=arg*100; 1337 else 1338 scc->modem.speed=arg; 1339 1340 if (scc->stat.tx_state == 0) /* only switch baudrate on rx... ;-) */ 1341 set_speed(scc); 1342 break; 1343 1344 case PARAM_RTS: 1345 if ( !(scc->wreg[R5] & RTS) ) 1346 { 1347 if (arg != TX_OFF) { 1348 scc_key_trx(scc, TX_ON); 1349 scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay); 1350 } 1351 } else { 1352 if (arg == TX_OFF) 1353 { 1354 scc->stat.tx_state = TXS_BUSY; 1355 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime); 1356 } 1357 } 1358 break; 1359 1360 case PARAM_HWEVENT: 1361 scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF); 1362 break; 1363 1364 default: return -EINVAL; 1365 } 1366 1367 return 0; 1368 } 1369 1370 1371 1372 static unsigned long scc_get_param(struct scc_channel *scc, unsigned int cmd) 1373 { 1374 switch (cmd) 1375 { 1376 case PARAM_TXDELAY: return CAST(scc->kiss.txdelay); 1377 case PARAM_PERSIST: return CAST(scc->kiss.persist); 1378 case PARAM_SLOTTIME: return CAST(scc->kiss.slottime); 1379 case PARAM_TXTAIL: return CAST(scc->kiss.tailtime); 1380 case PARAM_FULLDUP: return CAST(scc->kiss.fulldup); 1381 case PARAM_SOFTDCD: return CAST(scc->kiss.softdcd); 1382 case PARAM_DTR: return CAST((scc->wreg[R5] & DTR)? 1:0); 1383 case PARAM_RTS: return CAST((scc->wreg[R5] & RTS)? 1:0); 1384 case PARAM_SPEED: return CAST(scc->modem.speed); 1385 case PARAM_GROUP: return CAST(scc->kiss.group); 1386 case PARAM_IDLE: return CAST(scc->kiss.idletime); 1387 case PARAM_MIN: return CAST(scc->kiss.mintime); 1388 case PARAM_MAXKEY: return CAST(scc->kiss.maxkeyup); 1389 case PARAM_WAIT: return CAST(scc->kiss.waittime); 1390 case PARAM_MAXDEFER: return CAST(scc->kiss.maxdefer); 1391 case PARAM_TX: return CAST(scc->kiss.tx_inhibit); 1392 default: return NO_SUCH_PARAM; 1393 } 1394 1395 } 1396 1397 #undef CAST 1398 1399 /* ******************************************************************* */ 1400 /* * Send calibration pattern * */ 1401 /* ******************************************************************* */ 1402 1403 static void scc_stop_calibrate(struct timer_list *t) 1404 { 1405 struct scc_channel *scc = from_timer(scc, t, tx_wdog); 1406 unsigned long flags; 1407 1408 spin_lock_irqsave(&scc->lock, flags); 1409 del_timer(&scc->tx_wdog); 1410 scc_key_trx(scc, TX_OFF); 1411 wr(scc, R6, 0); 1412 wr(scc, R7, FLAG); 1413 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */ 1414 Outb(scc->ctrl,RES_EXT_INT); 1415 1416 netif_wake_queue(scc->dev); 1417 spin_unlock_irqrestore(&scc->lock, flags); 1418 } 1419 1420 1421 static void 1422 scc_start_calibrate(struct scc_channel *scc, int duration, unsigned char pattern) 1423 { 1424 unsigned long flags; 1425 1426 spin_lock_irqsave(&scc->lock, flags); 1427 netif_stop_queue(scc->dev); 1428 scc_discard_buffers(scc); 1429 1430 del_timer(&scc->tx_wdog); 1431 1432 scc->tx_wdog.function = scc_stop_calibrate; 1433 scc->tx_wdog.expires = jiffies + HZ*duration; 1434 add_timer(&scc->tx_wdog); 1435 1436 /* This doesn't seem to work. Why not? */ 1437 wr(scc, R6, 0); 1438 wr(scc, R7, pattern); 1439 1440 /* 1441 * Don't know if this works. 1442 * Damn, where is my Z8530 programming manual...? 1443 */ 1444 1445 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */ 1446 Outb(scc->ctrl,RES_EXT_INT); 1447 1448 scc_key_trx(scc, TX_ON); 1449 spin_unlock_irqrestore(&scc->lock, flags); 1450 } 1451 1452 /* ******************************************************************* */ 1453 /* * Init channel structures, special HW, etc... * */ 1454 /* ******************************************************************* */ 1455 1456 /* 1457 * Reset the Z8530s and setup special hardware 1458 */ 1459 1460 static void z8530_init(void) 1461 { 1462 struct scc_channel *scc; 1463 int chip, k; 1464 unsigned long flags; 1465 char *flag; 1466 1467 1468 printk(KERN_INFO "Init Z8530 driver: %u channels, IRQ", Nchips*2); 1469 1470 flag=" "; 1471 for (k = 0; k < nr_irqs; k++) 1472 if (Ivec[k].used) 1473 { 1474 printk("%s%d", flag, k); 1475 flag=","; 1476 } 1477 printk("\n"); 1478 1479 1480 /* reset and pre-init all chips in the system */ 1481 for (chip = 0; chip < Nchips; chip++) 1482 { 1483 scc=&SCC_Info[2*chip]; 1484 if (!scc->ctrl) continue; 1485 1486 /* Special SCC cards */ 1487 1488 if(scc->brand & EAGLE) /* this is an EAGLE card */ 1489 Outb(scc->special,0x08); /* enable interrupt on the board */ 1490 1491 if(scc->brand & (PC100 | PRIMUS)) /* this is a PC100/PRIMUS card */ 1492 Outb(scc->special,scc->option); /* set the MODEM mode (0x22) */ 1493 1494 1495 /* Reset and pre-init Z8530 */ 1496 1497 spin_lock_irqsave(&scc->lock, flags); 1498 1499 Outb(scc->ctrl, 0); 1500 OutReg(scc->ctrl,R9,FHWRES); /* force hardware reset */ 1501 udelay(100); /* give it 'a bit' more time than required */ 1502 wr(scc, R2, chip*16); /* interrupt vector */ 1503 wr(scc, R9, VIS); /* vector includes status */ 1504 spin_unlock_irqrestore(&scc->lock, flags); 1505 } 1506 1507 1508 Driver_Initialized = 1; 1509 } 1510 1511 /* 1512 * Allocate device structure, err, instance, and register driver 1513 */ 1514 1515 static int scc_net_alloc(const char *name, struct scc_channel *scc) 1516 { 1517 int err; 1518 struct net_device *dev; 1519 1520 dev = alloc_netdev(0, name, NET_NAME_UNKNOWN, scc_net_setup); 1521 if (!dev) 1522 return -ENOMEM; 1523 1524 dev->ml_priv = scc; 1525 scc->dev = dev; 1526 spin_lock_init(&scc->lock); 1527 timer_setup(&scc->tx_t, NULL, 0); 1528 timer_setup(&scc->tx_wdog, NULL, 0); 1529 1530 err = register_netdevice(dev); 1531 if (err) { 1532 printk(KERN_ERR "%s: can't register network device (%d)\n", 1533 name, err); 1534 free_netdev(dev); 1535 scc->dev = NULL; 1536 return err; 1537 } 1538 1539 return 0; 1540 } 1541 1542 1543 1544 /* ******************************************************************** */ 1545 /* * Network driver methods * */ 1546 /* ******************************************************************** */ 1547 1548 static const struct net_device_ops scc_netdev_ops = { 1549 .ndo_open = scc_net_open, 1550 .ndo_stop = scc_net_close, 1551 .ndo_start_xmit = scc_net_tx, 1552 .ndo_set_mac_address = scc_net_set_mac_address, 1553 .ndo_get_stats = scc_net_get_stats, 1554 .ndo_siocdevprivate = scc_net_siocdevprivate, 1555 }; 1556 1557 /* ----> Initialize device <----- */ 1558 1559 static void scc_net_setup(struct net_device *dev) 1560 { 1561 dev->tx_queue_len = 16; /* should be enough... */ 1562 1563 dev->netdev_ops = &scc_netdev_ops; 1564 dev->header_ops = &ax25_header_ops; 1565 1566 dev->flags = 0; 1567 1568 dev->type = ARPHRD_AX25; 1569 dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN; 1570 dev->mtu = AX25_DEF_PACLEN; 1571 dev->addr_len = AX25_ADDR_LEN; 1572 1573 memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN); 1574 dev_addr_set(dev, (u8 *)&ax25_defaddr); 1575 } 1576 1577 /* ----> open network device <---- */ 1578 1579 static int scc_net_open(struct net_device *dev) 1580 { 1581 struct scc_channel *scc = (struct scc_channel *) dev->ml_priv; 1582 1583 if (!scc->init) 1584 return -EINVAL; 1585 1586 scc->tx_buff = NULL; 1587 skb_queue_head_init(&scc->tx_queue); 1588 1589 init_channel(scc); 1590 1591 netif_start_queue(dev); 1592 return 0; 1593 } 1594 1595 /* ----> close network device <---- */ 1596 1597 static int scc_net_close(struct net_device *dev) 1598 { 1599 struct scc_channel *scc = (struct scc_channel *) dev->ml_priv; 1600 unsigned long flags; 1601 1602 netif_stop_queue(dev); 1603 1604 spin_lock_irqsave(&scc->lock, flags); 1605 Outb(scc->ctrl,0); /* Make sure pointer is written */ 1606 wr(scc,R1,0); /* disable interrupts */ 1607 wr(scc,R3,0); 1608 spin_unlock_irqrestore(&scc->lock, flags); 1609 1610 del_timer_sync(&scc->tx_t); 1611 del_timer_sync(&scc->tx_wdog); 1612 1613 scc_discard_buffers(scc); 1614 1615 return 0; 1616 } 1617 1618 /* ----> receive frame, called from scc_rxint() <---- */ 1619 1620 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb) 1621 { 1622 if (skb->len == 0) { 1623 dev_kfree_skb_irq(skb); 1624 return; 1625 } 1626 1627 scc->dev_stat.rx_packets++; 1628 scc->dev_stat.rx_bytes += skb->len; 1629 1630 skb->protocol = ax25_type_trans(skb, scc->dev); 1631 1632 netif_rx(skb); 1633 } 1634 1635 /* ----> transmit frame <---- */ 1636 1637 static netdev_tx_t scc_net_tx(struct sk_buff *skb, struct net_device *dev) 1638 { 1639 struct scc_channel *scc = (struct scc_channel *) dev->ml_priv; 1640 unsigned long flags; 1641 char kisscmd; 1642 1643 if (skb->protocol == htons(ETH_P_IP)) 1644 return ax25_ip_xmit(skb); 1645 1646 if (skb->len > scc->stat.bufsize || skb->len < 2) { 1647 scc->dev_stat.tx_dropped++; /* bogus frame */ 1648 dev_kfree_skb(skb); 1649 return NETDEV_TX_OK; 1650 } 1651 1652 scc->dev_stat.tx_packets++; 1653 scc->dev_stat.tx_bytes += skb->len; 1654 scc->stat.txframes++; 1655 1656 kisscmd = *skb->data & 0x1f; 1657 skb_pull(skb, 1); 1658 1659 if (kisscmd) { 1660 scc_set_param(scc, kisscmd, *skb->data); 1661 dev_kfree_skb(skb); 1662 return NETDEV_TX_OK; 1663 } 1664 1665 spin_lock_irqsave(&scc->lock, flags); 1666 1667 if (skb_queue_len(&scc->tx_queue) > scc->dev->tx_queue_len) { 1668 struct sk_buff *skb_del; 1669 skb_del = skb_dequeue(&scc->tx_queue); 1670 dev_kfree_skb(skb_del); 1671 } 1672 skb_queue_tail(&scc->tx_queue, skb); 1673 netif_trans_update(dev); 1674 1675 1676 /* 1677 * Start transmission if the trx state is idle or 1678 * t_idle hasn't expired yet. Use dwait/persistence/slottime 1679 * algorithm for normal halfduplex operation. 1680 */ 1681 1682 if(scc->stat.tx_state == TXS_IDLE || scc->stat.tx_state == TXS_IDLE2) { 1683 scc->stat.tx_state = TXS_BUSY; 1684 if (scc->kiss.fulldup == KISS_DUPLEX_HALF) 1685 __scc_start_tx_timer(scc, t_dwait, scc->kiss.waittime); 1686 else 1687 __scc_start_tx_timer(scc, t_dwait, 0); 1688 } 1689 spin_unlock_irqrestore(&scc->lock, flags); 1690 return NETDEV_TX_OK; 1691 } 1692 1693 /* ----> ioctl functions <---- */ 1694 1695 /* 1696 * SIOCSCCCFG - configure driver arg: (struct scc_hw_config *) arg 1697 * SIOCSCCINI - initialize driver arg: --- 1698 * SIOCSCCCHANINI - initialize channel arg: (struct scc_modem *) arg 1699 * SIOCSCCSMEM - set memory arg: (struct scc_mem_config *) arg 1700 * SIOCSCCGKISS - get level 1 parameter arg: (struct scc_kiss_cmd *) arg 1701 * SIOCSCCSKISS - set level 1 parameter arg: (struct scc_kiss_cmd *) arg 1702 * SIOCSCCGSTAT - get driver status arg: (struct scc_stat *) arg 1703 * SIOCSCCCAL - send calib. pattern arg: (struct scc_calibrate *) arg 1704 */ 1705 1706 static int scc_net_siocdevprivate(struct net_device *dev, 1707 struct ifreq *ifr, void __user *arg, int cmd) 1708 { 1709 struct scc_kiss_cmd kiss_cmd; 1710 struct scc_mem_config memcfg; 1711 struct scc_hw_config hwcfg; 1712 struct scc_calibrate cal; 1713 struct scc_channel *scc = (struct scc_channel *) dev->ml_priv; 1714 int chan; 1715 unsigned char device_name[IFNAMSIZ]; 1716 1717 if (!Driver_Initialized) 1718 { 1719 if (cmd == SIOCSCCCFG) 1720 { 1721 int found = 1; 1722 1723 if (!capable(CAP_SYS_RAWIO)) return -EPERM; 1724 if (in_compat_syscall()) 1725 return -EOPNOTSUPP; 1726 1727 if (!arg) return -EFAULT; 1728 1729 if (Nchips >= SCC_MAXCHIPS) 1730 return -EINVAL; 1731 1732 if (copy_from_user(&hwcfg, arg, sizeof(hwcfg))) 1733 return -EFAULT; 1734 1735 if (hwcfg.irq == 2) hwcfg.irq = 9; 1736 1737 if (hwcfg.irq < 0 || hwcfg.irq >= nr_irqs) 1738 return -EINVAL; 1739 1740 if (!Ivec[hwcfg.irq].used && hwcfg.irq) 1741 { 1742 if (request_irq(hwcfg.irq, scc_isr, 1743 0, "AX.25 SCC", 1744 (void *)(long) hwcfg.irq)) 1745 printk(KERN_WARNING "z8530drv: warning, cannot get IRQ %d\n", hwcfg.irq); 1746 else 1747 Ivec[hwcfg.irq].used = 1; 1748 } 1749 1750 if (hwcfg.vector_latch && !Vector_Latch) { 1751 if (!request_region(hwcfg.vector_latch, 1, "scc vector latch")) 1752 printk(KERN_WARNING "z8530drv: warning, cannot reserve vector latch port 0x%lx\n, disabled.", hwcfg.vector_latch); 1753 else 1754 Vector_Latch = hwcfg.vector_latch; 1755 } 1756 1757 if (hwcfg.clock == 0) 1758 hwcfg.clock = SCC_DEFAULT_CLOCK; 1759 1760 #ifndef SCC_DONT_CHECK 1761 1762 if(request_region(hwcfg.ctrl_a, 1, "scc-probe")) 1763 { 1764 disable_irq(hwcfg.irq); 1765 Outb(hwcfg.ctrl_a, 0); 1766 OutReg(hwcfg.ctrl_a, R9, FHWRES); 1767 udelay(100); 1768 OutReg(hwcfg.ctrl_a,R13,0x55); /* is this chip really there? */ 1769 udelay(5); 1770 1771 if (InReg(hwcfg.ctrl_a,R13) != 0x55) 1772 found = 0; 1773 enable_irq(hwcfg.irq); 1774 release_region(hwcfg.ctrl_a, 1); 1775 } 1776 else 1777 found = 0; 1778 #endif 1779 1780 if (found) 1781 { 1782 SCC_Info[2*Nchips ].ctrl = hwcfg.ctrl_a; 1783 SCC_Info[2*Nchips ].data = hwcfg.data_a; 1784 SCC_Info[2*Nchips ].irq = hwcfg.irq; 1785 SCC_Info[2*Nchips+1].ctrl = hwcfg.ctrl_b; 1786 SCC_Info[2*Nchips+1].data = hwcfg.data_b; 1787 SCC_Info[2*Nchips+1].irq = hwcfg.irq; 1788 1789 SCC_ctrl[Nchips].chan_A = hwcfg.ctrl_a; 1790 SCC_ctrl[Nchips].chan_B = hwcfg.ctrl_b; 1791 SCC_ctrl[Nchips].irq = hwcfg.irq; 1792 } 1793 1794 1795 for (chan = 0; chan < 2; chan++) 1796 { 1797 sprintf(device_name, "%s%i", SCC_DriverName, 2*Nchips+chan); 1798 1799 SCC_Info[2*Nchips+chan].special = hwcfg.special; 1800 SCC_Info[2*Nchips+chan].clock = hwcfg.clock; 1801 SCC_Info[2*Nchips+chan].brand = hwcfg.brand; 1802 SCC_Info[2*Nchips+chan].option = hwcfg.option; 1803 SCC_Info[2*Nchips+chan].enhanced = hwcfg.escc; 1804 1805 #ifdef SCC_DONT_CHECK 1806 printk(KERN_INFO "%s: data port = 0x%3.3x control port = 0x%3.3x\n", 1807 device_name, 1808 SCC_Info[2*Nchips+chan].data, 1809 SCC_Info[2*Nchips+chan].ctrl); 1810 1811 #else 1812 printk(KERN_INFO "%s: data port = 0x%3.3lx control port = 0x%3.3lx -- %s\n", 1813 device_name, 1814 chan? hwcfg.data_b : hwcfg.data_a, 1815 chan? hwcfg.ctrl_b : hwcfg.ctrl_a, 1816 found? "found" : "missing"); 1817 #endif 1818 1819 if (found) 1820 { 1821 request_region(SCC_Info[2*Nchips+chan].ctrl, 1, "scc ctrl"); 1822 request_region(SCC_Info[2*Nchips+chan].data, 1, "scc data"); 1823 if (Nchips+chan != 0 && 1824 scc_net_alloc(device_name, 1825 &SCC_Info[2*Nchips+chan])) 1826 return -EINVAL; 1827 } 1828 } 1829 1830 if (found) Nchips++; 1831 1832 return 0; 1833 } 1834 1835 if (cmd == SIOCSCCINI) 1836 { 1837 if (!capable(CAP_SYS_RAWIO)) 1838 return -EPERM; 1839 1840 if (Nchips == 0) 1841 return -EINVAL; 1842 1843 z8530_init(); 1844 return 0; 1845 } 1846 1847 return -EINVAL; /* confuse the user */ 1848 } 1849 1850 if (!scc->init) 1851 { 1852 if (cmd == SIOCSCCCHANINI) 1853 { 1854 if (!capable(CAP_NET_ADMIN)) return -EPERM; 1855 if (!arg) return -EINVAL; 1856 1857 scc->stat.bufsize = SCC_BUFSIZE; 1858 1859 if (copy_from_user(&scc->modem, arg, sizeof(struct scc_modem))) 1860 return -EINVAL; 1861 1862 /* default KISS Params */ 1863 1864 if (scc->modem.speed < 4800) 1865 { 1866 scc->kiss.txdelay = 36; /* 360 ms */ 1867 scc->kiss.persist = 42; /* 25% persistence */ /* was 25 */ 1868 scc->kiss.slottime = 16; /* 160 ms */ 1869 scc->kiss.tailtime = 4; /* minimal reasonable value */ 1870 scc->kiss.fulldup = 0; /* CSMA */ 1871 scc->kiss.waittime = 50; /* 500 ms */ 1872 scc->kiss.maxkeyup = 10; /* 10 s */ 1873 scc->kiss.mintime = 3; /* 3 s */ 1874 scc->kiss.idletime = 30; /* 30 s */ 1875 scc->kiss.maxdefer = 120; /* 2 min */ 1876 scc->kiss.softdcd = 0; /* hardware dcd */ 1877 } else { 1878 scc->kiss.txdelay = 10; /* 100 ms */ 1879 scc->kiss.persist = 64; /* 25% persistence */ /* was 25 */ 1880 scc->kiss.slottime = 8; /* 160 ms */ 1881 scc->kiss.tailtime = 1; /* minimal reasonable value */ 1882 scc->kiss.fulldup = 0; /* CSMA */ 1883 scc->kiss.waittime = 50; /* 500 ms */ 1884 scc->kiss.maxkeyup = 7; /* 7 s */ 1885 scc->kiss.mintime = 3; /* 3 s */ 1886 scc->kiss.idletime = 30; /* 30 s */ 1887 scc->kiss.maxdefer = 120; /* 2 min */ 1888 scc->kiss.softdcd = 0; /* hardware dcd */ 1889 } 1890 1891 scc->tx_buff = NULL; 1892 skb_queue_head_init(&scc->tx_queue); 1893 scc->init = 1; 1894 1895 return 0; 1896 } 1897 1898 return -EINVAL; 1899 } 1900 1901 switch(cmd) 1902 { 1903 case SIOCSCCRESERVED: 1904 return -ENOIOCTLCMD; 1905 1906 case SIOCSCCSMEM: 1907 if (!capable(CAP_SYS_RAWIO)) return -EPERM; 1908 if (!arg || copy_from_user(&memcfg, arg, sizeof(memcfg))) 1909 return -EINVAL; 1910 scc->stat.bufsize = memcfg.bufsize; 1911 return 0; 1912 1913 case SIOCSCCGSTAT: 1914 if (!arg || copy_to_user(arg, &scc->stat, sizeof(scc->stat))) 1915 return -EINVAL; 1916 return 0; 1917 1918 case SIOCSCCGKISS: 1919 if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd))) 1920 return -EINVAL; 1921 kiss_cmd.param = scc_get_param(scc, kiss_cmd.command); 1922 if (copy_to_user(arg, &kiss_cmd, sizeof(kiss_cmd))) 1923 return -EINVAL; 1924 return 0; 1925 1926 case SIOCSCCSKISS: 1927 if (!capable(CAP_NET_ADMIN)) return -EPERM; 1928 if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd))) 1929 return -EINVAL; 1930 return scc_set_param(scc, kiss_cmd.command, kiss_cmd.param); 1931 1932 case SIOCSCCCAL: 1933 if (!capable(CAP_SYS_RAWIO)) return -EPERM; 1934 if (!arg || copy_from_user(&cal, arg, sizeof(cal)) || cal.time == 0) 1935 return -EINVAL; 1936 1937 scc_start_calibrate(scc, cal.time, cal.pattern); 1938 return 0; 1939 1940 default: 1941 return -ENOIOCTLCMD; 1942 1943 } 1944 1945 return -EINVAL; 1946 } 1947 1948 /* ----> set interface callsign <---- */ 1949 1950 static int scc_net_set_mac_address(struct net_device *dev, void *addr) 1951 { 1952 struct sockaddr *sa = (struct sockaddr *) addr; 1953 dev_addr_set(dev, sa->sa_data); 1954 return 0; 1955 } 1956 1957 /* ----> get statistics <---- */ 1958 1959 static struct net_device_stats *scc_net_get_stats(struct net_device *dev) 1960 { 1961 struct scc_channel *scc = (struct scc_channel *) dev->ml_priv; 1962 1963 scc->dev_stat.rx_errors = scc->stat.rxerrs + scc->stat.rx_over; 1964 scc->dev_stat.tx_errors = scc->stat.txerrs + scc->stat.tx_under; 1965 scc->dev_stat.rx_fifo_errors = scc->stat.rx_over; 1966 scc->dev_stat.tx_fifo_errors = scc->stat.tx_under; 1967 1968 return &scc->dev_stat; 1969 } 1970 1971 /* ******************************************************************** */ 1972 /* * dump statistics to /proc/net/z8530drv * */ 1973 /* ******************************************************************** */ 1974 1975 #ifdef CONFIG_PROC_FS 1976 1977 static inline struct scc_channel *scc_net_seq_idx(loff_t pos) 1978 { 1979 int k; 1980 1981 for (k = 0; k < Nchips*2; ++k) { 1982 if (!SCC_Info[k].init) 1983 continue; 1984 if (pos-- == 0) 1985 return &SCC_Info[k]; 1986 } 1987 return NULL; 1988 } 1989 1990 static void *scc_net_seq_start(struct seq_file *seq, loff_t *pos) 1991 { 1992 return *pos ? scc_net_seq_idx(*pos - 1) : SEQ_START_TOKEN; 1993 1994 } 1995 1996 static void *scc_net_seq_next(struct seq_file *seq, void *v, loff_t *pos) 1997 { 1998 unsigned k; 1999 struct scc_channel *scc = v; 2000 ++*pos; 2001 2002 for (k = (v == SEQ_START_TOKEN) ? 0 : (scc - SCC_Info)+1; 2003 k < Nchips*2; ++k) { 2004 if (SCC_Info[k].init) 2005 return &SCC_Info[k]; 2006 } 2007 return NULL; 2008 } 2009 2010 static void scc_net_seq_stop(struct seq_file *seq, void *v) 2011 { 2012 } 2013 2014 static int scc_net_seq_show(struct seq_file *seq, void *v) 2015 { 2016 if (v == SEQ_START_TOKEN) { 2017 seq_puts(seq, "z8530drv-"VERSION"\n"); 2018 } else if (!Driver_Initialized) { 2019 seq_puts(seq, "not initialized\n"); 2020 } else if (!Nchips) { 2021 seq_puts(seq, "chips missing\n"); 2022 } else { 2023 const struct scc_channel *scc = v; 2024 const struct scc_stat *stat = &scc->stat; 2025 const struct scc_kiss *kiss = &scc->kiss; 2026 2027 2028 /* dev data ctrl irq clock brand enh vector special option 2029 * baud nrz clocksrc softdcd bufsize 2030 * rxints txints exints spints 2031 * rcvd rxerrs over / xmit txerrs under / nospace bufsize 2032 * txd pers slot tail ful wait min maxk idl defr txof grp 2033 * W ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## 2034 * R ## ## XX ## ## ## ## ## XX ## ## ## ## ## ## ## 2035 */ 2036 2037 seq_printf(seq, "%s\t%3.3lx %3.3lx %d %lu %2.2x %d %3.3lx %3.3lx %d\n", 2038 scc->dev->name, 2039 scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand, 2040 scc->enhanced, Vector_Latch, scc->special, 2041 scc->option); 2042 seq_printf(seq, "\t%lu %d %d %d %d\n", 2043 scc->modem.speed, scc->modem.nrz, 2044 scc->modem.clocksrc, kiss->softdcd, 2045 stat->bufsize); 2046 seq_printf(seq, "\t%lu %lu %lu %lu\n", 2047 stat->rxints, stat->txints, stat->exints, stat->spints); 2048 seq_printf(seq, "\t%lu %lu %d / %lu %lu %d / %d %d\n", 2049 stat->rxframes, stat->rxerrs, stat->rx_over, 2050 stat->txframes, stat->txerrs, stat->tx_under, 2051 stat->nospace, stat->tx_state); 2052 2053 #define K(x) kiss->x 2054 seq_printf(seq, "\t%d %d %d %d %d %d %d %d %d %d %d %d\n", 2055 K(txdelay), K(persist), K(slottime), K(tailtime), 2056 K(fulldup), K(waittime), K(mintime), K(maxkeyup), 2057 K(idletime), K(maxdefer), K(tx_inhibit), K(group)); 2058 #undef K 2059 #ifdef SCC_DEBUG 2060 { 2061 int reg; 2062 2063 seq_printf(seq, "\tW "); 2064 for (reg = 0; reg < 16; reg++) 2065 seq_printf(seq, "%2.2x ", scc->wreg[reg]); 2066 seq_printf(seq, "\n"); 2067 2068 seq_printf(seq, "\tR %2.2x %2.2x XX ", InReg(scc->ctrl,R0), InReg(scc->ctrl,R1)); 2069 for (reg = 3; reg < 8; reg++) 2070 seq_printf(seq, "%2.2x ", InReg(scc->ctrl, reg)); 2071 seq_printf(seq, "XX "); 2072 for (reg = 9; reg < 16; reg++) 2073 seq_printf(seq, "%2.2x ", InReg(scc->ctrl, reg)); 2074 seq_printf(seq, "\n"); 2075 } 2076 #endif 2077 seq_putc(seq, '\n'); 2078 } 2079 2080 return 0; 2081 } 2082 2083 static const struct seq_operations scc_net_seq_ops = { 2084 .start = scc_net_seq_start, 2085 .next = scc_net_seq_next, 2086 .stop = scc_net_seq_stop, 2087 .show = scc_net_seq_show, 2088 }; 2089 #endif /* CONFIG_PROC_FS */ 2090 2091 2092 /* ******************************************************************** */ 2093 /* * Init SCC driver * */ 2094 /* ******************************************************************** */ 2095 2096 static int __init scc_init_driver (void) 2097 { 2098 char devname[IFNAMSIZ]; 2099 2100 printk(banner); 2101 2102 sprintf(devname,"%s0", SCC_DriverName); 2103 2104 rtnl_lock(); 2105 if (scc_net_alloc(devname, SCC_Info)) { 2106 rtnl_unlock(); 2107 printk(KERN_ERR "z8530drv: cannot initialize module\n"); 2108 return -EIO; 2109 } 2110 rtnl_unlock(); 2111 2112 proc_create_seq("z8530drv", 0, init_net.proc_net, &scc_net_seq_ops); 2113 2114 return 0; 2115 } 2116 2117 static void __exit scc_cleanup_driver(void) 2118 { 2119 io_port ctrl; 2120 int k; 2121 struct scc_channel *scc; 2122 struct net_device *dev; 2123 2124 if (Nchips == 0 && (dev = SCC_Info[0].dev)) 2125 { 2126 unregister_netdev(dev); 2127 free_netdev(dev); 2128 } 2129 2130 /* Guard against chip prattle */ 2131 local_irq_disable(); 2132 2133 for (k = 0; k < Nchips; k++) 2134 if ( (ctrl = SCC_ctrl[k].chan_A) ) 2135 { 2136 Outb(ctrl, 0); 2137 OutReg(ctrl,R9,FHWRES); /* force hardware reset */ 2138 udelay(50); 2139 } 2140 2141 /* To unload the port must be closed so no real IRQ pending */ 2142 for (k = 0; k < nr_irqs ; k++) 2143 if (Ivec[k].used) free_irq(k, NULL); 2144 2145 local_irq_enable(); 2146 2147 /* Now clean up */ 2148 for (k = 0; k < Nchips*2; k++) 2149 { 2150 scc = &SCC_Info[k]; 2151 if (scc->ctrl) 2152 { 2153 release_region(scc->ctrl, 1); 2154 release_region(scc->data, 1); 2155 } 2156 if (scc->dev) 2157 { 2158 unregister_netdev(scc->dev); 2159 free_netdev(scc->dev); 2160 } 2161 } 2162 2163 2164 if (Vector_Latch) 2165 release_region(Vector_Latch, 1); 2166 2167 remove_proc_entry("z8530drv", init_net.proc_net); 2168 } 2169 2170 MODULE_AUTHOR("Joerg Reuter <jreuter@yaina.de>"); 2171 MODULE_DESCRIPTION("AX.25 Device Driver for Z8530 based HDLC cards"); 2172 MODULE_LICENSE("GPL"); 2173 module_init(scc_init_driver); 2174 module_exit(scc_cleanup_driver); 2175