1 /*****************************************************************************/
2 
3 /*
4  *	baycom_ser_hdx.c  -- baycom ser12 halfduplex radio modem driver.
5  *
6  *	Copyright (C) 1996-2000  Thomas Sailer (sailer@ife.ee.ethz.ch)
7  *
8  *	This program is free software; you can redistribute it and/or modify
9  *	it under the terms of the GNU General Public License as published by
10  *	the Free Software Foundation; either version 2 of the License, or
11  *	(at your option) any later version.
12  *
13  *	This program is distributed in the hope that it will be useful,
14  *	but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *	GNU General Public License for more details.
17  *
18  *	You should have received a copy of the GNU General Public License
19  *	along with this program; if not, write to the Free Software
20  *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  *
22  *  Please note that the GPL allows you to use the driver, NOT the radio.
23  *  In order to use the radio, you need a license from the communications
24  *  authority of your country.
25  *
26  *
27  *  Supported modems
28  *
29  *  ser12:  This is a very simple 1200 baud AFSK modem. The modem consists only
30  *          of a modulator/demodulator chip, usually a TI TCM3105. The computer
31  *          is responsible for regenerating the receiver bit clock, as well as
32  *          for handling the HDLC protocol. The modem connects to a serial port,
33  *          hence the name. Since the serial port is not used as an async serial
34  *          port, the kernel driver for serial ports cannot be used, and this
35  *          driver only supports standard serial hardware (8250, 16450, 16550A)
36  *
37  *
38  *  Command line options (insmod command line)
39  *
40  *  mode     ser12    hardware DCD
41  *           ser12*   software DCD
42  *           ser12@   hardware/software DCD, i.e. no explicit DCD signal but hardware
43  *                    mutes audio input to the modem
44  *           ser12+   hardware DCD, inverted signal at DCD pin
45  *  iobase   base address of the port; common values are 0x3f8, 0x2f8, 0x3e8, 0x2e8
46  *  irq      interrupt line of the port; common values are 4,3
47  *
48  *
49  *  History:
50  *   0.1  26.06.1996  Adapted from baycom.c and made network driver interface
51  *        18.10.1996  Changed to new user space access routines (copy_{to,from}_user)
52  *   0.3  26.04.1997  init code/data tagged
53  *   0.4  08.07.1997  alternative ser12 decoding algorithm (uses delta CTS ints)
54  *   0.5  11.11.1997  ser12/par96 split into separate files
55  *   0.6  14.04.1998  cleanups
56  *   0.7  03.08.1999  adapt to Linus' new __setup/__initcall
57  *   0.8  10.08.1999  use module_init/module_exit
58  *   0.9  12.02.2000  adapted to softnet driver interface
59  *   0.10 03.07.2000  fix interface name handling
60  */
61 
62 /*****************************************************************************/
63 
64 #include <linux/capability.h>
65 #include <linux/module.h>
66 #include <linux/ioport.h>
67 #include <linux/string.h>
68 #include <linux/init.h>
69 #include <linux/interrupt.h>
70 #include <asm/uaccess.h>
71 #include <asm/io.h>
72 #include <linux/hdlcdrv.h>
73 #include <linux/baycom.h>
74 #include <linux/jiffies.h>
75 
76 /* --------------------------------------------------------------------- */
77 
78 #define BAYCOM_DEBUG
79 
80 /* --------------------------------------------------------------------- */
81 
82 static const char bc_drvname[] = "baycom_ser_hdx";
83 static const char bc_drvinfo[] = KERN_INFO "baycom_ser_hdx: (C) 1996-2000 Thomas Sailer, HB9JNX/AE4WA\n"
84 "baycom_ser_hdx: version 0.10\n";
85 
86 /* --------------------------------------------------------------------- */
87 
88 #define NR_PORTS 4
89 
90 static struct net_device *baycom_device[NR_PORTS];
91 
92 /* --------------------------------------------------------------------- */
93 
94 #define RBR(iobase) (iobase+0)
95 #define THR(iobase) (iobase+0)
96 #define IER(iobase) (iobase+1)
97 #define IIR(iobase) (iobase+2)
98 #define FCR(iobase) (iobase+2)
99 #define LCR(iobase) (iobase+3)
100 #define MCR(iobase) (iobase+4)
101 #define LSR(iobase) (iobase+5)
102 #define MSR(iobase) (iobase+6)
103 #define SCR(iobase) (iobase+7)
104 #define DLL(iobase) (iobase+0)
105 #define DLM(iobase) (iobase+1)
106 
107 #define SER12_EXTENT 8
108 
109 /* ---------------------------------------------------------------------- */
110 /*
111  * Information that need to be kept for each board.
112  */
113 
114 struct baycom_state {
115 	struct hdlcdrv_state hdrv;
116 
117 	int opt_dcd;
118 
119 	struct modem_state {
120 		short arb_divider;
121 		unsigned char flags;
122 		unsigned int shreg;
123 		struct modem_state_ser12 {
124 			unsigned char tx_bit;
125 			int dcd_sum0, dcd_sum1, dcd_sum2;
126 			unsigned char last_sample;
127 			unsigned char last_rxbit;
128 			unsigned int dcd_shreg;
129 			unsigned int dcd_time;
130 			unsigned int bit_pll;
131 			unsigned char interm_sample;
132 		} ser12;
133 	} modem;
134 
135 #ifdef BAYCOM_DEBUG
136 	struct debug_vals {
137 		unsigned long last_jiffies;
138 		unsigned cur_intcnt;
139 		unsigned last_intcnt;
140 		int cur_pllcorr;
141 		int last_pllcorr;
142 	} debug_vals;
143 #endif /* BAYCOM_DEBUG */
144 };
145 
146 /* --------------------------------------------------------------------- */
147 
148 static inline void baycom_int_freq(struct baycom_state *bc)
149 {
150 #ifdef BAYCOM_DEBUG
151 	unsigned long cur_jiffies = jiffies;
152 	/*
153 	 * measure the interrupt frequency
154 	 */
155 	bc->debug_vals.cur_intcnt++;
156 	if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
157 		bc->debug_vals.last_jiffies = cur_jiffies;
158 		bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
159 		bc->debug_vals.cur_intcnt = 0;
160 		bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
161 		bc->debug_vals.cur_pllcorr = 0;
162 	}
163 #endif /* BAYCOM_DEBUG */
164 }
165 
166 /* --------------------------------------------------------------------- */
167 /*
168  * ===================== SER12 specific routines =========================
169  */
170 
171 static inline void ser12_set_divisor(struct net_device *dev,
172 				     unsigned char divisor)
173 {
174 	outb(0x81, LCR(dev->base_addr));	/* DLAB = 1 */
175 	outb(divisor, DLL(dev->base_addr));
176 	outb(0, DLM(dev->base_addr));
177 	outb(0x01, LCR(dev->base_addr));	/* word length = 6 */
178 	/*
179 	 * make sure the next interrupt is generated;
180 	 * 0 must be used to power the modem; the modem draws its
181 	 * power from the TxD line
182 	 */
183 	outb(0x00, THR(dev->base_addr));
184 	/*
185 	 * it is important not to set the divider while transmitting;
186 	 * this reportedly makes some UARTs generating interrupts
187 	 * in the hundredthousands per second region
188 	 * Reported by: Ignacio.Arenaza@studi.epfl.ch (Ignacio Arenaza Nuno)
189 	 */
190 }
191 
192 /* --------------------------------------------------------------------- */
193 
194 /*
195  * must call the TX arbitrator every 10ms
196  */
197 #define SER12_ARB_DIVIDER(bc)  (bc->opt_dcd ? 24 : 36)
198 
199 #define SER12_DCD_INTERVAL(bc) (bc->opt_dcd ? 12 : 240)
200 
201 static inline void ser12_tx(struct net_device *dev, struct baycom_state *bc)
202 {
203 	/* one interrupt per channel bit */
204 	ser12_set_divisor(dev, 12);
205 	/*
206 	 * first output the last bit (!) then call HDLC transmitter,
207 	 * since this may take quite long
208 	 */
209 	outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr));
210 	if (bc->modem.shreg <= 1)
211 		bc->modem.shreg = 0x10000 | hdlcdrv_getbits(&bc->hdrv);
212 	bc->modem.ser12.tx_bit = !(bc->modem.ser12.tx_bit ^
213 				   (bc->modem.shreg & 1));
214 	bc->modem.shreg >>= 1;
215 }
216 
217 /* --------------------------------------------------------------------- */
218 
219 static inline void ser12_rx(struct net_device *dev, struct baycom_state *bc)
220 {
221 	unsigned char cur_s;
222 	/*
223 	 * do demodulator
224 	 */
225 	cur_s = inb(MSR(dev->base_addr)) & 0x10;	/* the CTS line */
226 	hdlcdrv_channelbit(&bc->hdrv, cur_s);
227 	bc->modem.ser12.dcd_shreg = (bc->modem.ser12.dcd_shreg << 1) |
228 		(cur_s != bc->modem.ser12.last_sample);
229 	bc->modem.ser12.last_sample = cur_s;
230 	if(bc->modem.ser12.dcd_shreg & 1) {
231 		if (!bc->opt_dcd) {
232 			unsigned int dcdspos, dcdsneg;
233 
234 			dcdspos = dcdsneg = 0;
235 			dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
236 			if (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
237 				dcdspos += 2;
238 			dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
239 			dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
240 			dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
241 
242 			bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
243 		} else
244 			bc->modem.ser12.dcd_sum0--;
245 	}
246 	if(!bc->modem.ser12.dcd_time) {
247 		hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
248 					   bc->modem.ser12.dcd_sum1 +
249 					   bc->modem.ser12.dcd_sum2) < 0);
250 		bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
251 		bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
252 		/* offset to ensure DCD off on silent input */
253 		bc->modem.ser12.dcd_sum0 = 2;
254 		bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
255 	}
256 	bc->modem.ser12.dcd_time--;
257 	if (!bc->opt_dcd) {
258 		/*
259 		 * PLL code for the improved software DCD algorithm
260 		 */
261 		if (bc->modem.ser12.interm_sample) {
262 			/*
263 			 * intermediate sample; set timing correction to normal
264 			 */
265 			ser12_set_divisor(dev, 4);
266 		} else {
267 			/*
268 			 * do PLL correction and call HDLC receiver
269 			 */
270 			switch (bc->modem.ser12.dcd_shreg & 7) {
271 			case 1: /* transition too late */
272 				ser12_set_divisor(dev, 5);
273 #ifdef BAYCOM_DEBUG
274 				bc->debug_vals.cur_pllcorr++;
275 #endif /* BAYCOM_DEBUG */
276 				break;
277 			case 4:	/* transition too early */
278 				ser12_set_divisor(dev, 3);
279 #ifdef BAYCOM_DEBUG
280 				bc->debug_vals.cur_pllcorr--;
281 #endif /* BAYCOM_DEBUG */
282 				break;
283 			default:
284 				ser12_set_divisor(dev, 4);
285 				break;
286 			}
287 			bc->modem.shreg >>= 1;
288 			if (bc->modem.ser12.last_sample ==
289 			    bc->modem.ser12.last_rxbit)
290 				bc->modem.shreg |= 0x10000;
291 			bc->modem.ser12.last_rxbit =
292 				bc->modem.ser12.last_sample;
293 		}
294 		if (++bc->modem.ser12.interm_sample >= 3)
295 			bc->modem.ser12.interm_sample = 0;
296 		/*
297 		 * DCD stuff
298 		 */
299 		if (bc->modem.ser12.dcd_shreg & 1) {
300 			unsigned int dcdspos, dcdsneg;
301 
302 			dcdspos = dcdsneg = 0;
303 			dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
304 			dcdspos += (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
305 				<< 1;
306 			dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
307 			dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
308 			dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
309 
310 			bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
311 		}
312 	} else {
313 		/*
314 		 * PLL algorithm for the hardware squelch DCD algorithm
315 		 */
316 		if (bc->modem.ser12.interm_sample) {
317 			/*
318 			 * intermediate sample; set timing correction to normal
319 			 */
320 			ser12_set_divisor(dev, 6);
321 		} else {
322 			/*
323 			 * do PLL correction and call HDLC receiver
324 			 */
325 			switch (bc->modem.ser12.dcd_shreg & 3) {
326 			case 1: /* transition too late */
327 				ser12_set_divisor(dev, 7);
328 #ifdef BAYCOM_DEBUG
329 				bc->debug_vals.cur_pllcorr++;
330 #endif /* BAYCOM_DEBUG */
331 				break;
332 			case 2:	/* transition too early */
333 				ser12_set_divisor(dev, 5);
334 #ifdef BAYCOM_DEBUG
335 				bc->debug_vals.cur_pllcorr--;
336 #endif /* BAYCOM_DEBUG */
337 				break;
338 			default:
339 				ser12_set_divisor(dev, 6);
340 				break;
341 			}
342 			bc->modem.shreg >>= 1;
343 			if (bc->modem.ser12.last_sample ==
344 			    bc->modem.ser12.last_rxbit)
345 				bc->modem.shreg |= 0x10000;
346 			bc->modem.ser12.last_rxbit =
347 				bc->modem.ser12.last_sample;
348 		}
349 		bc->modem.ser12.interm_sample = !bc->modem.ser12.interm_sample;
350 		/*
351 		 * DCD stuff
352 		 */
353 		bc->modem.ser12.dcd_sum0 -= (bc->modem.ser12.dcd_shreg & 1);
354 	}
355 	outb(0x0d, MCR(dev->base_addr));		/* transmitter off */
356 	if (bc->modem.shreg & 1) {
357 		hdlcdrv_putbits(&bc->hdrv, bc->modem.shreg >> 1);
358 		bc->modem.shreg = 0x10000;
359 	}
360 	if(!bc->modem.ser12.dcd_time) {
361 		if (bc->opt_dcd & 1)
362 			hdlcdrv_setdcd(&bc->hdrv, !((inb(MSR(dev->base_addr)) ^ bc->opt_dcd) & 0x80));
363 		else
364 			hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
365 						   bc->modem.ser12.dcd_sum1 +
366 						   bc->modem.ser12.dcd_sum2) < 0);
367 		bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
368 		bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
369 		/* offset to ensure DCD off on silent input */
370 		bc->modem.ser12.dcd_sum0 = 2;
371 		bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
372 	}
373 	bc->modem.ser12.dcd_time--;
374 }
375 
376 /* --------------------------------------------------------------------- */
377 
378 static irqreturn_t ser12_interrupt(int irq, void *dev_id)
379 {
380 	struct net_device *dev = (struct net_device *)dev_id;
381 	struct baycom_state *bc = netdev_priv(dev);
382 	unsigned char iir;
383 
384 	if (!dev || !bc || bc->hdrv.magic != HDLCDRV_MAGIC)
385 		return IRQ_NONE;
386 	/* fast way out */
387 	if ((iir = inb(IIR(dev->base_addr))) & 1)
388 		return IRQ_NONE;
389 	baycom_int_freq(bc);
390 	do {
391 		switch (iir & 6) {
392 		case 6:
393 			inb(LSR(dev->base_addr));
394 			break;
395 
396 		case 4:
397 			inb(RBR(dev->base_addr));
398 			break;
399 
400 		case 2:
401 			/*
402 			 * check if transmitter active
403 			 */
404 			if (hdlcdrv_ptt(&bc->hdrv))
405 				ser12_tx(dev, bc);
406 			else {
407 				ser12_rx(dev, bc);
408 				bc->modem.arb_divider--;
409 			}
410 			outb(0x00, THR(dev->base_addr));
411 			break;
412 
413 		default:
414 			inb(MSR(dev->base_addr));
415 			break;
416 		}
417 		iir = inb(IIR(dev->base_addr));
418 	} while (!(iir & 1));
419 	if (bc->modem.arb_divider <= 0) {
420 		bc->modem.arb_divider = SER12_ARB_DIVIDER(bc);
421 		local_irq_enable();
422 		hdlcdrv_arbitrate(dev, &bc->hdrv);
423 	}
424 	local_irq_enable();
425 	hdlcdrv_transmitter(dev, &bc->hdrv);
426 	hdlcdrv_receiver(dev, &bc->hdrv);
427 	local_irq_disable();
428 	return IRQ_HANDLED;
429 }
430 
431 /* --------------------------------------------------------------------- */
432 
433 enum uart { c_uart_unknown, c_uart_8250,
434 	    c_uart_16450, c_uart_16550, c_uart_16550A};
435 static const char *uart_str[] = {
436 	"unknown", "8250", "16450", "16550", "16550A"
437 };
438 
439 static enum uart ser12_check_uart(unsigned int iobase)
440 {
441 	unsigned char b1,b2,b3;
442 	enum uart u;
443 	enum uart uart_tab[] =
444 		{ c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A };
445 
446 	b1 = inb(MCR(iobase));
447 	outb(b1 | 0x10, MCR(iobase));	/* loopback mode */
448 	b2 = inb(MSR(iobase));
449 	outb(0x1a, MCR(iobase));
450 	b3 = inb(MSR(iobase)) & 0xf0;
451 	outb(b1, MCR(iobase));			/* restore old values */
452 	outb(b2, MSR(iobase));
453 	if (b3 != 0x90)
454 		return c_uart_unknown;
455 	inb(RBR(iobase));
456 	inb(RBR(iobase));
457 	outb(0x01, FCR(iobase));		/* enable FIFOs */
458 	u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
459 	if (u == c_uart_16450) {
460 		outb(0x5a, SCR(iobase));
461 		b1 = inb(SCR(iobase));
462 		outb(0xa5, SCR(iobase));
463 		b2 = inb(SCR(iobase));
464 		if ((b1 != 0x5a) || (b2 != 0xa5))
465 			u = c_uart_8250;
466 	}
467 	return u;
468 }
469 
470 /* --------------------------------------------------------------------- */
471 
472 static int ser12_open(struct net_device *dev)
473 {
474 	struct baycom_state *bc = netdev_priv(dev);
475 	enum uart u;
476 
477 	if (!dev || !bc)
478 		return -ENXIO;
479 	if (!dev->base_addr || dev->base_addr > 0x1000-SER12_EXTENT ||
480 	    dev->irq < 2 || dev->irq > 15)
481 		return -ENXIO;
482 	if (!request_region(dev->base_addr, SER12_EXTENT, "baycom_ser12"))
483 		return -EACCES;
484 	memset(&bc->modem, 0, sizeof(bc->modem));
485 	bc->hdrv.par.bitrate = 1200;
486 	if ((u = ser12_check_uart(dev->base_addr)) == c_uart_unknown) {
487 		release_region(dev->base_addr, SER12_EXTENT);
488 		return -EIO;
489 	}
490 	outb(0, FCR(dev->base_addr));  /* disable FIFOs */
491 	outb(0x0d, MCR(dev->base_addr));
492 	outb(0, IER(dev->base_addr));
493 	if (request_irq(dev->irq, ser12_interrupt, IRQF_SHARED,
494 			"baycom_ser12", dev)) {
495 		release_region(dev->base_addr, SER12_EXTENT);
496 		return -EBUSY;
497 	}
498 	/*
499 	 * enable transmitter empty interrupt
500 	 */
501 	outb(2, IER(dev->base_addr));
502 	/*
503 	 * set the SIO to 6 Bits/character and 19200 or 28800 baud, so that
504 	 * we get exactly (hopefully) 2 or 3 interrupts per radio symbol,
505 	 * depending on the usage of the software DCD routine
506 	 */
507 	ser12_set_divisor(dev, bc->opt_dcd ? 6 : 4);
508 	printk(KERN_INFO "%s: ser12 at iobase 0x%lx irq %u uart %s\n",
509 	       bc_drvname, dev->base_addr, dev->irq, uart_str[u]);
510 	return 0;
511 }
512 
513 /* --------------------------------------------------------------------- */
514 
515 static int ser12_close(struct net_device *dev)
516 {
517 	struct baycom_state *bc = netdev_priv(dev);
518 
519 	if (!dev || !bc)
520 		return -EINVAL;
521 	/*
522 	 * disable interrupts
523 	 */
524 	outb(0, IER(dev->base_addr));
525 	outb(1, MCR(dev->base_addr));
526 	free_irq(dev->irq, dev);
527 	release_region(dev->base_addr, SER12_EXTENT);
528 	printk(KERN_INFO "%s: close ser12 at iobase 0x%lx irq %u\n",
529 	       bc_drvname, dev->base_addr, dev->irq);
530 	return 0;
531 }
532 
533 /* --------------------------------------------------------------------- */
534 /*
535  * ===================== hdlcdrv driver interface =========================
536  */
537 
538 /* --------------------------------------------------------------------- */
539 
540 static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr,
541 			struct hdlcdrv_ioctl *hi, int cmd);
542 
543 /* --------------------------------------------------------------------- */
544 
545 static struct hdlcdrv_ops ser12_ops = {
546 	.drvname = bc_drvname,
547 	.drvinfo = bc_drvinfo,
548 	.open    = ser12_open,
549 	.close   = ser12_close,
550 	.ioctl   = baycom_ioctl,
551 };
552 
553 /* --------------------------------------------------------------------- */
554 
555 static int baycom_setmode(struct baycom_state *bc, const char *modestr)
556 {
557 	if (strchr(modestr, '*'))
558 		bc->opt_dcd = 0;
559 	else if (strchr(modestr, '+'))
560 		bc->opt_dcd = -1;
561 	else if (strchr(modestr, '@'))
562 		bc->opt_dcd = -2;
563 	else
564 		bc->opt_dcd = 1;
565 	return 0;
566 }
567 
568 /* --------------------------------------------------------------------- */
569 
570 static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr,
571 			struct hdlcdrv_ioctl *hi, int cmd)
572 {
573 	struct baycom_state *bc;
574 	struct baycom_ioctl bi;
575 
576 	if (!dev)
577 		return -EINVAL;
578 
579 	bc = netdev_priv(dev);
580 	BUG_ON(bc->hdrv.magic != HDLCDRV_MAGIC);
581 
582 	if (cmd != SIOCDEVPRIVATE)
583 		return -ENOIOCTLCMD;
584 	switch (hi->cmd) {
585 	default:
586 		break;
587 
588 	case HDLCDRVCTL_GETMODE:
589 		strcpy(hi->data.modename, "ser12");
590 		if (bc->opt_dcd <= 0)
591 			strcat(hi->data.modename, (!bc->opt_dcd) ? "*" : (bc->opt_dcd == -2) ? "@" : "+");
592 		if (copy_to_user(ifr->ifr_data, hi, sizeof(struct hdlcdrv_ioctl)))
593 			return -EFAULT;
594 		return 0;
595 
596 	case HDLCDRVCTL_SETMODE:
597 		if (netif_running(dev) || !capable(CAP_NET_ADMIN))
598 			return -EACCES;
599 		hi->data.modename[sizeof(hi->data.modename)-1] = '\0';
600 		return baycom_setmode(bc, hi->data.modename);
601 
602 	case HDLCDRVCTL_MODELIST:
603 		strcpy(hi->data.modename, "ser12");
604 		if (copy_to_user(ifr->ifr_data, hi, sizeof(struct hdlcdrv_ioctl)))
605 			return -EFAULT;
606 		return 0;
607 
608 	case HDLCDRVCTL_MODEMPARMASK:
609 		return HDLCDRV_PARMASK_IOBASE | HDLCDRV_PARMASK_IRQ;
610 
611 	}
612 
613 	if (copy_from_user(&bi, ifr->ifr_data, sizeof(bi)))
614 		return -EFAULT;
615 	switch (bi.cmd) {
616 	default:
617 		return -ENOIOCTLCMD;
618 
619 #ifdef BAYCOM_DEBUG
620 	case BAYCOMCTL_GETDEBUG:
621 		bi.data.dbg.debug1 = bc->hdrv.ptt_keyed;
622 		bi.data.dbg.debug2 = bc->debug_vals.last_intcnt;
623 		bi.data.dbg.debug3 = bc->debug_vals.last_pllcorr;
624 		break;
625 #endif /* BAYCOM_DEBUG */
626 
627 	}
628 	if (copy_to_user(ifr->ifr_data, &bi, sizeof(bi)))
629 		return -EFAULT;
630 	return 0;
631 
632 }
633 
634 /* --------------------------------------------------------------------- */
635 
636 /*
637  * command line settable parameters
638  */
639 static char *mode[NR_PORTS] = { "ser12*", };
640 static int iobase[NR_PORTS] = { 0x3f8, };
641 static int irq[NR_PORTS] = { 4, };
642 
643 module_param_array(mode, charp, NULL, 0);
644 MODULE_PARM_DESC(mode, "baycom operating mode; * for software DCD");
645 module_param_array(iobase, int, NULL, 0);
646 MODULE_PARM_DESC(iobase, "baycom io base address");
647 module_param_array(irq, int, NULL, 0);
648 MODULE_PARM_DESC(irq, "baycom irq number");
649 
650 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
651 MODULE_DESCRIPTION("Baycom ser12 half duplex amateur radio modem driver");
652 MODULE_LICENSE("GPL");
653 
654 /* --------------------------------------------------------------------- */
655 
656 static int __init init_baycomserhdx(void)
657 {
658 	int i, found = 0;
659 	char set_hw = 1;
660 
661 	printk(bc_drvinfo);
662 	/*
663 	 * register net devices
664 	 */
665 	for (i = 0; i < NR_PORTS; i++) {
666 		struct net_device *dev;
667 		struct baycom_state *bc;
668 		char ifname[IFNAMSIZ];
669 
670 		sprintf(ifname, "bcsh%d", i);
671 
672 		if (!mode[i])
673 			set_hw = 0;
674 		if (!set_hw)
675 			iobase[i] = irq[i] = 0;
676 
677 		dev = hdlcdrv_register(&ser12_ops,
678 				       sizeof(struct baycom_state),
679 				       ifname, iobase[i], irq[i], 0);
680 		if (IS_ERR(dev))
681 			break;
682 
683 		bc = netdev_priv(dev);
684 		if (set_hw && baycom_setmode(bc, mode[i]))
685 			set_hw = 0;
686 		found++;
687 		baycom_device[i] = dev;
688 	}
689 
690 	if (!found)
691 		return -ENXIO;
692 	return 0;
693 }
694 
695 static void __exit cleanup_baycomserhdx(void)
696 {
697 	int i;
698 
699 	for(i = 0; i < NR_PORTS; i++) {
700 		struct net_device *dev = baycom_device[i];
701 
702 		if (dev)
703 			hdlcdrv_unregister(dev);
704 	}
705 }
706 
707 module_init(init_baycomserhdx);
708 module_exit(cleanup_baycomserhdx);
709 
710 /* --------------------------------------------------------------------- */
711 
712 #ifndef MODULE
713 
714 /*
715  * format: baycom_ser_hdx=io,irq,mode
716  * mode: ser12    hardware DCD
717  *       ser12*   software DCD
718  *       ser12@   hardware/software DCD, i.e. no explicit DCD signal but hardware
719  *                mutes audio input to the modem
720  *       ser12+   hardware DCD, inverted signal at DCD pin
721  */
722 
723 static int __init baycom_ser_hdx_setup(char *str)
724 {
725         static unsigned nr_dev;
726 	int ints[3];
727 
728         if (nr_dev >= NR_PORTS)
729                 return 0;
730 	str = get_options(str, 3, ints);
731 	if (ints[0] < 2)
732 		return 0;
733 	mode[nr_dev] = str;
734 	iobase[nr_dev] = ints[1];
735 	irq[nr_dev] = ints[2];
736 	nr_dev++;
737 	return 1;
738 }
739 
740 __setup("baycom_ser_hdx=", baycom_ser_hdx_setup);
741 
742 #endif /* MODULE */
743 /* --------------------------------------------------------------------- */
744