1 /*****************************************************************************/
2 
3 /*
4  *	baycom_epp.c  -- baycom epp radio modem driver.
5  *
6  *	Copyright (C) 1998-2000
7  *          Thomas Sailer (sailer@ife.ee.ethz.ch)
8  *
9  *	This program is free software; you can redistribute it and/or modify
10  *	it under the terms of the GNU General Public License as published by
11  *	the Free Software Foundation; either version 2 of the License, or
12  *	(at your option) any later version.
13  *
14  *	This program is distributed in the hope that it will be useful,
15  *	but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *	GNU General Public License for more details.
18  *
19  *	You should have received a copy of the GNU General Public License
20  *	along with this program; if not, write to the Free Software
21  *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  *
23  *  Please note that the GPL allows you to use the driver, NOT the radio.
24  *  In order to use the radio, you need a license from the communications
25  *  authority of your country.
26  *
27  *
28  *  History:
29  *   0.1  xx.xx.1998  Initial version by Matthias Welwarsky (dg2fef)
30  *   0.2  21.04.1998  Massive rework by Thomas Sailer
31  *                    Integrated FPGA EPP modem configuration routines
32  *   0.3  11.05.1998  Took FPGA config out and moved it into a separate program
33  *   0.4  26.07.1999  Adapted to new lowlevel parport driver interface
34  *   0.5  03.08.1999  adapt to Linus' new __setup/__initcall
35  *                    removed some pre-2.2 kernel compatibility cruft
36  *   0.6  10.08.1999  Check if parport can do SPP and is safe to access during interrupt contexts
37  *   0.7  12.02.2000  adapted to softnet driver interface
38  *
39  */
40 
41 /*****************************************************************************/
42 
43 #include <linux/crc-ccitt.h>
44 #include <linux/module.h>
45 #include <linux/kernel.h>
46 #include <linux/init.h>
47 #include <linux/string.h>
48 #include <linux/workqueue.h>
49 #include <linux/fs.h>
50 #include <linux/parport.h>
51 #include <linux/if_arp.h>
52 #include <linux/hdlcdrv.h>
53 #include <linux/baycom.h>
54 #include <linux/jiffies.h>
55 #include <linux/random.h>
56 #include <net/ax25.h>
57 #include <asm/uaccess.h>
58 
59 /* --------------------------------------------------------------------- */
60 
61 #define BAYCOM_DEBUG
62 #define BAYCOM_MAGIC 19730510
63 
64 /* --------------------------------------------------------------------- */
65 
66 static const char paranoia_str[] = KERN_ERR
67 	"baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n";
68 
69 static const char bc_drvname[] = "baycom_epp";
70 static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n"
71 KERN_INFO "baycom_epp: version 0.7 compiled " __TIME__ " " __DATE__ "\n";
72 
73 /* --------------------------------------------------------------------- */
74 
75 #define NR_PORTS 4
76 
77 static struct net_device *baycom_device[NR_PORTS];
78 
79 /* --------------------------------------------------------------------- */
80 
81 /* EPP status register */
82 #define EPP_DCDBIT      0x80
83 #define EPP_PTTBIT      0x08
84 #define EPP_NREF        0x01
85 #define EPP_NRAEF       0x02
86 #define EPP_NRHF        0x04
87 #define EPP_NTHF        0x20
88 #define EPP_NTAEF       0x10
89 #define EPP_NTEF        EPP_PTTBIT
90 
91 /* EPP control register */
92 #define EPP_TX_FIFO_ENABLE 0x10
93 #define EPP_RX_FIFO_ENABLE 0x08
94 #define EPP_MODEM_ENABLE   0x20
95 #define EPP_LEDS           0xC0
96 #define EPP_IRQ_ENABLE     0x10
97 
98 /* LPT registers */
99 #define LPTREG_ECONTROL       0x402
100 #define LPTREG_CONFIGB        0x401
101 #define LPTREG_CONFIGA        0x400
102 #define LPTREG_EPPDATA        0x004
103 #define LPTREG_EPPADDR        0x003
104 #define LPTREG_CONTROL        0x002
105 #define LPTREG_STATUS         0x001
106 #define LPTREG_DATA           0x000
107 
108 /* LPT control register */
109 #define LPTCTRL_PROGRAM       0x04   /* 0 to reprogram */
110 #define LPTCTRL_WRITE         0x01
111 #define LPTCTRL_ADDRSTB       0x08
112 #define LPTCTRL_DATASTB       0x02
113 #define LPTCTRL_INTEN         0x10
114 
115 /* LPT status register */
116 #define LPTSTAT_SHIFT_NINTR   6
117 #define LPTSTAT_WAIT          0x80
118 #define LPTSTAT_NINTR         (1<<LPTSTAT_SHIFT_NINTR)
119 #define LPTSTAT_PE            0x20
120 #define LPTSTAT_DONE          0x10
121 #define LPTSTAT_NERROR        0x08
122 #define LPTSTAT_EPPTIMEOUT    0x01
123 
124 /* LPT data register */
125 #define LPTDATA_SHIFT_TDI     0
126 #define LPTDATA_SHIFT_TMS     2
127 #define LPTDATA_TDI           (1<<LPTDATA_SHIFT_TDI)
128 #define LPTDATA_TCK           0x02
129 #define LPTDATA_TMS           (1<<LPTDATA_SHIFT_TMS)
130 #define LPTDATA_INITBIAS      0x80
131 
132 
133 /* EPP modem config/status bits */
134 #define EPP_DCDBIT            0x80
135 #define EPP_PTTBIT            0x08
136 #define EPP_RXEBIT            0x01
137 #define EPP_RXAEBIT           0x02
138 #define EPP_RXHFULL           0x04
139 
140 #define EPP_NTHF              0x20
141 #define EPP_NTAEF             0x10
142 #define EPP_NTEF              EPP_PTTBIT
143 
144 #define EPP_TX_FIFO_ENABLE    0x10
145 #define EPP_RX_FIFO_ENABLE    0x08
146 #define EPP_MODEM_ENABLE      0x20
147 #define EPP_LEDS              0xC0
148 #define EPP_IRQ_ENABLE        0x10
149 
150 /* Xilinx 4k JTAG instructions */
151 #define XC4K_IRLENGTH   3
152 #define XC4K_EXTEST     0
153 #define XC4K_PRELOAD    1
154 #define XC4K_CONFIGURE  5
155 #define XC4K_BYPASS     7
156 
157 #define EPP_CONVENTIONAL  0
158 #define EPP_FPGA          1
159 #define EPP_FPGAEXTSTATUS 2
160 
161 #define TXBUFFER_SIZE     ((HDLCDRV_MAXFLEN*6/5)+8)
162 
163 /* ---------------------------------------------------------------------- */
164 /*
165  * Information that need to be kept for each board.
166  */
167 
168 struct baycom_state {
169 	int magic;
170 
171         struct pardevice *pdev;
172 	struct net_device *dev;
173 	unsigned int work_running;
174 	struct delayed_work run_work;
175 	unsigned int modem;
176 	unsigned int bitrate;
177 	unsigned char stat;
178 
179 	struct {
180 		unsigned int intclk;
181 		unsigned int fclk;
182 		unsigned int bps;
183 		unsigned int extmodem;
184 		unsigned int loopback;
185 	} cfg;
186 
187         struct hdlcdrv_channel_params ch_params;
188 
189         struct {
190 		unsigned int bitbuf, bitstream, numbits, state;
191 		unsigned char *bufptr;
192 		int bufcnt;
193 		unsigned char buf[TXBUFFER_SIZE];
194         } hdlcrx;
195 
196         struct {
197 		int calibrate;
198                 int slotcnt;
199 		int flags;
200 		enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state;
201 		unsigned char *bufptr;
202 		int bufcnt;
203 		unsigned char buf[TXBUFFER_SIZE];
204         } hdlctx;
205 
206         struct net_device_stats stats;
207 	unsigned int ptt_keyed;
208 	struct sk_buff *skb;  /* next transmit packet  */
209 
210 #ifdef BAYCOM_DEBUG
211 	struct debug_vals {
212 		unsigned long last_jiffies;
213 		unsigned cur_intcnt;
214 		unsigned last_intcnt;
215 		int cur_pllcorr;
216 		int last_pllcorr;
217 		unsigned int mod_cycles;
218 		unsigned int demod_cycles;
219 	} debug_vals;
220 #endif /* BAYCOM_DEBUG */
221 };
222 
223 /* --------------------------------------------------------------------- */
224 
225 #define KISS_VERBOSE
226 
227 /* --------------------------------------------------------------------- */
228 
229 #define PARAM_TXDELAY   1
230 #define PARAM_PERSIST   2
231 #define PARAM_SLOTTIME  3
232 #define PARAM_TXTAIL    4
233 #define PARAM_FULLDUP   5
234 #define PARAM_HARDWARE  6
235 #define PARAM_RETURN    255
236 
237 /* --------------------------------------------------------------------- */
238 /*
239  * the CRC routines are stolen from WAMPES
240  * by Dieter Deyke
241  */
242 
243 
244 /*---------------------------------------------------------------------------*/
245 
246 #if 0
247 static inline void append_crc_ccitt(unsigned char *buffer, int len)
248 {
249  	unsigned int crc = 0xffff;
250 
251 	for (;len>0;len--)
252 		crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff];
253 	crc ^= 0xffff;
254 	*buffer++ = crc;
255 	*buffer++ = crc >> 8;
256 }
257 #endif
258 
259 /*---------------------------------------------------------------------------*/
260 
261 static inline int check_crc_ccitt(const unsigned char *buf, int cnt)
262 {
263 	return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8;
264 }
265 
266 /*---------------------------------------------------------------------------*/
267 
268 static inline int calc_crc_ccitt(const unsigned char *buf, int cnt)
269 {
270 	return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff;
271 }
272 
273 /* ---------------------------------------------------------------------- */
274 
275 #define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800)
276 
277 /* --------------------------------------------------------------------- */
278 
279 static inline void baycom_int_freq(struct baycom_state *bc)
280 {
281 #ifdef BAYCOM_DEBUG
282 	unsigned long cur_jiffies = jiffies;
283 	/*
284 	 * measure the interrupt frequency
285 	 */
286 	bc->debug_vals.cur_intcnt++;
287 	if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
288 		bc->debug_vals.last_jiffies = cur_jiffies;
289 		bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
290 		bc->debug_vals.cur_intcnt = 0;
291 		bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
292 		bc->debug_vals.cur_pllcorr = 0;
293 	}
294 #endif /* BAYCOM_DEBUG */
295 }
296 
297 /* ---------------------------------------------------------------------- */
298 /*
299  *    eppconfig_path should be setable  via /proc/sys.
300  */
301 
302 static char eppconfig_path[256] = "/usr/sbin/eppfpga";
303 
304 static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL };
305 
306 /* eppconfig: called during ifconfig up to configure the modem */
307 static int eppconfig(struct baycom_state *bc)
308 {
309 	char modearg[256];
310 	char portarg[16];
311         char *argv[] = { eppconfig_path, "-s", "-p", portarg, "-m", modearg,
312 			 NULL };
313 
314 	/* set up arguments */
315 	sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat",
316 		bc->cfg.intclk ? "int" : "ext",
317 		bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
318 		(bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps),
319 		bc->cfg.loopback ? ",loopback" : "");
320 	sprintf(portarg, "%ld", bc->pdev->port->base);
321 	printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg);
322 
323 	return call_usermodehelper(eppconfig_path, argv, envp, UMH_WAIT_PROC);
324 }
325 
326 /* ---------------------------------------------------------------------- */
327 
328 static inline void do_kiss_params(struct baycom_state *bc,
329 				  unsigned char *data, unsigned long len)
330 {
331 
332 #ifdef KISS_VERBOSE
333 #define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b)
334 #else /* KISS_VERBOSE */
335 #define PKP(a,b)
336 #endif /* KISS_VERBOSE */
337 
338 	if (len < 2)
339 		return;
340 	switch(data[0]) {
341 	case PARAM_TXDELAY:
342 		bc->ch_params.tx_delay = data[1];
343 		PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay);
344 		break;
345 	case PARAM_PERSIST:
346 		bc->ch_params.ppersist = data[1];
347 		PKP("p persistence = %u", bc->ch_params.ppersist);
348 		break;
349 	case PARAM_SLOTTIME:
350 		bc->ch_params.slottime = data[1];
351 		PKP("slot time = %ums", bc->ch_params.slottime);
352 		break;
353 	case PARAM_TXTAIL:
354 		bc->ch_params.tx_tail = data[1];
355 		PKP("TX tail = %ums", bc->ch_params.tx_tail);
356 		break;
357 	case PARAM_FULLDUP:
358 		bc->ch_params.fulldup = !!data[1];
359 		PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half");
360 		break;
361 	default:
362 		break;
363 	}
364 #undef PKP
365 }
366 
367 /* --------------------------------------------------------------------- */
368 
369 static void encode_hdlc(struct baycom_state *bc)
370 {
371 	struct sk_buff *skb;
372 	unsigned char *wp, *bp;
373 	int pkt_len;
374         unsigned bitstream, notbitstream, bitbuf, numbit, crc;
375 	unsigned char crcarr[2];
376 	int j;
377 
378 	if (bc->hdlctx.bufcnt > 0)
379 		return;
380 	skb = bc->skb;
381 	if (!skb)
382 		return;
383 	bc->skb = NULL;
384 	pkt_len = skb->len-1; /* strip KISS byte */
385 	wp = bc->hdlctx.buf;
386 	bp = skb->data+1;
387 	crc = calc_crc_ccitt(bp, pkt_len);
388 	crcarr[0] = crc;
389 	crcarr[1] = crc >> 8;
390 	*wp++ = 0x7e;
391 	bitstream = bitbuf = numbit = 0;
392 	while (pkt_len > -2) {
393 		bitstream >>= 8;
394 		bitstream |= ((unsigned int)*bp) << 8;
395 		bitbuf |= ((unsigned int)*bp) << numbit;
396 		notbitstream = ~bitstream;
397 		bp++;
398 		pkt_len--;
399 		if (!pkt_len)
400 			bp = crcarr;
401 		for (j = 0; j < 8; j++)
402 			if (unlikely(!(notbitstream & (0x1f0 << j)))) {
403 				bitstream &= ~(0x100 << j);
404  				bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) |
405 					((bitbuf & ~(((2 << j) << numbit) - 1)) << 1);
406 				numbit++;
407 				notbitstream = ~bitstream;
408 			}
409 		numbit += 8;
410 		while (numbit >= 8) {
411 			*wp++ = bitbuf;
412 			bitbuf >>= 8;
413 			numbit -= 8;
414 		}
415 	}
416 	bitbuf |= 0x7e7e << numbit;
417 	numbit += 16;
418 	while (numbit >= 8) {
419 		*wp++ = bitbuf;
420 		bitbuf >>= 8;
421 		numbit -= 8;
422 	}
423 	bc->hdlctx.bufptr = bc->hdlctx.buf;
424 	bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
425 	dev_kfree_skb(skb);
426 	bc->stats.tx_packets++;
427 }
428 
429 /* ---------------------------------------------------------------------- */
430 
431 static int transmit(struct baycom_state *bc, int cnt, unsigned char stat)
432 {
433 	struct parport *pp = bc->pdev->port;
434 	unsigned char tmp[128];
435 	int i, j;
436 
437 	if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT))
438 		bc->hdlctx.state = tx_idle;
439 	if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) {
440 		if (bc->hdlctx.bufcnt <= 0)
441 			encode_hdlc(bc);
442 		if (bc->hdlctx.bufcnt <= 0)
443 			return 0;
444 		if (!bc->ch_params.fulldup) {
445 			if (!(stat & EPP_DCDBIT)) {
446 				bc->hdlctx.slotcnt = bc->ch_params.slottime;
447 				return 0;
448 			}
449 			if ((--bc->hdlctx.slotcnt) > 0)
450 				return 0;
451 			bc->hdlctx.slotcnt = bc->ch_params.slottime;
452 			if ((random32() % 256) > bc->ch_params.ppersist)
453 				return 0;
454 		}
455 	}
456 	if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) {
457 		bc->hdlctx.state = tx_keyup;
458 		bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay);
459 		bc->ptt_keyed++;
460 	}
461 	while (cnt > 0) {
462 		switch (bc->hdlctx.state) {
463 		case tx_keyup:
464 			i = min_t(int, cnt, bc->hdlctx.flags);
465 			cnt -= i;
466 			bc->hdlctx.flags -= i;
467 			if (bc->hdlctx.flags <= 0)
468 				bc->hdlctx.state = tx_data;
469 			memset(tmp, 0x7e, sizeof(tmp));
470 			while (i > 0) {
471 				j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
472 				if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
473 					return -1;
474 				i -= j;
475 			}
476 			break;
477 
478 		case tx_data:
479 			if (bc->hdlctx.bufcnt <= 0) {
480 				encode_hdlc(bc);
481 				if (bc->hdlctx.bufcnt <= 0) {
482 					bc->hdlctx.state = tx_tail;
483 					bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail);
484 					break;
485 				}
486 			}
487 			i = min_t(int, cnt, bc->hdlctx.bufcnt);
488 			bc->hdlctx.bufcnt -= i;
489 			cnt -= i;
490 			if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0))
491 					return -1;
492 			bc->hdlctx.bufptr += i;
493 			break;
494 
495 		case tx_tail:
496 			encode_hdlc(bc);
497 			if (bc->hdlctx.bufcnt > 0) {
498 				bc->hdlctx.state = tx_data;
499 				break;
500 			}
501 			i = min_t(int, cnt, bc->hdlctx.flags);
502 			if (i) {
503 				cnt -= i;
504 				bc->hdlctx.flags -= i;
505 				memset(tmp, 0x7e, sizeof(tmp));
506 				while (i > 0) {
507 					j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
508 					if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
509 						return -1;
510 					i -= j;
511 				}
512 				break;
513 			}
514 
515 		default:  /* fall through */
516 			if (bc->hdlctx.calibrate <= 0)
517 				return 0;
518 			i = min_t(int, cnt, bc->hdlctx.calibrate);
519 			cnt -= i;
520 			bc->hdlctx.calibrate -= i;
521 			memset(tmp, 0, sizeof(tmp));
522 			while (i > 0) {
523 				j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
524 				if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
525 					return -1;
526 				i -= j;
527 			}
528 			break;
529 		}
530 	}
531 	return 0;
532 }
533 
534 /* ---------------------------------------------------------------------- */
535 
536 static void do_rxpacket(struct net_device *dev)
537 {
538 	struct baycom_state *bc = netdev_priv(dev);
539 	struct sk_buff *skb;
540 	unsigned char *cp;
541 	unsigned pktlen;
542 
543 	if (bc->hdlcrx.bufcnt < 4)
544 		return;
545 	if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt))
546 		return;
547 	pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */
548 	if (!(skb = dev_alloc_skb(pktlen))) {
549 		printk("%s: memory squeeze, dropping packet\n", dev->name);
550 		bc->stats.rx_dropped++;
551 		return;
552 	}
553 	cp = skb_put(skb, pktlen);
554 	*cp++ = 0; /* KISS kludge */
555 	memcpy(cp, bc->hdlcrx.buf, pktlen - 1);
556 	skb->protocol = ax25_type_trans(skb, dev);
557 	netif_rx(skb);
558 	dev->last_rx = jiffies;
559 	bc->stats.rx_packets++;
560 }
561 
562 static int receive(struct net_device *dev, int cnt)
563 {
564 	struct baycom_state *bc = netdev_priv(dev);
565 	struct parport *pp = bc->pdev->port;
566         unsigned int bitbuf, notbitstream, bitstream, numbits, state;
567 	unsigned char tmp[128];
568         unsigned char *cp;
569 	int cnt2, ret = 0;
570 	int j;
571 
572         numbits = bc->hdlcrx.numbits;
573 	state = bc->hdlcrx.state;
574 	bitstream = bc->hdlcrx.bitstream;
575 	bitbuf = bc->hdlcrx.bitbuf;
576 	while (cnt > 0) {
577 		cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt;
578 		cnt -= cnt2;
579 		if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) {
580 			ret = -1;
581 			break;
582 		}
583 		cp = tmp;
584 		for (; cnt2 > 0; cnt2--, cp++) {
585 			bitstream >>= 8;
586 			bitstream |= (*cp) << 8;
587 			bitbuf >>= 8;
588 			bitbuf |= (*cp) << 8;
589 			numbits += 8;
590 			notbitstream = ~bitstream;
591 			for (j = 0; j < 8; j++) {
592 
593 				/* flag or abort */
594 			        if (unlikely(!(notbitstream & (0x0fc << j)))) {
595 
596 					/* abort received */
597 					if (!(notbitstream & (0x1fc << j)))
598 						state = 0;
599 
600 					/* not flag received */
601 					else if (!(bitstream & (0x1fe << j)) != (0x0fc << j)) {
602 						if (state)
603 							do_rxpacket(dev);
604 						bc->hdlcrx.bufcnt = 0;
605 						bc->hdlcrx.bufptr = bc->hdlcrx.buf;
606 						state = 1;
607 						numbits = 7-j;
608 						}
609 					}
610 
611 				/* stuffed bit */
612 				else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) {
613 					numbits--;
614 					bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1);
615 					}
616 				}
617 			while (state && numbits >= 8) {
618 				if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) {
619 					state = 0;
620 				} else {
621 					*(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits);
622 					bc->hdlcrx.bufcnt++;
623 					numbits -= 8;
624 				}
625 			}
626 		}
627 	}
628         bc->hdlcrx.numbits = numbits;
629 	bc->hdlcrx.state = state;
630 	bc->hdlcrx.bitstream = bitstream;
631 	bc->hdlcrx.bitbuf = bitbuf;
632 	return ret;
633 }
634 
635 /* --------------------------------------------------------------------- */
636 
637 #ifdef __i386__
638 #include <asm/msr.h>
639 #define GETTICK(x)                                                \
640 ({                                                                \
641 	if (cpu_has_tsc)                                          \
642 		rdtscl(x);                                        \
643 })
644 #else /* __i386__ */
645 #define GETTICK(x)
646 #endif /* __i386__ */
647 
648 static void epp_bh(struct work_struct *work)
649 {
650 	struct net_device *dev;
651 	struct baycom_state *bc;
652 	struct parport *pp;
653 	unsigned char stat;
654 	unsigned char tmp[2];
655 	unsigned int time1 = 0, time2 = 0, time3 = 0;
656 	int cnt, cnt2;
657 
658 	bc = container_of(work, struct baycom_state, run_work.work);
659 	dev = bc->dev;
660 	if (!bc->work_running)
661 		return;
662 	baycom_int_freq(bc);
663 	pp = bc->pdev->port;
664 	/* update status */
665 	if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
666 		goto epptimeout;
667 	bc->stat = stat;
668 	bc->debug_vals.last_pllcorr = stat;
669 	GETTICK(time1);
670 	if (bc->modem == EPP_FPGAEXTSTATUS) {
671 		/* get input count */
672 		tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1;
673 		if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
674 			goto epptimeout;
675 		if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
676 			goto epptimeout;
677 		cnt = tmp[0] | (tmp[1] << 8);
678 		cnt &= 0x7fff;
679 		/* get output count */
680 		tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2;
681 		if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
682 			goto epptimeout;
683 		if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
684 			goto epptimeout;
685 		cnt2 = tmp[0] | (tmp[1] << 8);
686 		cnt2 = 16384 - (cnt2 & 0x7fff);
687 		/* return to normal */
688 		tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
689 		if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
690 			goto epptimeout;
691 		if (transmit(bc, cnt2, stat))
692 			goto epptimeout;
693 		GETTICK(time2);
694 		if (receive(dev, cnt))
695 			goto epptimeout;
696 		if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
697 			goto epptimeout;
698 		bc->stat = stat;
699 	} else {
700 		/* try to tx */
701 		switch (stat & (EPP_NTAEF|EPP_NTHF)) {
702 		case EPP_NTHF:
703 			cnt = 2048 - 256;
704 			break;
705 
706 		case EPP_NTAEF:
707 			cnt = 2048 - 1793;
708 			break;
709 
710 		case 0:
711 			cnt = 0;
712 			break;
713 
714 		default:
715 			cnt = 2048 - 1025;
716 			break;
717 		}
718 		if (transmit(bc, cnt, stat))
719 			goto epptimeout;
720 		GETTICK(time2);
721 		/* do receiver */
722 		while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) {
723 			switch (stat & (EPP_NRAEF|EPP_NRHF)) {
724 			case EPP_NRAEF:
725 				cnt = 1025;
726 				break;
727 
728 			case 0:
729 				cnt = 1793;
730 				break;
731 
732 			default:
733 				cnt = 256;
734 				break;
735 			}
736 			if (receive(dev, cnt))
737 				goto epptimeout;
738 			if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
739 				goto epptimeout;
740 		}
741 		cnt = 0;
742 		if (bc->bitrate < 50000)
743 			cnt = 256;
744 		else if (bc->bitrate < 100000)
745 			cnt = 128;
746 		while (cnt > 0 && stat & EPP_NREF) {
747 			if (receive(dev, 1))
748 				goto epptimeout;
749 			cnt--;
750 			if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
751 				goto epptimeout;
752 		}
753 	}
754 	GETTICK(time3);
755 #ifdef BAYCOM_DEBUG
756 	bc->debug_vals.mod_cycles = time2 - time1;
757 	bc->debug_vals.demod_cycles = time3 - time2;
758 #endif /* BAYCOM_DEBUG */
759 	schedule_delayed_work(&bc->run_work, 1);
760 	if (!bc->skb)
761 		netif_wake_queue(dev);
762 	return;
763  epptimeout:
764 	printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname);
765 }
766 
767 /* ---------------------------------------------------------------------- */
768 /*
769  * ===================== network driver interface =========================
770  */
771 
772 static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev)
773 {
774 	struct baycom_state *bc = netdev_priv(dev);
775 
776 	if (skb->data[0] != 0) {
777 		do_kiss_params(bc, skb->data, skb->len);
778 		dev_kfree_skb(skb);
779 		return 0;
780 	}
781 	if (bc->skb)
782 		return -1;
783 	/* strip KISS byte */
784 	if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) {
785 		dev_kfree_skb(skb);
786 		return 0;
787 	}
788 	netif_stop_queue(dev);
789 	bc->skb = skb;
790 	return 0;
791 }
792 
793 /* --------------------------------------------------------------------- */
794 
795 static int baycom_set_mac_address(struct net_device *dev, void *addr)
796 {
797 	struct sockaddr *sa = (struct sockaddr *)addr;
798 
799 	/* addr is an AX.25 shifted ASCII mac address */
800 	memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
801 	return 0;
802 }
803 
804 /* --------------------------------------------------------------------- */
805 
806 static struct net_device_stats *baycom_get_stats(struct net_device *dev)
807 {
808 	struct baycom_state *bc = netdev_priv(dev);
809 
810 	/*
811 	 * Get the current statistics.  This may be called with the
812 	 * card open or closed.
813 	 */
814 	return &bc->stats;
815 }
816 
817 /* --------------------------------------------------------------------- */
818 
819 static void epp_wakeup(void *handle)
820 {
821         struct net_device *dev = (struct net_device *)handle;
822         struct baycom_state *bc = netdev_priv(dev);
823 
824         printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name);
825         if (!parport_claim(bc->pdev))
826                 printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name);
827 }
828 
829 /* --------------------------------------------------------------------- */
830 
831 /*
832  * Open/initialize the board. This is called (in the current kernel)
833  * sometime after booting when the 'ifconfig' program is run.
834  *
835  * This routine should set everything up anew at each open, even
836  * registers that "should" only need to be set once at boot, so that
837  * there is non-reboot way to recover if something goes wrong.
838  */
839 
840 static int epp_open(struct net_device *dev)
841 {
842 	struct baycom_state *bc = netdev_priv(dev);
843         struct parport *pp = parport_find_base(dev->base_addr);
844 	unsigned int i, j;
845 	unsigned char tmp[128];
846 	unsigned char stat;
847 	unsigned long tstart;
848 
849         if (!pp) {
850                 printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr);
851                 return -ENXIO;
852         }
853 #if 0
854         if (pp->irq < 0) {
855                 printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base);
856 		parport_put_port(pp);
857                 return -ENXIO;
858         }
859 #endif
860 	if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) {
861                 printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n",
862 		       bc_drvname, pp->base);
863 		parport_put_port(pp);
864                 return -EIO;
865 	}
866 	memset(&bc->modem, 0, sizeof(bc->modem));
867         bc->pdev = parport_register_device(pp, dev->name, NULL, epp_wakeup,
868 					   NULL, PARPORT_DEV_EXCL, dev);
869 	parport_put_port(pp);
870         if (!bc->pdev) {
871                 printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base);
872                 return -ENXIO;
873         }
874         if (parport_claim(bc->pdev)) {
875                 printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base);
876                 parport_unregister_device(bc->pdev);
877                 return -EBUSY;
878         }
879         dev->irq = /*pp->irq*/ 0;
880 	INIT_DELAYED_WORK(&bc->run_work, epp_bh);
881 	bc->work_running = 1;
882 	bc->modem = EPP_CONVENTIONAL;
883 	if (eppconfig(bc))
884 		printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname);
885 	else
886 		bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS;
887 	parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */
888 	/* reset the modem */
889 	tmp[0] = 0;
890 	tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
891 	if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2)
892 		goto epptimeout;
893 	/* autoprobe baud rate */
894 	tstart = jiffies;
895 	i = 0;
896 	while (time_before(jiffies, tstart + HZ/3)) {
897 		if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
898 			goto epptimeout;
899 		if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
900 			schedule();
901 			continue;
902 		}
903 		if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
904 			goto epptimeout;
905 		if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
906 			goto epptimeout;
907 		i += 256;
908 	}
909 	for (j = 0; j < 256; j++) {
910 		if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
911 			goto epptimeout;
912 		if (!(stat & EPP_NREF))
913 			break;
914 		if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1)
915 			goto epptimeout;
916 		i++;
917 	}
918 	tstart = jiffies - tstart;
919 	bc->bitrate = i * (8 * HZ) / tstart;
920 	j = 1;
921 	i = bc->bitrate >> 3;
922 	while (j < 7 && i > 150) {
923 		j++;
924 		i >>= 1;
925 	}
926 	printk(KERN_INFO "%s: autoprobed bitrate: %d  int divider: %d  int rate: %d\n",
927 	       bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2));
928 	tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/;
929 	if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
930 		goto epptimeout;
931 	/*
932 	 * initialise hdlc variables
933 	 */
934 	bc->hdlcrx.state = 0;
935 	bc->hdlcrx.numbits = 0;
936 	bc->hdlctx.state = tx_idle;
937 	bc->hdlctx.bufcnt = 0;
938 	bc->hdlctx.slotcnt = bc->ch_params.slottime;
939 	bc->hdlctx.calibrate = 0;
940 	/* start the bottom half stuff */
941 	schedule_delayed_work(&bc->run_work, 1);
942 	netif_start_queue(dev);
943 	return 0;
944 
945  epptimeout:
946 	printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname);
947 	parport_write_control(pp, 0); /* reset the adapter */
948         parport_release(bc->pdev);
949         parport_unregister_device(bc->pdev);
950 	return -EIO;
951 }
952 
953 /* --------------------------------------------------------------------- */
954 
955 static int epp_close(struct net_device *dev)
956 {
957 	struct baycom_state *bc = netdev_priv(dev);
958 	struct parport *pp = bc->pdev->port;
959 	unsigned char tmp[1];
960 
961 	bc->work_running = 0;
962 	cancel_delayed_work_sync(&bc->run_work);
963 	bc->stat = EPP_DCDBIT;
964 	tmp[0] = 0;
965 	pp->ops->epp_write_addr(pp, tmp, 1, 0);
966 	parport_write_control(pp, 0); /* reset the adapter */
967         parport_release(bc->pdev);
968         parport_unregister_device(bc->pdev);
969 	if (bc->skb)
970 		dev_kfree_skb(bc->skb);
971 	bc->skb = NULL;
972 	printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n",
973 	       bc_drvname, dev->base_addr, dev->irq);
974 	return 0;
975 }
976 
977 /* --------------------------------------------------------------------- */
978 
979 static int baycom_setmode(struct baycom_state *bc, const char *modestr)
980 {
981 	const char *cp;
982 
983 	if (strstr(modestr,"intclk"))
984 		bc->cfg.intclk = 1;
985 	if (strstr(modestr,"extclk"))
986 		bc->cfg.intclk = 0;
987 	if (strstr(modestr,"intmodem"))
988 		bc->cfg.extmodem = 0;
989 	if (strstr(modestr,"extmodem"))
990 		bc->cfg.extmodem = 1;
991 	if (strstr(modestr,"noloopback"))
992 		bc->cfg.loopback = 0;
993 	if (strstr(modestr,"loopback"))
994 		bc->cfg.loopback = 1;
995 	if ((cp = strstr(modestr,"fclk="))) {
996 		bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0);
997 		if (bc->cfg.fclk < 1000000)
998 			bc->cfg.fclk = 1000000;
999 		if (bc->cfg.fclk > 25000000)
1000 			bc->cfg.fclk = 25000000;
1001 	}
1002 	if ((cp = strstr(modestr,"bps="))) {
1003 		bc->cfg.bps = simple_strtoul(cp+4, NULL, 0);
1004 		if (bc->cfg.bps < 1000)
1005 			bc->cfg.bps = 1000;
1006 		if (bc->cfg.bps > 1500000)
1007 			bc->cfg.bps = 1500000;
1008 	}
1009 	return 0;
1010 }
1011 
1012 /* --------------------------------------------------------------------- */
1013 
1014 static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1015 {
1016 	struct baycom_state *bc = netdev_priv(dev);
1017 	struct hdlcdrv_ioctl hi;
1018 
1019 	if (cmd != SIOCDEVPRIVATE)
1020 		return -ENOIOCTLCMD;
1021 
1022 	if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi)))
1023 		return -EFAULT;
1024 	switch (hi.cmd) {
1025 	default:
1026 		return -ENOIOCTLCMD;
1027 
1028 	case HDLCDRVCTL_GETCHANNELPAR:
1029 		hi.data.cp.tx_delay = bc->ch_params.tx_delay;
1030 		hi.data.cp.tx_tail = bc->ch_params.tx_tail;
1031 		hi.data.cp.slottime = bc->ch_params.slottime;
1032 		hi.data.cp.ppersist = bc->ch_params.ppersist;
1033 		hi.data.cp.fulldup = bc->ch_params.fulldup;
1034 		break;
1035 
1036 	case HDLCDRVCTL_SETCHANNELPAR:
1037 		if (!capable(CAP_NET_ADMIN))
1038 			return -EACCES;
1039 		bc->ch_params.tx_delay = hi.data.cp.tx_delay;
1040 		bc->ch_params.tx_tail = hi.data.cp.tx_tail;
1041 		bc->ch_params.slottime = hi.data.cp.slottime;
1042 		bc->ch_params.ppersist = hi.data.cp.ppersist;
1043 		bc->ch_params.fulldup = hi.data.cp.fulldup;
1044 		bc->hdlctx.slotcnt = 1;
1045 		return 0;
1046 
1047 	case HDLCDRVCTL_GETMODEMPAR:
1048 		hi.data.mp.iobase = dev->base_addr;
1049 		hi.data.mp.irq = dev->irq;
1050 		hi.data.mp.dma = dev->dma;
1051 		hi.data.mp.dma2 = 0;
1052 		hi.data.mp.seriobase = 0;
1053 		hi.data.mp.pariobase = 0;
1054 		hi.data.mp.midiiobase = 0;
1055 		break;
1056 
1057 	case HDLCDRVCTL_SETMODEMPAR:
1058 		if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev))
1059 			return -EACCES;
1060 		dev->base_addr = hi.data.mp.iobase;
1061 		dev->irq = /*hi.data.mp.irq*/0;
1062 		dev->dma = /*hi.data.mp.dma*/0;
1063 		return 0;
1064 
1065 	case HDLCDRVCTL_GETSTAT:
1066 		hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT);
1067 		hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT);
1068 		hi.data.cs.ptt_keyed = bc->ptt_keyed;
1069 		hi.data.cs.tx_packets = bc->stats.tx_packets;
1070 		hi.data.cs.tx_errors = bc->stats.tx_errors;
1071 		hi.data.cs.rx_packets = bc->stats.rx_packets;
1072 		hi.data.cs.rx_errors = bc->stats.rx_errors;
1073 		break;
1074 
1075 	case HDLCDRVCTL_OLDGETSTAT:
1076 		hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT);
1077 		hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT);
1078 		hi.data.ocs.ptt_keyed = bc->ptt_keyed;
1079 		break;
1080 
1081 	case HDLCDRVCTL_CALIBRATE:
1082 		if (!capable(CAP_SYS_RAWIO))
1083 			return -EACCES;
1084 		bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8;
1085 		return 0;
1086 
1087 	case HDLCDRVCTL_DRIVERNAME:
1088 		strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername));
1089 		break;
1090 
1091 	case HDLCDRVCTL_GETMODE:
1092 		sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s",
1093 			bc->cfg.intclk ? "int" : "ext",
1094 			bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
1095 			bc->cfg.loopback ? ",loopback" : "");
1096 		break;
1097 
1098 	case HDLCDRVCTL_SETMODE:
1099 		if (!capable(CAP_NET_ADMIN) || netif_running(dev))
1100 			return -EACCES;
1101 		hi.data.modename[sizeof(hi.data.modename)-1] = '\0';
1102 		return baycom_setmode(bc, hi.data.modename);
1103 
1104 	case HDLCDRVCTL_MODELIST:
1105 		strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x",
1106 			sizeof(hi.data.modename));
1107 		break;
1108 
1109 	case HDLCDRVCTL_MODEMPARMASK:
1110 		return HDLCDRV_PARMASK_IOBASE;
1111 
1112 	}
1113 	if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi)))
1114 		return -EFAULT;
1115 	return 0;
1116 }
1117 
1118 /* --------------------------------------------------------------------- */
1119 
1120 /*
1121  * Check for a network adaptor of this type, and return '0' if one exists.
1122  * If dev->base_addr == 0, probe all likely locations.
1123  * If dev->base_addr == 1, always return failure.
1124  * If dev->base_addr == 2, allocate space for the device and return success
1125  * (detachable devices only).
1126  */
1127 static void baycom_probe(struct net_device *dev)
1128 {
1129 	const struct hdlcdrv_channel_params dflt_ch_params = {
1130 		20, 2, 10, 40, 0
1131 	};
1132 	struct baycom_state *bc;
1133 
1134 	/*
1135 	 * not a real probe! only initialize data structures
1136 	 */
1137 	bc = netdev_priv(dev);
1138 	/*
1139 	 * initialize the baycom_state struct
1140 	 */
1141 	bc->ch_params = dflt_ch_params;
1142 	bc->ptt_keyed = 0;
1143 
1144 	/*
1145 	 * initialize the device struct
1146 	 */
1147 	dev->open = epp_open;
1148 	dev->stop = epp_close;
1149 	dev->do_ioctl = baycom_ioctl;
1150 	dev->hard_start_xmit = baycom_send_packet;
1151 	dev->get_stats = baycom_get_stats;
1152 
1153 	/* Fill in the fields of the device structure */
1154 	bc->skb = NULL;
1155 
1156 	dev->header_ops = &ax25_header_ops;
1157 	dev->set_mac_address = baycom_set_mac_address;
1158 
1159 	dev->type = ARPHRD_AX25;           /* AF_AX25 device */
1160 	dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
1161 	dev->mtu = AX25_DEF_PACLEN;        /* eth_mtu is the default */
1162 	dev->addr_len = AX25_ADDR_LEN;     /* sizeof an ax.25 address */
1163 	memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
1164 	memcpy(dev->dev_addr, &null_ax25_address, AX25_ADDR_LEN);
1165 	dev->tx_queue_len = 16;
1166 
1167 	/* New style flags */
1168 	dev->flags = 0;
1169 }
1170 
1171 /* --------------------------------------------------------------------- */
1172 
1173 /*
1174  * command line settable parameters
1175  */
1176 static const char *mode[NR_PORTS] = { "", };
1177 static int iobase[NR_PORTS] = { 0x378, };
1178 
1179 module_param_array(mode, charp, NULL, 0);
1180 MODULE_PARM_DESC(mode, "baycom operating mode");
1181 module_param_array(iobase, int, NULL, 0);
1182 MODULE_PARM_DESC(iobase, "baycom io base address");
1183 
1184 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
1185 MODULE_DESCRIPTION("Baycom epp amateur radio modem driver");
1186 MODULE_LICENSE("GPL");
1187 
1188 /* --------------------------------------------------------------------- */
1189 
1190 static void __init baycom_epp_dev_setup(struct net_device *dev)
1191 {
1192 	struct baycom_state *bc = netdev_priv(dev);
1193 
1194 	/*
1195 	 * initialize part of the baycom_state struct
1196 	 */
1197 	bc->dev = dev;
1198 	bc->magic = BAYCOM_MAGIC;
1199 	bc->cfg.fclk = 19666600;
1200 	bc->cfg.bps = 9600;
1201 	/*
1202 	 * initialize part of the device struct
1203 	 */
1204 	baycom_probe(dev);
1205 }
1206 
1207 static int __init init_baycomepp(void)
1208 {
1209 	int i, found = 0;
1210 	char set_hw = 1;
1211 
1212 	printk(bc_drvinfo);
1213 	/*
1214 	 * register net devices
1215 	 */
1216 	for (i = 0; i < NR_PORTS; i++) {
1217 		struct net_device *dev;
1218 
1219 		dev = alloc_netdev(sizeof(struct baycom_state), "bce%d",
1220 				   baycom_epp_dev_setup);
1221 
1222 		if (!dev) {
1223 			printk(KERN_WARNING "bce%d : out of memory\n", i);
1224 			return found ? 0 : -ENOMEM;
1225 		}
1226 
1227 		sprintf(dev->name, "bce%d", i);
1228 		dev->base_addr = iobase[i];
1229 
1230 		if (!mode[i])
1231 			set_hw = 0;
1232 		if (!set_hw)
1233 			iobase[i] = 0;
1234 
1235 		if (register_netdev(dev)) {
1236 			printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name);
1237 			free_netdev(dev);
1238 			break;
1239 		}
1240 		if (set_hw && baycom_setmode(netdev_priv(dev), mode[i]))
1241 			set_hw = 0;
1242 		baycom_device[i] = dev;
1243 		found++;
1244 	}
1245 
1246 	return found ? 0 : -ENXIO;
1247 }
1248 
1249 static void __exit cleanup_baycomepp(void)
1250 {
1251 	int i;
1252 
1253 	for(i = 0; i < NR_PORTS; i++) {
1254 		struct net_device *dev = baycom_device[i];
1255 
1256 		if (dev) {
1257 			struct baycom_state *bc = netdev_priv(dev);
1258 			if (bc->magic == BAYCOM_MAGIC) {
1259 				unregister_netdev(dev);
1260 				free_netdev(dev);
1261 			} else
1262 				printk(paranoia_str, "cleanup_module");
1263 		}
1264 	}
1265 }
1266 
1267 module_init(init_baycomepp);
1268 module_exit(cleanup_baycomepp);
1269 
1270 /* --------------------------------------------------------------------- */
1271 
1272 #ifndef MODULE
1273 
1274 /*
1275  * format: baycom_epp=io,mode
1276  * mode: fpga config options
1277  */
1278 
1279 static int __init baycom_epp_setup(char *str)
1280 {
1281         static unsigned __initdata nr_dev = 0;
1282 	int ints[2];
1283 
1284         if (nr_dev >= NR_PORTS)
1285                 return 0;
1286 	str = get_options(str, 2, ints);
1287 	if (ints[0] < 1)
1288 		return 0;
1289 	mode[nr_dev] = str;
1290 	iobase[nr_dev] = ints[1];
1291 	nr_dev++;
1292 	return 1;
1293 }
1294 
1295 __setup("baycom_epp=", baycom_epp_setup);
1296 
1297 #endif /* MODULE */
1298 /* --------------------------------------------------------------------- */
1299