1 /*****************************************************************************/ 2 3 /* 4 * baycom_epp.c -- baycom epp radio modem driver. 5 * 6 * Copyright (C) 1998-2000 7 * Thomas Sailer (sailer@ife.ee.ethz.ch) 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 23 * Please note that the GPL allows you to use the driver, NOT the radio. 24 * In order to use the radio, you need a license from the communications 25 * authority of your country. 26 * 27 * 28 * History: 29 * 0.1 xx.xx.1998 Initial version by Matthias Welwarsky (dg2fef) 30 * 0.2 21.04.1998 Massive rework by Thomas Sailer 31 * Integrated FPGA EPP modem configuration routines 32 * 0.3 11.05.1998 Took FPGA config out and moved it into a separate program 33 * 0.4 26.07.1999 Adapted to new lowlevel parport driver interface 34 * 0.5 03.08.1999 adapt to Linus' new __setup/__initcall 35 * removed some pre-2.2 kernel compatibility cruft 36 * 0.6 10.08.1999 Check if parport can do SPP and is safe to access during interrupt contexts 37 * 0.7 12.02.2000 adapted to softnet driver interface 38 * 39 */ 40 41 /*****************************************************************************/ 42 43 #include <linux/crc-ccitt.h> 44 #include <linux/module.h> 45 #include <linux/kernel.h> 46 #include <linux/init.h> 47 #include <linux/sched.h> 48 #include <linux/string.h> 49 #include <linux/workqueue.h> 50 #include <linux/fs.h> 51 #include <linux/parport.h> 52 #include <linux/if_arp.h> 53 #include <linux/hdlcdrv.h> 54 #include <linux/baycom.h> 55 #include <linux/jiffies.h> 56 #include <linux/random.h> 57 #include <net/ax25.h> 58 #include <asm/uaccess.h> 59 60 /* --------------------------------------------------------------------- */ 61 62 #define BAYCOM_DEBUG 63 #define BAYCOM_MAGIC 19730510 64 65 /* --------------------------------------------------------------------- */ 66 67 static const char paranoia_str[] = KERN_ERR 68 "baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n"; 69 70 static const char bc_drvname[] = "baycom_epp"; 71 static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n" 72 "baycom_epp: version 0.7\n"; 73 74 /* --------------------------------------------------------------------- */ 75 76 #define NR_PORTS 4 77 78 static struct net_device *baycom_device[NR_PORTS]; 79 80 /* --------------------------------------------------------------------- */ 81 82 /* EPP status register */ 83 #define EPP_DCDBIT 0x80 84 #define EPP_PTTBIT 0x08 85 #define EPP_NREF 0x01 86 #define EPP_NRAEF 0x02 87 #define EPP_NRHF 0x04 88 #define EPP_NTHF 0x20 89 #define EPP_NTAEF 0x10 90 #define EPP_NTEF EPP_PTTBIT 91 92 /* EPP control register */ 93 #define EPP_TX_FIFO_ENABLE 0x10 94 #define EPP_RX_FIFO_ENABLE 0x08 95 #define EPP_MODEM_ENABLE 0x20 96 #define EPP_LEDS 0xC0 97 #define EPP_IRQ_ENABLE 0x10 98 99 /* LPT registers */ 100 #define LPTREG_ECONTROL 0x402 101 #define LPTREG_CONFIGB 0x401 102 #define LPTREG_CONFIGA 0x400 103 #define LPTREG_EPPDATA 0x004 104 #define LPTREG_EPPADDR 0x003 105 #define LPTREG_CONTROL 0x002 106 #define LPTREG_STATUS 0x001 107 #define LPTREG_DATA 0x000 108 109 /* LPT control register */ 110 #define LPTCTRL_PROGRAM 0x04 /* 0 to reprogram */ 111 #define LPTCTRL_WRITE 0x01 112 #define LPTCTRL_ADDRSTB 0x08 113 #define LPTCTRL_DATASTB 0x02 114 #define LPTCTRL_INTEN 0x10 115 116 /* LPT status register */ 117 #define LPTSTAT_SHIFT_NINTR 6 118 #define LPTSTAT_WAIT 0x80 119 #define LPTSTAT_NINTR (1<<LPTSTAT_SHIFT_NINTR) 120 #define LPTSTAT_PE 0x20 121 #define LPTSTAT_DONE 0x10 122 #define LPTSTAT_NERROR 0x08 123 #define LPTSTAT_EPPTIMEOUT 0x01 124 125 /* LPT data register */ 126 #define LPTDATA_SHIFT_TDI 0 127 #define LPTDATA_SHIFT_TMS 2 128 #define LPTDATA_TDI (1<<LPTDATA_SHIFT_TDI) 129 #define LPTDATA_TCK 0x02 130 #define LPTDATA_TMS (1<<LPTDATA_SHIFT_TMS) 131 #define LPTDATA_INITBIAS 0x80 132 133 134 /* EPP modem config/status bits */ 135 #define EPP_DCDBIT 0x80 136 #define EPP_PTTBIT 0x08 137 #define EPP_RXEBIT 0x01 138 #define EPP_RXAEBIT 0x02 139 #define EPP_RXHFULL 0x04 140 141 #define EPP_NTHF 0x20 142 #define EPP_NTAEF 0x10 143 #define EPP_NTEF EPP_PTTBIT 144 145 #define EPP_TX_FIFO_ENABLE 0x10 146 #define EPP_RX_FIFO_ENABLE 0x08 147 #define EPP_MODEM_ENABLE 0x20 148 #define EPP_LEDS 0xC0 149 #define EPP_IRQ_ENABLE 0x10 150 151 /* Xilinx 4k JTAG instructions */ 152 #define XC4K_IRLENGTH 3 153 #define XC4K_EXTEST 0 154 #define XC4K_PRELOAD 1 155 #define XC4K_CONFIGURE 5 156 #define XC4K_BYPASS 7 157 158 #define EPP_CONVENTIONAL 0 159 #define EPP_FPGA 1 160 #define EPP_FPGAEXTSTATUS 2 161 162 #define TXBUFFER_SIZE ((HDLCDRV_MAXFLEN*6/5)+8) 163 164 /* ---------------------------------------------------------------------- */ 165 /* 166 * Information that need to be kept for each board. 167 */ 168 169 struct baycom_state { 170 int magic; 171 172 struct pardevice *pdev; 173 struct net_device *dev; 174 unsigned int work_running; 175 struct delayed_work run_work; 176 unsigned int modem; 177 unsigned int bitrate; 178 unsigned char stat; 179 180 struct { 181 unsigned int intclk; 182 unsigned int fclk; 183 unsigned int bps; 184 unsigned int extmodem; 185 unsigned int loopback; 186 } cfg; 187 188 struct hdlcdrv_channel_params ch_params; 189 190 struct { 191 unsigned int bitbuf, bitstream, numbits, state; 192 unsigned char *bufptr; 193 int bufcnt; 194 unsigned char buf[TXBUFFER_SIZE]; 195 } hdlcrx; 196 197 struct { 198 int calibrate; 199 int slotcnt; 200 int flags; 201 enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state; 202 unsigned char *bufptr; 203 int bufcnt; 204 unsigned char buf[TXBUFFER_SIZE]; 205 } hdlctx; 206 207 unsigned int ptt_keyed; 208 struct sk_buff *skb; /* next transmit packet */ 209 210 #ifdef BAYCOM_DEBUG 211 struct debug_vals { 212 unsigned long last_jiffies; 213 unsigned cur_intcnt; 214 unsigned last_intcnt; 215 int cur_pllcorr; 216 int last_pllcorr; 217 unsigned int mod_cycles; 218 unsigned int demod_cycles; 219 } debug_vals; 220 #endif /* BAYCOM_DEBUG */ 221 }; 222 223 /* --------------------------------------------------------------------- */ 224 225 #define KISS_VERBOSE 226 227 /* --------------------------------------------------------------------- */ 228 229 #define PARAM_TXDELAY 1 230 #define PARAM_PERSIST 2 231 #define PARAM_SLOTTIME 3 232 #define PARAM_TXTAIL 4 233 #define PARAM_FULLDUP 5 234 #define PARAM_HARDWARE 6 235 #define PARAM_RETURN 255 236 237 /* --------------------------------------------------------------------- */ 238 /* 239 * the CRC routines are stolen from WAMPES 240 * by Dieter Deyke 241 */ 242 243 244 /*---------------------------------------------------------------------------*/ 245 246 #if 0 247 static inline void append_crc_ccitt(unsigned char *buffer, int len) 248 { 249 unsigned int crc = 0xffff; 250 251 for (;len>0;len--) 252 crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff]; 253 crc ^= 0xffff; 254 *buffer++ = crc; 255 *buffer++ = crc >> 8; 256 } 257 #endif 258 259 /*---------------------------------------------------------------------------*/ 260 261 static inline int check_crc_ccitt(const unsigned char *buf, int cnt) 262 { 263 return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8; 264 } 265 266 /*---------------------------------------------------------------------------*/ 267 268 static inline int calc_crc_ccitt(const unsigned char *buf, int cnt) 269 { 270 return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff; 271 } 272 273 /* ---------------------------------------------------------------------- */ 274 275 #define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800) 276 277 /* --------------------------------------------------------------------- */ 278 279 static inline void baycom_int_freq(struct baycom_state *bc) 280 { 281 #ifdef BAYCOM_DEBUG 282 unsigned long cur_jiffies = jiffies; 283 /* 284 * measure the interrupt frequency 285 */ 286 bc->debug_vals.cur_intcnt++; 287 if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) { 288 bc->debug_vals.last_jiffies = cur_jiffies; 289 bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt; 290 bc->debug_vals.cur_intcnt = 0; 291 bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr; 292 bc->debug_vals.cur_pllcorr = 0; 293 } 294 #endif /* BAYCOM_DEBUG */ 295 } 296 297 /* ---------------------------------------------------------------------- */ 298 /* 299 * eppconfig_path should be setable via /proc/sys. 300 */ 301 302 static char eppconfig_path[256] = "/usr/sbin/eppfpga"; 303 304 static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL }; 305 306 /* eppconfig: called during ifconfig up to configure the modem */ 307 static int eppconfig(struct baycom_state *bc) 308 { 309 char modearg[256]; 310 char portarg[16]; 311 char *argv[] = { eppconfig_path, "-s", "-p", portarg, "-m", modearg, 312 NULL }; 313 314 /* set up arguments */ 315 sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat", 316 bc->cfg.intclk ? "int" : "ext", 317 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, 318 (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps), 319 bc->cfg.loopback ? ",loopback" : ""); 320 sprintf(portarg, "%ld", bc->pdev->port->base); 321 printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg); 322 323 return call_usermodehelper(eppconfig_path, argv, envp, UMH_WAIT_PROC); 324 } 325 326 /* ---------------------------------------------------------------------- */ 327 328 static inline void do_kiss_params(struct baycom_state *bc, 329 unsigned char *data, unsigned long len) 330 { 331 332 #ifdef KISS_VERBOSE 333 #define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b) 334 #else /* KISS_VERBOSE */ 335 #define PKP(a,b) 336 #endif /* KISS_VERBOSE */ 337 338 if (len < 2) 339 return; 340 switch(data[0]) { 341 case PARAM_TXDELAY: 342 bc->ch_params.tx_delay = data[1]; 343 PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay); 344 break; 345 case PARAM_PERSIST: 346 bc->ch_params.ppersist = data[1]; 347 PKP("p persistence = %u", bc->ch_params.ppersist); 348 break; 349 case PARAM_SLOTTIME: 350 bc->ch_params.slottime = data[1]; 351 PKP("slot time = %ums", bc->ch_params.slottime); 352 break; 353 case PARAM_TXTAIL: 354 bc->ch_params.tx_tail = data[1]; 355 PKP("TX tail = %ums", bc->ch_params.tx_tail); 356 break; 357 case PARAM_FULLDUP: 358 bc->ch_params.fulldup = !!data[1]; 359 PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half"); 360 break; 361 default: 362 break; 363 } 364 #undef PKP 365 } 366 367 /* --------------------------------------------------------------------- */ 368 369 static void encode_hdlc(struct baycom_state *bc) 370 { 371 struct sk_buff *skb; 372 unsigned char *wp, *bp; 373 int pkt_len; 374 unsigned bitstream, notbitstream, bitbuf, numbit, crc; 375 unsigned char crcarr[2]; 376 int j; 377 378 if (bc->hdlctx.bufcnt > 0) 379 return; 380 skb = bc->skb; 381 if (!skb) 382 return; 383 bc->skb = NULL; 384 pkt_len = skb->len-1; /* strip KISS byte */ 385 wp = bc->hdlctx.buf; 386 bp = skb->data+1; 387 crc = calc_crc_ccitt(bp, pkt_len); 388 crcarr[0] = crc; 389 crcarr[1] = crc >> 8; 390 *wp++ = 0x7e; 391 bitstream = bitbuf = numbit = 0; 392 while (pkt_len > -2) { 393 bitstream >>= 8; 394 bitstream |= ((unsigned int)*bp) << 8; 395 bitbuf |= ((unsigned int)*bp) << numbit; 396 notbitstream = ~bitstream; 397 bp++; 398 pkt_len--; 399 if (!pkt_len) 400 bp = crcarr; 401 for (j = 0; j < 8; j++) 402 if (unlikely(!(notbitstream & (0x1f0 << j)))) { 403 bitstream &= ~(0x100 << j); 404 bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) | 405 ((bitbuf & ~(((2 << j) << numbit) - 1)) << 1); 406 numbit++; 407 notbitstream = ~bitstream; 408 } 409 numbit += 8; 410 while (numbit >= 8) { 411 *wp++ = bitbuf; 412 bitbuf >>= 8; 413 numbit -= 8; 414 } 415 } 416 bitbuf |= 0x7e7e << numbit; 417 numbit += 16; 418 while (numbit >= 8) { 419 *wp++ = bitbuf; 420 bitbuf >>= 8; 421 numbit -= 8; 422 } 423 bc->hdlctx.bufptr = bc->hdlctx.buf; 424 bc->hdlctx.bufcnt = wp - bc->hdlctx.buf; 425 dev_kfree_skb(skb); 426 bc->dev->stats.tx_packets++; 427 } 428 429 /* ---------------------------------------------------------------------- */ 430 431 static int transmit(struct baycom_state *bc, int cnt, unsigned char stat) 432 { 433 struct parport *pp = bc->pdev->port; 434 unsigned char tmp[128]; 435 int i, j; 436 437 if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT)) 438 bc->hdlctx.state = tx_idle; 439 if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) { 440 if (bc->hdlctx.bufcnt <= 0) 441 encode_hdlc(bc); 442 if (bc->hdlctx.bufcnt <= 0) 443 return 0; 444 if (!bc->ch_params.fulldup) { 445 if (!(stat & EPP_DCDBIT)) { 446 bc->hdlctx.slotcnt = bc->ch_params.slottime; 447 return 0; 448 } 449 if ((--bc->hdlctx.slotcnt) > 0) 450 return 0; 451 bc->hdlctx.slotcnt = bc->ch_params.slottime; 452 if ((prandom_u32() % 256) > bc->ch_params.ppersist) 453 return 0; 454 } 455 } 456 if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) { 457 bc->hdlctx.state = tx_keyup; 458 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay); 459 bc->ptt_keyed++; 460 } 461 while (cnt > 0) { 462 switch (bc->hdlctx.state) { 463 case tx_keyup: 464 i = min_t(int, cnt, bc->hdlctx.flags); 465 cnt -= i; 466 bc->hdlctx.flags -= i; 467 if (bc->hdlctx.flags <= 0) 468 bc->hdlctx.state = tx_data; 469 memset(tmp, 0x7e, sizeof(tmp)); 470 while (i > 0) { 471 j = (i > sizeof(tmp)) ? sizeof(tmp) : i; 472 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) 473 return -1; 474 i -= j; 475 } 476 break; 477 478 case tx_data: 479 if (bc->hdlctx.bufcnt <= 0) { 480 encode_hdlc(bc); 481 if (bc->hdlctx.bufcnt <= 0) { 482 bc->hdlctx.state = tx_tail; 483 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail); 484 break; 485 } 486 } 487 i = min_t(int, cnt, bc->hdlctx.bufcnt); 488 bc->hdlctx.bufcnt -= i; 489 cnt -= i; 490 if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0)) 491 return -1; 492 bc->hdlctx.bufptr += i; 493 break; 494 495 case tx_tail: 496 encode_hdlc(bc); 497 if (bc->hdlctx.bufcnt > 0) { 498 bc->hdlctx.state = tx_data; 499 break; 500 } 501 i = min_t(int, cnt, bc->hdlctx.flags); 502 if (i) { 503 cnt -= i; 504 bc->hdlctx.flags -= i; 505 memset(tmp, 0x7e, sizeof(tmp)); 506 while (i > 0) { 507 j = (i > sizeof(tmp)) ? sizeof(tmp) : i; 508 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) 509 return -1; 510 i -= j; 511 } 512 break; 513 } 514 515 default: /* fall through */ 516 if (bc->hdlctx.calibrate <= 0) 517 return 0; 518 i = min_t(int, cnt, bc->hdlctx.calibrate); 519 cnt -= i; 520 bc->hdlctx.calibrate -= i; 521 memset(tmp, 0, sizeof(tmp)); 522 while (i > 0) { 523 j = (i > sizeof(tmp)) ? sizeof(tmp) : i; 524 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) 525 return -1; 526 i -= j; 527 } 528 break; 529 } 530 } 531 return 0; 532 } 533 534 /* ---------------------------------------------------------------------- */ 535 536 static void do_rxpacket(struct net_device *dev) 537 { 538 struct baycom_state *bc = netdev_priv(dev); 539 struct sk_buff *skb; 540 unsigned char *cp; 541 unsigned pktlen; 542 543 if (bc->hdlcrx.bufcnt < 4) 544 return; 545 if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt)) 546 return; 547 pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */ 548 if (!(skb = dev_alloc_skb(pktlen))) { 549 printk("%s: memory squeeze, dropping packet\n", dev->name); 550 dev->stats.rx_dropped++; 551 return; 552 } 553 cp = skb_put(skb, pktlen); 554 *cp++ = 0; /* KISS kludge */ 555 memcpy(cp, bc->hdlcrx.buf, pktlen - 1); 556 skb->protocol = ax25_type_trans(skb, dev); 557 netif_rx(skb); 558 dev->stats.rx_packets++; 559 } 560 561 static int receive(struct net_device *dev, int cnt) 562 { 563 struct baycom_state *bc = netdev_priv(dev); 564 struct parport *pp = bc->pdev->port; 565 unsigned int bitbuf, notbitstream, bitstream, numbits, state; 566 unsigned char tmp[128]; 567 unsigned char *cp; 568 int cnt2, ret = 0; 569 int j; 570 571 numbits = bc->hdlcrx.numbits; 572 state = bc->hdlcrx.state; 573 bitstream = bc->hdlcrx.bitstream; 574 bitbuf = bc->hdlcrx.bitbuf; 575 while (cnt > 0) { 576 cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt; 577 cnt -= cnt2; 578 if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) { 579 ret = -1; 580 break; 581 } 582 cp = tmp; 583 for (; cnt2 > 0; cnt2--, cp++) { 584 bitstream >>= 8; 585 bitstream |= (*cp) << 8; 586 bitbuf >>= 8; 587 bitbuf |= (*cp) << 8; 588 numbits += 8; 589 notbitstream = ~bitstream; 590 for (j = 0; j < 8; j++) { 591 592 /* flag or abort */ 593 if (unlikely(!(notbitstream & (0x0fc << j)))) { 594 595 /* abort received */ 596 if (!(notbitstream & (0x1fc << j))) 597 state = 0; 598 599 /* flag received */ 600 else if ((bitstream & (0x1fe << j)) == (0x0fc << j)) { 601 if (state) 602 do_rxpacket(dev); 603 bc->hdlcrx.bufcnt = 0; 604 bc->hdlcrx.bufptr = bc->hdlcrx.buf; 605 state = 1; 606 numbits = 7-j; 607 } 608 } 609 610 /* stuffed bit */ 611 else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) { 612 numbits--; 613 bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1); 614 } 615 } 616 while (state && numbits >= 8) { 617 if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) { 618 state = 0; 619 } else { 620 *(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits); 621 bc->hdlcrx.bufcnt++; 622 numbits -= 8; 623 } 624 } 625 } 626 } 627 bc->hdlcrx.numbits = numbits; 628 bc->hdlcrx.state = state; 629 bc->hdlcrx.bitstream = bitstream; 630 bc->hdlcrx.bitbuf = bitbuf; 631 return ret; 632 } 633 634 /* --------------------------------------------------------------------- */ 635 636 #ifdef __i386__ 637 #include <asm/msr.h> 638 #define GETTICK(x) \ 639 ({ \ 640 if (cpu_has_tsc) \ 641 rdtscl(x); \ 642 }) 643 #else /* __i386__ */ 644 #define GETTICK(x) 645 #endif /* __i386__ */ 646 647 static void epp_bh(struct work_struct *work) 648 { 649 struct net_device *dev; 650 struct baycom_state *bc; 651 struct parport *pp; 652 unsigned char stat; 653 unsigned char tmp[2]; 654 unsigned int time1 = 0, time2 = 0, time3 = 0; 655 int cnt, cnt2; 656 657 bc = container_of(work, struct baycom_state, run_work.work); 658 dev = bc->dev; 659 if (!bc->work_running) 660 return; 661 baycom_int_freq(bc); 662 pp = bc->pdev->port; 663 /* update status */ 664 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 665 goto epptimeout; 666 bc->stat = stat; 667 bc->debug_vals.last_pllcorr = stat; 668 GETTICK(time1); 669 if (bc->modem == EPP_FPGAEXTSTATUS) { 670 /* get input count */ 671 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1; 672 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 673 goto epptimeout; 674 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2) 675 goto epptimeout; 676 cnt = tmp[0] | (tmp[1] << 8); 677 cnt &= 0x7fff; 678 /* get output count */ 679 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2; 680 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 681 goto epptimeout; 682 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2) 683 goto epptimeout; 684 cnt2 = tmp[0] | (tmp[1] << 8); 685 cnt2 = 16384 - (cnt2 & 0x7fff); 686 /* return to normal */ 687 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE; 688 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 689 goto epptimeout; 690 if (transmit(bc, cnt2, stat)) 691 goto epptimeout; 692 GETTICK(time2); 693 if (receive(dev, cnt)) 694 goto epptimeout; 695 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 696 goto epptimeout; 697 bc->stat = stat; 698 } else { 699 /* try to tx */ 700 switch (stat & (EPP_NTAEF|EPP_NTHF)) { 701 case EPP_NTHF: 702 cnt = 2048 - 256; 703 break; 704 705 case EPP_NTAEF: 706 cnt = 2048 - 1793; 707 break; 708 709 case 0: 710 cnt = 0; 711 break; 712 713 default: 714 cnt = 2048 - 1025; 715 break; 716 } 717 if (transmit(bc, cnt, stat)) 718 goto epptimeout; 719 GETTICK(time2); 720 /* do receiver */ 721 while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) { 722 switch (stat & (EPP_NRAEF|EPP_NRHF)) { 723 case EPP_NRAEF: 724 cnt = 1025; 725 break; 726 727 case 0: 728 cnt = 1793; 729 break; 730 731 default: 732 cnt = 256; 733 break; 734 } 735 if (receive(dev, cnt)) 736 goto epptimeout; 737 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 738 goto epptimeout; 739 } 740 cnt = 0; 741 if (bc->bitrate < 50000) 742 cnt = 256; 743 else if (bc->bitrate < 100000) 744 cnt = 128; 745 while (cnt > 0 && stat & EPP_NREF) { 746 if (receive(dev, 1)) 747 goto epptimeout; 748 cnt--; 749 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 750 goto epptimeout; 751 } 752 } 753 GETTICK(time3); 754 #ifdef BAYCOM_DEBUG 755 bc->debug_vals.mod_cycles = time2 - time1; 756 bc->debug_vals.demod_cycles = time3 - time2; 757 #endif /* BAYCOM_DEBUG */ 758 schedule_delayed_work(&bc->run_work, 1); 759 if (!bc->skb) 760 netif_wake_queue(dev); 761 return; 762 epptimeout: 763 printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname); 764 } 765 766 /* ---------------------------------------------------------------------- */ 767 /* 768 * ===================== network driver interface ========================= 769 */ 770 771 static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev) 772 { 773 struct baycom_state *bc = netdev_priv(dev); 774 775 if (skb->protocol == htons(ETH_P_IP)) 776 return ax25_ip_xmit(skb); 777 778 if (skb->data[0] != 0) { 779 do_kiss_params(bc, skb->data, skb->len); 780 dev_kfree_skb(skb); 781 return NETDEV_TX_OK; 782 } 783 if (bc->skb) 784 return NETDEV_TX_LOCKED; 785 /* strip KISS byte */ 786 if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) { 787 dev_kfree_skb(skb); 788 return NETDEV_TX_OK; 789 } 790 netif_stop_queue(dev); 791 bc->skb = skb; 792 return NETDEV_TX_OK; 793 } 794 795 /* --------------------------------------------------------------------- */ 796 797 static int baycom_set_mac_address(struct net_device *dev, void *addr) 798 { 799 struct sockaddr *sa = (struct sockaddr *)addr; 800 801 /* addr is an AX.25 shifted ASCII mac address */ 802 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); 803 return 0; 804 } 805 806 /* --------------------------------------------------------------------- */ 807 808 static void epp_wakeup(void *handle) 809 { 810 struct net_device *dev = (struct net_device *)handle; 811 struct baycom_state *bc = netdev_priv(dev); 812 813 printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name); 814 if (!parport_claim(bc->pdev)) 815 printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name); 816 } 817 818 /* --------------------------------------------------------------------- */ 819 820 /* 821 * Open/initialize the board. This is called (in the current kernel) 822 * sometime after booting when the 'ifconfig' program is run. 823 * 824 * This routine should set everything up anew at each open, even 825 * registers that "should" only need to be set once at boot, so that 826 * there is non-reboot way to recover if something goes wrong. 827 */ 828 829 static int epp_open(struct net_device *dev) 830 { 831 struct baycom_state *bc = netdev_priv(dev); 832 struct parport *pp = parport_find_base(dev->base_addr); 833 unsigned int i, j; 834 unsigned char tmp[128]; 835 unsigned char stat; 836 unsigned long tstart; 837 838 if (!pp) { 839 printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr); 840 return -ENXIO; 841 } 842 #if 0 843 if (pp->irq < 0) { 844 printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base); 845 parport_put_port(pp); 846 return -ENXIO; 847 } 848 #endif 849 if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) { 850 printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n", 851 bc_drvname, pp->base); 852 parport_put_port(pp); 853 return -EIO; 854 } 855 memset(&bc->modem, 0, sizeof(bc->modem)); 856 bc->pdev = parport_register_device(pp, dev->name, NULL, epp_wakeup, 857 NULL, PARPORT_DEV_EXCL, dev); 858 parport_put_port(pp); 859 if (!bc->pdev) { 860 printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base); 861 return -ENXIO; 862 } 863 if (parport_claim(bc->pdev)) { 864 printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base); 865 parport_unregister_device(bc->pdev); 866 return -EBUSY; 867 } 868 dev->irq = /*pp->irq*/ 0; 869 INIT_DELAYED_WORK(&bc->run_work, epp_bh); 870 bc->work_running = 1; 871 bc->modem = EPP_CONVENTIONAL; 872 if (eppconfig(bc)) 873 printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname); 874 else 875 bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS; 876 parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */ 877 /* reset the modem */ 878 tmp[0] = 0; 879 tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE; 880 if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2) 881 goto epptimeout; 882 /* autoprobe baud rate */ 883 tstart = jiffies; 884 i = 0; 885 while (time_before(jiffies, tstart + HZ/3)) { 886 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 887 goto epptimeout; 888 if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) { 889 schedule(); 890 continue; 891 } 892 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128) 893 goto epptimeout; 894 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128) 895 goto epptimeout; 896 i += 256; 897 } 898 for (j = 0; j < 256; j++) { 899 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) 900 goto epptimeout; 901 if (!(stat & EPP_NREF)) 902 break; 903 if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1) 904 goto epptimeout; 905 i++; 906 } 907 tstart = jiffies - tstart; 908 bc->bitrate = i * (8 * HZ) / tstart; 909 j = 1; 910 i = bc->bitrate >> 3; 911 while (j < 7 && i > 150) { 912 j++; 913 i >>= 1; 914 } 915 printk(KERN_INFO "%s: autoprobed bitrate: %d int divider: %d int rate: %d\n", 916 bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2)); 917 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/; 918 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1) 919 goto epptimeout; 920 /* 921 * initialise hdlc variables 922 */ 923 bc->hdlcrx.state = 0; 924 bc->hdlcrx.numbits = 0; 925 bc->hdlctx.state = tx_idle; 926 bc->hdlctx.bufcnt = 0; 927 bc->hdlctx.slotcnt = bc->ch_params.slottime; 928 bc->hdlctx.calibrate = 0; 929 /* start the bottom half stuff */ 930 schedule_delayed_work(&bc->run_work, 1); 931 netif_start_queue(dev); 932 return 0; 933 934 epptimeout: 935 printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname); 936 parport_write_control(pp, 0); /* reset the adapter */ 937 parport_release(bc->pdev); 938 parport_unregister_device(bc->pdev); 939 return -EIO; 940 } 941 942 /* --------------------------------------------------------------------- */ 943 944 static int epp_close(struct net_device *dev) 945 { 946 struct baycom_state *bc = netdev_priv(dev); 947 struct parport *pp = bc->pdev->port; 948 unsigned char tmp[1]; 949 950 bc->work_running = 0; 951 cancel_delayed_work_sync(&bc->run_work); 952 bc->stat = EPP_DCDBIT; 953 tmp[0] = 0; 954 pp->ops->epp_write_addr(pp, tmp, 1, 0); 955 parport_write_control(pp, 0); /* reset the adapter */ 956 parport_release(bc->pdev); 957 parport_unregister_device(bc->pdev); 958 if (bc->skb) 959 dev_kfree_skb(bc->skb); 960 bc->skb = NULL; 961 printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n", 962 bc_drvname, dev->base_addr, dev->irq); 963 return 0; 964 } 965 966 /* --------------------------------------------------------------------- */ 967 968 static int baycom_setmode(struct baycom_state *bc, const char *modestr) 969 { 970 const char *cp; 971 972 if (strstr(modestr,"intclk")) 973 bc->cfg.intclk = 1; 974 if (strstr(modestr,"extclk")) 975 bc->cfg.intclk = 0; 976 if (strstr(modestr,"intmodem")) 977 bc->cfg.extmodem = 0; 978 if (strstr(modestr,"extmodem")) 979 bc->cfg.extmodem = 1; 980 if (strstr(modestr,"noloopback")) 981 bc->cfg.loopback = 0; 982 if (strstr(modestr,"loopback")) 983 bc->cfg.loopback = 1; 984 if ((cp = strstr(modestr,"fclk="))) { 985 bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0); 986 if (bc->cfg.fclk < 1000000) 987 bc->cfg.fclk = 1000000; 988 if (bc->cfg.fclk > 25000000) 989 bc->cfg.fclk = 25000000; 990 } 991 if ((cp = strstr(modestr,"bps="))) { 992 bc->cfg.bps = simple_strtoul(cp+4, NULL, 0); 993 if (bc->cfg.bps < 1000) 994 bc->cfg.bps = 1000; 995 if (bc->cfg.bps > 1500000) 996 bc->cfg.bps = 1500000; 997 } 998 return 0; 999 } 1000 1001 /* --------------------------------------------------------------------- */ 1002 1003 static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 1004 { 1005 struct baycom_state *bc = netdev_priv(dev); 1006 struct hdlcdrv_ioctl hi; 1007 1008 if (cmd != SIOCDEVPRIVATE) 1009 return -ENOIOCTLCMD; 1010 1011 if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi))) 1012 return -EFAULT; 1013 switch (hi.cmd) { 1014 default: 1015 return -ENOIOCTLCMD; 1016 1017 case HDLCDRVCTL_GETCHANNELPAR: 1018 hi.data.cp.tx_delay = bc->ch_params.tx_delay; 1019 hi.data.cp.tx_tail = bc->ch_params.tx_tail; 1020 hi.data.cp.slottime = bc->ch_params.slottime; 1021 hi.data.cp.ppersist = bc->ch_params.ppersist; 1022 hi.data.cp.fulldup = bc->ch_params.fulldup; 1023 break; 1024 1025 case HDLCDRVCTL_SETCHANNELPAR: 1026 if (!capable(CAP_NET_ADMIN)) 1027 return -EACCES; 1028 bc->ch_params.tx_delay = hi.data.cp.tx_delay; 1029 bc->ch_params.tx_tail = hi.data.cp.tx_tail; 1030 bc->ch_params.slottime = hi.data.cp.slottime; 1031 bc->ch_params.ppersist = hi.data.cp.ppersist; 1032 bc->ch_params.fulldup = hi.data.cp.fulldup; 1033 bc->hdlctx.slotcnt = 1; 1034 return 0; 1035 1036 case HDLCDRVCTL_GETMODEMPAR: 1037 hi.data.mp.iobase = dev->base_addr; 1038 hi.data.mp.irq = dev->irq; 1039 hi.data.mp.dma = dev->dma; 1040 hi.data.mp.dma2 = 0; 1041 hi.data.mp.seriobase = 0; 1042 hi.data.mp.pariobase = 0; 1043 hi.data.mp.midiiobase = 0; 1044 break; 1045 1046 case HDLCDRVCTL_SETMODEMPAR: 1047 if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev)) 1048 return -EACCES; 1049 dev->base_addr = hi.data.mp.iobase; 1050 dev->irq = /*hi.data.mp.irq*/0; 1051 dev->dma = /*hi.data.mp.dma*/0; 1052 return 0; 1053 1054 case HDLCDRVCTL_GETSTAT: 1055 hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT); 1056 hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT); 1057 hi.data.cs.ptt_keyed = bc->ptt_keyed; 1058 hi.data.cs.tx_packets = dev->stats.tx_packets; 1059 hi.data.cs.tx_errors = dev->stats.tx_errors; 1060 hi.data.cs.rx_packets = dev->stats.rx_packets; 1061 hi.data.cs.rx_errors = dev->stats.rx_errors; 1062 break; 1063 1064 case HDLCDRVCTL_OLDGETSTAT: 1065 hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT); 1066 hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT); 1067 hi.data.ocs.ptt_keyed = bc->ptt_keyed; 1068 break; 1069 1070 case HDLCDRVCTL_CALIBRATE: 1071 if (!capable(CAP_SYS_RAWIO)) 1072 return -EACCES; 1073 bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8; 1074 return 0; 1075 1076 case HDLCDRVCTL_DRIVERNAME: 1077 strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername)); 1078 break; 1079 1080 case HDLCDRVCTL_GETMODE: 1081 sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s", 1082 bc->cfg.intclk ? "int" : "ext", 1083 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, 1084 bc->cfg.loopback ? ",loopback" : ""); 1085 break; 1086 1087 case HDLCDRVCTL_SETMODE: 1088 if (!capable(CAP_NET_ADMIN) || netif_running(dev)) 1089 return -EACCES; 1090 hi.data.modename[sizeof(hi.data.modename)-1] = '\0'; 1091 return baycom_setmode(bc, hi.data.modename); 1092 1093 case HDLCDRVCTL_MODELIST: 1094 strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x", 1095 sizeof(hi.data.modename)); 1096 break; 1097 1098 case HDLCDRVCTL_MODEMPARMASK: 1099 return HDLCDRV_PARMASK_IOBASE; 1100 1101 } 1102 if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi))) 1103 return -EFAULT; 1104 return 0; 1105 } 1106 1107 /* --------------------------------------------------------------------- */ 1108 1109 static const struct net_device_ops baycom_netdev_ops = { 1110 .ndo_open = epp_open, 1111 .ndo_stop = epp_close, 1112 .ndo_do_ioctl = baycom_ioctl, 1113 .ndo_start_xmit = baycom_send_packet, 1114 .ndo_set_mac_address = baycom_set_mac_address, 1115 }; 1116 1117 /* 1118 * Check for a network adaptor of this type, and return '0' if one exists. 1119 * If dev->base_addr == 0, probe all likely locations. 1120 * If dev->base_addr == 1, always return failure. 1121 * If dev->base_addr == 2, allocate space for the device and return success 1122 * (detachable devices only). 1123 */ 1124 static void baycom_probe(struct net_device *dev) 1125 { 1126 const struct hdlcdrv_channel_params dflt_ch_params = { 1127 20, 2, 10, 40, 0 1128 }; 1129 struct baycom_state *bc; 1130 1131 /* 1132 * not a real probe! only initialize data structures 1133 */ 1134 bc = netdev_priv(dev); 1135 /* 1136 * initialize the baycom_state struct 1137 */ 1138 bc->ch_params = dflt_ch_params; 1139 bc->ptt_keyed = 0; 1140 1141 /* 1142 * initialize the device struct 1143 */ 1144 1145 /* Fill in the fields of the device structure */ 1146 bc->skb = NULL; 1147 1148 dev->netdev_ops = &baycom_netdev_ops; 1149 dev->header_ops = &ax25_header_ops; 1150 1151 dev->type = ARPHRD_AX25; /* AF_AX25 device */ 1152 dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN; 1153 dev->mtu = AX25_DEF_PACLEN; /* eth_mtu is the default */ 1154 dev->addr_len = AX25_ADDR_LEN; /* sizeof an ax.25 address */ 1155 memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN); 1156 memcpy(dev->dev_addr, &null_ax25_address, AX25_ADDR_LEN); 1157 dev->tx_queue_len = 16; 1158 1159 /* New style flags */ 1160 dev->flags = 0; 1161 } 1162 1163 /* --------------------------------------------------------------------- */ 1164 1165 /* 1166 * command line settable parameters 1167 */ 1168 static char *mode[NR_PORTS] = { "", }; 1169 static int iobase[NR_PORTS] = { 0x378, }; 1170 1171 module_param_array(mode, charp, NULL, 0); 1172 MODULE_PARM_DESC(mode, "baycom operating mode"); 1173 module_param_array(iobase, int, NULL, 0); 1174 MODULE_PARM_DESC(iobase, "baycom io base address"); 1175 1176 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu"); 1177 MODULE_DESCRIPTION("Baycom epp amateur radio modem driver"); 1178 MODULE_LICENSE("GPL"); 1179 1180 /* --------------------------------------------------------------------- */ 1181 1182 static void __init baycom_epp_dev_setup(struct net_device *dev) 1183 { 1184 struct baycom_state *bc = netdev_priv(dev); 1185 1186 /* 1187 * initialize part of the baycom_state struct 1188 */ 1189 bc->dev = dev; 1190 bc->magic = BAYCOM_MAGIC; 1191 bc->cfg.fclk = 19666600; 1192 bc->cfg.bps = 9600; 1193 /* 1194 * initialize part of the device struct 1195 */ 1196 baycom_probe(dev); 1197 } 1198 1199 static int __init init_baycomepp(void) 1200 { 1201 int i, found = 0; 1202 char set_hw = 1; 1203 1204 printk(bc_drvinfo); 1205 /* 1206 * register net devices 1207 */ 1208 for (i = 0; i < NR_PORTS; i++) { 1209 struct net_device *dev; 1210 1211 dev = alloc_netdev(sizeof(struct baycom_state), "bce%d", 1212 NET_NAME_UNKNOWN, baycom_epp_dev_setup); 1213 1214 if (!dev) { 1215 printk(KERN_WARNING "bce%d : out of memory\n", i); 1216 return found ? 0 : -ENOMEM; 1217 } 1218 1219 sprintf(dev->name, "bce%d", i); 1220 dev->base_addr = iobase[i]; 1221 1222 if (!mode[i]) 1223 set_hw = 0; 1224 if (!set_hw) 1225 iobase[i] = 0; 1226 1227 if (register_netdev(dev)) { 1228 printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name); 1229 free_netdev(dev); 1230 break; 1231 } 1232 if (set_hw && baycom_setmode(netdev_priv(dev), mode[i])) 1233 set_hw = 0; 1234 baycom_device[i] = dev; 1235 found++; 1236 } 1237 1238 return found ? 0 : -ENXIO; 1239 } 1240 1241 static void __exit cleanup_baycomepp(void) 1242 { 1243 int i; 1244 1245 for(i = 0; i < NR_PORTS; i++) { 1246 struct net_device *dev = baycom_device[i]; 1247 1248 if (dev) { 1249 struct baycom_state *bc = netdev_priv(dev); 1250 if (bc->magic == BAYCOM_MAGIC) { 1251 unregister_netdev(dev); 1252 free_netdev(dev); 1253 } else 1254 printk(paranoia_str, "cleanup_module"); 1255 } 1256 } 1257 } 1258 1259 module_init(init_baycomepp); 1260 module_exit(cleanup_baycomepp); 1261 1262 /* --------------------------------------------------------------------- */ 1263 1264 #ifndef MODULE 1265 1266 /* 1267 * format: baycom_epp=io,mode 1268 * mode: fpga config options 1269 */ 1270 1271 static int __init baycom_epp_setup(char *str) 1272 { 1273 static unsigned __initdata nr_dev = 0; 1274 int ints[2]; 1275 1276 if (nr_dev >= NR_PORTS) 1277 return 0; 1278 str = get_options(str, 2, ints); 1279 if (ints[0] < 1) 1280 return 0; 1281 mode[nr_dev] = str; 1282 iobase[nr_dev] = ints[1]; 1283 nr_dev++; 1284 return 1; 1285 } 1286 1287 __setup("baycom_epp=", baycom_epp_setup); 1288 1289 #endif /* MODULE */ 1290 /* --------------------------------------------------------------------- */ 1291