1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * PTP 1588 clock using the IXP46X 4 * 5 * Copyright (C) 2010 OMICRON electronics GmbH 6 */ 7 #include <linux/device.h> 8 #include <linux/module.h> 9 #include <linux/mod_devicetable.h> 10 #include <linux/err.h> 11 #include <linux/init.h> 12 #include <linux/interrupt.h> 13 #include <linux/io.h> 14 #include <linux/irq.h> 15 #include <linux/kernel.h> 16 #include <linux/ptp_clock_kernel.h> 17 #include <linux/platform_device.h> 18 #include <linux/soc/ixp4xx/cpu.h> 19 20 #include "ixp46x_ts.h" 21 22 #define DRIVER "ptp_ixp46x" 23 #define N_EXT_TS 2 24 25 struct ixp_clock { 26 struct ixp46x_ts_regs *regs; 27 struct ptp_clock *ptp_clock; 28 struct ptp_clock_info caps; 29 int exts0_enabled; 30 int exts1_enabled; 31 int slave_irq; 32 int master_irq; 33 }; 34 35 static DEFINE_SPINLOCK(register_lock); 36 37 /* 38 * Register access functions 39 */ 40 41 static u64 ixp_systime_read(struct ixp46x_ts_regs *regs) 42 { 43 u64 ns; 44 u32 lo, hi; 45 46 lo = __raw_readl(®s->systime_lo); 47 hi = __raw_readl(®s->systime_hi); 48 49 ns = ((u64) hi) << 32; 50 ns |= lo; 51 ns <<= TICKS_NS_SHIFT; 52 53 return ns; 54 } 55 56 static void ixp_systime_write(struct ixp46x_ts_regs *regs, u64 ns) 57 { 58 u32 hi, lo; 59 60 ns >>= TICKS_NS_SHIFT; 61 hi = ns >> 32; 62 lo = ns & 0xffffffff; 63 64 __raw_writel(lo, ®s->systime_lo); 65 __raw_writel(hi, ®s->systime_hi); 66 } 67 68 /* 69 * Interrupt service routine 70 */ 71 72 static irqreturn_t isr(int irq, void *priv) 73 { 74 struct ixp_clock *ixp_clock = priv; 75 struct ixp46x_ts_regs *regs = ixp_clock->regs; 76 struct ptp_clock_event event; 77 u32 ack = 0, lo, hi, val; 78 79 val = __raw_readl(®s->event); 80 81 if (val & TSER_SNS) { 82 ack |= TSER_SNS; 83 if (ixp_clock->exts0_enabled) { 84 hi = __raw_readl(®s->asms_hi); 85 lo = __raw_readl(®s->asms_lo); 86 event.type = PTP_CLOCK_EXTTS; 87 event.index = 0; 88 event.timestamp = ((u64) hi) << 32; 89 event.timestamp |= lo; 90 event.timestamp <<= TICKS_NS_SHIFT; 91 ptp_clock_event(ixp_clock->ptp_clock, &event); 92 } 93 } 94 95 if (val & TSER_SNM) { 96 ack |= TSER_SNM; 97 if (ixp_clock->exts1_enabled) { 98 hi = __raw_readl(®s->amms_hi); 99 lo = __raw_readl(®s->amms_lo); 100 event.type = PTP_CLOCK_EXTTS; 101 event.index = 1; 102 event.timestamp = ((u64) hi) << 32; 103 event.timestamp |= lo; 104 event.timestamp <<= TICKS_NS_SHIFT; 105 ptp_clock_event(ixp_clock->ptp_clock, &event); 106 } 107 } 108 109 if (val & TTIPEND) 110 ack |= TTIPEND; /* this bit seems to be always set */ 111 112 if (ack) { 113 __raw_writel(ack, ®s->event); 114 return IRQ_HANDLED; 115 } else 116 return IRQ_NONE; 117 } 118 119 /* 120 * PTP clock operations 121 */ 122 123 static int ptp_ixp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 124 { 125 u64 adj; 126 u32 diff, addend; 127 int neg_adj = 0; 128 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 129 struct ixp46x_ts_regs *regs = ixp_clock->regs; 130 131 if (ppb < 0) { 132 neg_adj = 1; 133 ppb = -ppb; 134 } 135 addend = DEFAULT_ADDEND; 136 adj = addend; 137 adj *= ppb; 138 diff = div_u64(adj, 1000000000ULL); 139 140 addend = neg_adj ? addend - diff : addend + diff; 141 142 __raw_writel(addend, ®s->addend); 143 144 return 0; 145 } 146 147 static int ptp_ixp_adjtime(struct ptp_clock_info *ptp, s64 delta) 148 { 149 s64 now; 150 unsigned long flags; 151 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 152 struct ixp46x_ts_regs *regs = ixp_clock->regs; 153 154 spin_lock_irqsave(®ister_lock, flags); 155 156 now = ixp_systime_read(regs); 157 now += delta; 158 ixp_systime_write(regs, now); 159 160 spin_unlock_irqrestore(®ister_lock, flags); 161 162 return 0; 163 } 164 165 static int ptp_ixp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) 166 { 167 u64 ns; 168 unsigned long flags; 169 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 170 struct ixp46x_ts_regs *regs = ixp_clock->regs; 171 172 spin_lock_irqsave(®ister_lock, flags); 173 174 ns = ixp_systime_read(regs); 175 176 spin_unlock_irqrestore(®ister_lock, flags); 177 178 *ts = ns_to_timespec64(ns); 179 return 0; 180 } 181 182 static int ptp_ixp_settime(struct ptp_clock_info *ptp, 183 const struct timespec64 *ts) 184 { 185 u64 ns; 186 unsigned long flags; 187 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 188 struct ixp46x_ts_regs *regs = ixp_clock->regs; 189 190 ns = timespec64_to_ns(ts); 191 192 spin_lock_irqsave(®ister_lock, flags); 193 194 ixp_systime_write(regs, ns); 195 196 spin_unlock_irqrestore(®ister_lock, flags); 197 198 return 0; 199 } 200 201 static int ptp_ixp_enable(struct ptp_clock_info *ptp, 202 struct ptp_clock_request *rq, int on) 203 { 204 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 205 206 switch (rq->type) { 207 case PTP_CLK_REQ_EXTTS: 208 switch (rq->extts.index) { 209 case 0: 210 ixp_clock->exts0_enabled = on ? 1 : 0; 211 break; 212 case 1: 213 ixp_clock->exts1_enabled = on ? 1 : 0; 214 break; 215 default: 216 return -EINVAL; 217 } 218 return 0; 219 default: 220 break; 221 } 222 223 return -EOPNOTSUPP; 224 } 225 226 static const struct ptp_clock_info ptp_ixp_caps = { 227 .owner = THIS_MODULE, 228 .name = "IXP46X timer", 229 .max_adj = 66666655, 230 .n_ext_ts = N_EXT_TS, 231 .n_pins = 0, 232 .pps = 0, 233 .adjfreq = ptp_ixp_adjfreq, 234 .adjtime = ptp_ixp_adjtime, 235 .gettime64 = ptp_ixp_gettime, 236 .settime64 = ptp_ixp_settime, 237 .enable = ptp_ixp_enable, 238 }; 239 240 /* module operations */ 241 242 static struct ixp_clock ixp_clock; 243 244 int ixp46x_ptp_find(struct ixp46x_ts_regs *__iomem *regs, int *phc_index) 245 { 246 *regs = ixp_clock.regs; 247 *phc_index = ptp_clock_index(ixp_clock.ptp_clock); 248 249 if (!ixp_clock.ptp_clock) 250 return -EPROBE_DEFER; 251 252 return 0; 253 } 254 EXPORT_SYMBOL_GPL(ixp46x_ptp_find); 255 256 /* Called from the registered devm action */ 257 static void ptp_ixp_unregister_action(void *d) 258 { 259 struct ptp_clock *ptp_clock = d; 260 261 ptp_clock_unregister(ptp_clock); 262 ixp_clock.ptp_clock = NULL; 263 } 264 265 static int ptp_ixp_probe(struct platform_device *pdev) 266 { 267 struct device *dev = &pdev->dev; 268 int ret; 269 270 ixp_clock.regs = devm_platform_ioremap_resource(pdev, 0); 271 ixp_clock.master_irq = platform_get_irq(pdev, 0); 272 ixp_clock.slave_irq = platform_get_irq(pdev, 1); 273 if (IS_ERR(ixp_clock.regs) || 274 ixp_clock.master_irq < 0 || ixp_clock.slave_irq < 0) 275 return -ENXIO; 276 277 ixp_clock.caps = ptp_ixp_caps; 278 279 ixp_clock.ptp_clock = ptp_clock_register(&ixp_clock.caps, NULL); 280 281 if (IS_ERR(ixp_clock.ptp_clock)) 282 return PTR_ERR(ixp_clock.ptp_clock); 283 284 ret = devm_add_action_or_reset(dev, ptp_ixp_unregister_action, 285 ixp_clock.ptp_clock); 286 if (ret) { 287 dev_err(dev, "failed to install clock removal handler\n"); 288 return ret; 289 } 290 291 __raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend); 292 __raw_writel(1, &ixp_clock.regs->trgt_lo); 293 __raw_writel(0, &ixp_clock.regs->trgt_hi); 294 __raw_writel(TTIPEND, &ixp_clock.regs->event); 295 296 ret = devm_request_irq(dev, ixp_clock.master_irq, isr, 297 0, DRIVER, &ixp_clock); 298 if (ret) 299 return dev_err_probe(dev, ret, 300 "request_irq failed for irq %d\n", 301 ixp_clock.master_irq); 302 303 ret = devm_request_irq(dev, ixp_clock.slave_irq, isr, 304 0, DRIVER, &ixp_clock); 305 if (ret) 306 return dev_err_probe(dev, ret, 307 "request_irq failed for irq %d\n", 308 ixp_clock.slave_irq); 309 310 return 0; 311 } 312 313 static const struct of_device_id ptp_ixp_match[] = { 314 { 315 .compatible = "intel,ixp46x-ptp-timer", 316 }, 317 { }, 318 }; 319 320 static struct platform_driver ptp_ixp_driver = { 321 .driver = { 322 .name = "ptp-ixp46x", 323 .of_match_table = ptp_ixp_match, 324 .suppress_bind_attrs = true, 325 }, 326 .probe = ptp_ixp_probe, 327 }; 328 module_platform_driver(ptp_ixp_driver); 329 330 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>"); 331 MODULE_DESCRIPTION("PTP clock using the IXP46X timer"); 332 MODULE_LICENSE("GPL"); 333