1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * PTP 1588 clock using the IXP46X
4  *
5  * Copyright (C) 2010 OMICRON electronics GmbH
6  */
7 #include <linux/device.h>
8 #include <linux/err.h>
9 #include <linux/gpio.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/io.h>
13 #include <linux/irq.h>
14 #include <linux/kernel.h>
15 #include <linux/ptp_clock_kernel.h>
16 #include <linux/soc/ixp4xx/cpu.h>
17 
18 #include "ixp46x_ts.h"
19 
20 #define DRIVER		"ptp_ixp46x"
21 #define N_EXT_TS	2
22 #define MASTER_GPIO	8
23 #define MASTER_IRQ	25
24 #define SLAVE_GPIO	7
25 #define SLAVE_IRQ	24
26 
27 struct ixp_clock {
28 	struct ixp46x_ts_regs *regs;
29 	struct ptp_clock *ptp_clock;
30 	struct ptp_clock_info caps;
31 	int exts0_enabled;
32 	int exts1_enabled;
33 };
34 
35 DEFINE_SPINLOCK(register_lock);
36 
37 /*
38  * Register access functions
39  */
40 
41 static u64 ixp_systime_read(struct ixp46x_ts_regs *regs)
42 {
43 	u64 ns;
44 	u32 lo, hi;
45 
46 	lo = __raw_readl(&regs->systime_lo);
47 	hi = __raw_readl(&regs->systime_hi);
48 
49 	ns = ((u64) hi) << 32;
50 	ns |= lo;
51 	ns <<= TICKS_NS_SHIFT;
52 
53 	return ns;
54 }
55 
56 static void ixp_systime_write(struct ixp46x_ts_regs *regs, u64 ns)
57 {
58 	u32 hi, lo;
59 
60 	ns >>= TICKS_NS_SHIFT;
61 	hi = ns >> 32;
62 	lo = ns & 0xffffffff;
63 
64 	__raw_writel(lo, &regs->systime_lo);
65 	__raw_writel(hi, &regs->systime_hi);
66 }
67 
68 /*
69  * Interrupt service routine
70  */
71 
72 static irqreturn_t isr(int irq, void *priv)
73 {
74 	struct ixp_clock *ixp_clock = priv;
75 	struct ixp46x_ts_regs *regs = ixp_clock->regs;
76 	struct ptp_clock_event event;
77 	u32 ack = 0, lo, hi, val;
78 
79 	val = __raw_readl(&regs->event);
80 
81 	if (val & TSER_SNS) {
82 		ack |= TSER_SNS;
83 		if (ixp_clock->exts0_enabled) {
84 			hi = __raw_readl(&regs->asms_hi);
85 			lo = __raw_readl(&regs->asms_lo);
86 			event.type = PTP_CLOCK_EXTTS;
87 			event.index = 0;
88 			event.timestamp = ((u64) hi) << 32;
89 			event.timestamp |= lo;
90 			event.timestamp <<= TICKS_NS_SHIFT;
91 			ptp_clock_event(ixp_clock->ptp_clock, &event);
92 		}
93 	}
94 
95 	if (val & TSER_SNM) {
96 		ack |= TSER_SNM;
97 		if (ixp_clock->exts1_enabled) {
98 			hi = __raw_readl(&regs->amms_hi);
99 			lo = __raw_readl(&regs->amms_lo);
100 			event.type = PTP_CLOCK_EXTTS;
101 			event.index = 1;
102 			event.timestamp = ((u64) hi) << 32;
103 			event.timestamp |= lo;
104 			event.timestamp <<= TICKS_NS_SHIFT;
105 			ptp_clock_event(ixp_clock->ptp_clock, &event);
106 		}
107 	}
108 
109 	if (val & TTIPEND)
110 		ack |= TTIPEND; /* this bit seems to be always set */
111 
112 	if (ack) {
113 		__raw_writel(ack, &regs->event);
114 		return IRQ_HANDLED;
115 	} else
116 		return IRQ_NONE;
117 }
118 
119 /*
120  * PTP clock operations
121  */
122 
123 static int ptp_ixp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
124 {
125 	u64 adj;
126 	u32 diff, addend;
127 	int neg_adj = 0;
128 	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
129 	struct ixp46x_ts_regs *regs = ixp_clock->regs;
130 
131 	if (ppb < 0) {
132 		neg_adj = 1;
133 		ppb = -ppb;
134 	}
135 	addend = DEFAULT_ADDEND;
136 	adj = addend;
137 	adj *= ppb;
138 	diff = div_u64(adj, 1000000000ULL);
139 
140 	addend = neg_adj ? addend - diff : addend + diff;
141 
142 	__raw_writel(addend, &regs->addend);
143 
144 	return 0;
145 }
146 
147 static int ptp_ixp_adjtime(struct ptp_clock_info *ptp, s64 delta)
148 {
149 	s64 now;
150 	unsigned long flags;
151 	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
152 	struct ixp46x_ts_regs *regs = ixp_clock->regs;
153 
154 	spin_lock_irqsave(&register_lock, flags);
155 
156 	now = ixp_systime_read(regs);
157 	now += delta;
158 	ixp_systime_write(regs, now);
159 
160 	spin_unlock_irqrestore(&register_lock, flags);
161 
162 	return 0;
163 }
164 
165 static int ptp_ixp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
166 {
167 	u64 ns;
168 	unsigned long flags;
169 	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
170 	struct ixp46x_ts_regs *regs = ixp_clock->regs;
171 
172 	spin_lock_irqsave(&register_lock, flags);
173 
174 	ns = ixp_systime_read(regs);
175 
176 	spin_unlock_irqrestore(&register_lock, flags);
177 
178 	*ts = ns_to_timespec64(ns);
179 	return 0;
180 }
181 
182 static int ptp_ixp_settime(struct ptp_clock_info *ptp,
183 			   const struct timespec64 *ts)
184 {
185 	u64 ns;
186 	unsigned long flags;
187 	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
188 	struct ixp46x_ts_regs *regs = ixp_clock->regs;
189 
190 	ns = timespec64_to_ns(ts);
191 
192 	spin_lock_irqsave(&register_lock, flags);
193 
194 	ixp_systime_write(regs, ns);
195 
196 	spin_unlock_irqrestore(&register_lock, flags);
197 
198 	return 0;
199 }
200 
201 static int ptp_ixp_enable(struct ptp_clock_info *ptp,
202 			  struct ptp_clock_request *rq, int on)
203 {
204 	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
205 
206 	switch (rq->type) {
207 	case PTP_CLK_REQ_EXTTS:
208 		switch (rq->extts.index) {
209 		case 0:
210 			ixp_clock->exts0_enabled = on ? 1 : 0;
211 			break;
212 		case 1:
213 			ixp_clock->exts1_enabled = on ? 1 : 0;
214 			break;
215 		default:
216 			return -EINVAL;
217 		}
218 		return 0;
219 	default:
220 		break;
221 	}
222 
223 	return -EOPNOTSUPP;
224 }
225 
226 static const struct ptp_clock_info ptp_ixp_caps = {
227 	.owner		= THIS_MODULE,
228 	.name		= "IXP46X timer",
229 	.max_adj	= 66666655,
230 	.n_ext_ts	= N_EXT_TS,
231 	.n_pins		= 0,
232 	.pps		= 0,
233 	.adjfreq	= ptp_ixp_adjfreq,
234 	.adjtime	= ptp_ixp_adjtime,
235 	.gettime64	= ptp_ixp_gettime,
236 	.settime64	= ptp_ixp_settime,
237 	.enable		= ptp_ixp_enable,
238 };
239 
240 /* module operations */
241 
242 static struct ixp_clock ixp_clock;
243 
244 static int setup_interrupt(int gpio)
245 {
246 	int irq;
247 	int err;
248 
249 	err = gpio_request(gpio, "ixp4-ptp");
250 	if (err)
251 		return err;
252 
253 	err = gpio_direction_input(gpio);
254 	if (err)
255 		return err;
256 
257 	irq = gpio_to_irq(gpio);
258 	if (irq < 0)
259 		return irq;
260 
261 	err = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
262 	if (err) {
263 		pr_err("cannot set trigger type for irq %d\n", irq);
264 		return err;
265 	}
266 
267 	err = request_irq(irq, isr, 0, DRIVER, &ixp_clock);
268 	if (err) {
269 		pr_err("request_irq failed for irq %d\n", irq);
270 		return err;
271 	}
272 
273 	return irq;
274 }
275 
276 static void __exit ptp_ixp_exit(void)
277 {
278 	free_irq(MASTER_IRQ, &ixp_clock);
279 	free_irq(SLAVE_IRQ, &ixp_clock);
280 	ixp46x_phc_index = -1;
281 	ptp_clock_unregister(ixp_clock.ptp_clock);
282 }
283 
284 static int __init ptp_ixp_init(void)
285 {
286 	if (!cpu_is_ixp46x())
287 		return -ENODEV;
288 
289 	ixp_clock.regs =
290 		(struct ixp46x_ts_regs __iomem *) IXP4XX_TIMESYNC_BASE_VIRT;
291 
292 	ixp_clock.caps = ptp_ixp_caps;
293 
294 	ixp_clock.ptp_clock = ptp_clock_register(&ixp_clock.caps, NULL);
295 
296 	if (IS_ERR(ixp_clock.ptp_clock))
297 		return PTR_ERR(ixp_clock.ptp_clock);
298 
299 	ixp46x_phc_index = ptp_clock_index(ixp_clock.ptp_clock);
300 
301 	__raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend);
302 	__raw_writel(1, &ixp_clock.regs->trgt_lo);
303 	__raw_writel(0, &ixp_clock.regs->trgt_hi);
304 	__raw_writel(TTIPEND, &ixp_clock.regs->event);
305 
306 	if (MASTER_IRQ != setup_interrupt(MASTER_GPIO)) {
307 		pr_err("failed to setup gpio %d as irq\n", MASTER_GPIO);
308 		goto no_master;
309 	}
310 	if (SLAVE_IRQ != setup_interrupt(SLAVE_GPIO)) {
311 		pr_err("failed to setup gpio %d as irq\n", SLAVE_GPIO);
312 		goto no_slave;
313 	}
314 
315 	return 0;
316 no_slave:
317 	free_irq(MASTER_IRQ, &ixp_clock);
318 no_master:
319 	ptp_clock_unregister(ixp_clock.ptp_clock);
320 	return -ENODEV;
321 }
322 
323 module_init(ptp_ixp_init);
324 module_exit(ptp_ixp_exit);
325 
326 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
327 MODULE_DESCRIPTION("PTP clock using the IXP46X timer");
328 MODULE_LICENSE("GPL");
329