1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * PTP 1588 clock using the IXP46X 4 * 5 * Copyright (C) 2010 OMICRON electronics GmbH 6 */ 7 #include <linux/device.h> 8 #include <linux/module.h> 9 #include <linux/mod_devicetable.h> 10 #include <linux/err.h> 11 #include <linux/init.h> 12 #include <linux/interrupt.h> 13 #include <linux/io.h> 14 #include <linux/irq.h> 15 #include <linux/kernel.h> 16 #include <linux/ptp_clock_kernel.h> 17 #include <linux/platform_device.h> 18 #include <linux/soc/ixp4xx/cpu.h> 19 #include <linux/module.h> 20 #include <mach/ixp4xx-regs.h> 21 22 #include "ixp46x_ts.h" 23 24 #define DRIVER "ptp_ixp46x" 25 #define N_EXT_TS 2 26 27 struct ixp_clock { 28 struct ixp46x_ts_regs *regs; 29 struct ptp_clock *ptp_clock; 30 struct ptp_clock_info caps; 31 int exts0_enabled; 32 int exts1_enabled; 33 int slave_irq; 34 int master_irq; 35 }; 36 37 static DEFINE_SPINLOCK(register_lock); 38 39 /* 40 * Register access functions 41 */ 42 43 static u64 ixp_systime_read(struct ixp46x_ts_regs *regs) 44 { 45 u64 ns; 46 u32 lo, hi; 47 48 lo = __raw_readl(®s->systime_lo); 49 hi = __raw_readl(®s->systime_hi); 50 51 ns = ((u64) hi) << 32; 52 ns |= lo; 53 ns <<= TICKS_NS_SHIFT; 54 55 return ns; 56 } 57 58 static void ixp_systime_write(struct ixp46x_ts_regs *regs, u64 ns) 59 { 60 u32 hi, lo; 61 62 ns >>= TICKS_NS_SHIFT; 63 hi = ns >> 32; 64 lo = ns & 0xffffffff; 65 66 __raw_writel(lo, ®s->systime_lo); 67 __raw_writel(hi, ®s->systime_hi); 68 } 69 70 /* 71 * Interrupt service routine 72 */ 73 74 static irqreturn_t isr(int irq, void *priv) 75 { 76 struct ixp_clock *ixp_clock = priv; 77 struct ixp46x_ts_regs *regs = ixp_clock->regs; 78 struct ptp_clock_event event; 79 u32 ack = 0, lo, hi, val; 80 81 val = __raw_readl(®s->event); 82 83 if (val & TSER_SNS) { 84 ack |= TSER_SNS; 85 if (ixp_clock->exts0_enabled) { 86 hi = __raw_readl(®s->asms_hi); 87 lo = __raw_readl(®s->asms_lo); 88 event.type = PTP_CLOCK_EXTTS; 89 event.index = 0; 90 event.timestamp = ((u64) hi) << 32; 91 event.timestamp |= lo; 92 event.timestamp <<= TICKS_NS_SHIFT; 93 ptp_clock_event(ixp_clock->ptp_clock, &event); 94 } 95 } 96 97 if (val & TSER_SNM) { 98 ack |= TSER_SNM; 99 if (ixp_clock->exts1_enabled) { 100 hi = __raw_readl(®s->amms_hi); 101 lo = __raw_readl(®s->amms_lo); 102 event.type = PTP_CLOCK_EXTTS; 103 event.index = 1; 104 event.timestamp = ((u64) hi) << 32; 105 event.timestamp |= lo; 106 event.timestamp <<= TICKS_NS_SHIFT; 107 ptp_clock_event(ixp_clock->ptp_clock, &event); 108 } 109 } 110 111 if (val & TTIPEND) 112 ack |= TTIPEND; /* this bit seems to be always set */ 113 114 if (ack) { 115 __raw_writel(ack, ®s->event); 116 return IRQ_HANDLED; 117 } else 118 return IRQ_NONE; 119 } 120 121 /* 122 * PTP clock operations 123 */ 124 125 static int ptp_ixp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 126 { 127 u64 adj; 128 u32 diff, addend; 129 int neg_adj = 0; 130 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 131 struct ixp46x_ts_regs *regs = ixp_clock->regs; 132 133 if (ppb < 0) { 134 neg_adj = 1; 135 ppb = -ppb; 136 } 137 addend = DEFAULT_ADDEND; 138 adj = addend; 139 adj *= ppb; 140 diff = div_u64(adj, 1000000000ULL); 141 142 addend = neg_adj ? addend - diff : addend + diff; 143 144 __raw_writel(addend, ®s->addend); 145 146 return 0; 147 } 148 149 static int ptp_ixp_adjtime(struct ptp_clock_info *ptp, s64 delta) 150 { 151 s64 now; 152 unsigned long flags; 153 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 154 struct ixp46x_ts_regs *regs = ixp_clock->regs; 155 156 spin_lock_irqsave(®ister_lock, flags); 157 158 now = ixp_systime_read(regs); 159 now += delta; 160 ixp_systime_write(regs, now); 161 162 spin_unlock_irqrestore(®ister_lock, flags); 163 164 return 0; 165 } 166 167 static int ptp_ixp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) 168 { 169 u64 ns; 170 unsigned long flags; 171 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 172 struct ixp46x_ts_regs *regs = ixp_clock->regs; 173 174 spin_lock_irqsave(®ister_lock, flags); 175 176 ns = ixp_systime_read(regs); 177 178 spin_unlock_irqrestore(®ister_lock, flags); 179 180 *ts = ns_to_timespec64(ns); 181 return 0; 182 } 183 184 static int ptp_ixp_settime(struct ptp_clock_info *ptp, 185 const struct timespec64 *ts) 186 { 187 u64 ns; 188 unsigned long flags; 189 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 190 struct ixp46x_ts_regs *regs = ixp_clock->regs; 191 192 ns = timespec64_to_ns(ts); 193 194 spin_lock_irqsave(®ister_lock, flags); 195 196 ixp_systime_write(regs, ns); 197 198 spin_unlock_irqrestore(®ister_lock, flags); 199 200 return 0; 201 } 202 203 static int ptp_ixp_enable(struct ptp_clock_info *ptp, 204 struct ptp_clock_request *rq, int on) 205 { 206 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 207 208 switch (rq->type) { 209 case PTP_CLK_REQ_EXTTS: 210 switch (rq->extts.index) { 211 case 0: 212 ixp_clock->exts0_enabled = on ? 1 : 0; 213 break; 214 case 1: 215 ixp_clock->exts1_enabled = on ? 1 : 0; 216 break; 217 default: 218 return -EINVAL; 219 } 220 return 0; 221 default: 222 break; 223 } 224 225 return -EOPNOTSUPP; 226 } 227 228 static const struct ptp_clock_info ptp_ixp_caps = { 229 .owner = THIS_MODULE, 230 .name = "IXP46X timer", 231 .max_adj = 66666655, 232 .n_ext_ts = N_EXT_TS, 233 .n_pins = 0, 234 .pps = 0, 235 .adjfreq = ptp_ixp_adjfreq, 236 .adjtime = ptp_ixp_adjtime, 237 .gettime64 = ptp_ixp_gettime, 238 .settime64 = ptp_ixp_settime, 239 .enable = ptp_ixp_enable, 240 }; 241 242 /* module operations */ 243 244 static struct ixp_clock ixp_clock; 245 246 int ixp46x_ptp_find(struct ixp46x_ts_regs *__iomem *regs, int *phc_index) 247 { 248 *regs = ixp_clock.regs; 249 *phc_index = ptp_clock_index(ixp_clock.ptp_clock); 250 251 if (!ixp_clock.ptp_clock) 252 return -EPROBE_DEFER; 253 254 return 0; 255 } 256 EXPORT_SYMBOL_GPL(ixp46x_ptp_find); 257 258 /* Called from the registered devm action */ 259 static void ptp_ixp_unregister_action(void *d) 260 { 261 struct ptp_clock *ptp_clock = d; 262 263 ptp_clock_unregister(ptp_clock); 264 ixp_clock.ptp_clock = NULL; 265 } 266 267 static int ptp_ixp_probe(struct platform_device *pdev) 268 { 269 struct device *dev = &pdev->dev; 270 int ret; 271 272 ixp_clock.regs = devm_platform_ioremap_resource(pdev, 0); 273 ixp_clock.master_irq = platform_get_irq(pdev, 0); 274 ixp_clock.slave_irq = platform_get_irq(pdev, 1); 275 if (IS_ERR(ixp_clock.regs) || 276 !ixp_clock.master_irq || !ixp_clock.slave_irq) 277 return -ENXIO; 278 279 ixp_clock.caps = ptp_ixp_caps; 280 281 ixp_clock.ptp_clock = ptp_clock_register(&ixp_clock.caps, NULL); 282 283 if (IS_ERR(ixp_clock.ptp_clock)) 284 return PTR_ERR(ixp_clock.ptp_clock); 285 286 ret = devm_add_action_or_reset(dev, ptp_ixp_unregister_action, 287 ixp_clock.ptp_clock); 288 if (ret) { 289 dev_err(dev, "failed to install clock removal handler\n"); 290 return ret; 291 } 292 293 __raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend); 294 __raw_writel(1, &ixp_clock.regs->trgt_lo); 295 __raw_writel(0, &ixp_clock.regs->trgt_hi); 296 __raw_writel(TTIPEND, &ixp_clock.regs->event); 297 298 ret = devm_request_irq(dev, ixp_clock.master_irq, isr, 299 0, DRIVER, &ixp_clock); 300 if (ret) 301 return dev_err_probe(dev, ret, 302 "request_irq failed for irq %d\n", 303 ixp_clock.master_irq); 304 305 ret = devm_request_irq(dev, ixp_clock.slave_irq, isr, 306 0, DRIVER, &ixp_clock); 307 if (ret) 308 return dev_err_probe(dev, ret, 309 "request_irq failed for irq %d\n", 310 ixp_clock.slave_irq); 311 312 return 0; 313 } 314 315 static const struct of_device_id ptp_ixp_match[] = { 316 { 317 .compatible = "intel,ixp46x-ptp-timer", 318 }, 319 { }, 320 }; 321 322 static struct platform_driver ptp_ixp_driver = { 323 .driver = { 324 .name = "ptp-ixp46x", 325 .of_match_table = ptp_ixp_match, 326 .suppress_bind_attrs = true, 327 }, 328 .probe = ptp_ixp_probe, 329 }; 330 module_platform_driver(ptp_ixp_driver); 331 332 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>"); 333 MODULE_DESCRIPTION("PTP clock using the IXP46X timer"); 334 MODULE_LICENSE("GPL"); 335