1 /* 2 * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device. 3 * 4 * This is a new flat driver which is based on the original emac_lite 5 * driver from John Williams <john.williams@xilinx.com>. 6 * 7 * 2007 - 2013 (c) Xilinx, Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 15 #include <linux/module.h> 16 #include <linux/uaccess.h> 17 #include <linux/init.h> 18 #include <linux/netdevice.h> 19 #include <linux/etherdevice.h> 20 #include <linux/skbuff.h> 21 #include <linux/io.h> 22 #include <linux/slab.h> 23 #include <linux/of_address.h> 24 #include <linux/of_device.h> 25 #include <linux/of_platform.h> 26 #include <linux/of_mdio.h> 27 #include <linux/of_net.h> 28 #include <linux/phy.h> 29 #include <linux/interrupt.h> 30 31 #define DRIVER_NAME "xilinx_emaclite" 32 33 /* Register offsets for the EmacLite Core */ 34 #define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */ 35 #define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */ 36 #define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */ 37 #define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */ 38 #define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */ 39 #define XEL_GIER_OFFSET 0x07F8 /* GIE Register */ 40 #define XEL_TSR_OFFSET 0x07FC /* Tx status */ 41 #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ 42 43 #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ 44 #define XEL_RPLR_OFFSET 0x100C /* Rx packet length */ 45 #define XEL_RSR_OFFSET 0x17FC /* Rx status */ 46 47 #define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */ 48 49 /* MDIO Address Register Bit Masks */ 50 #define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */ 51 #define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */ 52 #define XEL_MDIOADDR_PHYADR_SHIFT 5 53 #define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */ 54 55 /* MDIO Write Data Register Bit Masks */ 56 #define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */ 57 58 /* MDIO Read Data Register Bit Masks */ 59 #define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */ 60 61 /* MDIO Control Register Bit Masks */ 62 #define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */ 63 #define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */ 64 65 /* Global Interrupt Enable Register (GIER) Bit Masks */ 66 #define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */ 67 68 /* Transmit Status Register (TSR) Bit Masks */ 69 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */ 70 #define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */ 71 #define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */ 72 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit 73 * only. This is not documented 74 * in the HW spec */ 75 76 /* Define for programming the MAC address into the EmacLite */ 77 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) 78 79 /* Receive Status Register (RSR) */ 80 #define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */ 81 #define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */ 82 83 /* Transmit Packet Length Register (TPLR) */ 84 #define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */ 85 86 /* Receive Packet Length Register (RPLR) */ 87 #define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */ 88 89 #define XEL_HEADER_OFFSET 12 /* Offset to length field */ 90 #define XEL_HEADER_SHIFT 16 /* Shift value for length */ 91 92 /* General Ethernet Definitions */ 93 #define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */ 94 #define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */ 95 96 97 98 #define TX_TIMEOUT (60*HZ) /* Tx timeout is 60 seconds. */ 99 #define ALIGNMENT 4 100 101 /* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */ 102 #define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT) 103 104 /** 105 * struct net_local - Our private per device data 106 * @ndev: instance of the network device 107 * @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW 108 * @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW 109 * @next_tx_buf_to_use: next Tx buffer to write to 110 * @next_rx_buf_to_use: next Rx buffer to read from 111 * @base_addr: base address of the Emaclite device 112 * @reset_lock: lock used for synchronization 113 * @deferred_skb: holds an skb (for transmission at a later time) when the 114 * Tx buffer is not free 115 * @phy_dev: pointer to the PHY device 116 * @phy_node: pointer to the PHY device node 117 * @mii_bus: pointer to the MII bus 118 * @mdio_irqs: IRQs table for MDIO bus 119 * @last_link: last link status 120 * @has_mdio: indicates whether MDIO is included in the HW 121 */ 122 struct net_local { 123 124 struct net_device *ndev; 125 126 bool tx_ping_pong; 127 bool rx_ping_pong; 128 u32 next_tx_buf_to_use; 129 u32 next_rx_buf_to_use; 130 void __iomem *base_addr; 131 132 spinlock_t reset_lock; 133 struct sk_buff *deferred_skb; 134 135 struct phy_device *phy_dev; 136 struct device_node *phy_node; 137 138 struct mii_bus *mii_bus; 139 int mdio_irqs[PHY_MAX_ADDR]; 140 141 int last_link; 142 bool has_mdio; 143 }; 144 145 146 /*************************/ 147 /* EmacLite driver calls */ 148 /*************************/ 149 150 /** 151 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device 152 * @drvdata: Pointer to the Emaclite device private data 153 * 154 * This function enables the Tx and Rx interrupts for the Emaclite device along 155 * with the Global Interrupt Enable. 156 */ 157 static void xemaclite_enable_interrupts(struct net_local *drvdata) 158 { 159 u32 reg_data; 160 161 /* Enable the Tx interrupts for the first Buffer */ 162 reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET); 163 __raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK, 164 drvdata->base_addr + XEL_TSR_OFFSET); 165 166 /* Enable the Tx interrupts for the second Buffer if 167 * configured in HW */ 168 if (drvdata->tx_ping_pong != 0) { 169 reg_data = __raw_readl(drvdata->base_addr + 170 XEL_BUFFER_OFFSET + XEL_TSR_OFFSET); 171 __raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK, 172 drvdata->base_addr + XEL_BUFFER_OFFSET + 173 XEL_TSR_OFFSET); 174 } 175 176 /* Enable the Rx interrupts for the first buffer */ 177 __raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET); 178 179 /* Enable the Rx interrupts for the second Buffer if 180 * configured in HW */ 181 if (drvdata->rx_ping_pong != 0) { 182 __raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + 183 XEL_BUFFER_OFFSET + XEL_RSR_OFFSET); 184 } 185 186 /* Enable the Global Interrupt Enable */ 187 __raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET); 188 } 189 190 /** 191 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device 192 * @drvdata: Pointer to the Emaclite device private data 193 * 194 * This function disables the Tx and Rx interrupts for the Emaclite device, 195 * along with the Global Interrupt Enable. 196 */ 197 static void xemaclite_disable_interrupts(struct net_local *drvdata) 198 { 199 u32 reg_data; 200 201 /* Disable the Global Interrupt Enable */ 202 __raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET); 203 204 /* Disable the Tx interrupts for the first buffer */ 205 reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET); 206 __raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK), 207 drvdata->base_addr + XEL_TSR_OFFSET); 208 209 /* Disable the Tx interrupts for the second Buffer 210 * if configured in HW */ 211 if (drvdata->tx_ping_pong != 0) { 212 reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET + 213 XEL_TSR_OFFSET); 214 __raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK), 215 drvdata->base_addr + XEL_BUFFER_OFFSET + 216 XEL_TSR_OFFSET); 217 } 218 219 /* Disable the Rx interrupts for the first buffer */ 220 reg_data = __raw_readl(drvdata->base_addr + XEL_RSR_OFFSET); 221 __raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK), 222 drvdata->base_addr + XEL_RSR_OFFSET); 223 224 /* Disable the Rx interrupts for the second buffer 225 * if configured in HW */ 226 if (drvdata->rx_ping_pong != 0) { 227 228 reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET + 229 XEL_RSR_OFFSET); 230 __raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK), 231 drvdata->base_addr + XEL_BUFFER_OFFSET + 232 XEL_RSR_OFFSET); 233 } 234 } 235 236 /** 237 * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address 238 * @src_ptr: Void pointer to the 16-bit aligned source address 239 * @dest_ptr: Pointer to the 32-bit aligned destination address 240 * @length: Number bytes to write from source to destination 241 * 242 * This function writes data from a 16-bit aligned buffer to a 32-bit aligned 243 * address in the EmacLite device. 244 */ 245 static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr, 246 unsigned length) 247 { 248 u32 align_buffer; 249 u32 *to_u32_ptr; 250 u16 *from_u16_ptr, *to_u16_ptr; 251 252 to_u32_ptr = dest_ptr; 253 from_u16_ptr = src_ptr; 254 align_buffer = 0; 255 256 for (; length > 3; length -= 4) { 257 to_u16_ptr = (u16 *)&align_buffer; 258 *to_u16_ptr++ = *from_u16_ptr++; 259 *to_u16_ptr++ = *from_u16_ptr++; 260 261 /* Output a word */ 262 *to_u32_ptr++ = align_buffer; 263 } 264 if (length) { 265 u8 *from_u8_ptr, *to_u8_ptr; 266 267 /* Set up to output the remaining data */ 268 align_buffer = 0; 269 to_u8_ptr = (u8 *) &align_buffer; 270 from_u8_ptr = (u8 *) from_u16_ptr; 271 272 /* Output the remaining data */ 273 for (; length > 0; length--) 274 *to_u8_ptr++ = *from_u8_ptr++; 275 276 *to_u32_ptr = align_buffer; 277 } 278 } 279 280 /** 281 * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer 282 * @src_ptr: Pointer to the 32-bit aligned source address 283 * @dest_ptr: Pointer to the 16-bit aligned destination address 284 * @length: Number bytes to read from source to destination 285 * 286 * This function reads data from a 32-bit aligned address in the EmacLite device 287 * to a 16-bit aligned buffer. 288 */ 289 static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr, 290 unsigned length) 291 { 292 u16 *to_u16_ptr, *from_u16_ptr; 293 u32 *from_u32_ptr; 294 u32 align_buffer; 295 296 from_u32_ptr = src_ptr; 297 to_u16_ptr = (u16 *) dest_ptr; 298 299 for (; length > 3; length -= 4) { 300 /* Copy each word into the temporary buffer */ 301 align_buffer = *from_u32_ptr++; 302 from_u16_ptr = (u16 *)&align_buffer; 303 304 /* Read data from source */ 305 *to_u16_ptr++ = *from_u16_ptr++; 306 *to_u16_ptr++ = *from_u16_ptr++; 307 } 308 309 if (length) { 310 u8 *to_u8_ptr, *from_u8_ptr; 311 312 /* Set up to read the remaining data */ 313 to_u8_ptr = (u8 *) to_u16_ptr; 314 align_buffer = *from_u32_ptr++; 315 from_u8_ptr = (u8 *) &align_buffer; 316 317 /* Read the remaining data */ 318 for (; length > 0; length--) 319 *to_u8_ptr = *from_u8_ptr; 320 } 321 } 322 323 /** 324 * xemaclite_send_data - Send an Ethernet frame 325 * @drvdata: Pointer to the Emaclite device private data 326 * @data: Pointer to the data to be sent 327 * @byte_count: Total frame size, including header 328 * 329 * This function checks if the Tx buffer of the Emaclite device is free to send 330 * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it 331 * returns an error. 332 * 333 * Return: 0 upon success or -1 if the buffer(s) are full. 334 * 335 * Note: The maximum Tx packet size can not be more than Ethernet header 336 * (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS. 337 */ 338 static int xemaclite_send_data(struct net_local *drvdata, u8 *data, 339 unsigned int byte_count) 340 { 341 u32 reg_data; 342 void __iomem *addr; 343 344 /* Determine the expected Tx buffer address */ 345 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use; 346 347 /* If the length is too large, truncate it */ 348 if (byte_count > ETH_FRAME_LEN) 349 byte_count = ETH_FRAME_LEN; 350 351 /* Check if the expected buffer is available */ 352 reg_data = __raw_readl(addr + XEL_TSR_OFFSET); 353 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | 354 XEL_TSR_XMIT_ACTIVE_MASK)) == 0) { 355 356 /* Switch to next buffer if configured */ 357 if (drvdata->tx_ping_pong != 0) 358 drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET; 359 } else if (drvdata->tx_ping_pong != 0) { 360 /* If the expected buffer is full, try the other buffer, 361 * if it is configured in HW */ 362 363 addr = (void __iomem __force *)((u32 __force)addr ^ 364 XEL_BUFFER_OFFSET); 365 reg_data = __raw_readl(addr + XEL_TSR_OFFSET); 366 367 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | 368 XEL_TSR_XMIT_ACTIVE_MASK)) != 0) 369 return -1; /* Buffers were full, return failure */ 370 } else 371 return -1; /* Buffer was full, return failure */ 372 373 /* Write the frame to the buffer */ 374 xemaclite_aligned_write(data, (u32 __force *) addr, byte_count); 375 376 __raw_writel((byte_count & XEL_TPLR_LENGTH_MASK), 377 addr + XEL_TPLR_OFFSET); 378 379 /* Update the Tx Status Register to indicate that there is a 380 * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which 381 * is used by the interrupt handler to check whether a frame 382 * has been transmitted */ 383 reg_data = __raw_readl(addr + XEL_TSR_OFFSET); 384 reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK); 385 __raw_writel(reg_data, addr + XEL_TSR_OFFSET); 386 387 return 0; 388 } 389 390 /** 391 * xemaclite_recv_data - Receive a frame 392 * @drvdata: Pointer to the Emaclite device private data 393 * @data: Address where the data is to be received 394 * 395 * This function is intended to be called from the interrupt context or 396 * with a wrapper which waits for the receive frame to be available. 397 * 398 * Return: Total number of bytes received 399 */ 400 static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data) 401 { 402 void __iomem *addr; 403 u16 length, proto_type; 404 u32 reg_data; 405 406 /* Determine the expected buffer address */ 407 addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use); 408 409 /* Verify which buffer has valid data */ 410 reg_data = __raw_readl(addr + XEL_RSR_OFFSET); 411 412 if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { 413 if (drvdata->rx_ping_pong != 0) 414 drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET; 415 } else { 416 /* The instance is out of sync, try other buffer if other 417 * buffer is configured, return 0 otherwise. If the instance is 418 * out of sync, do not update the 'next_rx_buf_to_use' since it 419 * will correct on subsequent calls */ 420 if (drvdata->rx_ping_pong != 0) 421 addr = (void __iomem __force *)((u32 __force)addr ^ 422 XEL_BUFFER_OFFSET); 423 else 424 return 0; /* No data was available */ 425 426 /* Verify that buffer has valid data */ 427 reg_data = __raw_readl(addr + XEL_RSR_OFFSET); 428 if ((reg_data & XEL_RSR_RECV_DONE_MASK) != 429 XEL_RSR_RECV_DONE_MASK) 430 return 0; /* No data was available */ 431 } 432 433 /* Get the protocol type of the ethernet frame that arrived */ 434 proto_type = ((ntohl(__raw_readl(addr + XEL_HEADER_OFFSET + 435 XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) & 436 XEL_RPLR_LENGTH_MASK); 437 438 /* Check if received ethernet frame is a raw ethernet frame 439 * or an IP packet or an ARP packet */ 440 if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) { 441 442 if (proto_type == ETH_P_IP) { 443 length = ((ntohl(__raw_readl(addr + 444 XEL_HEADER_IP_LENGTH_OFFSET + 445 XEL_RXBUFF_OFFSET)) >> 446 XEL_HEADER_SHIFT) & 447 XEL_RPLR_LENGTH_MASK); 448 length += ETH_HLEN + ETH_FCS_LEN; 449 450 } else if (proto_type == ETH_P_ARP) 451 length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN; 452 else 453 /* Field contains type other than IP or ARP, use max 454 * frame size and let user parse it */ 455 length = ETH_FRAME_LEN + ETH_FCS_LEN; 456 } else 457 /* Use the length in the frame, plus the header and trailer */ 458 length = proto_type + ETH_HLEN + ETH_FCS_LEN; 459 460 /* Read from the EmacLite device */ 461 xemaclite_aligned_read((u32 __force *) (addr + XEL_RXBUFF_OFFSET), 462 data, length); 463 464 /* Acknowledge the frame */ 465 reg_data = __raw_readl(addr + XEL_RSR_OFFSET); 466 reg_data &= ~XEL_RSR_RECV_DONE_MASK; 467 __raw_writel(reg_data, addr + XEL_RSR_OFFSET); 468 469 return length; 470 } 471 472 /** 473 * xemaclite_update_address - Update the MAC address in the device 474 * @drvdata: Pointer to the Emaclite device private data 475 * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value) 476 * 477 * Tx must be idle and Rx should be idle for deterministic results. 478 * It is recommended that this function should be called after the 479 * initialization and before transmission of any packets from the device. 480 * The MAC address can be programmed using any of the two transmit 481 * buffers (if configured). 482 */ 483 static void xemaclite_update_address(struct net_local *drvdata, 484 u8 *address_ptr) 485 { 486 void __iomem *addr; 487 u32 reg_data; 488 489 /* Determine the expected Tx buffer address */ 490 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use; 491 492 xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN); 493 494 __raw_writel(ETH_ALEN, addr + XEL_TPLR_OFFSET); 495 496 /* Update the MAC address in the EmacLite */ 497 reg_data = __raw_readl(addr + XEL_TSR_OFFSET); 498 __raw_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET); 499 500 /* Wait for EmacLite to finish with the MAC address update */ 501 while ((__raw_readl(addr + XEL_TSR_OFFSET) & 502 XEL_TSR_PROG_MAC_ADDR) != 0) 503 ; 504 } 505 506 /** 507 * xemaclite_set_mac_address - Set the MAC address for this device 508 * @dev: Pointer to the network device instance 509 * @addr: Void pointer to the sockaddr structure 510 * 511 * This function copies the HW address from the sockaddr strucutre to the 512 * net_device structure and updates the address in HW. 513 * 514 * Return: Error if the net device is busy or 0 if the addr is set 515 * successfully 516 */ 517 static int xemaclite_set_mac_address(struct net_device *dev, void *address) 518 { 519 struct net_local *lp = netdev_priv(dev); 520 struct sockaddr *addr = address; 521 522 if (netif_running(dev)) 523 return -EBUSY; 524 525 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 526 xemaclite_update_address(lp, dev->dev_addr); 527 return 0; 528 } 529 530 /** 531 * xemaclite_tx_timeout - Callback for Tx Timeout 532 * @dev: Pointer to the network device 533 * 534 * This function is called when Tx time out occurs for Emaclite device. 535 */ 536 static void xemaclite_tx_timeout(struct net_device *dev) 537 { 538 struct net_local *lp = netdev_priv(dev); 539 unsigned long flags; 540 541 dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n", 542 TX_TIMEOUT * 1000UL / HZ); 543 544 dev->stats.tx_errors++; 545 546 /* Reset the device */ 547 spin_lock_irqsave(&lp->reset_lock, flags); 548 549 /* Shouldn't really be necessary, but shouldn't hurt */ 550 netif_stop_queue(dev); 551 552 xemaclite_disable_interrupts(lp); 553 xemaclite_enable_interrupts(lp); 554 555 if (lp->deferred_skb) { 556 dev_kfree_skb(lp->deferred_skb); 557 lp->deferred_skb = NULL; 558 dev->stats.tx_errors++; 559 } 560 561 /* To exclude tx timeout */ 562 dev->trans_start = jiffies; /* prevent tx timeout */ 563 564 /* We're all ready to go. Start the queue */ 565 netif_wake_queue(dev); 566 spin_unlock_irqrestore(&lp->reset_lock, flags); 567 } 568 569 /**********************/ 570 /* Interrupt Handlers */ 571 /**********************/ 572 573 /** 574 * xemaclite_tx_handler - Interrupt handler for frames sent 575 * @dev: Pointer to the network device 576 * 577 * This function updates the number of packets transmitted and handles the 578 * deferred skb, if there is one. 579 */ 580 static void xemaclite_tx_handler(struct net_device *dev) 581 { 582 struct net_local *lp = netdev_priv(dev); 583 584 dev->stats.tx_packets++; 585 if (lp->deferred_skb) { 586 if (xemaclite_send_data(lp, 587 (u8 *) lp->deferred_skb->data, 588 lp->deferred_skb->len) != 0) 589 return; 590 else { 591 dev->stats.tx_bytes += lp->deferred_skb->len; 592 dev_kfree_skb_irq(lp->deferred_skb); 593 lp->deferred_skb = NULL; 594 dev->trans_start = jiffies; /* prevent tx timeout */ 595 netif_wake_queue(dev); 596 } 597 } 598 } 599 600 /** 601 * xemaclite_rx_handler- Interrupt handler for frames received 602 * @dev: Pointer to the network device 603 * 604 * This function allocates memory for a socket buffer, fills it with data 605 * received and hands it over to the TCP/IP stack. 606 */ 607 static void xemaclite_rx_handler(struct net_device *dev) 608 { 609 struct net_local *lp = netdev_priv(dev); 610 struct sk_buff *skb; 611 unsigned int align; 612 u32 len; 613 614 len = ETH_FRAME_LEN + ETH_FCS_LEN; 615 skb = netdev_alloc_skb(dev, len + ALIGNMENT); 616 if (!skb) { 617 /* Couldn't get memory. */ 618 dev->stats.rx_dropped++; 619 dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n"); 620 return; 621 } 622 623 /* 624 * A new skb should have the data halfword aligned, but this code is 625 * here just in case that isn't true. Calculate how many 626 * bytes we should reserve to get the data to start on a word 627 * boundary */ 628 align = BUFFER_ALIGN(skb->data); 629 if (align) 630 skb_reserve(skb, align); 631 632 skb_reserve(skb, 2); 633 634 len = xemaclite_recv_data(lp, (u8 *) skb->data); 635 636 if (!len) { 637 dev->stats.rx_errors++; 638 dev_kfree_skb_irq(skb); 639 return; 640 } 641 642 skb_put(skb, len); /* Tell the skb how much data we got */ 643 644 skb->protocol = eth_type_trans(skb, dev); 645 skb_checksum_none_assert(skb); 646 647 dev->stats.rx_packets++; 648 dev->stats.rx_bytes += len; 649 650 if (!skb_defer_rx_timestamp(skb)) 651 netif_rx(skb); /* Send the packet upstream */ 652 } 653 654 /** 655 * xemaclite_interrupt - Interrupt handler for this driver 656 * @irq: Irq of the Emaclite device 657 * @dev_id: Void pointer to the network device instance used as callback 658 * reference 659 * 660 * This function handles the Tx and Rx interrupts of the EmacLite device. 661 */ 662 static irqreturn_t xemaclite_interrupt(int irq, void *dev_id) 663 { 664 bool tx_complete = false; 665 struct net_device *dev = dev_id; 666 struct net_local *lp = netdev_priv(dev); 667 void __iomem *base_addr = lp->base_addr; 668 u32 tx_status; 669 670 /* Check if there is Rx Data available */ 671 if ((__raw_readl(base_addr + XEL_RSR_OFFSET) & 672 XEL_RSR_RECV_DONE_MASK) || 673 (__raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET) 674 & XEL_RSR_RECV_DONE_MASK)) 675 676 xemaclite_rx_handler(dev); 677 678 /* Check if the Transmission for the first buffer is completed */ 679 tx_status = __raw_readl(base_addr + XEL_TSR_OFFSET); 680 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && 681 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) { 682 683 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK; 684 __raw_writel(tx_status, base_addr + XEL_TSR_OFFSET); 685 686 tx_complete = true; 687 } 688 689 /* Check if the Transmission for the second buffer is completed */ 690 tx_status = __raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET); 691 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && 692 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) { 693 694 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK; 695 __raw_writel(tx_status, base_addr + XEL_BUFFER_OFFSET + 696 XEL_TSR_OFFSET); 697 698 tx_complete = true; 699 } 700 701 /* If there was a Tx interrupt, call the Tx Handler */ 702 if (tx_complete != 0) 703 xemaclite_tx_handler(dev); 704 705 return IRQ_HANDLED; 706 } 707 708 /**********************/ 709 /* MDIO Bus functions */ 710 /**********************/ 711 712 /** 713 * xemaclite_mdio_wait - Wait for the MDIO to be ready to use 714 * @lp: Pointer to the Emaclite device private data 715 * 716 * This function waits till the device is ready to accept a new MDIO 717 * request. 718 * 719 * Return: 0 for success or ETIMEDOUT for a timeout 720 */ 721 722 static int xemaclite_mdio_wait(struct net_local *lp) 723 { 724 long end = jiffies + 2; 725 726 /* wait for the MDIO interface to not be busy or timeout 727 after some time. 728 */ 729 while (__raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET) & 730 XEL_MDIOCTRL_MDIOSTS_MASK) { 731 if (end - jiffies <= 0) { 732 WARN_ON(1); 733 return -ETIMEDOUT; 734 } 735 msleep(1); 736 } 737 return 0; 738 } 739 740 /** 741 * xemaclite_mdio_read - Read from a given MII management register 742 * @bus: the mii_bus struct 743 * @phy_id: the phy address 744 * @reg: register number to read from 745 * 746 * This function waits till the device is ready to accept a new MDIO 747 * request and then writes the phy address to the MDIO Address register 748 * and reads data from MDIO Read Data register, when its available. 749 * 750 * Return: Value read from the MII management register 751 */ 752 static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg) 753 { 754 struct net_local *lp = bus->priv; 755 u32 ctrl_reg; 756 u32 rc; 757 758 if (xemaclite_mdio_wait(lp)) 759 return -ETIMEDOUT; 760 761 /* Write the PHY address, register number and set the OP bit in the 762 * MDIO Address register. Set the Status bit in the MDIO Control 763 * register to start a MDIO read transaction. 764 */ 765 ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET); 766 __raw_writel(XEL_MDIOADDR_OP_MASK | 767 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg), 768 lp->base_addr + XEL_MDIOADDR_OFFSET); 769 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, 770 lp->base_addr + XEL_MDIOCTRL_OFFSET); 771 772 if (xemaclite_mdio_wait(lp)) 773 return -ETIMEDOUT; 774 775 rc = __raw_readl(lp->base_addr + XEL_MDIORD_OFFSET); 776 777 dev_dbg(&lp->ndev->dev, 778 "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n", 779 phy_id, reg, rc); 780 781 return rc; 782 } 783 784 /** 785 * xemaclite_mdio_write - Write to a given MII management register 786 * @bus: the mii_bus struct 787 * @phy_id: the phy address 788 * @reg: register number to write to 789 * @val: value to write to the register number specified by reg 790 * 791 * This function waits till the device is ready to accept a new MDIO 792 * request and then writes the val to the MDIO Write Data register. 793 */ 794 static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg, 795 u16 val) 796 { 797 struct net_local *lp = bus->priv; 798 u32 ctrl_reg; 799 800 dev_dbg(&lp->ndev->dev, 801 "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n", 802 phy_id, reg, val); 803 804 if (xemaclite_mdio_wait(lp)) 805 return -ETIMEDOUT; 806 807 /* Write the PHY address, register number and clear the OP bit in the 808 * MDIO Address register and then write the value into the MDIO Write 809 * Data register. Finally, set the Status bit in the MDIO Control 810 * register to start a MDIO write transaction. 811 */ 812 ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET); 813 __raw_writel(~XEL_MDIOADDR_OP_MASK & 814 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg), 815 lp->base_addr + XEL_MDIOADDR_OFFSET); 816 __raw_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET); 817 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, 818 lp->base_addr + XEL_MDIOCTRL_OFFSET); 819 820 return 0; 821 } 822 823 /** 824 * xemaclite_mdio_reset - Reset the mdio bus. 825 * @bus: Pointer to the MII bus 826 * 827 * This function is required(?) as per Documentation/networking/phy.txt. 828 * There is no reset in this device; this function always returns 0. 829 */ 830 static int xemaclite_mdio_reset(struct mii_bus *bus) 831 { 832 return 0; 833 } 834 835 /** 836 * xemaclite_mdio_setup - Register mii_bus for the Emaclite device 837 * @lp: Pointer to the Emaclite device private data 838 * @ofdev: Pointer to OF device structure 839 * 840 * This function enables MDIO bus in the Emaclite device and registers a 841 * mii_bus. 842 * 843 * Return: 0 upon success or a negative error upon failure 844 */ 845 static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev) 846 { 847 struct mii_bus *bus; 848 int rc; 849 struct resource res; 850 struct device_node *np = of_get_parent(lp->phy_node); 851 struct device_node *npp; 852 853 /* Don't register the MDIO bus if the phy_node or its parent node 854 * can't be found. 855 */ 856 if (!np) { 857 dev_err(dev, "Failed to register mdio bus.\n"); 858 return -ENODEV; 859 } 860 npp = of_get_parent(np); 861 862 of_address_to_resource(npp, 0, &res); 863 if (lp->ndev->mem_start != res.start) { 864 struct phy_device *phydev; 865 phydev = of_phy_find_device(lp->phy_node); 866 if (!phydev) 867 dev_info(dev, 868 "MDIO of the phy is not registered yet\n"); 869 return 0; 870 } 871 872 /* Enable the MDIO bus by asserting the enable bit in MDIO Control 873 * register. 874 */ 875 __raw_writel(XEL_MDIOCTRL_MDIOEN_MASK, 876 lp->base_addr + XEL_MDIOCTRL_OFFSET); 877 878 bus = mdiobus_alloc(); 879 if (!bus) { 880 dev_err(dev, "Failed to allocate mdiobus\n"); 881 return -ENOMEM; 882 } 883 884 snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx", 885 (unsigned long long)res.start); 886 bus->priv = lp; 887 bus->name = "Xilinx Emaclite MDIO"; 888 bus->read = xemaclite_mdio_read; 889 bus->write = xemaclite_mdio_write; 890 bus->reset = xemaclite_mdio_reset; 891 bus->parent = dev; 892 bus->irq = lp->mdio_irqs; /* preallocated IRQ table */ 893 894 lp->mii_bus = bus; 895 896 rc = of_mdiobus_register(bus, np); 897 if (rc) { 898 dev_err(dev, "Failed to register mdio bus.\n"); 899 goto err_register; 900 } 901 902 return 0; 903 904 err_register: 905 mdiobus_free(bus); 906 return rc; 907 } 908 909 /** 910 * xemaclite_adjust_link - Link state callback for the Emaclite device 911 * @ndev: pointer to net_device struct 912 * 913 * There's nothing in the Emaclite device to be configured when the link 914 * state changes. We just print the status. 915 */ 916 static void xemaclite_adjust_link(struct net_device *ndev) 917 { 918 struct net_local *lp = netdev_priv(ndev); 919 struct phy_device *phy = lp->phy_dev; 920 int link_state; 921 922 /* hash together the state values to decide if something has changed */ 923 link_state = phy->speed | (phy->duplex << 1) | phy->link; 924 925 if (lp->last_link != link_state) { 926 lp->last_link = link_state; 927 phy_print_status(phy); 928 } 929 } 930 931 /** 932 * xemaclite_open - Open the network device 933 * @dev: Pointer to the network device 934 * 935 * This function sets the MAC address, requests an IRQ and enables interrupts 936 * for the Emaclite device and starts the Tx queue. 937 * It also connects to the phy device, if MDIO is included in Emaclite device. 938 */ 939 static int xemaclite_open(struct net_device *dev) 940 { 941 struct net_local *lp = netdev_priv(dev); 942 int retval; 943 944 /* Just to be safe, stop the device first */ 945 xemaclite_disable_interrupts(lp); 946 947 if (lp->phy_node) { 948 u32 bmcr; 949 950 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node, 951 xemaclite_adjust_link, 0, 952 PHY_INTERFACE_MODE_MII); 953 if (!lp->phy_dev) { 954 dev_err(&lp->ndev->dev, "of_phy_connect() failed\n"); 955 return -ENODEV; 956 } 957 958 /* EmacLite doesn't support giga-bit speeds */ 959 lp->phy_dev->supported &= (PHY_BASIC_FEATURES); 960 lp->phy_dev->advertising = lp->phy_dev->supported; 961 962 /* Don't advertise 1000BASE-T Full/Half duplex speeds */ 963 phy_write(lp->phy_dev, MII_CTRL1000, 0); 964 965 /* Advertise only 10 and 100mbps full/half duplex speeds */ 966 phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL | 967 ADVERTISE_CSMA); 968 969 /* Restart auto negotiation */ 970 bmcr = phy_read(lp->phy_dev, MII_BMCR); 971 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); 972 phy_write(lp->phy_dev, MII_BMCR, bmcr); 973 974 phy_start(lp->phy_dev); 975 } 976 977 /* Set the MAC address each time opened */ 978 xemaclite_update_address(lp, dev->dev_addr); 979 980 /* Grab the IRQ */ 981 retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev); 982 if (retval) { 983 dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n", 984 dev->irq); 985 if (lp->phy_dev) 986 phy_disconnect(lp->phy_dev); 987 lp->phy_dev = NULL; 988 989 return retval; 990 } 991 992 /* Enable Interrupts */ 993 xemaclite_enable_interrupts(lp); 994 995 /* We're ready to go */ 996 netif_start_queue(dev); 997 998 return 0; 999 } 1000 1001 /** 1002 * xemaclite_close - Close the network device 1003 * @dev: Pointer to the network device 1004 * 1005 * This function stops the Tx queue, disables interrupts and frees the IRQ for 1006 * the Emaclite device. 1007 * It also disconnects the phy device associated with the Emaclite device. 1008 */ 1009 static int xemaclite_close(struct net_device *dev) 1010 { 1011 struct net_local *lp = netdev_priv(dev); 1012 1013 netif_stop_queue(dev); 1014 xemaclite_disable_interrupts(lp); 1015 free_irq(dev->irq, dev); 1016 1017 if (lp->phy_dev) 1018 phy_disconnect(lp->phy_dev); 1019 lp->phy_dev = NULL; 1020 1021 return 0; 1022 } 1023 1024 /** 1025 * xemaclite_send - Transmit a frame 1026 * @orig_skb: Pointer to the socket buffer to be transmitted 1027 * @dev: Pointer to the network device 1028 * 1029 * This function checks if the Tx buffer of the Emaclite device is free to send 1030 * data. If so, it fills the Tx buffer with data from socket buffer data, 1031 * updates the stats and frees the socket buffer. The Tx completion is signaled 1032 * by an interrupt. If the Tx buffer isn't free, then the socket buffer is 1033 * deferred and the Tx queue is stopped so that the deferred socket buffer can 1034 * be transmitted when the Emaclite device is free to transmit data. 1035 * 1036 * Return: 0, always. 1037 */ 1038 static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev) 1039 { 1040 struct net_local *lp = netdev_priv(dev); 1041 struct sk_buff *new_skb; 1042 unsigned int len; 1043 unsigned long flags; 1044 1045 len = orig_skb->len; 1046 1047 new_skb = orig_skb; 1048 1049 spin_lock_irqsave(&lp->reset_lock, flags); 1050 if (xemaclite_send_data(lp, (u8 *) new_skb->data, len) != 0) { 1051 /* If the Emaclite Tx buffer is busy, stop the Tx queue and 1052 * defer the skb for transmission during the ISR, after the 1053 * current transmission is complete */ 1054 netif_stop_queue(dev); 1055 lp->deferred_skb = new_skb; 1056 /* Take the time stamp now, since we can't do this in an ISR. */ 1057 skb_tx_timestamp(new_skb); 1058 spin_unlock_irqrestore(&lp->reset_lock, flags); 1059 return 0; 1060 } 1061 spin_unlock_irqrestore(&lp->reset_lock, flags); 1062 1063 skb_tx_timestamp(new_skb); 1064 1065 dev->stats.tx_bytes += len; 1066 dev_kfree_skb(new_skb); 1067 1068 return 0; 1069 } 1070 1071 /** 1072 * xemaclite_remove_ndev - Free the network device 1073 * @ndev: Pointer to the network device to be freed 1074 * 1075 * This function un maps the IO region of the Emaclite device and frees the net 1076 * device. 1077 */ 1078 static void xemaclite_remove_ndev(struct net_device *ndev, 1079 struct platform_device *pdev) 1080 { 1081 if (ndev) { 1082 struct net_local *lp = netdev_priv(ndev); 1083 1084 if (lp->base_addr) 1085 devm_iounmap(&pdev->dev, lp->base_addr); 1086 free_netdev(ndev); 1087 } 1088 } 1089 1090 /** 1091 * get_bool - Get a parameter from the OF device 1092 * @ofdev: Pointer to OF device structure 1093 * @s: Property to be retrieved 1094 * 1095 * This function looks for a property in the device node and returns the value 1096 * of the property if its found or 0 if the property is not found. 1097 * 1098 * Return: Value of the parameter if the parameter is found, or 0 otherwise 1099 */ 1100 static bool get_bool(struct platform_device *ofdev, const char *s) 1101 { 1102 u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL); 1103 1104 if (p) { 1105 return (bool)*p; 1106 } else { 1107 dev_warn(&ofdev->dev, "Parameter %s not found," 1108 "defaulting to false\n", s); 1109 return 0; 1110 } 1111 } 1112 1113 static struct net_device_ops xemaclite_netdev_ops; 1114 1115 /** 1116 * xemaclite_of_probe - Probe method for the Emaclite device. 1117 * @ofdev: Pointer to OF device structure 1118 * @match: Pointer to the structure used for matching a device 1119 * 1120 * This function probes for the Emaclite device in the device tree. 1121 * It initializes the driver data structure and the hardware, sets the MAC 1122 * address and registers the network device. 1123 * It also registers a mii_bus for the Emaclite device, if MDIO is included 1124 * in the device. 1125 * 1126 * Return: 0, if the driver is bound to the Emaclite device, or 1127 * a negative error if there is failure. 1128 */ 1129 static int xemaclite_of_probe(struct platform_device *ofdev) 1130 { 1131 struct resource *res; 1132 struct net_device *ndev = NULL; 1133 struct net_local *lp = NULL; 1134 struct device *dev = &ofdev->dev; 1135 const void *mac_address; 1136 1137 int rc = 0; 1138 1139 dev_info(dev, "Device Tree Probing\n"); 1140 1141 /* Create an ethernet device instance */ 1142 ndev = alloc_etherdev(sizeof(struct net_local)); 1143 if (!ndev) 1144 return -ENOMEM; 1145 1146 dev_set_drvdata(dev, ndev); 1147 SET_NETDEV_DEV(ndev, &ofdev->dev); 1148 1149 lp = netdev_priv(ndev); 1150 lp->ndev = ndev; 1151 1152 /* Get IRQ for the device */ 1153 res = platform_get_resource(ofdev, IORESOURCE_IRQ, 0); 1154 if (!res) { 1155 dev_err(dev, "no IRQ found\n"); 1156 goto error; 1157 } 1158 1159 ndev->irq = res->start; 1160 1161 res = platform_get_resource(ofdev, IORESOURCE_MEM, 0); 1162 lp->base_addr = devm_ioremap_resource(&ofdev->dev, res); 1163 if (IS_ERR(lp->base_addr)) { 1164 rc = PTR_ERR(lp->base_addr); 1165 goto error; 1166 } 1167 1168 ndev->mem_start = res->start; 1169 ndev->mem_end = res->end; 1170 1171 spin_lock_init(&lp->reset_lock); 1172 lp->next_tx_buf_to_use = 0x0; 1173 lp->next_rx_buf_to_use = 0x0; 1174 lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong"); 1175 lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong"); 1176 mac_address = of_get_mac_address(ofdev->dev.of_node); 1177 1178 if (mac_address) 1179 /* Set the MAC address. */ 1180 memcpy(ndev->dev_addr, mac_address, 6); 1181 else 1182 dev_warn(dev, "No MAC address found\n"); 1183 1184 /* Clear the Tx CSR's in case this is a restart */ 1185 __raw_writel(0, lp->base_addr + XEL_TSR_OFFSET); 1186 __raw_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET); 1187 1188 /* Set the MAC address in the EmacLite device */ 1189 xemaclite_update_address(lp, ndev->dev_addr); 1190 1191 lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0); 1192 rc = xemaclite_mdio_setup(lp, &ofdev->dev); 1193 if (rc) 1194 dev_warn(&ofdev->dev, "error registering MDIO bus\n"); 1195 1196 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr); 1197 1198 ndev->netdev_ops = &xemaclite_netdev_ops; 1199 ndev->flags &= ~IFF_MULTICAST; 1200 ndev->watchdog_timeo = TX_TIMEOUT; 1201 1202 /* Finally, register the device */ 1203 rc = register_netdev(ndev); 1204 if (rc) { 1205 dev_err(dev, 1206 "Cannot register network device, aborting\n"); 1207 goto error; 1208 } 1209 1210 dev_info(dev, 1211 "Xilinx EmacLite at 0x%08X mapped to 0x%08X, irq=%d\n", 1212 (unsigned int __force)ndev->mem_start, 1213 (unsigned int __force)lp->base_addr, ndev->irq); 1214 return 0; 1215 1216 error: 1217 xemaclite_remove_ndev(ndev, ofdev); 1218 return rc; 1219 } 1220 1221 /** 1222 * xemaclite_of_remove - Unbind the driver from the Emaclite device. 1223 * @of_dev: Pointer to OF device structure 1224 * 1225 * This function is called if a device is physically removed from the system or 1226 * if the driver module is being unloaded. It frees any resources allocated to 1227 * the device. 1228 * 1229 * Return: 0, always. 1230 */ 1231 static int xemaclite_of_remove(struct platform_device *of_dev) 1232 { 1233 struct device *dev = &of_dev->dev; 1234 struct net_device *ndev = dev_get_drvdata(dev); 1235 1236 struct net_local *lp = netdev_priv(ndev); 1237 1238 /* Un-register the mii_bus, if configured */ 1239 if (lp->has_mdio) { 1240 mdiobus_unregister(lp->mii_bus); 1241 kfree(lp->mii_bus->irq); 1242 mdiobus_free(lp->mii_bus); 1243 lp->mii_bus = NULL; 1244 } 1245 1246 unregister_netdev(ndev); 1247 1248 if (lp->phy_node) 1249 of_node_put(lp->phy_node); 1250 lp->phy_node = NULL; 1251 1252 xemaclite_remove_ndev(ndev, of_dev); 1253 dev_set_drvdata(dev, NULL); 1254 1255 return 0; 1256 } 1257 1258 #ifdef CONFIG_NET_POLL_CONTROLLER 1259 static void 1260 xemaclite_poll_controller(struct net_device *ndev) 1261 { 1262 disable_irq(ndev->irq); 1263 xemaclite_interrupt(ndev->irq, ndev); 1264 enable_irq(ndev->irq); 1265 } 1266 #endif 1267 1268 static struct net_device_ops xemaclite_netdev_ops = { 1269 .ndo_open = xemaclite_open, 1270 .ndo_stop = xemaclite_close, 1271 .ndo_start_xmit = xemaclite_send, 1272 .ndo_set_mac_address = xemaclite_set_mac_address, 1273 .ndo_tx_timeout = xemaclite_tx_timeout, 1274 #ifdef CONFIG_NET_POLL_CONTROLLER 1275 .ndo_poll_controller = xemaclite_poll_controller, 1276 #endif 1277 }; 1278 1279 /* Match table for OF platform binding */ 1280 static struct of_device_id xemaclite_of_match[] = { 1281 { .compatible = "xlnx,opb-ethernetlite-1.01.a", }, 1282 { .compatible = "xlnx,opb-ethernetlite-1.01.b", }, 1283 { .compatible = "xlnx,xps-ethernetlite-1.00.a", }, 1284 { .compatible = "xlnx,xps-ethernetlite-2.00.a", }, 1285 { .compatible = "xlnx,xps-ethernetlite-2.01.a", }, 1286 { .compatible = "xlnx,xps-ethernetlite-3.00.a", }, 1287 { /* end of list */ }, 1288 }; 1289 MODULE_DEVICE_TABLE(of, xemaclite_of_match); 1290 1291 static struct platform_driver xemaclite_of_driver = { 1292 .driver = { 1293 .name = DRIVER_NAME, 1294 .owner = THIS_MODULE, 1295 .of_match_table = xemaclite_of_match, 1296 }, 1297 .probe = xemaclite_of_probe, 1298 .remove = xemaclite_of_remove, 1299 }; 1300 1301 module_platform_driver(xemaclite_of_driver); 1302 1303 MODULE_AUTHOR("Xilinx, Inc."); 1304 MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver"); 1305 MODULE_LICENSE("GPL"); 1306