1 /* 2 * Ethernet driver for the WIZnet W5300 chip. 3 * 4 * Copyright (C) 2008-2009 WIZnet Co.,Ltd. 5 * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com> 6 * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru> 7 * 8 * Licensed under the GPL-2 or later. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/platform_device.h> 16 #include <linux/platform_data/wiznet.h> 17 #include <linux/ethtool.h> 18 #include <linux/skbuff.h> 19 #include <linux/types.h> 20 #include <linux/errno.h> 21 #include <linux/delay.h> 22 #include <linux/slab.h> 23 #include <linux/spinlock.h> 24 #include <linux/io.h> 25 #include <linux/ioport.h> 26 #include <linux/interrupt.h> 27 #include <linux/irq.h> 28 #include <linux/gpio.h> 29 30 #define DRV_NAME "w5300" 31 #define DRV_VERSION "2012-04-04" 32 33 MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION); 34 MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>"); 35 MODULE_ALIAS("platform:"DRV_NAME); 36 MODULE_LICENSE("GPL"); 37 38 /* 39 * Registers 40 */ 41 #define W5300_MR 0x0000 /* Mode Register */ 42 #define MR_DBW (1 << 15) /* Data bus width */ 43 #define MR_MPF (1 << 14) /* Mac layer pause frame */ 44 #define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */ 45 #define MR_RDH (1 << 10) /* Read data hold time */ 46 #define MR_FS (1 << 8) /* FIFO swap */ 47 #define MR_RST (1 << 7) /* S/W reset */ 48 #define MR_PB (1 << 4) /* Ping block */ 49 #define MR_DBS (1 << 2) /* Data bus swap */ 50 #define MR_IND (1 << 0) /* Indirect mode */ 51 #define W5300_IR 0x0002 /* Interrupt Register */ 52 #define W5300_IMR 0x0004 /* Interrupt Mask Register */ 53 #define IR_S0 0x0001 /* S0 interrupt */ 54 #define W5300_SHARL 0x0008 /* Source MAC address (0123) */ 55 #define W5300_SHARH 0x000c /* Source MAC address (45) */ 56 #define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */ 57 #define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */ 58 #define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */ 59 #define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */ 60 #define W5300_MTYPE 0x0030 /* Memory Type */ 61 #define W5300_IDR 0x00fe /* Chip ID register */ 62 #define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */ 63 #define W5300_S0_MR 0x0200 /* S0 Mode Register */ 64 #define S0_MR_CLOSED 0x0000 /* Close mode */ 65 #define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscuous) */ 66 #define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */ 67 #define W5300_S0_CR 0x0202 /* S0 Command Register */ 68 #define S0_CR_OPEN 0x0001 /* OPEN command */ 69 #define S0_CR_CLOSE 0x0010 /* CLOSE command */ 70 #define S0_CR_SEND 0x0020 /* SEND command */ 71 #define S0_CR_RECV 0x0040 /* RECV command */ 72 #define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */ 73 #define W5300_S0_IR 0x0206 /* S0 Interrupt Register */ 74 #define S0_IR_RECV 0x0004 /* Receive interrupt */ 75 #define S0_IR_SENDOK 0x0010 /* Send OK interrupt */ 76 #define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */ 77 #define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */ 78 #define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */ 79 #define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */ 80 #define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */ 81 #define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */ 82 #define W5300_REGS_LEN 0x0400 83 84 /* 85 * Device driver private data structure 86 */ 87 struct w5300_priv { 88 void __iomem *base; 89 spinlock_t reg_lock; 90 bool indirect; 91 u16 (*read) (struct w5300_priv *priv, u16 addr); 92 void (*write)(struct w5300_priv *priv, u16 addr, u16 data); 93 int irq; 94 int link_irq; 95 int link_gpio; 96 97 struct napi_struct napi; 98 struct net_device *ndev; 99 bool promisc; 100 u32 msg_enable; 101 }; 102 103 /************************************************************************ 104 * 105 * Lowlevel I/O functions 106 * 107 ***********************************************************************/ 108 109 /* 110 * In direct address mode host system can directly access W5300 registers 111 * after mapping to Memory-Mapped I/O space. 112 * 113 * 0x400 bytes are required for memory space. 114 */ 115 static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr) 116 { 117 return ioread16(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT)); 118 } 119 120 static inline void w5300_write_direct(struct w5300_priv *priv, 121 u16 addr, u16 data) 122 { 123 iowrite16(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT)); 124 } 125 126 /* 127 * In indirect address mode host system indirectly accesses registers by 128 * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data 129 * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space. 130 * Mode Register (MR) is directly accessible. 131 * 132 * Only 0x06 bytes are required for memory space. 133 */ 134 #define W5300_IDM_AR 0x0002 /* Indirect Mode Address */ 135 #define W5300_IDM_DR 0x0004 /* Indirect Mode Data */ 136 137 static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr) 138 { 139 unsigned long flags; 140 u16 data; 141 142 spin_lock_irqsave(&priv->reg_lock, flags); 143 w5300_write_direct(priv, W5300_IDM_AR, addr); 144 mmiowb(); 145 data = w5300_read_direct(priv, W5300_IDM_DR); 146 spin_unlock_irqrestore(&priv->reg_lock, flags); 147 148 return data; 149 } 150 151 static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data) 152 { 153 unsigned long flags; 154 155 spin_lock_irqsave(&priv->reg_lock, flags); 156 w5300_write_direct(priv, W5300_IDM_AR, addr); 157 mmiowb(); 158 w5300_write_direct(priv, W5300_IDM_DR, data); 159 mmiowb(); 160 spin_unlock_irqrestore(&priv->reg_lock, flags); 161 } 162 163 #if defined(CONFIG_WIZNET_BUS_DIRECT) 164 #define w5300_read w5300_read_direct 165 #define w5300_write w5300_write_direct 166 167 #elif defined(CONFIG_WIZNET_BUS_INDIRECT) 168 #define w5300_read w5300_read_indirect 169 #define w5300_write w5300_write_indirect 170 171 #else /* CONFIG_WIZNET_BUS_ANY */ 172 #define w5300_read priv->read 173 #define w5300_write priv->write 174 #endif 175 176 static u32 w5300_read32(struct w5300_priv *priv, u16 addr) 177 { 178 u32 data; 179 data = w5300_read(priv, addr) << 16; 180 data |= w5300_read(priv, addr + 2); 181 return data; 182 } 183 184 static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data) 185 { 186 w5300_write(priv, addr, data >> 16); 187 w5300_write(priv, addr + 2, data); 188 } 189 190 static int w5300_command(struct w5300_priv *priv, u16 cmd) 191 { 192 unsigned long timeout = jiffies + msecs_to_jiffies(100); 193 194 w5300_write(priv, W5300_S0_CR, cmd); 195 mmiowb(); 196 197 while (w5300_read(priv, W5300_S0_CR) != 0) { 198 if (time_after(jiffies, timeout)) 199 return -EIO; 200 cpu_relax(); 201 } 202 203 return 0; 204 } 205 206 static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len) 207 { 208 u16 fifo; 209 int i; 210 211 for (i = 0; i < len; i += 2) { 212 fifo = w5300_read(priv, W5300_S0_RX_FIFO); 213 *buf++ = fifo >> 8; 214 *buf++ = fifo; 215 } 216 fifo = w5300_read(priv, W5300_S0_RX_FIFO); 217 fifo = w5300_read(priv, W5300_S0_RX_FIFO); 218 } 219 220 static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len) 221 { 222 u16 fifo; 223 int i; 224 225 for (i = 0; i < len; i += 2) { 226 fifo = *buf++ << 8; 227 fifo |= *buf++; 228 w5300_write(priv, W5300_S0_TX_FIFO, fifo); 229 } 230 w5300_write32(priv, W5300_S0_TX_WRSR, len); 231 } 232 233 static void w5300_write_macaddr(struct w5300_priv *priv) 234 { 235 struct net_device *ndev = priv->ndev; 236 w5300_write32(priv, W5300_SHARL, 237 ndev->dev_addr[0] << 24 | 238 ndev->dev_addr[1] << 16 | 239 ndev->dev_addr[2] << 8 | 240 ndev->dev_addr[3]); 241 w5300_write(priv, W5300_SHARH, 242 ndev->dev_addr[4] << 8 | 243 ndev->dev_addr[5]); 244 mmiowb(); 245 } 246 247 static void w5300_hw_reset(struct w5300_priv *priv) 248 { 249 w5300_write_direct(priv, W5300_MR, MR_RST); 250 mmiowb(); 251 mdelay(5); 252 w5300_write_direct(priv, W5300_MR, priv->indirect ? 253 MR_WDF(7) | MR_PB | MR_IND : 254 MR_WDF(7) | MR_PB); 255 mmiowb(); 256 w5300_write(priv, W5300_IMR, 0); 257 w5300_write_macaddr(priv); 258 259 /* Configure 128K of internal memory 260 * as 64K RX fifo and 64K TX fifo 261 */ 262 w5300_write32(priv, W5300_RMSRL, 64 << 24); 263 w5300_write32(priv, W5300_RMSRH, 0); 264 w5300_write32(priv, W5300_TMSRL, 64 << 24); 265 w5300_write32(priv, W5300_TMSRH, 0); 266 w5300_write(priv, W5300_MTYPE, 0x00ff); 267 mmiowb(); 268 } 269 270 static void w5300_hw_start(struct w5300_priv *priv) 271 { 272 w5300_write(priv, W5300_S0_MR, priv->promisc ? 273 S0_MR_MACRAW : S0_MR_MACRAW_MF); 274 mmiowb(); 275 w5300_command(priv, S0_CR_OPEN); 276 w5300_write(priv, W5300_S0_IMR, S0_IR_RECV | S0_IR_SENDOK); 277 w5300_write(priv, W5300_IMR, IR_S0); 278 mmiowb(); 279 } 280 281 static void w5300_hw_close(struct w5300_priv *priv) 282 { 283 w5300_write(priv, W5300_IMR, 0); 284 mmiowb(); 285 w5300_command(priv, S0_CR_CLOSE); 286 } 287 288 /*********************************************************************** 289 * 290 * Device driver functions / callbacks 291 * 292 ***********************************************************************/ 293 294 static void w5300_get_drvinfo(struct net_device *ndev, 295 struct ethtool_drvinfo *info) 296 { 297 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); 298 strlcpy(info->version, DRV_VERSION, sizeof(info->version)); 299 strlcpy(info->bus_info, dev_name(ndev->dev.parent), 300 sizeof(info->bus_info)); 301 } 302 303 static u32 w5300_get_link(struct net_device *ndev) 304 { 305 struct w5300_priv *priv = netdev_priv(ndev); 306 307 if (gpio_is_valid(priv->link_gpio)) 308 return !!gpio_get_value(priv->link_gpio); 309 310 return 1; 311 } 312 313 static u32 w5300_get_msglevel(struct net_device *ndev) 314 { 315 struct w5300_priv *priv = netdev_priv(ndev); 316 317 return priv->msg_enable; 318 } 319 320 static void w5300_set_msglevel(struct net_device *ndev, u32 value) 321 { 322 struct w5300_priv *priv = netdev_priv(ndev); 323 324 priv->msg_enable = value; 325 } 326 327 static int w5300_get_regs_len(struct net_device *ndev) 328 { 329 return W5300_REGS_LEN; 330 } 331 332 static void w5300_get_regs(struct net_device *ndev, 333 struct ethtool_regs *regs, void *_buf) 334 { 335 struct w5300_priv *priv = netdev_priv(ndev); 336 u8 *buf = _buf; 337 u16 addr; 338 u16 data; 339 340 regs->version = 1; 341 for (addr = 0; addr < W5300_REGS_LEN; addr += 2) { 342 switch (addr & 0x23f) { 343 case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */ 344 case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */ 345 data = 0xffff; 346 break; 347 default: 348 data = w5300_read(priv, addr); 349 break; 350 } 351 *buf++ = data >> 8; 352 *buf++ = data; 353 } 354 } 355 356 static void w5300_tx_timeout(struct net_device *ndev) 357 { 358 struct w5300_priv *priv = netdev_priv(ndev); 359 360 netif_stop_queue(ndev); 361 w5300_hw_reset(priv); 362 w5300_hw_start(priv); 363 ndev->stats.tx_errors++; 364 netif_trans_update(ndev); 365 netif_wake_queue(ndev); 366 } 367 368 static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev) 369 { 370 struct w5300_priv *priv = netdev_priv(ndev); 371 372 netif_stop_queue(ndev); 373 374 w5300_write_frame(priv, skb->data, skb->len); 375 mmiowb(); 376 ndev->stats.tx_packets++; 377 ndev->stats.tx_bytes += skb->len; 378 dev_kfree_skb(skb); 379 netif_dbg(priv, tx_queued, ndev, "tx queued\n"); 380 381 w5300_command(priv, S0_CR_SEND); 382 383 return NETDEV_TX_OK; 384 } 385 386 static int w5300_napi_poll(struct napi_struct *napi, int budget) 387 { 388 struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi); 389 struct net_device *ndev = priv->ndev; 390 struct sk_buff *skb; 391 int rx_count; 392 u16 rx_len; 393 394 for (rx_count = 0; rx_count < budget; rx_count++) { 395 u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR); 396 if (rx_fifo_len == 0) 397 break; 398 399 rx_len = w5300_read(priv, W5300_S0_RX_FIFO); 400 401 skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2)); 402 if (unlikely(!skb)) { 403 u32 i; 404 for (i = 0; i < rx_fifo_len; i += 2) 405 w5300_read(priv, W5300_S0_RX_FIFO); 406 ndev->stats.rx_dropped++; 407 return -ENOMEM; 408 } 409 410 skb_put(skb, rx_len); 411 w5300_read_frame(priv, skb->data, rx_len); 412 skb->protocol = eth_type_trans(skb, ndev); 413 414 netif_receive_skb(skb); 415 ndev->stats.rx_packets++; 416 ndev->stats.rx_bytes += rx_len; 417 } 418 419 if (rx_count < budget) { 420 napi_complete_done(napi, rx_count); 421 w5300_write(priv, W5300_IMR, IR_S0); 422 mmiowb(); 423 } 424 425 return rx_count; 426 } 427 428 static irqreturn_t w5300_interrupt(int irq, void *ndev_instance) 429 { 430 struct net_device *ndev = ndev_instance; 431 struct w5300_priv *priv = netdev_priv(ndev); 432 433 int ir = w5300_read(priv, W5300_S0_IR); 434 if (!ir) 435 return IRQ_NONE; 436 w5300_write(priv, W5300_S0_IR, ir); 437 mmiowb(); 438 439 if (ir & S0_IR_SENDOK) { 440 netif_dbg(priv, tx_done, ndev, "tx done\n"); 441 netif_wake_queue(ndev); 442 } 443 444 if (ir & S0_IR_RECV) { 445 if (napi_schedule_prep(&priv->napi)) { 446 w5300_write(priv, W5300_IMR, 0); 447 mmiowb(); 448 __napi_schedule(&priv->napi); 449 } 450 } 451 452 return IRQ_HANDLED; 453 } 454 455 static irqreturn_t w5300_detect_link(int irq, void *ndev_instance) 456 { 457 struct net_device *ndev = ndev_instance; 458 struct w5300_priv *priv = netdev_priv(ndev); 459 460 if (netif_running(ndev)) { 461 if (gpio_get_value(priv->link_gpio) != 0) { 462 netif_info(priv, link, ndev, "link is up\n"); 463 netif_carrier_on(ndev); 464 } else { 465 netif_info(priv, link, ndev, "link is down\n"); 466 netif_carrier_off(ndev); 467 } 468 } 469 470 return IRQ_HANDLED; 471 } 472 473 static void w5300_set_rx_mode(struct net_device *ndev) 474 { 475 struct w5300_priv *priv = netdev_priv(ndev); 476 bool set_promisc = (ndev->flags & IFF_PROMISC) != 0; 477 478 if (priv->promisc != set_promisc) { 479 priv->promisc = set_promisc; 480 w5300_hw_start(priv); 481 } 482 } 483 484 static int w5300_set_macaddr(struct net_device *ndev, void *addr) 485 { 486 struct w5300_priv *priv = netdev_priv(ndev); 487 struct sockaddr *sock_addr = addr; 488 489 if (!is_valid_ether_addr(sock_addr->sa_data)) 490 return -EADDRNOTAVAIL; 491 memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN); 492 w5300_write_macaddr(priv); 493 return 0; 494 } 495 496 static int w5300_open(struct net_device *ndev) 497 { 498 struct w5300_priv *priv = netdev_priv(ndev); 499 500 netif_info(priv, ifup, ndev, "enabling\n"); 501 w5300_hw_start(priv); 502 napi_enable(&priv->napi); 503 netif_start_queue(ndev); 504 if (!gpio_is_valid(priv->link_gpio) || 505 gpio_get_value(priv->link_gpio) != 0) 506 netif_carrier_on(ndev); 507 return 0; 508 } 509 510 static int w5300_stop(struct net_device *ndev) 511 { 512 struct w5300_priv *priv = netdev_priv(ndev); 513 514 netif_info(priv, ifdown, ndev, "shutting down\n"); 515 w5300_hw_close(priv); 516 netif_carrier_off(ndev); 517 netif_stop_queue(ndev); 518 napi_disable(&priv->napi); 519 return 0; 520 } 521 522 static const struct ethtool_ops w5300_ethtool_ops = { 523 .get_drvinfo = w5300_get_drvinfo, 524 .get_msglevel = w5300_get_msglevel, 525 .set_msglevel = w5300_set_msglevel, 526 .get_link = w5300_get_link, 527 .get_regs_len = w5300_get_regs_len, 528 .get_regs = w5300_get_regs, 529 }; 530 531 static const struct net_device_ops w5300_netdev_ops = { 532 .ndo_open = w5300_open, 533 .ndo_stop = w5300_stop, 534 .ndo_start_xmit = w5300_start_tx, 535 .ndo_tx_timeout = w5300_tx_timeout, 536 .ndo_set_rx_mode = w5300_set_rx_mode, 537 .ndo_set_mac_address = w5300_set_macaddr, 538 .ndo_validate_addr = eth_validate_addr, 539 }; 540 541 static int w5300_hw_probe(struct platform_device *pdev) 542 { 543 struct wiznet_platform_data *data = dev_get_platdata(&pdev->dev); 544 struct net_device *ndev = platform_get_drvdata(pdev); 545 struct w5300_priv *priv = netdev_priv(ndev); 546 const char *name = netdev_name(ndev); 547 struct resource *mem; 548 int mem_size; 549 int irq; 550 int ret; 551 552 if (data && is_valid_ether_addr(data->mac_addr)) { 553 memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN); 554 } else { 555 eth_hw_addr_random(ndev); 556 } 557 558 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 559 priv->base = devm_ioremap_resource(&pdev->dev, mem); 560 if (IS_ERR(priv->base)) 561 return PTR_ERR(priv->base); 562 563 mem_size = resource_size(mem); 564 565 spin_lock_init(&priv->reg_lock); 566 priv->indirect = mem_size < W5300_BUS_DIRECT_SIZE; 567 if (priv->indirect) { 568 priv->read = w5300_read_indirect; 569 priv->write = w5300_write_indirect; 570 } else { 571 priv->read = w5300_read_direct; 572 priv->write = w5300_write_direct; 573 } 574 575 w5300_hw_reset(priv); 576 if (w5300_read(priv, W5300_IDR) != IDR_W5300) 577 return -ENODEV; 578 579 irq = platform_get_irq(pdev, 0); 580 if (irq < 0) 581 return irq; 582 ret = request_irq(irq, w5300_interrupt, 583 IRQ_TYPE_LEVEL_LOW, name, ndev); 584 if (ret < 0) 585 return ret; 586 priv->irq = irq; 587 588 priv->link_gpio = data ? data->link_gpio : -EINVAL; 589 if (gpio_is_valid(priv->link_gpio)) { 590 char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL); 591 if (!link_name) 592 return -ENOMEM; 593 snprintf(link_name, 16, "%s-link", name); 594 priv->link_irq = gpio_to_irq(priv->link_gpio); 595 if (request_any_context_irq(priv->link_irq, w5300_detect_link, 596 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 597 link_name, priv->ndev) < 0) 598 priv->link_gpio = -EINVAL; 599 } 600 601 netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq); 602 return 0; 603 } 604 605 static int w5300_probe(struct platform_device *pdev) 606 { 607 struct w5300_priv *priv; 608 struct net_device *ndev; 609 int err; 610 611 ndev = alloc_etherdev(sizeof(*priv)); 612 if (!ndev) 613 return -ENOMEM; 614 SET_NETDEV_DEV(ndev, &pdev->dev); 615 platform_set_drvdata(pdev, ndev); 616 priv = netdev_priv(ndev); 617 priv->ndev = ndev; 618 619 ndev->netdev_ops = &w5300_netdev_ops; 620 ndev->ethtool_ops = &w5300_ethtool_ops; 621 ndev->watchdog_timeo = HZ; 622 netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16); 623 624 /* This chip doesn't support VLAN packets with normal MTU, 625 * so disable VLAN for this device. 626 */ 627 ndev->features |= NETIF_F_VLAN_CHALLENGED; 628 629 err = register_netdev(ndev); 630 if (err < 0) 631 goto err_register; 632 633 err = w5300_hw_probe(pdev); 634 if (err < 0) 635 goto err_hw_probe; 636 637 return 0; 638 639 err_hw_probe: 640 unregister_netdev(ndev); 641 err_register: 642 free_netdev(ndev); 643 return err; 644 } 645 646 static int w5300_remove(struct platform_device *pdev) 647 { 648 struct net_device *ndev = platform_get_drvdata(pdev); 649 struct w5300_priv *priv = netdev_priv(ndev); 650 651 w5300_hw_reset(priv); 652 free_irq(priv->irq, ndev); 653 if (gpio_is_valid(priv->link_gpio)) 654 free_irq(priv->link_irq, ndev); 655 656 unregister_netdev(ndev); 657 free_netdev(ndev); 658 return 0; 659 } 660 661 #ifdef CONFIG_PM_SLEEP 662 static int w5300_suspend(struct device *dev) 663 { 664 struct platform_device *pdev = to_platform_device(dev); 665 struct net_device *ndev = platform_get_drvdata(pdev); 666 struct w5300_priv *priv = netdev_priv(ndev); 667 668 if (netif_running(ndev)) { 669 netif_carrier_off(ndev); 670 netif_device_detach(ndev); 671 672 w5300_hw_close(priv); 673 } 674 return 0; 675 } 676 677 static int w5300_resume(struct device *dev) 678 { 679 struct platform_device *pdev = to_platform_device(dev); 680 struct net_device *ndev = platform_get_drvdata(pdev); 681 struct w5300_priv *priv = netdev_priv(ndev); 682 683 if (!netif_running(ndev)) { 684 w5300_hw_reset(priv); 685 w5300_hw_start(priv); 686 687 netif_device_attach(ndev); 688 if (!gpio_is_valid(priv->link_gpio) || 689 gpio_get_value(priv->link_gpio) != 0) 690 netif_carrier_on(ndev); 691 } 692 return 0; 693 } 694 #endif /* CONFIG_PM_SLEEP */ 695 696 static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume); 697 698 static struct platform_driver w5300_driver = { 699 .driver = { 700 .name = DRV_NAME, 701 .pm = &w5300_pm_ops, 702 }, 703 .probe = w5300_probe, 704 .remove = w5300_remove, 705 }; 706 707 module_platform_driver(w5300_driver); 708