1 /* 2 * Ethernet driver for the WIZnet W5300 chip. 3 * 4 * Copyright (C) 2008-2009 WIZnet Co.,Ltd. 5 * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com> 6 * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru> 7 * 8 * Licensed under the GPL-2 or later. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/platform_device.h> 16 #include <linux/platform_data/wiznet.h> 17 #include <linux/ethtool.h> 18 #include <linux/skbuff.h> 19 #include <linux/types.h> 20 #include <linux/errno.h> 21 #include <linux/delay.h> 22 #include <linux/slab.h> 23 #include <linux/spinlock.h> 24 #include <linux/io.h> 25 #include <linux/ioport.h> 26 #include <linux/interrupt.h> 27 #include <linux/irq.h> 28 #include <linux/gpio.h> 29 30 #define DRV_NAME "w5300" 31 #define DRV_VERSION "2012-04-04" 32 33 MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION); 34 MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>"); 35 MODULE_ALIAS("platform:"DRV_NAME); 36 MODULE_LICENSE("GPL"); 37 38 /* 39 * Registers 40 */ 41 #define W5300_MR 0x0000 /* Mode Register */ 42 #define MR_DBW (1 << 15) /* Data bus width */ 43 #define MR_MPF (1 << 14) /* Mac layer pause frame */ 44 #define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */ 45 #define MR_RDH (1 << 10) /* Read data hold time */ 46 #define MR_FS (1 << 8) /* FIFO swap */ 47 #define MR_RST (1 << 7) /* S/W reset */ 48 #define MR_PB (1 << 4) /* Ping block */ 49 #define MR_DBS (1 << 2) /* Data bus swap */ 50 #define MR_IND (1 << 0) /* Indirect mode */ 51 #define W5300_IR 0x0002 /* Interrupt Register */ 52 #define W5300_IMR 0x0004 /* Interrupt Mask Register */ 53 #define IR_S0 0x0001 /* S0 interrupt */ 54 #define W5300_SHARL 0x0008 /* Source MAC address (0123) */ 55 #define W5300_SHARH 0x000c /* Source MAC address (45) */ 56 #define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */ 57 #define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */ 58 #define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */ 59 #define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */ 60 #define W5300_MTYPE 0x0030 /* Memory Type */ 61 #define W5300_IDR 0x00fe /* Chip ID register */ 62 #define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */ 63 #define W5300_S0_MR 0x0200 /* S0 Mode Register */ 64 #define S0_MR_CLOSED 0x0000 /* Close mode */ 65 #define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscuous) */ 66 #define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */ 67 #define W5300_S0_CR 0x0202 /* S0 Command Register */ 68 #define S0_CR_OPEN 0x0001 /* OPEN command */ 69 #define S0_CR_CLOSE 0x0010 /* CLOSE command */ 70 #define S0_CR_SEND 0x0020 /* SEND command */ 71 #define S0_CR_RECV 0x0040 /* RECV command */ 72 #define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */ 73 #define W5300_S0_IR 0x0206 /* S0 Interrupt Register */ 74 #define S0_IR_RECV 0x0004 /* Receive interrupt */ 75 #define S0_IR_SENDOK 0x0010 /* Send OK interrupt */ 76 #define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */ 77 #define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */ 78 #define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */ 79 #define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */ 80 #define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */ 81 #define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */ 82 #define W5300_REGS_LEN 0x0400 83 84 /* 85 * Device driver private data structure 86 */ 87 struct w5300_priv { 88 void __iomem *base; 89 spinlock_t reg_lock; 90 bool indirect; 91 u16 (*read) (struct w5300_priv *priv, u16 addr); 92 void (*write)(struct w5300_priv *priv, u16 addr, u16 data); 93 int irq; 94 int link_irq; 95 int link_gpio; 96 97 struct napi_struct napi; 98 struct net_device *ndev; 99 bool promisc; 100 u32 msg_enable; 101 }; 102 103 /************************************************************************ 104 * 105 * Lowlevel I/O functions 106 * 107 ***********************************************************************/ 108 109 /* 110 * In direct address mode host system can directly access W5300 registers 111 * after mapping to Memory-Mapped I/O space. 112 * 113 * 0x400 bytes are required for memory space. 114 */ 115 static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr) 116 { 117 return ioread16(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT)); 118 } 119 120 static inline void w5300_write_direct(struct w5300_priv *priv, 121 u16 addr, u16 data) 122 { 123 iowrite16(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT)); 124 } 125 126 /* 127 * In indirect address mode host system indirectly accesses registers by 128 * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data 129 * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space. 130 * Mode Register (MR) is directly accessible. 131 * 132 * Only 0x06 bytes are required for memory space. 133 */ 134 #define W5300_IDM_AR 0x0002 /* Indirect Mode Address */ 135 #define W5300_IDM_DR 0x0004 /* Indirect Mode Data */ 136 137 static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr) 138 { 139 unsigned long flags; 140 u16 data; 141 142 spin_lock_irqsave(&priv->reg_lock, flags); 143 w5300_write_direct(priv, W5300_IDM_AR, addr); 144 data = w5300_read_direct(priv, W5300_IDM_DR); 145 spin_unlock_irqrestore(&priv->reg_lock, flags); 146 147 return data; 148 } 149 150 static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data) 151 { 152 unsigned long flags; 153 154 spin_lock_irqsave(&priv->reg_lock, flags); 155 w5300_write_direct(priv, W5300_IDM_AR, addr); 156 w5300_write_direct(priv, W5300_IDM_DR, data); 157 spin_unlock_irqrestore(&priv->reg_lock, flags); 158 } 159 160 #if defined(CONFIG_WIZNET_BUS_DIRECT) 161 #define w5300_read w5300_read_direct 162 #define w5300_write w5300_write_direct 163 164 #elif defined(CONFIG_WIZNET_BUS_INDIRECT) 165 #define w5300_read w5300_read_indirect 166 #define w5300_write w5300_write_indirect 167 168 #else /* CONFIG_WIZNET_BUS_ANY */ 169 #define w5300_read priv->read 170 #define w5300_write priv->write 171 #endif 172 173 static u32 w5300_read32(struct w5300_priv *priv, u16 addr) 174 { 175 u32 data; 176 data = w5300_read(priv, addr) << 16; 177 data |= w5300_read(priv, addr + 2); 178 return data; 179 } 180 181 static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data) 182 { 183 w5300_write(priv, addr, data >> 16); 184 w5300_write(priv, addr + 2, data); 185 } 186 187 static int w5300_command(struct w5300_priv *priv, u16 cmd) 188 { 189 unsigned long timeout = jiffies + msecs_to_jiffies(100); 190 191 w5300_write(priv, W5300_S0_CR, cmd); 192 193 while (w5300_read(priv, W5300_S0_CR) != 0) { 194 if (time_after(jiffies, timeout)) 195 return -EIO; 196 cpu_relax(); 197 } 198 199 return 0; 200 } 201 202 static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len) 203 { 204 u16 fifo; 205 int i; 206 207 for (i = 0; i < len; i += 2) { 208 fifo = w5300_read(priv, W5300_S0_RX_FIFO); 209 *buf++ = fifo >> 8; 210 *buf++ = fifo; 211 } 212 fifo = w5300_read(priv, W5300_S0_RX_FIFO); 213 fifo = w5300_read(priv, W5300_S0_RX_FIFO); 214 } 215 216 static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len) 217 { 218 u16 fifo; 219 int i; 220 221 for (i = 0; i < len; i += 2) { 222 fifo = *buf++ << 8; 223 fifo |= *buf++; 224 w5300_write(priv, W5300_S0_TX_FIFO, fifo); 225 } 226 w5300_write32(priv, W5300_S0_TX_WRSR, len); 227 } 228 229 static void w5300_write_macaddr(struct w5300_priv *priv) 230 { 231 struct net_device *ndev = priv->ndev; 232 w5300_write32(priv, W5300_SHARL, 233 ndev->dev_addr[0] << 24 | 234 ndev->dev_addr[1] << 16 | 235 ndev->dev_addr[2] << 8 | 236 ndev->dev_addr[3]); 237 w5300_write(priv, W5300_SHARH, 238 ndev->dev_addr[4] << 8 | 239 ndev->dev_addr[5]); 240 } 241 242 static void w5300_hw_reset(struct w5300_priv *priv) 243 { 244 w5300_write_direct(priv, W5300_MR, MR_RST); 245 mdelay(5); 246 w5300_write_direct(priv, W5300_MR, priv->indirect ? 247 MR_WDF(7) | MR_PB | MR_IND : 248 MR_WDF(7) | MR_PB); 249 w5300_write(priv, W5300_IMR, 0); 250 w5300_write_macaddr(priv); 251 252 /* Configure 128K of internal memory 253 * as 64K RX fifo and 64K TX fifo 254 */ 255 w5300_write32(priv, W5300_RMSRL, 64 << 24); 256 w5300_write32(priv, W5300_RMSRH, 0); 257 w5300_write32(priv, W5300_TMSRL, 64 << 24); 258 w5300_write32(priv, W5300_TMSRH, 0); 259 w5300_write(priv, W5300_MTYPE, 0x00ff); 260 } 261 262 static void w5300_hw_start(struct w5300_priv *priv) 263 { 264 w5300_write(priv, W5300_S0_MR, priv->promisc ? 265 S0_MR_MACRAW : S0_MR_MACRAW_MF); 266 w5300_command(priv, S0_CR_OPEN); 267 w5300_write(priv, W5300_S0_IMR, S0_IR_RECV | S0_IR_SENDOK); 268 w5300_write(priv, W5300_IMR, IR_S0); 269 } 270 271 static void w5300_hw_close(struct w5300_priv *priv) 272 { 273 w5300_write(priv, W5300_IMR, 0); 274 w5300_command(priv, S0_CR_CLOSE); 275 } 276 277 /*********************************************************************** 278 * 279 * Device driver functions / callbacks 280 * 281 ***********************************************************************/ 282 283 static void w5300_get_drvinfo(struct net_device *ndev, 284 struct ethtool_drvinfo *info) 285 { 286 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); 287 strlcpy(info->version, DRV_VERSION, sizeof(info->version)); 288 strlcpy(info->bus_info, dev_name(ndev->dev.parent), 289 sizeof(info->bus_info)); 290 } 291 292 static u32 w5300_get_link(struct net_device *ndev) 293 { 294 struct w5300_priv *priv = netdev_priv(ndev); 295 296 if (gpio_is_valid(priv->link_gpio)) 297 return !!gpio_get_value(priv->link_gpio); 298 299 return 1; 300 } 301 302 static u32 w5300_get_msglevel(struct net_device *ndev) 303 { 304 struct w5300_priv *priv = netdev_priv(ndev); 305 306 return priv->msg_enable; 307 } 308 309 static void w5300_set_msglevel(struct net_device *ndev, u32 value) 310 { 311 struct w5300_priv *priv = netdev_priv(ndev); 312 313 priv->msg_enable = value; 314 } 315 316 static int w5300_get_regs_len(struct net_device *ndev) 317 { 318 return W5300_REGS_LEN; 319 } 320 321 static void w5300_get_regs(struct net_device *ndev, 322 struct ethtool_regs *regs, void *_buf) 323 { 324 struct w5300_priv *priv = netdev_priv(ndev); 325 u8 *buf = _buf; 326 u16 addr; 327 u16 data; 328 329 regs->version = 1; 330 for (addr = 0; addr < W5300_REGS_LEN; addr += 2) { 331 switch (addr & 0x23f) { 332 case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */ 333 case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */ 334 data = 0xffff; 335 break; 336 default: 337 data = w5300_read(priv, addr); 338 break; 339 } 340 *buf++ = data >> 8; 341 *buf++ = data; 342 } 343 } 344 345 static void w5300_tx_timeout(struct net_device *ndev) 346 { 347 struct w5300_priv *priv = netdev_priv(ndev); 348 349 netif_stop_queue(ndev); 350 w5300_hw_reset(priv); 351 w5300_hw_start(priv); 352 ndev->stats.tx_errors++; 353 netif_trans_update(ndev); 354 netif_wake_queue(ndev); 355 } 356 357 static netdev_tx_t w5300_start_tx(struct sk_buff *skb, struct net_device *ndev) 358 { 359 struct w5300_priv *priv = netdev_priv(ndev); 360 361 netif_stop_queue(ndev); 362 363 w5300_write_frame(priv, skb->data, skb->len); 364 ndev->stats.tx_packets++; 365 ndev->stats.tx_bytes += skb->len; 366 dev_kfree_skb(skb); 367 netif_dbg(priv, tx_queued, ndev, "tx queued\n"); 368 369 w5300_command(priv, S0_CR_SEND); 370 371 return NETDEV_TX_OK; 372 } 373 374 static int w5300_napi_poll(struct napi_struct *napi, int budget) 375 { 376 struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi); 377 struct net_device *ndev = priv->ndev; 378 struct sk_buff *skb; 379 int rx_count; 380 u16 rx_len; 381 382 for (rx_count = 0; rx_count < budget; rx_count++) { 383 u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR); 384 if (rx_fifo_len == 0) 385 break; 386 387 rx_len = w5300_read(priv, W5300_S0_RX_FIFO); 388 389 skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2)); 390 if (unlikely(!skb)) { 391 u32 i; 392 for (i = 0; i < rx_fifo_len; i += 2) 393 w5300_read(priv, W5300_S0_RX_FIFO); 394 ndev->stats.rx_dropped++; 395 return -ENOMEM; 396 } 397 398 skb_put(skb, rx_len); 399 w5300_read_frame(priv, skb->data, rx_len); 400 skb->protocol = eth_type_trans(skb, ndev); 401 402 netif_receive_skb(skb); 403 ndev->stats.rx_packets++; 404 ndev->stats.rx_bytes += rx_len; 405 } 406 407 if (rx_count < budget) { 408 napi_complete_done(napi, rx_count); 409 w5300_write(priv, W5300_IMR, IR_S0); 410 } 411 412 return rx_count; 413 } 414 415 static irqreturn_t w5300_interrupt(int irq, void *ndev_instance) 416 { 417 struct net_device *ndev = ndev_instance; 418 struct w5300_priv *priv = netdev_priv(ndev); 419 420 int ir = w5300_read(priv, W5300_S0_IR); 421 if (!ir) 422 return IRQ_NONE; 423 w5300_write(priv, W5300_S0_IR, ir); 424 425 if (ir & S0_IR_SENDOK) { 426 netif_dbg(priv, tx_done, ndev, "tx done\n"); 427 netif_wake_queue(ndev); 428 } 429 430 if (ir & S0_IR_RECV) { 431 if (napi_schedule_prep(&priv->napi)) { 432 w5300_write(priv, W5300_IMR, 0); 433 __napi_schedule(&priv->napi); 434 } 435 } 436 437 return IRQ_HANDLED; 438 } 439 440 static irqreturn_t w5300_detect_link(int irq, void *ndev_instance) 441 { 442 struct net_device *ndev = ndev_instance; 443 struct w5300_priv *priv = netdev_priv(ndev); 444 445 if (netif_running(ndev)) { 446 if (gpio_get_value(priv->link_gpio) != 0) { 447 netif_info(priv, link, ndev, "link is up\n"); 448 netif_carrier_on(ndev); 449 } else { 450 netif_info(priv, link, ndev, "link is down\n"); 451 netif_carrier_off(ndev); 452 } 453 } 454 455 return IRQ_HANDLED; 456 } 457 458 static void w5300_set_rx_mode(struct net_device *ndev) 459 { 460 struct w5300_priv *priv = netdev_priv(ndev); 461 bool set_promisc = (ndev->flags & IFF_PROMISC) != 0; 462 463 if (priv->promisc != set_promisc) { 464 priv->promisc = set_promisc; 465 w5300_hw_start(priv); 466 } 467 } 468 469 static int w5300_set_macaddr(struct net_device *ndev, void *addr) 470 { 471 struct w5300_priv *priv = netdev_priv(ndev); 472 struct sockaddr *sock_addr = addr; 473 474 if (!is_valid_ether_addr(sock_addr->sa_data)) 475 return -EADDRNOTAVAIL; 476 memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN); 477 w5300_write_macaddr(priv); 478 return 0; 479 } 480 481 static int w5300_open(struct net_device *ndev) 482 { 483 struct w5300_priv *priv = netdev_priv(ndev); 484 485 netif_info(priv, ifup, ndev, "enabling\n"); 486 w5300_hw_start(priv); 487 napi_enable(&priv->napi); 488 netif_start_queue(ndev); 489 if (!gpio_is_valid(priv->link_gpio) || 490 gpio_get_value(priv->link_gpio) != 0) 491 netif_carrier_on(ndev); 492 return 0; 493 } 494 495 static int w5300_stop(struct net_device *ndev) 496 { 497 struct w5300_priv *priv = netdev_priv(ndev); 498 499 netif_info(priv, ifdown, ndev, "shutting down\n"); 500 w5300_hw_close(priv); 501 netif_carrier_off(ndev); 502 netif_stop_queue(ndev); 503 napi_disable(&priv->napi); 504 return 0; 505 } 506 507 static const struct ethtool_ops w5300_ethtool_ops = { 508 .get_drvinfo = w5300_get_drvinfo, 509 .get_msglevel = w5300_get_msglevel, 510 .set_msglevel = w5300_set_msglevel, 511 .get_link = w5300_get_link, 512 .get_regs_len = w5300_get_regs_len, 513 .get_regs = w5300_get_regs, 514 }; 515 516 static const struct net_device_ops w5300_netdev_ops = { 517 .ndo_open = w5300_open, 518 .ndo_stop = w5300_stop, 519 .ndo_start_xmit = w5300_start_tx, 520 .ndo_tx_timeout = w5300_tx_timeout, 521 .ndo_set_rx_mode = w5300_set_rx_mode, 522 .ndo_set_mac_address = w5300_set_macaddr, 523 .ndo_validate_addr = eth_validate_addr, 524 }; 525 526 static int w5300_hw_probe(struct platform_device *pdev) 527 { 528 struct wiznet_platform_data *data = dev_get_platdata(&pdev->dev); 529 struct net_device *ndev = platform_get_drvdata(pdev); 530 struct w5300_priv *priv = netdev_priv(ndev); 531 const char *name = netdev_name(ndev); 532 struct resource *mem; 533 int mem_size; 534 int irq; 535 int ret; 536 537 if (data && is_valid_ether_addr(data->mac_addr)) { 538 memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN); 539 } else { 540 eth_hw_addr_random(ndev); 541 } 542 543 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 544 priv->base = devm_ioremap_resource(&pdev->dev, mem); 545 if (IS_ERR(priv->base)) 546 return PTR_ERR(priv->base); 547 548 mem_size = resource_size(mem); 549 550 spin_lock_init(&priv->reg_lock); 551 priv->indirect = mem_size < W5300_BUS_DIRECT_SIZE; 552 if (priv->indirect) { 553 priv->read = w5300_read_indirect; 554 priv->write = w5300_write_indirect; 555 } else { 556 priv->read = w5300_read_direct; 557 priv->write = w5300_write_direct; 558 } 559 560 w5300_hw_reset(priv); 561 if (w5300_read(priv, W5300_IDR) != IDR_W5300) 562 return -ENODEV; 563 564 irq = platform_get_irq(pdev, 0); 565 if (irq < 0) 566 return irq; 567 ret = request_irq(irq, w5300_interrupt, 568 IRQ_TYPE_LEVEL_LOW, name, ndev); 569 if (ret < 0) 570 return ret; 571 priv->irq = irq; 572 573 priv->link_gpio = data ? data->link_gpio : -EINVAL; 574 if (gpio_is_valid(priv->link_gpio)) { 575 char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL); 576 if (!link_name) 577 return -ENOMEM; 578 snprintf(link_name, 16, "%s-link", name); 579 priv->link_irq = gpio_to_irq(priv->link_gpio); 580 if (request_any_context_irq(priv->link_irq, w5300_detect_link, 581 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 582 link_name, priv->ndev) < 0) 583 priv->link_gpio = -EINVAL; 584 } 585 586 netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq); 587 return 0; 588 } 589 590 static int w5300_probe(struct platform_device *pdev) 591 { 592 struct w5300_priv *priv; 593 struct net_device *ndev; 594 int err; 595 596 ndev = alloc_etherdev(sizeof(*priv)); 597 if (!ndev) 598 return -ENOMEM; 599 SET_NETDEV_DEV(ndev, &pdev->dev); 600 platform_set_drvdata(pdev, ndev); 601 priv = netdev_priv(ndev); 602 priv->ndev = ndev; 603 604 ndev->netdev_ops = &w5300_netdev_ops; 605 ndev->ethtool_ops = &w5300_ethtool_ops; 606 ndev->watchdog_timeo = HZ; 607 netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16); 608 609 /* This chip doesn't support VLAN packets with normal MTU, 610 * so disable VLAN for this device. 611 */ 612 ndev->features |= NETIF_F_VLAN_CHALLENGED; 613 614 err = register_netdev(ndev); 615 if (err < 0) 616 goto err_register; 617 618 err = w5300_hw_probe(pdev); 619 if (err < 0) 620 goto err_hw_probe; 621 622 return 0; 623 624 err_hw_probe: 625 unregister_netdev(ndev); 626 err_register: 627 free_netdev(ndev); 628 return err; 629 } 630 631 static int w5300_remove(struct platform_device *pdev) 632 { 633 struct net_device *ndev = platform_get_drvdata(pdev); 634 struct w5300_priv *priv = netdev_priv(ndev); 635 636 w5300_hw_reset(priv); 637 free_irq(priv->irq, ndev); 638 if (gpio_is_valid(priv->link_gpio)) 639 free_irq(priv->link_irq, ndev); 640 641 unregister_netdev(ndev); 642 free_netdev(ndev); 643 return 0; 644 } 645 646 #ifdef CONFIG_PM_SLEEP 647 static int w5300_suspend(struct device *dev) 648 { 649 struct net_device *ndev = dev_get_drvdata(dev); 650 struct w5300_priv *priv = netdev_priv(ndev); 651 652 if (netif_running(ndev)) { 653 netif_carrier_off(ndev); 654 netif_device_detach(ndev); 655 656 w5300_hw_close(priv); 657 } 658 return 0; 659 } 660 661 static int w5300_resume(struct device *dev) 662 { 663 struct net_device *ndev = dev_get_drvdata(dev); 664 struct w5300_priv *priv = netdev_priv(ndev); 665 666 if (!netif_running(ndev)) { 667 w5300_hw_reset(priv); 668 w5300_hw_start(priv); 669 670 netif_device_attach(ndev); 671 if (!gpio_is_valid(priv->link_gpio) || 672 gpio_get_value(priv->link_gpio) != 0) 673 netif_carrier_on(ndev); 674 } 675 return 0; 676 } 677 #endif /* CONFIG_PM_SLEEP */ 678 679 static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume); 680 681 static struct platform_driver w5300_driver = { 682 .driver = { 683 .name = DRV_NAME, 684 .pm = &w5300_pm_ops, 685 }, 686 .probe = w5300_probe, 687 .remove = w5300_remove, 688 }; 689 690 module_platform_driver(w5300_driver); 691