1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */
3 
4 #ifndef _TXGBE_TYPE_H_
5 #define _TXGBE_TYPE_H_
6 
7 #include <linux/property.h>
8 
9 /* Device IDs */
10 #define TXGBE_DEV_ID_SP1000                     0x1001
11 #define TXGBE_DEV_ID_WX1820                     0x2001
12 
13 /* Subsystem IDs */
14 /* SFP */
15 #define TXGBE_ID_SP1000_SFP                     0x0000
16 #define TXGBE_ID_WX1820_SFP                     0x2000
17 #define TXGBE_ID_SFP                            0x00
18 
19 /* copper */
20 #define TXGBE_ID_SP1000_XAUI                    0x1010
21 #define TXGBE_ID_WX1820_XAUI                    0x2010
22 #define TXGBE_ID_XAUI                           0x10
23 #define TXGBE_ID_SP1000_SGMII                   0x1020
24 #define TXGBE_ID_WX1820_SGMII                   0x2020
25 #define TXGBE_ID_SGMII                          0x20
26 /* backplane */
27 #define TXGBE_ID_SP1000_KR_KX_KX4               0x1030
28 #define TXGBE_ID_WX1820_KR_KX_KX4               0x2030
29 #define TXGBE_ID_KR_KX_KX4                      0x30
30 /* MAC Interface */
31 #define TXGBE_ID_SP1000_MAC_XAUI                0x1040
32 #define TXGBE_ID_WX1820_MAC_XAUI                0x2040
33 #define TXGBE_ID_MAC_XAUI                       0x40
34 #define TXGBE_ID_SP1000_MAC_SGMII               0x1060
35 #define TXGBE_ID_WX1820_MAC_SGMII               0x2060
36 #define TXGBE_ID_MAC_SGMII                      0x60
37 
38 /* Combined interface*/
39 #define TXGBE_ID_SFI_XAUI			0x50
40 
41 /* Revision ID */
42 #define TXGBE_SP_MPW  1
43 
44 /**************** SP Registers ****************************/
45 /* chip control Registers */
46 #define TXGBE_MIS_PRB_CTL                       0x10010
47 #define TXGBE_MIS_PRB_CTL_LAN_UP(_i)            BIT(1 - (_i))
48 /* FMGR Registers */
49 #define TXGBE_SPI_ILDR_STATUS                   0x10120
50 #define TXGBE_SPI_ILDR_STATUS_PERST             BIT(0) /* PCIE_PERST is done */
51 #define TXGBE_SPI_ILDR_STATUS_PWRRST            BIT(1) /* Power on reset is done */
52 #define TXGBE_SPI_ILDR_STATUS_LAN_SW_RST(_i)    BIT((_i) + 9) /* lan soft reset done */
53 
54 /* Sensors for PVT(Process Voltage Temperature) */
55 #define TXGBE_TS_CTL                            0x10300
56 #define TXGBE_TS_CTL_EVAL_MD                    BIT(31)
57 
58 /* I2C registers */
59 #define TXGBE_I2C_BASE                          0x14900
60 
61 /* Part Number String Length */
62 #define TXGBE_PBANUM_LENGTH                     32
63 
64 /* Checksum and EEPROM pointers */
65 #define TXGBE_EEPROM_LAST_WORD                  0x800
66 #define TXGBE_EEPROM_CHECKSUM                   0x2F
67 #define TXGBE_EEPROM_SUM                        0xBABA
68 #define TXGBE_EEPROM_VERSION_L                  0x1D
69 #define TXGBE_EEPROM_VERSION_H                  0x1E
70 #define TXGBE_ISCSI_BOOT_CONFIG                 0x07
71 #define TXGBE_PBANUM0_PTR                       0x05
72 #define TXGBE_PBANUM1_PTR                       0x06
73 #define TXGBE_PBANUM_PTR_GUARD                  0xFAFA
74 
75 #define TXGBE_MAX_MSIX_VECTORS          64
76 #define TXGBE_MAX_FDIR_INDICES          63
77 
78 #define TXGBE_MAX_RX_QUEUES   (TXGBE_MAX_FDIR_INDICES + 1)
79 #define TXGBE_MAX_TX_QUEUES   (TXGBE_MAX_FDIR_INDICES + 1)
80 
81 #define TXGBE_SP_MAX_TX_QUEUES  128
82 #define TXGBE_SP_MAX_RX_QUEUES  128
83 #define TXGBE_SP_RAR_ENTRIES    128
84 #define TXGBE_SP_MC_TBL_SIZE    128
85 #define TXGBE_SP_VFT_TBL_SIZE   128
86 #define TXGBE_SP_RX_PB_SIZE     512
87 #define TXGBE_SP_TDB_PB_SZ      (160 * 1024) /* 160KB Packet Buffer */
88 
89 /* TX/RX descriptor defines */
90 #define TXGBE_DEFAULT_TXD               512
91 #define TXGBE_DEFAULT_TX_WORK           256
92 
93 #if (PAGE_SIZE < 8192)
94 #define TXGBE_DEFAULT_RXD               512
95 #define TXGBE_DEFAULT_RX_WORK           256
96 #else
97 #define TXGBE_DEFAULT_RXD               256
98 #define TXGBE_DEFAULT_RX_WORK           128
99 #endif
100 
101 #define TXGBE_INTR_MISC(A)    BIT((A)->num_q_vectors)
102 #define TXGBE_INTR_QALL(A)    (TXGBE_INTR_MISC(A) - 1)
103 
104 #define TXGBE_MAX_EITR        GENMASK(11, 3)
105 
106 extern char txgbe_driver_name[];
107 
108 static inline struct txgbe *netdev_to_txgbe(struct net_device *netdev)
109 {
110 	struct wx *wx = netdev_priv(netdev);
111 
112 	return wx->priv;
113 }
114 
115 #define NODE_PROP(_NAME, _PROP)			\
116 	(const struct software_node) {		\
117 		.name = _NAME,			\
118 		.properties = _PROP,		\
119 	}
120 
121 enum txgbe_swnodes {
122 	SWNODE_GPIO = 0,
123 	SWNODE_I2C,
124 	SWNODE_SFP,
125 	SWNODE_PHYLINK,
126 	SWNODE_MAX
127 };
128 
129 struct txgbe_nodes {
130 	char gpio_name[32];
131 	char i2c_name[32];
132 	char sfp_name[32];
133 	char phylink_name[32];
134 	struct property_entry gpio_props[1];
135 	struct property_entry i2c_props[3];
136 	struct property_entry sfp_props[8];
137 	struct property_entry phylink_props[2];
138 	struct software_node_ref_args i2c_ref[1];
139 	struct software_node_ref_args gpio0_ref[1];
140 	struct software_node_ref_args gpio1_ref[1];
141 	struct software_node_ref_args gpio2_ref[1];
142 	struct software_node_ref_args gpio3_ref[1];
143 	struct software_node_ref_args gpio4_ref[1];
144 	struct software_node_ref_args gpio5_ref[1];
145 	struct software_node_ref_args sfp_ref[1];
146 	struct software_node swnodes[SWNODE_MAX];
147 	const struct software_node *group[SWNODE_MAX + 1];
148 };
149 
150 struct txgbe {
151 	struct wx *wx;
152 	struct txgbe_nodes nodes;
153 	struct platform_device *i2c_dev;
154 	struct clk_lookup *clock;
155 	struct clk *clk;
156 };
157 
158 #endif /* _TXGBE_TYPE_H_ */
159