xref: /openbmc/linux/drivers/net/ethernet/wangxun/ngbe/ngbe_main.c (revision a266ef69b890f099069cf51bb40572611c435a54)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019 - 2022 Beijing WangXun Technology Co., Ltd. */
3 
4 #include <linux/types.h>
5 #include <linux/module.h>
6 #include <linux/pci.h>
7 #include <linux/netdevice.h>
8 #include <linux/string.h>
9 #include <linux/aer.h>
10 #include <linux/etherdevice.h>
11 #include <net/ip.h>
12 #include <linux/phy.h>
13 
14 #include "../libwx/wx_type.h"
15 #include "../libwx/wx_hw.h"
16 #include "ngbe_type.h"
17 #include "ngbe_mdio.h"
18 #include "ngbe_hw.h"
19 
20 char ngbe_driver_name[] = "ngbe";
21 
22 /* ngbe_pci_tbl - PCI Device ID Table
23  *
24  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
25  *   Class, Class Mask, private data (not used) }
26  */
27 static const struct pci_device_id ngbe_pci_tbl[] = {
28 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL_W), 0},
29 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A2), 0},
30 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A2S), 0},
31 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A4), 0},
32 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A4S), 0},
33 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL2), 0},
34 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL2S), 0},
35 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL4), 0},
36 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL4S), 0},
37 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860LC), 0},
38 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A1), 0},
39 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A1L), 0},
40 	/* required last entry */
41 	{ .device = 0 }
42 };
43 
44 /**
45  *  ngbe_init_type_code - Initialize the shared code
46  *  @wx: pointer to hardware structure
47  **/
48 static void ngbe_init_type_code(struct wx *wx)
49 {
50 	int wol_mask = 0, ncsi_mask = 0;
51 	u16 type_mask = 0, val;
52 
53 	wx->mac.type = wx_mac_em;
54 	type_mask = (u16)(wx->subsystem_device_id & NGBE_OEM_MASK);
55 	ncsi_mask = wx->subsystem_device_id & NGBE_NCSI_MASK;
56 	wol_mask = wx->subsystem_device_id & NGBE_WOL_MASK;
57 
58 	val = rd32(wx, WX_CFG_PORT_ST);
59 	wx->mac_type = (val & BIT(7)) >> 7 ?
60 		       em_mac_type_rgmii :
61 		       em_mac_type_mdi;
62 
63 	wx->wol_enabled = (wol_mask == NGBE_WOL_SUP) ? 1 : 0;
64 	wx->ncsi_enabled = (ncsi_mask == NGBE_NCSI_MASK ||
65 			   type_mask == NGBE_SUBID_OCP_CARD) ? 1 : 0;
66 
67 	switch (type_mask) {
68 	case NGBE_SUBID_LY_YT8521S_SFP:
69 	case NGBE_SUBID_LY_M88E1512_SFP:
70 	case NGBE_SUBID_YT8521S_SFP_GPIO:
71 	case NGBE_SUBID_INTERNAL_YT8521S_SFP_GPIO:
72 		wx->gpio_ctrl = 1;
73 		break;
74 	default:
75 		wx->gpio_ctrl = 0;
76 		break;
77 	}
78 }
79 
80 /**
81  * ngbe_init_rss_key - Initialize wx RSS key
82  * @wx: device handle
83  *
84  * Allocates and initializes the RSS key if it is not allocated.
85  **/
86 static inline int ngbe_init_rss_key(struct wx *wx)
87 {
88 	u32 *rss_key;
89 
90 	if (!wx->rss_key) {
91 		rss_key = kzalloc(WX_RSS_KEY_SIZE, GFP_KERNEL);
92 		if (unlikely(!rss_key))
93 			return -ENOMEM;
94 
95 		netdev_rss_key_fill(rss_key, WX_RSS_KEY_SIZE);
96 		wx->rss_key = rss_key;
97 	}
98 
99 	return 0;
100 }
101 
102 /**
103  * ngbe_sw_init - Initialize general software structures
104  * @wx: board private structure to initialize
105  **/
106 static int ngbe_sw_init(struct wx *wx)
107 {
108 	struct pci_dev *pdev = wx->pdev;
109 	u16 msix_count = 0;
110 	int err = 0;
111 
112 	wx->mac.num_rar_entries = NGBE_RAR_ENTRIES;
113 	wx->mac.max_rx_queues = NGBE_MAX_RX_QUEUES;
114 	wx->mac.max_tx_queues = NGBE_MAX_TX_QUEUES;
115 
116 	/* PCI config space info */
117 	err = wx_sw_init(wx);
118 	if (err < 0) {
119 		wx_err(wx, "read of internal subsystem device id failed\n");
120 		return err;
121 	}
122 
123 	/* mac type, phy type , oem type */
124 	ngbe_init_type_code(wx);
125 
126 	/* Set common capability flags and settings */
127 	wx->max_q_vectors = NGBE_MAX_MSIX_VECTORS;
128 	err = wx_get_pcie_msix_counts(wx, &msix_count, NGBE_MAX_MSIX_VECTORS);
129 	if (err)
130 		dev_err(&pdev->dev, "Do not support MSI-X\n");
131 	wx->mac.max_msix_vectors = msix_count;
132 
133 	if (ngbe_init_rss_key(wx))
134 		return -ENOMEM;
135 
136 	/* enable itr by default in dynamic mode */
137 	wx->rx_itr_setting = 1;
138 	wx->tx_itr_setting = 1;
139 
140 	/* set default ring sizes */
141 	wx->tx_ring_count = NGBE_DEFAULT_TXD;
142 	wx->rx_ring_count = NGBE_DEFAULT_RXD;
143 
144 	/* set default work limits */
145 	wx->tx_work_limit = NGBE_DEFAULT_TX_WORK;
146 	wx->rx_work_limit = NGBE_DEFAULT_RX_WORK;
147 
148 	return 0;
149 }
150 
151 static void ngbe_disable_device(struct wx *wx)
152 {
153 	struct net_device *netdev = wx->netdev;
154 
155 	/* disable receives */
156 	wx_disable_rx(wx);
157 	netif_tx_disable(netdev);
158 	if (wx->gpio_ctrl)
159 		ngbe_sfp_modules_txrx_powerctl(wx, false);
160 }
161 
162 static void ngbe_down(struct wx *wx)
163 {
164 	phy_stop(wx->phydev);
165 	ngbe_disable_device(wx);
166 }
167 
168 static void ngbe_up(struct wx *wx)
169 {
170 	if (wx->gpio_ctrl)
171 		ngbe_sfp_modules_txrx_powerctl(wx, true);
172 	phy_start(wx->phydev);
173 }
174 
175 /**
176  * ngbe_open - Called when a network interface is made active
177  * @netdev: network interface device structure
178  *
179  * Returns 0 on success, negative value on failure
180  *
181  * The open entry point is called when a network interface is made
182  * active by the system (IFF_UP).
183  **/
184 static int ngbe_open(struct net_device *netdev)
185 {
186 	struct wx *wx = netdev_priv(netdev);
187 	int err;
188 
189 	wx_control_hw(wx, true);
190 	err = ngbe_phy_connect(wx);
191 	if (err)
192 		return err;
193 	ngbe_up(wx);
194 
195 	return 0;
196 }
197 
198 /**
199  * ngbe_close - Disables a network interface
200  * @netdev: network interface device structure
201  *
202  * Returns 0, this is not allowed to fail
203  *
204  * The close entry point is called when an interface is de-activated
205  * by the OS.  The hardware is still under the drivers control, but
206  * needs to be disabled.  A global MAC reset is issued to stop the
207  * hardware, and all transmit and receive resources are freed.
208  **/
209 static int ngbe_close(struct net_device *netdev)
210 {
211 	struct wx *wx = netdev_priv(netdev);
212 
213 	ngbe_down(wx);
214 	phy_disconnect(wx->phydev);
215 	wx_control_hw(wx, false);
216 
217 	return 0;
218 }
219 
220 static netdev_tx_t ngbe_xmit_frame(struct sk_buff *skb,
221 				   struct net_device *netdev)
222 {
223 	return NETDEV_TX_OK;
224 }
225 
226 static void ngbe_dev_shutdown(struct pci_dev *pdev, bool *enable_wake)
227 {
228 	struct wx *wx = pci_get_drvdata(pdev);
229 	struct net_device *netdev;
230 
231 	netdev = wx->netdev;
232 	netif_device_detach(netdev);
233 
234 	rtnl_lock();
235 	if (netif_running(netdev))
236 		ngbe_down(wx);
237 	rtnl_unlock();
238 	wx_control_hw(wx, false);
239 
240 	pci_disable_device(pdev);
241 }
242 
243 static void ngbe_shutdown(struct pci_dev *pdev)
244 {
245 	struct wx *wx = pci_get_drvdata(pdev);
246 	bool wake;
247 
248 	wake = !!wx->wol;
249 
250 	ngbe_dev_shutdown(pdev, &wake);
251 
252 	if (system_state == SYSTEM_POWER_OFF) {
253 		pci_wake_from_d3(pdev, wake);
254 		pci_set_power_state(pdev, PCI_D3hot);
255 	}
256 }
257 
258 static const struct net_device_ops ngbe_netdev_ops = {
259 	.ndo_open               = ngbe_open,
260 	.ndo_stop               = ngbe_close,
261 	.ndo_start_xmit         = ngbe_xmit_frame,
262 	.ndo_validate_addr      = eth_validate_addr,
263 	.ndo_set_mac_address    = wx_set_mac,
264 };
265 
266 /**
267  * ngbe_probe - Device Initialization Routine
268  * @pdev: PCI device information struct
269  * @ent: entry in ngbe_pci_tbl
270  *
271  * Returns 0 on success, negative on failure
272  *
273  * ngbe_probe initializes an wx identified by a pci_dev structure.
274  * The OS initialization, configuring of the wx private structure,
275  * and a hardware reset occur.
276  **/
277 static int ngbe_probe(struct pci_dev *pdev,
278 		      const struct pci_device_id __always_unused *ent)
279 {
280 	struct net_device *netdev;
281 	u32 e2rom_cksum_cap = 0;
282 	struct wx *wx = NULL;
283 	static int func_nums;
284 	u16 e2rom_ver = 0;
285 	u32 etrack_id = 0;
286 	u32 saved_ver = 0;
287 	int err;
288 
289 	err = pci_enable_device_mem(pdev);
290 	if (err)
291 		return err;
292 
293 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
294 	if (err) {
295 		dev_err(&pdev->dev,
296 			"No usable DMA configuration, aborting\n");
297 		goto err_pci_disable_dev;
298 	}
299 
300 	err = pci_request_selected_regions(pdev,
301 					   pci_select_bars(pdev, IORESOURCE_MEM),
302 					   ngbe_driver_name);
303 	if (err) {
304 		dev_err(&pdev->dev,
305 			"pci_request_selected_regions failed %d\n", err);
306 		goto err_pci_disable_dev;
307 	}
308 
309 	pci_enable_pcie_error_reporting(pdev);
310 	pci_set_master(pdev);
311 
312 	netdev = devm_alloc_etherdev_mqs(&pdev->dev,
313 					 sizeof(struct wx),
314 					 NGBE_MAX_TX_QUEUES,
315 					 NGBE_MAX_RX_QUEUES);
316 	if (!netdev) {
317 		err = -ENOMEM;
318 		goto err_pci_release_regions;
319 	}
320 
321 	SET_NETDEV_DEV(netdev, &pdev->dev);
322 
323 	wx = netdev_priv(netdev);
324 	wx->netdev = netdev;
325 	wx->pdev = pdev;
326 	wx->msg_enable = BIT(3) - 1;
327 
328 	wx->hw_addr = devm_ioremap(&pdev->dev,
329 				   pci_resource_start(pdev, 0),
330 				   pci_resource_len(pdev, 0));
331 	if (!wx->hw_addr) {
332 		err = -EIO;
333 		goto err_pci_release_regions;
334 	}
335 
336 	netdev->netdev_ops = &ngbe_netdev_ops;
337 
338 	netdev->features |= NETIF_F_HIGHDMA;
339 
340 	wx->bd_number = func_nums;
341 	/* setup the private structure */
342 	err = ngbe_sw_init(wx);
343 	if (err)
344 		goto err_free_mac_table;
345 
346 	/* check if flash load is done after hw power up */
347 	err = wx_check_flash_load(wx, NGBE_SPI_ILDR_STATUS_PERST);
348 	if (err)
349 		goto err_free_mac_table;
350 	err = wx_check_flash_load(wx, NGBE_SPI_ILDR_STATUS_PWRRST);
351 	if (err)
352 		goto err_free_mac_table;
353 
354 	err = wx_mng_present(wx);
355 	if (err) {
356 		dev_err(&pdev->dev, "Management capability is not present\n");
357 		goto err_free_mac_table;
358 	}
359 
360 	err = ngbe_reset_hw(wx);
361 	if (err) {
362 		dev_err(&pdev->dev, "HW Init failed: %d\n", err);
363 		goto err_free_mac_table;
364 	}
365 
366 	if (wx->bus.func == 0) {
367 		wr32(wx, NGBE_CALSUM_CAP_STATUS, 0x0);
368 		wr32(wx, NGBE_EEPROM_VERSION_STORE_REG, 0x0);
369 	} else {
370 		e2rom_cksum_cap = rd32(wx, NGBE_CALSUM_CAP_STATUS);
371 		saved_ver = rd32(wx, NGBE_EEPROM_VERSION_STORE_REG);
372 	}
373 
374 	wx_init_eeprom_params(wx);
375 	if (wx->bus.func == 0 || e2rom_cksum_cap == 0) {
376 		/* make sure the EEPROM is ready */
377 		err = ngbe_eeprom_chksum_hostif(wx);
378 		if (err) {
379 			dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
380 			err = -EIO;
381 			goto err_free_mac_table;
382 		}
383 	}
384 
385 	wx->wol = 0;
386 	if (wx->wol_enabled)
387 		wx->wol = NGBE_PSR_WKUP_CTL_MAG;
388 
389 	wx->wol_enabled = !!(wx->wol);
390 	wr32(wx, NGBE_PSR_WKUP_CTL, wx->wol);
391 
392 	device_set_wakeup_enable(&pdev->dev, wx->wol);
393 
394 	/* Save off EEPROM version number and Option Rom version which
395 	 * together make a unique identify for the eeprom
396 	 */
397 	if (saved_ver) {
398 		etrack_id = saved_ver;
399 	} else {
400 		wx_read_ee_hostif(wx,
401 				  wx->eeprom.sw_region_offset + NGBE_EEPROM_VERSION_H,
402 				  &e2rom_ver);
403 		etrack_id = e2rom_ver << 16;
404 		wx_read_ee_hostif(wx,
405 				  wx->eeprom.sw_region_offset + NGBE_EEPROM_VERSION_L,
406 				  &e2rom_ver);
407 		etrack_id |= e2rom_ver;
408 		wr32(wx, NGBE_EEPROM_VERSION_STORE_REG, etrack_id);
409 	}
410 
411 	eth_hw_addr_set(netdev, wx->mac.perm_addr);
412 	wx_mac_set_default_filter(wx, wx->mac.perm_addr);
413 
414 	/* phy Interface Configuration */
415 	err = ngbe_mdio_init(wx);
416 	if (err)
417 		goto err_free_mac_table;
418 
419 	err = register_netdev(netdev);
420 	if (err)
421 		goto err_register;
422 
423 	pci_set_drvdata(pdev, wx);
424 
425 	netif_info(wx, probe, netdev,
426 		   "PHY: %s, PBA No: Wang Xun GbE Family Controller\n",
427 		   wx->mac_type == em_mac_type_mdi ? "Internal" : "External");
428 	netif_info(wx, probe, netdev, "%pM\n", netdev->dev_addr);
429 
430 	return 0;
431 
432 err_register:
433 	wx_control_hw(wx, false);
434 err_free_mac_table:
435 	kfree(wx->mac_table);
436 err_pci_release_regions:
437 	pci_disable_pcie_error_reporting(pdev);
438 	pci_release_selected_regions(pdev,
439 				     pci_select_bars(pdev, IORESOURCE_MEM));
440 err_pci_disable_dev:
441 	pci_disable_device(pdev);
442 	return err;
443 }
444 
445 /**
446  * ngbe_remove - Device Removal Routine
447  * @pdev: PCI device information struct
448  *
449  * ngbe_remove is called by the PCI subsystem to alert the driver
450  * that it should release a PCI device.  The could be caused by a
451  * Hot-Plug event, or because the driver is going to be removed from
452  * memory.
453  **/
454 static void ngbe_remove(struct pci_dev *pdev)
455 {
456 	struct wx *wx = pci_get_drvdata(pdev);
457 	struct net_device *netdev;
458 
459 	netdev = wx->netdev;
460 	unregister_netdev(netdev);
461 	pci_release_selected_regions(pdev,
462 				     pci_select_bars(pdev, IORESOURCE_MEM));
463 
464 	kfree(wx->mac_table);
465 	pci_disable_pcie_error_reporting(pdev);
466 
467 	pci_disable_device(pdev);
468 }
469 
470 static struct pci_driver ngbe_driver = {
471 	.name     = ngbe_driver_name,
472 	.id_table = ngbe_pci_tbl,
473 	.probe    = ngbe_probe,
474 	.remove   = ngbe_remove,
475 	.shutdown = ngbe_shutdown,
476 };
477 
478 module_pci_driver(ngbe_driver);
479 
480 MODULE_DEVICE_TABLE(pci, ngbe_pci_tbl);
481 MODULE_AUTHOR("Beijing WangXun Technology Co., Ltd, <software@net-swift.com>");
482 MODULE_DESCRIPTION("WangXun(R) Gigabit PCI Express Network Driver");
483 MODULE_LICENSE("GPL");
484