1de6cc651SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 28df158acSJeff Kirsher /* 38df158acSJeff Kirsher * Network device driver for Cell Processor-Based Blade and Celleb platform 48df158acSJeff Kirsher * 58df158acSJeff Kirsher * (C) Copyright IBM Corp. 2005 68df158acSJeff Kirsher * (C) Copyright 2006 TOSHIBA CORPORATION 78df158acSJeff Kirsher * 88df158acSJeff Kirsher * Authors : Utz Bacher <utz.bacher@de.ibm.com> 98df158acSJeff Kirsher * Jens Osterkamp <Jens.Osterkamp@de.ibm.com> 108df158acSJeff Kirsher */ 118df158acSJeff Kirsher 128df158acSJeff Kirsher #ifndef _SPIDER_NET_H 138df158acSJeff Kirsher #define _SPIDER_NET_H 148df158acSJeff Kirsher 158df158acSJeff Kirsher #define VERSION "2.0 B" 168df158acSJeff Kirsher 172bb69841SDavid S. Miller #include <linux/sungem_phy.h> 188df158acSJeff Kirsher 193e0dd1f4SJoe Perches int spider_net_stop(struct net_device *netdev); 203e0dd1f4SJoe Perches int spider_net_open(struct net_device *netdev); 218df158acSJeff Kirsher 228df158acSJeff Kirsher extern const struct ethtool_ops spider_net_ethtool_ops; 238df158acSJeff Kirsher 248df158acSJeff Kirsher extern char spider_net_driver_name[]; 258df158acSJeff Kirsher 268df158acSJeff Kirsher #define SPIDER_NET_MAX_FRAME 2312 278df158acSJeff Kirsher #define SPIDER_NET_MAX_MTU 2294 288df158acSJeff Kirsher #define SPIDER_NET_MIN_MTU 64 298df158acSJeff Kirsher 308df158acSJeff Kirsher #define SPIDER_NET_RXBUF_ALIGN 128 318df158acSJeff Kirsher 328df158acSJeff Kirsher #define SPIDER_NET_RX_DESCRIPTORS_DEFAULT 256 338df158acSJeff Kirsher #define SPIDER_NET_RX_DESCRIPTORS_MIN 16 348df158acSJeff Kirsher #define SPIDER_NET_RX_DESCRIPTORS_MAX 512 358df158acSJeff Kirsher 368df158acSJeff Kirsher #define SPIDER_NET_TX_DESCRIPTORS_DEFAULT 256 378df158acSJeff Kirsher #define SPIDER_NET_TX_DESCRIPTORS_MIN 16 388df158acSJeff Kirsher #define SPIDER_NET_TX_DESCRIPTORS_MAX 512 398df158acSJeff Kirsher 408df158acSJeff Kirsher #define SPIDER_NET_TX_TIMER (HZ/5) 418df158acSJeff Kirsher #define SPIDER_NET_ANEG_TIMER (HZ) 428df158acSJeff Kirsher #define SPIDER_NET_ANEG_TIMEOUT 5 438df158acSJeff Kirsher 448df158acSJeff Kirsher #define SPIDER_NET_RX_CSUM_DEFAULT 1 458df158acSJeff Kirsher 468df158acSJeff Kirsher #define SPIDER_NET_WATCHDOG_TIMEOUT 50*HZ 478df158acSJeff Kirsher 488df158acSJeff Kirsher #define SPIDER_NET_FIRMWARE_SEQS 6 498df158acSJeff Kirsher #define SPIDER_NET_FIRMWARE_SEQWORDS 1024 508df158acSJeff Kirsher #define SPIDER_NET_FIRMWARE_LEN (SPIDER_NET_FIRMWARE_SEQS * \ 518df158acSJeff Kirsher SPIDER_NET_FIRMWARE_SEQWORDS * \ 528df158acSJeff Kirsher sizeof(u32)) 538df158acSJeff Kirsher #define SPIDER_NET_FIRMWARE_NAME "spider_fw.bin" 548df158acSJeff Kirsher 558df158acSJeff Kirsher /** spider_net SMMIO registers */ 568df158acSJeff Kirsher #define SPIDER_NET_GHIINT0STS 0x00000000 578df158acSJeff Kirsher #define SPIDER_NET_GHIINT1STS 0x00000004 588df158acSJeff Kirsher #define SPIDER_NET_GHIINT2STS 0x00000008 598df158acSJeff Kirsher #define SPIDER_NET_GHIINT0MSK 0x00000010 608df158acSJeff Kirsher #define SPIDER_NET_GHIINT1MSK 0x00000014 618df158acSJeff Kirsher #define SPIDER_NET_GHIINT2MSK 0x00000018 628df158acSJeff Kirsher 638df158acSJeff Kirsher #define SPIDER_NET_GRESUMINTNUM 0x00000020 648df158acSJeff Kirsher #define SPIDER_NET_GREINTNUM 0x00000024 658df158acSJeff Kirsher 668df158acSJeff Kirsher #define SPIDER_NET_GFFRMNUM 0x00000028 678df158acSJeff Kirsher #define SPIDER_NET_GFAFRMNUM 0x0000002c 688df158acSJeff Kirsher #define SPIDER_NET_GFBFRMNUM 0x00000030 698df158acSJeff Kirsher #define SPIDER_NET_GFCFRMNUM 0x00000034 708df158acSJeff Kirsher #define SPIDER_NET_GFDFRMNUM 0x00000038 718df158acSJeff Kirsher 728df158acSJeff Kirsher /* clear them (don't use it) */ 738df158acSJeff Kirsher #define SPIDER_NET_GFREECNNUM 0x0000003c 748df158acSJeff Kirsher #define SPIDER_NET_GONETIMENUM 0x00000040 758df158acSJeff Kirsher 768df158acSJeff Kirsher #define SPIDER_NET_GTOUTFRMNUM 0x00000044 778df158acSJeff Kirsher 788df158acSJeff Kirsher #define SPIDER_NET_GTXMDSET 0x00000050 798df158acSJeff Kirsher #define SPIDER_NET_GPCCTRL 0x00000054 808df158acSJeff Kirsher #define SPIDER_NET_GRXMDSET 0x00000058 818df158acSJeff Kirsher #define SPIDER_NET_GIPSECINIT 0x0000005c 828df158acSJeff Kirsher #define SPIDER_NET_GFTRESTRT 0x00000060 838df158acSJeff Kirsher #define SPIDER_NET_GRXDMAEN 0x00000064 848df158acSJeff Kirsher #define SPIDER_NET_GMRWOLCTRL 0x00000068 858df158acSJeff Kirsher #define SPIDER_NET_GPCWOPCMD 0x0000006c 868df158acSJeff Kirsher #define SPIDER_NET_GPCROPCMD 0x00000070 878df158acSJeff Kirsher #define SPIDER_NET_GTTFRMCNT 0x00000078 888df158acSJeff Kirsher #define SPIDER_NET_GTESTMD 0x0000007c 898df158acSJeff Kirsher 908df158acSJeff Kirsher #define SPIDER_NET_GSINIT 0x00000080 918df158acSJeff Kirsher #define SPIDER_NET_GSnPRGADR 0x00000084 928df158acSJeff Kirsher #define SPIDER_NET_GSnPRGDAT 0x00000088 938df158acSJeff Kirsher 948df158acSJeff Kirsher #define SPIDER_NET_GMACOPEMD 0x00000100 958df158acSJeff Kirsher #define SPIDER_NET_GMACLENLMT 0x00000108 968df158acSJeff Kirsher #define SPIDER_NET_GMACST 0x00000110 978df158acSJeff Kirsher #define SPIDER_NET_GMACINTEN 0x00000118 988df158acSJeff Kirsher #define SPIDER_NET_GMACPHYCTRL 0x00000120 998df158acSJeff Kirsher 1008df158acSJeff Kirsher #define SPIDER_NET_GMACAPAUSE 0x00000154 1018df158acSJeff Kirsher #define SPIDER_NET_GMACTXPAUSE 0x00000164 1028df158acSJeff Kirsher 1038df158acSJeff Kirsher #define SPIDER_NET_GMACMODE 0x000001b0 1048df158acSJeff Kirsher #define SPIDER_NET_GMACBSTLMT 0x000001b4 1058df158acSJeff Kirsher 1068df158acSJeff Kirsher #define SPIDER_NET_GMACUNIMACU 0x000001c0 1078df158acSJeff Kirsher #define SPIDER_NET_GMACUNIMACL 0x000001c8 1088df158acSJeff Kirsher 1098df158acSJeff Kirsher #define SPIDER_NET_GMRMHFILnR 0x00000400 1108df158acSJeff Kirsher #define SPIDER_NET_MULTICAST_HASHES 256 1118df158acSJeff Kirsher 1128df158acSJeff Kirsher #define SPIDER_NET_GMRUAFILnR 0x00000500 1138df158acSJeff Kirsher #define SPIDER_NET_GMRUA0FIL15R 0x00000578 1148df158acSJeff Kirsher 1158df158acSJeff Kirsher #define SPIDER_NET_GTTQMSK 0x00000934 1168df158acSJeff Kirsher 1178df158acSJeff Kirsher /* RX DMA controller registers, all 0x00000a.. are for DMA controller A, 1188df158acSJeff Kirsher * 0x00000b.. for DMA controller B, etc. */ 1198df158acSJeff Kirsher #define SPIDER_NET_GDADCHA 0x00000a00 1208df158acSJeff Kirsher #define SPIDER_NET_GDADMACCNTR 0x00000a04 1218df158acSJeff Kirsher #define SPIDER_NET_GDACTDPA 0x00000a08 1228df158acSJeff Kirsher #define SPIDER_NET_GDACTDCNT 0x00000a0c 1238df158acSJeff Kirsher #define SPIDER_NET_GDACDBADDR 0x00000a20 1248df158acSJeff Kirsher #define SPIDER_NET_GDACDBSIZE 0x00000a24 1258df158acSJeff Kirsher #define SPIDER_NET_GDACNEXTDA 0x00000a28 1268df158acSJeff Kirsher #define SPIDER_NET_GDACCOMST 0x00000a2c 1278df158acSJeff Kirsher #define SPIDER_NET_GDAWBCOMST 0x00000a30 1288df158acSJeff Kirsher #define SPIDER_NET_GDAWBRSIZE 0x00000a34 1298df158acSJeff Kirsher #define SPIDER_NET_GDAWBVSIZE 0x00000a38 1308df158acSJeff Kirsher #define SPIDER_NET_GDAWBTRST 0x00000a3c 1318df158acSJeff Kirsher #define SPIDER_NET_GDAWBTRERR 0x00000a40 1328df158acSJeff Kirsher 1338df158acSJeff Kirsher /* TX DMA controller registers */ 1348df158acSJeff Kirsher #define SPIDER_NET_GDTDCHA 0x00000e00 1358df158acSJeff Kirsher #define SPIDER_NET_GDTDMACCNTR 0x00000e04 1368df158acSJeff Kirsher #define SPIDER_NET_GDTCDPA 0x00000e08 1378df158acSJeff Kirsher #define SPIDER_NET_GDTDMASEL 0x00000e14 1388df158acSJeff Kirsher 1398df158acSJeff Kirsher #define SPIDER_NET_ECMODE 0x00000f00 1408df158acSJeff Kirsher /* clock and reset control register */ 1418df158acSJeff Kirsher #define SPIDER_NET_CKRCTRL 0x00000ff0 1428df158acSJeff Kirsher 1438df158acSJeff Kirsher /** SCONFIG registers */ 1448df158acSJeff Kirsher #define SPIDER_NET_SCONFIG_IOACTE 0x00002810 1458df158acSJeff Kirsher 1468df158acSJeff Kirsher /** interrupt mask registers */ 1478df158acSJeff Kirsher #define SPIDER_NET_INT0_MASK_VALUE 0x3f7fe2c7 1488df158acSJeff Kirsher #define SPIDER_NET_INT1_MASK_VALUE 0x0000fff2 1498df158acSJeff Kirsher #define SPIDER_NET_INT2_MASK_VALUE 0x000003f1 1508df158acSJeff Kirsher 1518df158acSJeff Kirsher /* we rely on flagged descriptor interrupts */ 1528df158acSJeff Kirsher #define SPIDER_NET_FRAMENUM_VALUE 0x00000000 1538df158acSJeff Kirsher /* set this first, then the FRAMENUM_VALUE */ 1548df158acSJeff Kirsher #define SPIDER_NET_GFXFRAMES_VALUE 0x00000000 1558df158acSJeff Kirsher 1568df158acSJeff Kirsher #define SPIDER_NET_STOP_SEQ_VALUE 0x00000000 1578df158acSJeff Kirsher #define SPIDER_NET_RUN_SEQ_VALUE 0x0000007e 1588df158acSJeff Kirsher 1598df158acSJeff Kirsher #define SPIDER_NET_PHY_CTRL_VALUE 0x00040040 1608df158acSJeff Kirsher /* #define SPIDER_NET_PHY_CTRL_VALUE 0x01070080*/ 1618df158acSJeff Kirsher #define SPIDER_NET_RXMODE_VALUE 0x00000011 1628df158acSJeff Kirsher /* auto retransmission in case of MAC aborts */ 1638df158acSJeff Kirsher #define SPIDER_NET_TXMODE_VALUE 0x00010000 1648df158acSJeff Kirsher #define SPIDER_NET_RESTART_VALUE 0x00000000 1658df158acSJeff Kirsher #define SPIDER_NET_WOL_VALUE 0x00001111 1668df158acSJeff Kirsher #if 0 1678df158acSJeff Kirsher #define SPIDER_NET_WOL_VALUE 0x00000000 1688df158acSJeff Kirsher #endif 1698df158acSJeff Kirsher #define SPIDER_NET_IPSECINIT_VALUE 0x6f716f71 1708df158acSJeff Kirsher 1718df158acSJeff Kirsher /* pause frames: automatic, no upper retransmission count */ 1728df158acSJeff Kirsher /* outside loopback mode: ETOMOD signal dont matter, not connected */ 1738df158acSJeff Kirsher /* ETOMOD signal is brought to PHY reset. bit 2 must be 1 in Celleb */ 1748df158acSJeff Kirsher #define SPIDER_NET_OPMODE_VALUE 0x00000067 1758df158acSJeff Kirsher /*#define SPIDER_NET_OPMODE_VALUE 0x001b0062*/ 1768df158acSJeff Kirsher #define SPIDER_NET_LENLMT_VALUE 0x00000908 1778df158acSJeff Kirsher 1788df158acSJeff Kirsher #define SPIDER_NET_MACAPAUSE_VALUE 0x00000800 /* about 1 ms */ 1798df158acSJeff Kirsher #define SPIDER_NET_TXPAUSE_VALUE 0x00000000 1808df158acSJeff Kirsher 1818df158acSJeff Kirsher #define SPIDER_NET_MACMODE_VALUE 0x00000001 1828df158acSJeff Kirsher #define SPIDER_NET_BURSTLMT_VALUE 0x00000200 /* about 16 us */ 1838df158acSJeff Kirsher 1848df158acSJeff Kirsher /* DMAC control register GDMACCNTR 1858df158acSJeff Kirsher * 1868df158acSJeff Kirsher * 1(0) enable r/tx dma 1878df158acSJeff Kirsher * 0000000 fixed to 0 1888df158acSJeff Kirsher * 1898df158acSJeff Kirsher * 000000 fixed to 0 1908df158acSJeff Kirsher * 0(1) en/disable descr writeback on force end 1918df158acSJeff Kirsher * 0(1) force end 1928df158acSJeff Kirsher * 1938df158acSJeff Kirsher * 000000 fixed to 0 1948df158acSJeff Kirsher * 00 burst alignment: 128 bytes 1958df158acSJeff Kirsher * 11 burst alignment: 1024 bytes 1968df158acSJeff Kirsher * 1978df158acSJeff Kirsher * 00000 fixed to 0 1988df158acSJeff Kirsher * 0 descr writeback size 32 bytes 1998df158acSJeff Kirsher * 0(1) descr chain end interrupt enable 2008df158acSJeff Kirsher * 0(1) descr status writeback enable */ 2018df158acSJeff Kirsher 2028df158acSJeff Kirsher /* to set RX_DMA_EN */ 2038df158acSJeff Kirsher #define SPIDER_NET_DMA_RX_VALUE 0x80000000 2048df158acSJeff Kirsher #define SPIDER_NET_DMA_RX_FEND_VALUE 0x00030003 2058df158acSJeff Kirsher /* to set TX_DMA_EN */ 2068df158acSJeff Kirsher #define SPIDER_NET_TX_DMA_EN 0x80000000 2078df158acSJeff Kirsher #define SPIDER_NET_GDTBSTA 0x00000300 2088df158acSJeff Kirsher #define SPIDER_NET_GDTDCEIDIS 0x00000002 2098df158acSJeff Kirsher #define SPIDER_NET_DMA_TX_VALUE SPIDER_NET_TX_DMA_EN | \ 2108df158acSJeff Kirsher SPIDER_NET_GDTDCEIDIS | \ 2118df158acSJeff Kirsher SPIDER_NET_GDTBSTA 2128df158acSJeff Kirsher 2138df158acSJeff Kirsher #define SPIDER_NET_DMA_TX_FEND_VALUE 0x00030003 2148df158acSJeff Kirsher 2158df158acSJeff Kirsher /* SPIDER_NET_UA_DESCR_VALUE is OR'ed with the unicast address */ 2168df158acSJeff Kirsher #define SPIDER_NET_UA_DESCR_VALUE 0x00080000 2178df158acSJeff Kirsher #define SPIDER_NET_PROMISC_VALUE 0x00080000 2188df158acSJeff Kirsher #define SPIDER_NET_NONPROMISC_VALUE 0x00000000 2198df158acSJeff Kirsher 2208df158acSJeff Kirsher #define SPIDER_NET_DMASEL_VALUE 0x00000001 2218df158acSJeff Kirsher 2228df158acSJeff Kirsher #define SPIDER_NET_ECMODE_VALUE 0x00000000 2238df158acSJeff Kirsher 2248df158acSJeff Kirsher #define SPIDER_NET_CKRCTRL_RUN_VALUE 0x1fff010f 2258df158acSJeff Kirsher #define SPIDER_NET_CKRCTRL_STOP_VALUE 0x0000010f 2268df158acSJeff Kirsher 2278df158acSJeff Kirsher #define SPIDER_NET_SBIMSTATE_VALUE 0x00000000 2288df158acSJeff Kirsher #define SPIDER_NET_SBTMSTATE_VALUE 0x00000000 2298df158acSJeff Kirsher 2308df158acSJeff Kirsher /* SPIDER_NET_GHIINT0STS bits, in reverse order so that they can be used 2318df158acSJeff Kirsher * with 1 << SPIDER_NET_... */ 2328df158acSJeff Kirsher enum spider_net_int0_status { 2338df158acSJeff Kirsher SPIDER_NET_GPHYINT = 0, 2348df158acSJeff Kirsher SPIDER_NET_GMAC2INT, 2358df158acSJeff Kirsher SPIDER_NET_GMAC1INT, 2368df158acSJeff Kirsher SPIDER_NET_GIPSINT, 2378df158acSJeff Kirsher SPIDER_NET_GFIFOINT, 2388df158acSJeff Kirsher SPIDER_NET_GDMACINT, 2398df158acSJeff Kirsher SPIDER_NET_GSYSINT, 2408df158acSJeff Kirsher SPIDER_NET_GPWOPCMPINT, 2418df158acSJeff Kirsher SPIDER_NET_GPROPCMPINT, 2428df158acSJeff Kirsher SPIDER_NET_GPWFFINT, 2438df158acSJeff Kirsher SPIDER_NET_GRMDADRINT, 2448df158acSJeff Kirsher SPIDER_NET_GRMARPINT, 2458df158acSJeff Kirsher SPIDER_NET_GRMMPINT, 2468df158acSJeff Kirsher SPIDER_NET_GDTDEN0INT, 2478df158acSJeff Kirsher SPIDER_NET_GDDDEN0INT, 2488df158acSJeff Kirsher SPIDER_NET_GDCDEN0INT, 2498df158acSJeff Kirsher SPIDER_NET_GDBDEN0INT, 2508df158acSJeff Kirsher SPIDER_NET_GDADEN0INT, 2518df158acSJeff Kirsher SPIDER_NET_GDTFDCINT, 2528df158acSJeff Kirsher SPIDER_NET_GDDFDCINT, 2538df158acSJeff Kirsher SPIDER_NET_GDCFDCINT, 2548df158acSJeff Kirsher SPIDER_NET_GDBFDCINT, 2558df158acSJeff Kirsher SPIDER_NET_GDAFDCINT, 2568df158acSJeff Kirsher SPIDER_NET_GTTEDINT, 2578df158acSJeff Kirsher SPIDER_NET_GDTDCEINT, 2588df158acSJeff Kirsher SPIDER_NET_GRFDNMINT, 2598df158acSJeff Kirsher SPIDER_NET_GRFCNMINT, 2608df158acSJeff Kirsher SPIDER_NET_GRFBNMINT, 2618df158acSJeff Kirsher SPIDER_NET_GRFANMINT, 2628df158acSJeff Kirsher SPIDER_NET_GRFNMINT, 2638df158acSJeff Kirsher SPIDER_NET_G1TMCNTINT, 2648df158acSJeff Kirsher SPIDER_NET_GFREECNTINT 2658df158acSJeff Kirsher }; 2668df158acSJeff Kirsher /* GHIINT1STS bits */ 2678df158acSJeff Kirsher enum spider_net_int1_status { 2688df158acSJeff Kirsher SPIDER_NET_GTMFLLINT = 0, 2698df158acSJeff Kirsher SPIDER_NET_GRMFLLINT, 2708df158acSJeff Kirsher SPIDER_NET_GTMSHTINT, 2718df158acSJeff Kirsher SPIDER_NET_GDTINVDINT, 2728df158acSJeff Kirsher SPIDER_NET_GRFDFLLINT, 2738df158acSJeff Kirsher SPIDER_NET_GDDDCEINT, 2748df158acSJeff Kirsher SPIDER_NET_GDDINVDINT, 2758df158acSJeff Kirsher SPIDER_NET_GRFCFLLINT, 2768df158acSJeff Kirsher SPIDER_NET_GDCDCEINT, 2778df158acSJeff Kirsher SPIDER_NET_GDCINVDINT, 2788df158acSJeff Kirsher SPIDER_NET_GRFBFLLINT, 2798df158acSJeff Kirsher SPIDER_NET_GDBDCEINT, 2808df158acSJeff Kirsher SPIDER_NET_GDBINVDINT, 2818df158acSJeff Kirsher SPIDER_NET_GRFAFLLINT, 2828df158acSJeff Kirsher SPIDER_NET_GDADCEINT, 2838df158acSJeff Kirsher SPIDER_NET_GDAINVDINT, 2848df158acSJeff Kirsher SPIDER_NET_GDTRSERINT, 2858df158acSJeff Kirsher SPIDER_NET_GDDRSERINT, 2868df158acSJeff Kirsher SPIDER_NET_GDCRSERINT, 2878df158acSJeff Kirsher SPIDER_NET_GDBRSERINT, 2888df158acSJeff Kirsher SPIDER_NET_GDARSERINT, 2898df158acSJeff Kirsher SPIDER_NET_GDSERINT, 2908df158acSJeff Kirsher SPIDER_NET_GDTPTERINT, 2918df158acSJeff Kirsher SPIDER_NET_GDDPTERINT, 2928df158acSJeff Kirsher SPIDER_NET_GDCPTERINT, 2938df158acSJeff Kirsher SPIDER_NET_GDBPTERINT, 2948df158acSJeff Kirsher SPIDER_NET_GDAPTERINT 2958df158acSJeff Kirsher }; 2968df158acSJeff Kirsher /* GHIINT2STS bits */ 2978df158acSJeff Kirsher enum spider_net_int2_status { 2988df158acSJeff Kirsher SPIDER_NET_GPROPERINT = 0, 2998df158acSJeff Kirsher SPIDER_NET_GMCTCRSNGINT, 3008df158acSJeff Kirsher SPIDER_NET_GMCTLCOLINT, 3018df158acSJeff Kirsher SPIDER_NET_GMCTTMOTINT, 3028df158acSJeff Kirsher SPIDER_NET_GMCRCAERINT, 3038df158acSJeff Kirsher SPIDER_NET_GMCRCALERINT, 3048df158acSJeff Kirsher SPIDER_NET_GMCRALNERINT, 3058df158acSJeff Kirsher SPIDER_NET_GMCROVRINT, 3068df158acSJeff Kirsher SPIDER_NET_GMCRRNTINT, 3078df158acSJeff Kirsher SPIDER_NET_GMCRRXERINT, 3088df158acSJeff Kirsher SPIDER_NET_GTITCSERINT, 3098df158acSJeff Kirsher SPIDER_NET_GTIFMTERINT, 3108df158acSJeff Kirsher SPIDER_NET_GTIPKTRVKINT, 3118df158acSJeff Kirsher SPIDER_NET_GTISPINGINT, 3128df158acSJeff Kirsher SPIDER_NET_GTISADNGINT, 3138df158acSJeff Kirsher SPIDER_NET_GTISPDNGINT, 3148df158acSJeff Kirsher SPIDER_NET_GRIFMTERINT, 3158df158acSJeff Kirsher SPIDER_NET_GRIPKTRVKINT, 3168df158acSJeff Kirsher SPIDER_NET_GRISPINGINT, 3178df158acSJeff Kirsher SPIDER_NET_GRISADNGINT, 3188df158acSJeff Kirsher SPIDER_NET_GRISPDNGINT 3198df158acSJeff Kirsher }; 3208df158acSJeff Kirsher 3218df158acSJeff Kirsher #define SPIDER_NET_TXINT (1 << SPIDER_NET_GDTFDCINT) 3228df158acSJeff Kirsher 3238df158acSJeff Kirsher /* We rely on flagged descriptor interrupts */ 3248df158acSJeff Kirsher #define SPIDER_NET_RXINT ( (1 << SPIDER_NET_GDAFDCINT) ) 3258df158acSJeff Kirsher 3268df158acSJeff Kirsher #define SPIDER_NET_LINKINT ( 1 << SPIDER_NET_GMAC2INT ) 3278df158acSJeff Kirsher 3288df158acSJeff Kirsher #define SPIDER_NET_ERRINT ( 0xffffffff & \ 3298df158acSJeff Kirsher (~SPIDER_NET_TXINT) & \ 3308df158acSJeff Kirsher (~SPIDER_NET_RXINT) & \ 3318df158acSJeff Kirsher (~SPIDER_NET_LINKINT) ) 3328df158acSJeff Kirsher 3338df158acSJeff Kirsher #define SPIDER_NET_GPREXEC 0x80000000 3348df158acSJeff Kirsher #define SPIDER_NET_GPRDAT_MASK 0x0000ffff 3358df158acSJeff Kirsher 3368df158acSJeff Kirsher #define SPIDER_NET_DMAC_NOINTR_COMPLETE 0x00800000 3378df158acSJeff Kirsher #define SPIDER_NET_DMAC_TXFRMTL 0x00040000 3388df158acSJeff Kirsher #define SPIDER_NET_DMAC_TCP 0x00020000 3398df158acSJeff Kirsher #define SPIDER_NET_DMAC_UDP 0x00030000 3408df158acSJeff Kirsher #define SPIDER_NET_TXDCEST 0x08000000 3418df158acSJeff Kirsher 3428df158acSJeff Kirsher #define SPIDER_NET_DESCR_RXFDIS 0x00000001 3438df158acSJeff Kirsher #define SPIDER_NET_DESCR_RXDCEIS 0x00000002 3448df158acSJeff Kirsher #define SPIDER_NET_DESCR_RXDEN0IS 0x00000004 3458df158acSJeff Kirsher #define SPIDER_NET_DESCR_RXINVDIS 0x00000008 3468df158acSJeff Kirsher #define SPIDER_NET_DESCR_RXRERRIS 0x00000010 3478df158acSJeff Kirsher #define SPIDER_NET_DESCR_RXFDCIMS 0x00000100 3488df158acSJeff Kirsher #define SPIDER_NET_DESCR_RXDCEIMS 0x00000200 3498df158acSJeff Kirsher #define SPIDER_NET_DESCR_RXDEN0IMS 0x00000400 3508df158acSJeff Kirsher #define SPIDER_NET_DESCR_RXINVDIMS 0x00000800 3518df158acSJeff Kirsher #define SPIDER_NET_DESCR_RXRERRMIS 0x00001000 3528df158acSJeff Kirsher #define SPIDER_NET_DESCR_UNUSED 0x077fe0e0 3538df158acSJeff Kirsher 3548df158acSJeff Kirsher #define SPIDER_NET_DESCR_IND_PROC_MASK 0xF0000000 3558df158acSJeff Kirsher #define SPIDER_NET_DESCR_COMPLETE 0x00000000 /* used in rx and tx */ 3568df158acSJeff Kirsher #define SPIDER_NET_DESCR_RESPONSE_ERROR 0x10000000 /* used in rx and tx */ 3578df158acSJeff Kirsher #define SPIDER_NET_DESCR_PROTECTION_ERROR 0x20000000 /* used in rx and tx */ 3588df158acSJeff Kirsher #define SPIDER_NET_DESCR_FRAME_END 0x40000000 /* used in rx */ 3598df158acSJeff Kirsher #define SPIDER_NET_DESCR_FORCE_END 0x50000000 /* used in rx and tx */ 3608df158acSJeff Kirsher #define SPIDER_NET_DESCR_CARDOWNED 0xA0000000 /* used in rx and tx */ 3618df158acSJeff Kirsher #define SPIDER_NET_DESCR_NOT_IN_USE 0xF0000000 3628df158acSJeff Kirsher #define SPIDER_NET_DESCR_TXDESFLG 0x00800000 3638df158acSJeff Kirsher 3648df158acSJeff Kirsher #define SPIDER_NET_DESCR_BAD_STATUS (SPIDER_NET_DESCR_RXDEN0IS | \ 3658df158acSJeff Kirsher SPIDER_NET_DESCR_RXRERRIS | \ 3668df158acSJeff Kirsher SPIDER_NET_DESCR_RXDEN0IMS | \ 3678df158acSJeff Kirsher SPIDER_NET_DESCR_RXINVDIMS | \ 3688df158acSJeff Kirsher SPIDER_NET_DESCR_RXRERRMIS | \ 3698df158acSJeff Kirsher SPIDER_NET_DESCR_UNUSED) 3708df158acSJeff Kirsher 3718df158acSJeff Kirsher /* Descriptor, as defined by the hardware */ 3728df158acSJeff Kirsher struct spider_net_hw_descr { 3738df158acSJeff Kirsher u32 buf_addr; 3748df158acSJeff Kirsher u32 buf_size; 3758df158acSJeff Kirsher u32 next_descr_addr; 3768df158acSJeff Kirsher u32 dmac_cmd_status; 3778df158acSJeff Kirsher u32 result_size; 3788df158acSJeff Kirsher u32 valid_size; /* all zeroes for tx */ 3798df158acSJeff Kirsher u32 data_status; 3808df158acSJeff Kirsher u32 data_error; /* all zeroes for tx */ 3818df158acSJeff Kirsher } __attribute__((aligned(32))); 3828df158acSJeff Kirsher 3838df158acSJeff Kirsher struct spider_net_descr { 3848df158acSJeff Kirsher struct spider_net_hw_descr *hwdescr; 3858df158acSJeff Kirsher struct sk_buff *skb; 3868df158acSJeff Kirsher u32 bus_addr; 3878df158acSJeff Kirsher struct spider_net_descr *next; 3888df158acSJeff Kirsher struct spider_net_descr *prev; 3898df158acSJeff Kirsher }; 3908df158acSJeff Kirsher 3918df158acSJeff Kirsher struct spider_net_descr_chain { 3928df158acSJeff Kirsher spinlock_t lock; 3938df158acSJeff Kirsher struct spider_net_descr *head; 3948df158acSJeff Kirsher struct spider_net_descr *tail; 3958df158acSJeff Kirsher struct spider_net_descr *ring; 3968df158acSJeff Kirsher int num_desc; 3978df158acSJeff Kirsher struct spider_net_hw_descr *hwring; 3988df158acSJeff Kirsher dma_addr_t dma_addr; 3998df158acSJeff Kirsher }; 4008df158acSJeff Kirsher 4018df158acSJeff Kirsher /* descriptor data_status bits */ 4028df158acSJeff Kirsher #define SPIDER_NET_RX_IPCHK 29 4038df158acSJeff Kirsher #define SPIDER_NET_RX_TCPCHK 28 4048df158acSJeff Kirsher #define SPIDER_NET_VLAN_PACKET 21 4058df158acSJeff Kirsher #define SPIDER_NET_DATA_STATUS_CKSUM_MASK ( (1 << SPIDER_NET_RX_IPCHK) | \ 4068df158acSJeff Kirsher (1 << SPIDER_NET_RX_TCPCHK) ) 4078df158acSJeff Kirsher 4088df158acSJeff Kirsher /* descriptor data_error bits */ 4098df158acSJeff Kirsher #define SPIDER_NET_RX_IPCHKERR 27 4108df158acSJeff Kirsher #define SPIDER_NET_RX_RXTCPCHKERR 28 4118df158acSJeff Kirsher 4128df158acSJeff Kirsher #define SPIDER_NET_DATA_ERR_CKSUM_MASK (1 << SPIDER_NET_RX_IPCHKERR) 4138df158acSJeff Kirsher 4148df158acSJeff Kirsher /* the cases we don't pass the packet to the stack. 4158df158acSJeff Kirsher * 701b8000 would be correct, but every packets gets that flag */ 4168df158acSJeff Kirsher #define SPIDER_NET_DESTROY_RX_FLAGS 0x700b8000 4178df158acSJeff Kirsher 4188df158acSJeff Kirsher #define SPIDER_NET_DEFAULT_MSG ( NETIF_MSG_DRV | \ 4198df158acSJeff Kirsher NETIF_MSG_PROBE | \ 4208df158acSJeff Kirsher NETIF_MSG_LINK | \ 4218df158acSJeff Kirsher NETIF_MSG_TIMER | \ 4228df158acSJeff Kirsher NETIF_MSG_IFDOWN | \ 4238df158acSJeff Kirsher NETIF_MSG_IFUP | \ 4248df158acSJeff Kirsher NETIF_MSG_RX_ERR | \ 4258df158acSJeff Kirsher NETIF_MSG_TX_ERR | \ 4268df158acSJeff Kirsher NETIF_MSG_TX_QUEUED | \ 4278df158acSJeff Kirsher NETIF_MSG_INTR | \ 4288df158acSJeff Kirsher NETIF_MSG_TX_DONE | \ 4298df158acSJeff Kirsher NETIF_MSG_RX_STATUS | \ 4308df158acSJeff Kirsher NETIF_MSG_PKTDATA | \ 4318df158acSJeff Kirsher NETIF_MSG_HW | \ 4328df158acSJeff Kirsher NETIF_MSG_WOL ) 4338df158acSJeff Kirsher 4348df158acSJeff Kirsher struct spider_net_extra_stats { 4358df158acSJeff Kirsher unsigned long rx_desc_error; 4368df158acSJeff Kirsher unsigned long tx_timeouts; 4378df158acSJeff Kirsher unsigned long alloc_rx_skb_error; 4388df158acSJeff Kirsher unsigned long rx_iommu_map_error; 4398df158acSJeff Kirsher unsigned long tx_iommu_map_error; 4408df158acSJeff Kirsher unsigned long rx_desc_unk_state; 4418df158acSJeff Kirsher }; 4428df158acSJeff Kirsher 4438df158acSJeff Kirsher struct spider_net_card { 4448df158acSJeff Kirsher struct net_device *netdev; 4458df158acSJeff Kirsher struct pci_dev *pdev; 4468df158acSJeff Kirsher struct mii_phy phy; 4478df158acSJeff Kirsher 4488df158acSJeff Kirsher struct napi_struct napi; 4498df158acSJeff Kirsher 4508df158acSJeff Kirsher int medium; 4518df158acSJeff Kirsher 4528df158acSJeff Kirsher void __iomem *regs; 4538df158acSJeff Kirsher 4548df158acSJeff Kirsher struct spider_net_descr_chain tx_chain; 4558df158acSJeff Kirsher struct spider_net_descr_chain rx_chain; 4568df158acSJeff Kirsher struct spider_net_descr *low_watermark; 4578df158acSJeff Kirsher 4588df158acSJeff Kirsher int aneg_count; 4598df158acSJeff Kirsher struct timer_list aneg_timer; 4608df158acSJeff Kirsher struct timer_list tx_timer; 4618df158acSJeff Kirsher struct work_struct tx_timeout_task; 4628df158acSJeff Kirsher atomic_t tx_timeout_task_counter; 4638df158acSJeff Kirsher wait_queue_head_t waitq; 4648df158acSJeff Kirsher int num_rx_ints; 4658df158acSJeff Kirsher int ignore_rx_ramfull; 4668df158acSJeff Kirsher 4678df158acSJeff Kirsher /* for ethtool */ 4688df158acSJeff Kirsher int msg_enable; 4698df158acSJeff Kirsher struct spider_net_extra_stats spider_stats; 4708df158acSJeff Kirsher 4718df158acSJeff Kirsher /* Must be last item in struct */ 472f49b2759SGustavo A. R. Silva struct spider_net_descr darray[]; 4738df158acSJeff Kirsher }; 4748df158acSJeff Kirsher 4758df158acSJeff Kirsher #endif 476