1 /*
2  * Keystone GBE and XGBE subsystem code
3  *
4  * Copyright (C) 2014 Texas Instruments Incorporated
5  * Authors:	Sandeep Nair <sandeep_n@ti.com>
6  *		Sandeep Paulraj <s-paulraj@ti.com>
7  *		Cyril Chemparathy <cyril@ti.com>
8  *		Santosh Shilimkar <santosh.shilimkar@ti.com>
9  *		Wingman Kwok <w-kwok2@ti.com>
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License as
13  * published by the Free Software Foundation version 2.
14  *
15  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
16  * kind, whether express or implied; without even the implied warranty
17  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  */
20 
21 #include <linux/io.h>
22 #include <linux/module.h>
23 #include <linux/of_mdio.h>
24 #include <linux/of_address.h>
25 #include <linux/if_vlan.h>
26 #include <linux/ethtool.h>
27 
28 #include "cpsw_ale.h"
29 #include "netcp.h"
30 
31 #define NETCP_DRIVER_NAME		"TI KeyStone Ethernet Driver"
32 #define NETCP_DRIVER_VERSION		"v1.0"
33 
34 #define GBE_IDENT(reg)			((reg >> 16) & 0xffff)
35 #define GBE_MAJOR_VERSION(reg)		(reg >> 8 & 0x7)
36 #define GBE_MINOR_VERSION(reg)		(reg & 0xff)
37 #define GBE_RTL_VERSION(reg)		((reg >> 11) & 0x1f)
38 
39 /* 1G Ethernet SS defines */
40 #define GBE_MODULE_NAME			"netcp-gbe"
41 #define GBE_SS_VERSION_14		0x4ed21104
42 
43 #define GBE_SS_REG_INDEX		0
44 #define GBE_SGMII34_REG_INDEX		1
45 #define GBE_SM_REG_INDEX		2
46 /* offset relative to base of GBE_SS_REG_INDEX */
47 #define GBE13_SGMII_MODULE_OFFSET	0x100
48 /* offset relative to base of GBE_SM_REG_INDEX */
49 #define GBE13_HOST_PORT_OFFSET		0x34
50 #define GBE13_SLAVE_PORT_OFFSET		0x60
51 #define GBE13_EMAC_OFFSET		0x100
52 #define GBE13_SLAVE_PORT2_OFFSET	0x200
53 #define GBE13_HW_STATS_OFFSET		0x300
54 #define GBE13_ALE_OFFSET		0x600
55 #define GBE13_HOST_PORT_NUM		0
56 #define GBE13_NUM_ALE_ENTRIES		1024
57 
58 /* 1G Ethernet NU SS defines */
59 #define GBENU_MODULE_NAME		"netcp-gbenu"
60 #define GBE_SS_ID_NU			0x4ee6
61 #define GBE_SS_ID_2U			0x4ee8
62 
63 #define IS_SS_ID_MU(d) \
64 	((GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU) || \
65 	 (GBE_IDENT((d)->ss_version) == GBE_SS_ID_2U))
66 
67 #define IS_SS_ID_NU(d) \
68 	(GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU)
69 
70 #define GBENU_SS_REG_INDEX		0
71 #define GBENU_SM_REG_INDEX		1
72 #define GBENU_SGMII_MODULE_OFFSET	0x100
73 #define GBENU_HOST_PORT_OFFSET		0x1000
74 #define GBENU_SLAVE_PORT_OFFSET		0x2000
75 #define GBENU_EMAC_OFFSET		0x2330
76 #define GBENU_HW_STATS_OFFSET		0x1a000
77 #define GBENU_ALE_OFFSET		0x1e000
78 #define GBENU_HOST_PORT_NUM		0
79 #define GBENU_NUM_ALE_ENTRIES		1024
80 
81 /* 10G Ethernet SS defines */
82 #define XGBE_MODULE_NAME		"netcp-xgbe"
83 #define XGBE_SS_VERSION_10		0x4ee42100
84 
85 #define XGBE_SS_REG_INDEX		0
86 #define XGBE_SM_REG_INDEX		1
87 #define XGBE_SERDES_REG_INDEX		2
88 
89 /* offset relative to base of XGBE_SS_REG_INDEX */
90 #define XGBE10_SGMII_MODULE_OFFSET	0x100
91 /* offset relative to base of XGBE_SM_REG_INDEX */
92 #define XGBE10_HOST_PORT_OFFSET		0x34
93 #define XGBE10_SLAVE_PORT_OFFSET	0x64
94 #define XGBE10_EMAC_OFFSET		0x400
95 #define XGBE10_ALE_OFFSET		0x700
96 #define XGBE10_HW_STATS_OFFSET		0x800
97 #define XGBE10_HOST_PORT_NUM		0
98 #define XGBE10_NUM_ALE_ENTRIES		1024
99 
100 #define	GBE_TIMER_INTERVAL			(HZ / 2)
101 
102 /* Soft reset register values */
103 #define SOFT_RESET_MASK				BIT(0)
104 #define SOFT_RESET				BIT(0)
105 #define DEVICE_EMACSL_RESET_POLL_COUNT		100
106 #define GMACSL_RET_WARN_RESET_INCOMPLETE	-2
107 
108 #define MACSL_RX_ENABLE_CSF			BIT(23)
109 #define MACSL_ENABLE_EXT_CTL			BIT(18)
110 #define MACSL_XGMII_ENABLE			BIT(13)
111 #define MACSL_XGIG_MODE				BIT(8)
112 #define MACSL_GIG_MODE				BIT(7)
113 #define MACSL_GMII_ENABLE			BIT(5)
114 #define MACSL_FULLDUPLEX			BIT(0)
115 
116 #define GBE_CTL_P0_ENABLE			BIT(2)
117 #define GBE13_REG_VAL_STAT_ENABLE_ALL		0xff
118 #define XGBE_REG_VAL_STAT_ENABLE_ALL		0xf
119 #define GBE_STATS_CD_SEL			BIT(28)
120 
121 #define GBE_PORT_MASK(x)			(BIT(x) - 1)
122 #define GBE_MASK_NO_PORTS			0
123 
124 #define GBE_DEF_1G_MAC_CONTROL					\
125 		(MACSL_GIG_MODE | MACSL_GMII_ENABLE |		\
126 		 MACSL_ENABLE_EXT_CTL |	MACSL_RX_ENABLE_CSF)
127 
128 #define GBE_DEF_10G_MAC_CONTROL				\
129 		(MACSL_XGIG_MODE | MACSL_XGMII_ENABLE |		\
130 		 MACSL_ENABLE_EXT_CTL |	MACSL_RX_ENABLE_CSF)
131 
132 #define GBE_STATSA_MODULE			0
133 #define GBE_STATSB_MODULE			1
134 #define GBE_STATSC_MODULE			2
135 #define GBE_STATSD_MODULE			3
136 
137 #define GBENU_STATS0_MODULE			0
138 #define GBENU_STATS1_MODULE			1
139 #define GBENU_STATS2_MODULE			2
140 #define GBENU_STATS3_MODULE			3
141 #define GBENU_STATS4_MODULE			4
142 #define GBENU_STATS5_MODULE			5
143 #define GBENU_STATS6_MODULE			6
144 #define GBENU_STATS7_MODULE			7
145 #define GBENU_STATS8_MODULE			8
146 
147 #define XGBE_STATS0_MODULE			0
148 #define XGBE_STATS1_MODULE			1
149 #define XGBE_STATS2_MODULE			2
150 
151 /* s: 0-based slave_port */
152 #define SGMII_BASE(s) \
153 	(((s) < 2) ? gbe_dev->sgmii_port_regs : gbe_dev->sgmii_port34_regs)
154 
155 #define GBE_TX_QUEUE				648
156 #define	GBE_TXHOOK_ORDER			0
157 #define GBE_DEFAULT_ALE_AGEOUT			30
158 #define SLAVE_LINK_IS_XGMII(s) ((s)->link_interface >= XGMII_LINK_MAC_PHY)
159 #define NETCP_LINK_STATE_INVALID		-1
160 
161 #define GBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
162 		offsetof(struct gbe##_##rb, rn)
163 #define GBENU_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
164 		offsetof(struct gbenu##_##rb, rn)
165 #define XGBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
166 		offsetof(struct xgbe##_##rb, rn)
167 #define GBE_REG_ADDR(p, rb, rn) (p->rb + p->rb##_ofs.rn)
168 
169 #define HOST_TX_PRI_MAP_DEFAULT			0x00000000
170 
171 struct xgbe_ss_regs {
172 	u32	id_ver;
173 	u32	synce_count;
174 	u32	synce_mux;
175 	u32	control;
176 };
177 
178 struct xgbe_switch_regs {
179 	u32	id_ver;
180 	u32	control;
181 	u32	emcontrol;
182 	u32	stat_port_en;
183 	u32	ptype;
184 	u32	soft_idle;
185 	u32	thru_rate;
186 	u32	gap_thresh;
187 	u32	tx_start_wds;
188 	u32	flow_control;
189 	u32	cppi_thresh;
190 };
191 
192 struct xgbe_port_regs {
193 	u32	blk_cnt;
194 	u32	port_vlan;
195 	u32	tx_pri_map;
196 	u32	sa_lo;
197 	u32	sa_hi;
198 	u32	ts_ctl;
199 	u32	ts_seq_ltype;
200 	u32	ts_vlan;
201 	u32	ts_ctl_ltype2;
202 	u32	ts_ctl2;
203 	u32	control;
204 };
205 
206 struct xgbe_host_port_regs {
207 	u32	blk_cnt;
208 	u32	port_vlan;
209 	u32	tx_pri_map;
210 	u32	src_id;
211 	u32	rx_pri_map;
212 	u32	rx_maxlen;
213 };
214 
215 struct xgbe_emac_regs {
216 	u32	id_ver;
217 	u32	mac_control;
218 	u32	mac_status;
219 	u32	soft_reset;
220 	u32	rx_maxlen;
221 	u32	__reserved_0;
222 	u32	rx_pause;
223 	u32	tx_pause;
224 	u32	em_control;
225 	u32	__reserved_1;
226 	u32	tx_gap;
227 	u32	rsvd[4];
228 };
229 
230 struct xgbe_host_hw_stats {
231 	u32	rx_good_frames;
232 	u32	rx_broadcast_frames;
233 	u32	rx_multicast_frames;
234 	u32	__rsvd_0[3];
235 	u32	rx_oversized_frames;
236 	u32	__rsvd_1;
237 	u32	rx_undersized_frames;
238 	u32	__rsvd_2;
239 	u32	overrun_type4;
240 	u32	overrun_type5;
241 	u32	rx_bytes;
242 	u32	tx_good_frames;
243 	u32	tx_broadcast_frames;
244 	u32	tx_multicast_frames;
245 	u32	__rsvd_3[9];
246 	u32	tx_bytes;
247 	u32	tx_64byte_frames;
248 	u32	tx_65_to_127byte_frames;
249 	u32	tx_128_to_255byte_frames;
250 	u32	tx_256_to_511byte_frames;
251 	u32	tx_512_to_1023byte_frames;
252 	u32	tx_1024byte_frames;
253 	u32	net_bytes;
254 	u32	rx_sof_overruns;
255 	u32	rx_mof_overruns;
256 	u32	rx_dma_overruns;
257 };
258 
259 struct xgbe_hw_stats {
260 	u32	rx_good_frames;
261 	u32	rx_broadcast_frames;
262 	u32	rx_multicast_frames;
263 	u32	rx_pause_frames;
264 	u32	rx_crc_errors;
265 	u32	rx_align_code_errors;
266 	u32	rx_oversized_frames;
267 	u32	rx_jabber_frames;
268 	u32	rx_undersized_frames;
269 	u32	rx_fragments;
270 	u32	overrun_type4;
271 	u32	overrun_type5;
272 	u32	rx_bytes;
273 	u32	tx_good_frames;
274 	u32	tx_broadcast_frames;
275 	u32	tx_multicast_frames;
276 	u32	tx_pause_frames;
277 	u32	tx_deferred_frames;
278 	u32	tx_collision_frames;
279 	u32	tx_single_coll_frames;
280 	u32	tx_mult_coll_frames;
281 	u32	tx_excessive_collisions;
282 	u32	tx_late_collisions;
283 	u32	tx_underrun;
284 	u32	tx_carrier_sense_errors;
285 	u32	tx_bytes;
286 	u32	tx_64byte_frames;
287 	u32	tx_65_to_127byte_frames;
288 	u32	tx_128_to_255byte_frames;
289 	u32	tx_256_to_511byte_frames;
290 	u32	tx_512_to_1023byte_frames;
291 	u32	tx_1024byte_frames;
292 	u32	net_bytes;
293 	u32	rx_sof_overruns;
294 	u32	rx_mof_overruns;
295 	u32	rx_dma_overruns;
296 };
297 
298 struct gbenu_ss_regs {
299 	u32	id_ver;
300 	u32	synce_count;		/* NU */
301 	u32	synce_mux;		/* NU */
302 	u32	control;		/* 2U */
303 	u32	__rsvd_0[2];		/* 2U */
304 	u32	rgmii_status;		/* 2U */
305 	u32	ss_status;		/* 2U */
306 };
307 
308 struct gbenu_switch_regs {
309 	u32	id_ver;
310 	u32	control;
311 	u32	__rsvd_0[2];
312 	u32	emcontrol;
313 	u32	stat_port_en;
314 	u32	ptype;			/* NU */
315 	u32	soft_idle;
316 	u32	thru_rate;		/* NU */
317 	u32	gap_thresh;		/* NU */
318 	u32	tx_start_wds;		/* NU */
319 	u32	eee_prescale;		/* 2U */
320 	u32	tx_g_oflow_thresh_set;	/* NU */
321 	u32	tx_g_oflow_thresh_clr;	/* NU */
322 	u32	tx_g_buf_thresh_set_l;	/* NU */
323 	u32	tx_g_buf_thresh_set_h;	/* NU */
324 	u32	tx_g_buf_thresh_clr_l;	/* NU */
325 	u32	tx_g_buf_thresh_clr_h;	/* NU */
326 };
327 
328 struct gbenu_port_regs {
329 	u32	__rsvd_0;
330 	u32	control;
331 	u32	max_blks;		/* 2U */
332 	u32	mem_align1;
333 	u32	blk_cnt;
334 	u32	port_vlan;
335 	u32	tx_pri_map;		/* NU */
336 	u32	pri_ctl;		/* 2U */
337 	u32	rx_pri_map;
338 	u32	rx_maxlen;
339 	u32	tx_blks_pri;		/* NU */
340 	u32	__rsvd_1;
341 	u32	idle2lpi;		/* 2U */
342 	u32	lpi2idle;		/* 2U */
343 	u32	eee_status;		/* 2U */
344 	u32	__rsvd_2;
345 	u32	__rsvd_3[176];		/* NU: more to add */
346 	u32	__rsvd_4[2];
347 	u32	sa_lo;
348 	u32	sa_hi;
349 	u32	ts_ctl;
350 	u32	ts_seq_ltype;
351 	u32	ts_vlan;
352 	u32	ts_ctl_ltype2;
353 	u32	ts_ctl2;
354 };
355 
356 struct gbenu_host_port_regs {
357 	u32	__rsvd_0;
358 	u32	control;
359 	u32	flow_id_offset;		/* 2U */
360 	u32	__rsvd_1;
361 	u32	blk_cnt;
362 	u32	port_vlan;
363 	u32	tx_pri_map;		/* NU */
364 	u32	pri_ctl;
365 	u32	rx_pri_map;
366 	u32	rx_maxlen;
367 	u32	tx_blks_pri;		/* NU */
368 	u32	__rsvd_2;
369 	u32	idle2lpi;		/* 2U */
370 	u32	lpi2wake;		/* 2U */
371 	u32	eee_status;		/* 2U */
372 	u32	__rsvd_3;
373 	u32	__rsvd_4[184];		/* NU */
374 	u32	host_blks_pri;		/* NU */
375 };
376 
377 struct gbenu_emac_regs {
378 	u32	mac_control;
379 	u32	mac_status;
380 	u32	soft_reset;
381 	u32	boff_test;
382 	u32	rx_pause;
383 	u32	__rsvd_0[11];		/* NU */
384 	u32	tx_pause;
385 	u32	__rsvd_1[11];		/* NU */
386 	u32	em_control;
387 	u32	tx_gap;
388 };
389 
390 /* Some hw stat regs are applicable to slave port only.
391  * This is handled by gbenu_et_stats struct.  Also some
392  * are for SS version NU and some are for 2U.
393  */
394 struct gbenu_hw_stats {
395 	u32	rx_good_frames;
396 	u32	rx_broadcast_frames;
397 	u32	rx_multicast_frames;
398 	u32	rx_pause_frames;		/* slave */
399 	u32	rx_crc_errors;
400 	u32	rx_align_code_errors;		/* slave */
401 	u32	rx_oversized_frames;
402 	u32	rx_jabber_frames;		/* slave */
403 	u32	rx_undersized_frames;
404 	u32	rx_fragments;			/* slave */
405 	u32	ale_drop;
406 	u32	ale_overrun_drop;
407 	u32	rx_bytes;
408 	u32	tx_good_frames;
409 	u32	tx_broadcast_frames;
410 	u32	tx_multicast_frames;
411 	u32	tx_pause_frames;		/* slave */
412 	u32	tx_deferred_frames;		/* slave */
413 	u32	tx_collision_frames;		/* slave */
414 	u32	tx_single_coll_frames;		/* slave */
415 	u32	tx_mult_coll_frames;		/* slave */
416 	u32	tx_excessive_collisions;	/* slave */
417 	u32	tx_late_collisions;		/* slave */
418 	u32	rx_ipg_error;			/* slave 10G only */
419 	u32	tx_carrier_sense_errors;	/* slave */
420 	u32	tx_bytes;
421 	u32	tx_64B_frames;
422 	u32	tx_65_to_127B_frames;
423 	u32	tx_128_to_255B_frames;
424 	u32	tx_256_to_511B_frames;
425 	u32	tx_512_to_1023B_frames;
426 	u32	tx_1024B_frames;
427 	u32	net_bytes;
428 	u32	rx_bottom_fifo_drop;
429 	u32	rx_port_mask_drop;
430 	u32	rx_top_fifo_drop;
431 	u32	ale_rate_limit_drop;
432 	u32	ale_vid_ingress_drop;
433 	u32	ale_da_eq_sa_drop;
434 	u32	__rsvd_0[3];
435 	u32	ale_unknown_ucast;
436 	u32	ale_unknown_ucast_bytes;
437 	u32	ale_unknown_mcast;
438 	u32	ale_unknown_mcast_bytes;
439 	u32	ale_unknown_bcast;
440 	u32	ale_unknown_bcast_bytes;
441 	u32	ale_pol_match;
442 	u32	ale_pol_match_red;		/* NU */
443 	u32	ale_pol_match_yellow;		/* NU */
444 	u32	__rsvd_1[44];
445 	u32	tx_mem_protect_err;
446 	/* following NU only */
447 	u32	tx_pri0;
448 	u32	tx_pri1;
449 	u32	tx_pri2;
450 	u32	tx_pri3;
451 	u32	tx_pri4;
452 	u32	tx_pri5;
453 	u32	tx_pri6;
454 	u32	tx_pri7;
455 	u32	tx_pri0_bcnt;
456 	u32	tx_pri1_bcnt;
457 	u32	tx_pri2_bcnt;
458 	u32	tx_pri3_bcnt;
459 	u32	tx_pri4_bcnt;
460 	u32	tx_pri5_bcnt;
461 	u32	tx_pri6_bcnt;
462 	u32	tx_pri7_bcnt;
463 	u32	tx_pri0_drop;
464 	u32	tx_pri1_drop;
465 	u32	tx_pri2_drop;
466 	u32	tx_pri3_drop;
467 	u32	tx_pri4_drop;
468 	u32	tx_pri5_drop;
469 	u32	tx_pri6_drop;
470 	u32	tx_pri7_drop;
471 	u32	tx_pri0_drop_bcnt;
472 	u32	tx_pri1_drop_bcnt;
473 	u32	tx_pri2_drop_bcnt;
474 	u32	tx_pri3_drop_bcnt;
475 	u32	tx_pri4_drop_bcnt;
476 	u32	tx_pri5_drop_bcnt;
477 	u32	tx_pri6_drop_bcnt;
478 	u32	tx_pri7_drop_bcnt;
479 };
480 
481 #define GBENU_HW_STATS_REG_MAP_SZ	0x200
482 
483 struct gbe_ss_regs {
484 	u32	id_ver;
485 	u32	synce_count;
486 	u32	synce_mux;
487 };
488 
489 struct gbe_ss_regs_ofs {
490 	u16	id_ver;
491 	u16	control;
492 };
493 
494 struct gbe_switch_regs {
495 	u32	id_ver;
496 	u32	control;
497 	u32	soft_reset;
498 	u32	stat_port_en;
499 	u32	ptype;
500 	u32	soft_idle;
501 	u32	thru_rate;
502 	u32	gap_thresh;
503 	u32	tx_start_wds;
504 	u32	flow_control;
505 };
506 
507 struct gbe_switch_regs_ofs {
508 	u16	id_ver;
509 	u16	control;
510 	u16	soft_reset;
511 	u16	emcontrol;
512 	u16	stat_port_en;
513 	u16	ptype;
514 	u16	flow_control;
515 };
516 
517 struct gbe_port_regs {
518 	u32	max_blks;
519 	u32	blk_cnt;
520 	u32	port_vlan;
521 	u32	tx_pri_map;
522 	u32	sa_lo;
523 	u32	sa_hi;
524 	u32	ts_ctl;
525 	u32	ts_seq_ltype;
526 	u32	ts_vlan;
527 	u32	ts_ctl_ltype2;
528 	u32	ts_ctl2;
529 };
530 
531 struct gbe_port_regs_ofs {
532 	u16	port_vlan;
533 	u16	tx_pri_map;
534 	u16	sa_lo;
535 	u16	sa_hi;
536 	u16	ts_ctl;
537 	u16	ts_seq_ltype;
538 	u16	ts_vlan;
539 	u16	ts_ctl_ltype2;
540 	u16	ts_ctl2;
541 	u16	rx_maxlen;	/* 2U, NU */
542 };
543 
544 struct gbe_host_port_regs {
545 	u32	src_id;
546 	u32	port_vlan;
547 	u32	rx_pri_map;
548 	u32	rx_maxlen;
549 };
550 
551 struct gbe_host_port_regs_ofs {
552 	u16	port_vlan;
553 	u16	tx_pri_map;
554 	u16	rx_maxlen;
555 };
556 
557 struct gbe_emac_regs {
558 	u32	id_ver;
559 	u32	mac_control;
560 	u32	mac_status;
561 	u32	soft_reset;
562 	u32	rx_maxlen;
563 	u32	__reserved_0;
564 	u32	rx_pause;
565 	u32	tx_pause;
566 	u32	__reserved_1;
567 	u32	rx_pri_map;
568 	u32	rsvd[6];
569 };
570 
571 struct gbe_emac_regs_ofs {
572 	u16	mac_control;
573 	u16	soft_reset;
574 	u16	rx_maxlen;
575 };
576 
577 struct gbe_hw_stats {
578 	u32	rx_good_frames;
579 	u32	rx_broadcast_frames;
580 	u32	rx_multicast_frames;
581 	u32	rx_pause_frames;
582 	u32	rx_crc_errors;
583 	u32	rx_align_code_errors;
584 	u32	rx_oversized_frames;
585 	u32	rx_jabber_frames;
586 	u32	rx_undersized_frames;
587 	u32	rx_fragments;
588 	u32	__pad_0[2];
589 	u32	rx_bytes;
590 	u32	tx_good_frames;
591 	u32	tx_broadcast_frames;
592 	u32	tx_multicast_frames;
593 	u32	tx_pause_frames;
594 	u32	tx_deferred_frames;
595 	u32	tx_collision_frames;
596 	u32	tx_single_coll_frames;
597 	u32	tx_mult_coll_frames;
598 	u32	tx_excessive_collisions;
599 	u32	tx_late_collisions;
600 	u32	tx_underrun;
601 	u32	tx_carrier_sense_errors;
602 	u32	tx_bytes;
603 	u32	tx_64byte_frames;
604 	u32	tx_65_to_127byte_frames;
605 	u32	tx_128_to_255byte_frames;
606 	u32	tx_256_to_511byte_frames;
607 	u32	tx_512_to_1023byte_frames;
608 	u32	tx_1024byte_frames;
609 	u32	net_bytes;
610 	u32	rx_sof_overruns;
611 	u32	rx_mof_overruns;
612 	u32	rx_dma_overruns;
613 };
614 
615 #define GBE_MAX_HW_STAT_MODS			9
616 #define GBE_HW_STATS_REG_MAP_SZ			0x100
617 
618 struct gbe_slave {
619 	void __iomem			*port_regs;
620 	void __iomem			*emac_regs;
621 	struct gbe_port_regs_ofs	port_regs_ofs;
622 	struct gbe_emac_regs_ofs	emac_regs_ofs;
623 	int				slave_num; /* 0 based logical number */
624 	int				port_num;  /* actual port number */
625 	atomic_t			link_state;
626 	bool				open;
627 	struct phy_device		*phy;
628 	u32				link_interface;
629 	u32				mac_control;
630 	u8				phy_port_t;
631 	struct device_node		*phy_node;
632 	struct list_head		slave_list;
633 };
634 
635 struct gbe_priv {
636 	struct device			*dev;
637 	struct netcp_device		*netcp_device;
638 	struct timer_list		timer;
639 	u32				num_slaves;
640 	u32				ale_entries;
641 	u32				ale_ports;
642 	bool				enable_ale;
643 	u8				max_num_slaves;
644 	u8				max_num_ports; /* max_num_slaves + 1 */
645 	u8				num_stats_mods;
646 	struct netcp_tx_pipe		tx_pipe;
647 
648 	int				host_port;
649 	u32				rx_packet_max;
650 	u32				ss_version;
651 	u32				stats_en_mask;
652 
653 	void __iomem			*ss_regs;
654 	void __iomem			*switch_regs;
655 	void __iomem			*host_port_regs;
656 	void __iomem			*ale_reg;
657 	void __iomem			*sgmii_port_regs;
658 	void __iomem			*sgmii_port34_regs;
659 	void __iomem			*xgbe_serdes_regs;
660 	void __iomem			*hw_stats_regs[GBE_MAX_HW_STAT_MODS];
661 
662 	struct gbe_ss_regs_ofs		ss_regs_ofs;
663 	struct gbe_switch_regs_ofs	switch_regs_ofs;
664 	struct gbe_host_port_regs_ofs	host_port_regs_ofs;
665 
666 	struct cpsw_ale			*ale;
667 	unsigned int			tx_queue_id;
668 	const char			*dma_chan_name;
669 
670 	struct list_head		gbe_intf_head;
671 	struct list_head		secondary_slaves;
672 	struct net_device		*dummy_ndev;
673 
674 	u64				*hw_stats;
675 	u32				*hw_stats_prev;
676 	const struct netcp_ethtool_stat *et_stats;
677 	int				num_et_stats;
678 	/*  Lock for updating the hwstats */
679 	spinlock_t			hw_stats_lock;
680 };
681 
682 struct gbe_intf {
683 	struct net_device	*ndev;
684 	struct device		*dev;
685 	struct gbe_priv		*gbe_dev;
686 	struct netcp_tx_pipe	tx_pipe;
687 	struct gbe_slave	*slave;
688 	struct list_head	gbe_intf_list;
689 	unsigned long		active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
690 };
691 
692 static struct netcp_module gbe_module;
693 static struct netcp_module xgbe_module;
694 
695 /* Statistic management */
696 struct netcp_ethtool_stat {
697 	char desc[ETH_GSTRING_LEN];
698 	int type;
699 	u32 size;
700 	int offset;
701 };
702 
703 #define GBE_STATSA_INFO(field)						\
704 {									\
705 	"GBE_A:"#field, GBE_STATSA_MODULE,				\
706 	FIELD_SIZEOF(struct gbe_hw_stats, field),			\
707 	offsetof(struct gbe_hw_stats, field)				\
708 }
709 
710 #define GBE_STATSB_INFO(field)						\
711 {									\
712 	"GBE_B:"#field, GBE_STATSB_MODULE,				\
713 	FIELD_SIZEOF(struct gbe_hw_stats, field),			\
714 	offsetof(struct gbe_hw_stats, field)				\
715 }
716 
717 #define GBE_STATSC_INFO(field)						\
718 {									\
719 	"GBE_C:"#field, GBE_STATSC_MODULE,				\
720 	FIELD_SIZEOF(struct gbe_hw_stats, field),			\
721 	offsetof(struct gbe_hw_stats, field)				\
722 }
723 
724 #define GBE_STATSD_INFO(field)						\
725 {									\
726 	"GBE_D:"#field, GBE_STATSD_MODULE,				\
727 	FIELD_SIZEOF(struct gbe_hw_stats, field),			\
728 	offsetof(struct gbe_hw_stats, field)				\
729 }
730 
731 static const struct netcp_ethtool_stat gbe13_et_stats[] = {
732 	/* GBE module A */
733 	GBE_STATSA_INFO(rx_good_frames),
734 	GBE_STATSA_INFO(rx_broadcast_frames),
735 	GBE_STATSA_INFO(rx_multicast_frames),
736 	GBE_STATSA_INFO(rx_pause_frames),
737 	GBE_STATSA_INFO(rx_crc_errors),
738 	GBE_STATSA_INFO(rx_align_code_errors),
739 	GBE_STATSA_INFO(rx_oversized_frames),
740 	GBE_STATSA_INFO(rx_jabber_frames),
741 	GBE_STATSA_INFO(rx_undersized_frames),
742 	GBE_STATSA_INFO(rx_fragments),
743 	GBE_STATSA_INFO(rx_bytes),
744 	GBE_STATSA_INFO(tx_good_frames),
745 	GBE_STATSA_INFO(tx_broadcast_frames),
746 	GBE_STATSA_INFO(tx_multicast_frames),
747 	GBE_STATSA_INFO(tx_pause_frames),
748 	GBE_STATSA_INFO(tx_deferred_frames),
749 	GBE_STATSA_INFO(tx_collision_frames),
750 	GBE_STATSA_INFO(tx_single_coll_frames),
751 	GBE_STATSA_INFO(tx_mult_coll_frames),
752 	GBE_STATSA_INFO(tx_excessive_collisions),
753 	GBE_STATSA_INFO(tx_late_collisions),
754 	GBE_STATSA_INFO(tx_underrun),
755 	GBE_STATSA_INFO(tx_carrier_sense_errors),
756 	GBE_STATSA_INFO(tx_bytes),
757 	GBE_STATSA_INFO(tx_64byte_frames),
758 	GBE_STATSA_INFO(tx_65_to_127byte_frames),
759 	GBE_STATSA_INFO(tx_128_to_255byte_frames),
760 	GBE_STATSA_INFO(tx_256_to_511byte_frames),
761 	GBE_STATSA_INFO(tx_512_to_1023byte_frames),
762 	GBE_STATSA_INFO(tx_1024byte_frames),
763 	GBE_STATSA_INFO(net_bytes),
764 	GBE_STATSA_INFO(rx_sof_overruns),
765 	GBE_STATSA_INFO(rx_mof_overruns),
766 	GBE_STATSA_INFO(rx_dma_overruns),
767 	/* GBE module B */
768 	GBE_STATSB_INFO(rx_good_frames),
769 	GBE_STATSB_INFO(rx_broadcast_frames),
770 	GBE_STATSB_INFO(rx_multicast_frames),
771 	GBE_STATSB_INFO(rx_pause_frames),
772 	GBE_STATSB_INFO(rx_crc_errors),
773 	GBE_STATSB_INFO(rx_align_code_errors),
774 	GBE_STATSB_INFO(rx_oversized_frames),
775 	GBE_STATSB_INFO(rx_jabber_frames),
776 	GBE_STATSB_INFO(rx_undersized_frames),
777 	GBE_STATSB_INFO(rx_fragments),
778 	GBE_STATSB_INFO(rx_bytes),
779 	GBE_STATSB_INFO(tx_good_frames),
780 	GBE_STATSB_INFO(tx_broadcast_frames),
781 	GBE_STATSB_INFO(tx_multicast_frames),
782 	GBE_STATSB_INFO(tx_pause_frames),
783 	GBE_STATSB_INFO(tx_deferred_frames),
784 	GBE_STATSB_INFO(tx_collision_frames),
785 	GBE_STATSB_INFO(tx_single_coll_frames),
786 	GBE_STATSB_INFO(tx_mult_coll_frames),
787 	GBE_STATSB_INFO(tx_excessive_collisions),
788 	GBE_STATSB_INFO(tx_late_collisions),
789 	GBE_STATSB_INFO(tx_underrun),
790 	GBE_STATSB_INFO(tx_carrier_sense_errors),
791 	GBE_STATSB_INFO(tx_bytes),
792 	GBE_STATSB_INFO(tx_64byte_frames),
793 	GBE_STATSB_INFO(tx_65_to_127byte_frames),
794 	GBE_STATSB_INFO(tx_128_to_255byte_frames),
795 	GBE_STATSB_INFO(tx_256_to_511byte_frames),
796 	GBE_STATSB_INFO(tx_512_to_1023byte_frames),
797 	GBE_STATSB_INFO(tx_1024byte_frames),
798 	GBE_STATSB_INFO(net_bytes),
799 	GBE_STATSB_INFO(rx_sof_overruns),
800 	GBE_STATSB_INFO(rx_mof_overruns),
801 	GBE_STATSB_INFO(rx_dma_overruns),
802 	/* GBE module C */
803 	GBE_STATSC_INFO(rx_good_frames),
804 	GBE_STATSC_INFO(rx_broadcast_frames),
805 	GBE_STATSC_INFO(rx_multicast_frames),
806 	GBE_STATSC_INFO(rx_pause_frames),
807 	GBE_STATSC_INFO(rx_crc_errors),
808 	GBE_STATSC_INFO(rx_align_code_errors),
809 	GBE_STATSC_INFO(rx_oversized_frames),
810 	GBE_STATSC_INFO(rx_jabber_frames),
811 	GBE_STATSC_INFO(rx_undersized_frames),
812 	GBE_STATSC_INFO(rx_fragments),
813 	GBE_STATSC_INFO(rx_bytes),
814 	GBE_STATSC_INFO(tx_good_frames),
815 	GBE_STATSC_INFO(tx_broadcast_frames),
816 	GBE_STATSC_INFO(tx_multicast_frames),
817 	GBE_STATSC_INFO(tx_pause_frames),
818 	GBE_STATSC_INFO(tx_deferred_frames),
819 	GBE_STATSC_INFO(tx_collision_frames),
820 	GBE_STATSC_INFO(tx_single_coll_frames),
821 	GBE_STATSC_INFO(tx_mult_coll_frames),
822 	GBE_STATSC_INFO(tx_excessive_collisions),
823 	GBE_STATSC_INFO(tx_late_collisions),
824 	GBE_STATSC_INFO(tx_underrun),
825 	GBE_STATSC_INFO(tx_carrier_sense_errors),
826 	GBE_STATSC_INFO(tx_bytes),
827 	GBE_STATSC_INFO(tx_64byte_frames),
828 	GBE_STATSC_INFO(tx_65_to_127byte_frames),
829 	GBE_STATSC_INFO(tx_128_to_255byte_frames),
830 	GBE_STATSC_INFO(tx_256_to_511byte_frames),
831 	GBE_STATSC_INFO(tx_512_to_1023byte_frames),
832 	GBE_STATSC_INFO(tx_1024byte_frames),
833 	GBE_STATSC_INFO(net_bytes),
834 	GBE_STATSC_INFO(rx_sof_overruns),
835 	GBE_STATSC_INFO(rx_mof_overruns),
836 	GBE_STATSC_INFO(rx_dma_overruns),
837 	/* GBE module D */
838 	GBE_STATSD_INFO(rx_good_frames),
839 	GBE_STATSD_INFO(rx_broadcast_frames),
840 	GBE_STATSD_INFO(rx_multicast_frames),
841 	GBE_STATSD_INFO(rx_pause_frames),
842 	GBE_STATSD_INFO(rx_crc_errors),
843 	GBE_STATSD_INFO(rx_align_code_errors),
844 	GBE_STATSD_INFO(rx_oversized_frames),
845 	GBE_STATSD_INFO(rx_jabber_frames),
846 	GBE_STATSD_INFO(rx_undersized_frames),
847 	GBE_STATSD_INFO(rx_fragments),
848 	GBE_STATSD_INFO(rx_bytes),
849 	GBE_STATSD_INFO(tx_good_frames),
850 	GBE_STATSD_INFO(tx_broadcast_frames),
851 	GBE_STATSD_INFO(tx_multicast_frames),
852 	GBE_STATSD_INFO(tx_pause_frames),
853 	GBE_STATSD_INFO(tx_deferred_frames),
854 	GBE_STATSD_INFO(tx_collision_frames),
855 	GBE_STATSD_INFO(tx_single_coll_frames),
856 	GBE_STATSD_INFO(tx_mult_coll_frames),
857 	GBE_STATSD_INFO(tx_excessive_collisions),
858 	GBE_STATSD_INFO(tx_late_collisions),
859 	GBE_STATSD_INFO(tx_underrun),
860 	GBE_STATSD_INFO(tx_carrier_sense_errors),
861 	GBE_STATSD_INFO(tx_bytes),
862 	GBE_STATSD_INFO(tx_64byte_frames),
863 	GBE_STATSD_INFO(tx_65_to_127byte_frames),
864 	GBE_STATSD_INFO(tx_128_to_255byte_frames),
865 	GBE_STATSD_INFO(tx_256_to_511byte_frames),
866 	GBE_STATSD_INFO(tx_512_to_1023byte_frames),
867 	GBE_STATSD_INFO(tx_1024byte_frames),
868 	GBE_STATSD_INFO(net_bytes),
869 	GBE_STATSD_INFO(rx_sof_overruns),
870 	GBE_STATSD_INFO(rx_mof_overruns),
871 	GBE_STATSD_INFO(rx_dma_overruns),
872 };
873 
874 /* This is the size of entries in GBENU_STATS_HOST */
875 #define GBENU_ET_STATS_HOST_SIZE	52
876 
877 #define GBENU_STATS_HOST(field)					\
878 {								\
879 	"GBE_HOST:"#field, GBENU_STATS0_MODULE,			\
880 	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
881 	offsetof(struct gbenu_hw_stats, field)			\
882 }
883 
884 /* This is the size of entries in GBENU_STATS_PORT */
885 #define GBENU_ET_STATS_PORT_SIZE	65
886 
887 #define GBENU_STATS_P1(field)					\
888 {								\
889 	"GBE_P1:"#field, GBENU_STATS1_MODULE,			\
890 	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
891 	offsetof(struct gbenu_hw_stats, field)			\
892 }
893 
894 #define GBENU_STATS_P2(field)					\
895 {								\
896 	"GBE_P2:"#field, GBENU_STATS2_MODULE,			\
897 	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
898 	offsetof(struct gbenu_hw_stats, field)			\
899 }
900 
901 #define GBENU_STATS_P3(field)					\
902 {								\
903 	"GBE_P3:"#field, GBENU_STATS3_MODULE,			\
904 	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
905 	offsetof(struct gbenu_hw_stats, field)			\
906 }
907 
908 #define GBENU_STATS_P4(field)					\
909 {								\
910 	"GBE_P4:"#field, GBENU_STATS4_MODULE,			\
911 	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
912 	offsetof(struct gbenu_hw_stats, field)			\
913 }
914 
915 #define GBENU_STATS_P5(field)					\
916 {								\
917 	"GBE_P5:"#field, GBENU_STATS5_MODULE,			\
918 	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
919 	offsetof(struct gbenu_hw_stats, field)			\
920 }
921 
922 #define GBENU_STATS_P6(field)					\
923 {								\
924 	"GBE_P6:"#field, GBENU_STATS6_MODULE,			\
925 	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
926 	offsetof(struct gbenu_hw_stats, field)			\
927 }
928 
929 #define GBENU_STATS_P7(field)					\
930 {								\
931 	"GBE_P7:"#field, GBENU_STATS7_MODULE,			\
932 	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
933 	offsetof(struct gbenu_hw_stats, field)			\
934 }
935 
936 #define GBENU_STATS_P8(field)					\
937 {								\
938 	"GBE_P8:"#field, GBENU_STATS8_MODULE,			\
939 	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
940 	offsetof(struct gbenu_hw_stats, field)			\
941 }
942 
943 static const struct netcp_ethtool_stat gbenu_et_stats[] = {
944 	/* GBENU Host Module */
945 	GBENU_STATS_HOST(rx_good_frames),
946 	GBENU_STATS_HOST(rx_broadcast_frames),
947 	GBENU_STATS_HOST(rx_multicast_frames),
948 	GBENU_STATS_HOST(rx_crc_errors),
949 	GBENU_STATS_HOST(rx_oversized_frames),
950 	GBENU_STATS_HOST(rx_undersized_frames),
951 	GBENU_STATS_HOST(ale_drop),
952 	GBENU_STATS_HOST(ale_overrun_drop),
953 	GBENU_STATS_HOST(rx_bytes),
954 	GBENU_STATS_HOST(tx_good_frames),
955 	GBENU_STATS_HOST(tx_broadcast_frames),
956 	GBENU_STATS_HOST(tx_multicast_frames),
957 	GBENU_STATS_HOST(tx_bytes),
958 	GBENU_STATS_HOST(tx_64B_frames),
959 	GBENU_STATS_HOST(tx_65_to_127B_frames),
960 	GBENU_STATS_HOST(tx_128_to_255B_frames),
961 	GBENU_STATS_HOST(tx_256_to_511B_frames),
962 	GBENU_STATS_HOST(tx_512_to_1023B_frames),
963 	GBENU_STATS_HOST(tx_1024B_frames),
964 	GBENU_STATS_HOST(net_bytes),
965 	GBENU_STATS_HOST(rx_bottom_fifo_drop),
966 	GBENU_STATS_HOST(rx_port_mask_drop),
967 	GBENU_STATS_HOST(rx_top_fifo_drop),
968 	GBENU_STATS_HOST(ale_rate_limit_drop),
969 	GBENU_STATS_HOST(ale_vid_ingress_drop),
970 	GBENU_STATS_HOST(ale_da_eq_sa_drop),
971 	GBENU_STATS_HOST(ale_unknown_ucast),
972 	GBENU_STATS_HOST(ale_unknown_ucast_bytes),
973 	GBENU_STATS_HOST(ale_unknown_mcast),
974 	GBENU_STATS_HOST(ale_unknown_mcast_bytes),
975 	GBENU_STATS_HOST(ale_unknown_bcast),
976 	GBENU_STATS_HOST(ale_unknown_bcast_bytes),
977 	GBENU_STATS_HOST(ale_pol_match),
978 	GBENU_STATS_HOST(ale_pol_match_red),
979 	GBENU_STATS_HOST(ale_pol_match_yellow),
980 	GBENU_STATS_HOST(tx_mem_protect_err),
981 	GBENU_STATS_HOST(tx_pri0_drop),
982 	GBENU_STATS_HOST(tx_pri1_drop),
983 	GBENU_STATS_HOST(tx_pri2_drop),
984 	GBENU_STATS_HOST(tx_pri3_drop),
985 	GBENU_STATS_HOST(tx_pri4_drop),
986 	GBENU_STATS_HOST(tx_pri5_drop),
987 	GBENU_STATS_HOST(tx_pri6_drop),
988 	GBENU_STATS_HOST(tx_pri7_drop),
989 	GBENU_STATS_HOST(tx_pri0_drop_bcnt),
990 	GBENU_STATS_HOST(tx_pri1_drop_bcnt),
991 	GBENU_STATS_HOST(tx_pri2_drop_bcnt),
992 	GBENU_STATS_HOST(tx_pri3_drop_bcnt),
993 	GBENU_STATS_HOST(tx_pri4_drop_bcnt),
994 	GBENU_STATS_HOST(tx_pri5_drop_bcnt),
995 	GBENU_STATS_HOST(tx_pri6_drop_bcnt),
996 	GBENU_STATS_HOST(tx_pri7_drop_bcnt),
997 	/* GBENU Module 1 */
998 	GBENU_STATS_P1(rx_good_frames),
999 	GBENU_STATS_P1(rx_broadcast_frames),
1000 	GBENU_STATS_P1(rx_multicast_frames),
1001 	GBENU_STATS_P1(rx_pause_frames),
1002 	GBENU_STATS_P1(rx_crc_errors),
1003 	GBENU_STATS_P1(rx_align_code_errors),
1004 	GBENU_STATS_P1(rx_oversized_frames),
1005 	GBENU_STATS_P1(rx_jabber_frames),
1006 	GBENU_STATS_P1(rx_undersized_frames),
1007 	GBENU_STATS_P1(rx_fragments),
1008 	GBENU_STATS_P1(ale_drop),
1009 	GBENU_STATS_P1(ale_overrun_drop),
1010 	GBENU_STATS_P1(rx_bytes),
1011 	GBENU_STATS_P1(tx_good_frames),
1012 	GBENU_STATS_P1(tx_broadcast_frames),
1013 	GBENU_STATS_P1(tx_multicast_frames),
1014 	GBENU_STATS_P1(tx_pause_frames),
1015 	GBENU_STATS_P1(tx_deferred_frames),
1016 	GBENU_STATS_P1(tx_collision_frames),
1017 	GBENU_STATS_P1(tx_single_coll_frames),
1018 	GBENU_STATS_P1(tx_mult_coll_frames),
1019 	GBENU_STATS_P1(tx_excessive_collisions),
1020 	GBENU_STATS_P1(tx_late_collisions),
1021 	GBENU_STATS_P1(rx_ipg_error),
1022 	GBENU_STATS_P1(tx_carrier_sense_errors),
1023 	GBENU_STATS_P1(tx_bytes),
1024 	GBENU_STATS_P1(tx_64B_frames),
1025 	GBENU_STATS_P1(tx_65_to_127B_frames),
1026 	GBENU_STATS_P1(tx_128_to_255B_frames),
1027 	GBENU_STATS_P1(tx_256_to_511B_frames),
1028 	GBENU_STATS_P1(tx_512_to_1023B_frames),
1029 	GBENU_STATS_P1(tx_1024B_frames),
1030 	GBENU_STATS_P1(net_bytes),
1031 	GBENU_STATS_P1(rx_bottom_fifo_drop),
1032 	GBENU_STATS_P1(rx_port_mask_drop),
1033 	GBENU_STATS_P1(rx_top_fifo_drop),
1034 	GBENU_STATS_P1(ale_rate_limit_drop),
1035 	GBENU_STATS_P1(ale_vid_ingress_drop),
1036 	GBENU_STATS_P1(ale_da_eq_sa_drop),
1037 	GBENU_STATS_P1(ale_unknown_ucast),
1038 	GBENU_STATS_P1(ale_unknown_ucast_bytes),
1039 	GBENU_STATS_P1(ale_unknown_mcast),
1040 	GBENU_STATS_P1(ale_unknown_mcast_bytes),
1041 	GBENU_STATS_P1(ale_unknown_bcast),
1042 	GBENU_STATS_P1(ale_unknown_bcast_bytes),
1043 	GBENU_STATS_P1(ale_pol_match),
1044 	GBENU_STATS_P1(ale_pol_match_red),
1045 	GBENU_STATS_P1(ale_pol_match_yellow),
1046 	GBENU_STATS_P1(tx_mem_protect_err),
1047 	GBENU_STATS_P1(tx_pri0_drop),
1048 	GBENU_STATS_P1(tx_pri1_drop),
1049 	GBENU_STATS_P1(tx_pri2_drop),
1050 	GBENU_STATS_P1(tx_pri3_drop),
1051 	GBENU_STATS_P1(tx_pri4_drop),
1052 	GBENU_STATS_P1(tx_pri5_drop),
1053 	GBENU_STATS_P1(tx_pri6_drop),
1054 	GBENU_STATS_P1(tx_pri7_drop),
1055 	GBENU_STATS_P1(tx_pri0_drop_bcnt),
1056 	GBENU_STATS_P1(tx_pri1_drop_bcnt),
1057 	GBENU_STATS_P1(tx_pri2_drop_bcnt),
1058 	GBENU_STATS_P1(tx_pri3_drop_bcnt),
1059 	GBENU_STATS_P1(tx_pri4_drop_bcnt),
1060 	GBENU_STATS_P1(tx_pri5_drop_bcnt),
1061 	GBENU_STATS_P1(tx_pri6_drop_bcnt),
1062 	GBENU_STATS_P1(tx_pri7_drop_bcnt),
1063 	/* GBENU Module 2 */
1064 	GBENU_STATS_P2(rx_good_frames),
1065 	GBENU_STATS_P2(rx_broadcast_frames),
1066 	GBENU_STATS_P2(rx_multicast_frames),
1067 	GBENU_STATS_P2(rx_pause_frames),
1068 	GBENU_STATS_P2(rx_crc_errors),
1069 	GBENU_STATS_P2(rx_align_code_errors),
1070 	GBENU_STATS_P2(rx_oversized_frames),
1071 	GBENU_STATS_P2(rx_jabber_frames),
1072 	GBENU_STATS_P2(rx_undersized_frames),
1073 	GBENU_STATS_P2(rx_fragments),
1074 	GBENU_STATS_P2(ale_drop),
1075 	GBENU_STATS_P2(ale_overrun_drop),
1076 	GBENU_STATS_P2(rx_bytes),
1077 	GBENU_STATS_P2(tx_good_frames),
1078 	GBENU_STATS_P2(tx_broadcast_frames),
1079 	GBENU_STATS_P2(tx_multicast_frames),
1080 	GBENU_STATS_P2(tx_pause_frames),
1081 	GBENU_STATS_P2(tx_deferred_frames),
1082 	GBENU_STATS_P2(tx_collision_frames),
1083 	GBENU_STATS_P2(tx_single_coll_frames),
1084 	GBENU_STATS_P2(tx_mult_coll_frames),
1085 	GBENU_STATS_P2(tx_excessive_collisions),
1086 	GBENU_STATS_P2(tx_late_collisions),
1087 	GBENU_STATS_P2(rx_ipg_error),
1088 	GBENU_STATS_P2(tx_carrier_sense_errors),
1089 	GBENU_STATS_P2(tx_bytes),
1090 	GBENU_STATS_P2(tx_64B_frames),
1091 	GBENU_STATS_P2(tx_65_to_127B_frames),
1092 	GBENU_STATS_P2(tx_128_to_255B_frames),
1093 	GBENU_STATS_P2(tx_256_to_511B_frames),
1094 	GBENU_STATS_P2(tx_512_to_1023B_frames),
1095 	GBENU_STATS_P2(tx_1024B_frames),
1096 	GBENU_STATS_P2(net_bytes),
1097 	GBENU_STATS_P2(rx_bottom_fifo_drop),
1098 	GBENU_STATS_P2(rx_port_mask_drop),
1099 	GBENU_STATS_P2(rx_top_fifo_drop),
1100 	GBENU_STATS_P2(ale_rate_limit_drop),
1101 	GBENU_STATS_P2(ale_vid_ingress_drop),
1102 	GBENU_STATS_P2(ale_da_eq_sa_drop),
1103 	GBENU_STATS_P2(ale_unknown_ucast),
1104 	GBENU_STATS_P2(ale_unknown_ucast_bytes),
1105 	GBENU_STATS_P2(ale_unknown_mcast),
1106 	GBENU_STATS_P2(ale_unknown_mcast_bytes),
1107 	GBENU_STATS_P2(ale_unknown_bcast),
1108 	GBENU_STATS_P2(ale_unknown_bcast_bytes),
1109 	GBENU_STATS_P2(ale_pol_match),
1110 	GBENU_STATS_P2(ale_pol_match_red),
1111 	GBENU_STATS_P2(ale_pol_match_yellow),
1112 	GBENU_STATS_P2(tx_mem_protect_err),
1113 	GBENU_STATS_P2(tx_pri0_drop),
1114 	GBENU_STATS_P2(tx_pri1_drop),
1115 	GBENU_STATS_P2(tx_pri2_drop),
1116 	GBENU_STATS_P2(tx_pri3_drop),
1117 	GBENU_STATS_P2(tx_pri4_drop),
1118 	GBENU_STATS_P2(tx_pri5_drop),
1119 	GBENU_STATS_P2(tx_pri6_drop),
1120 	GBENU_STATS_P2(tx_pri7_drop),
1121 	GBENU_STATS_P2(tx_pri0_drop_bcnt),
1122 	GBENU_STATS_P2(tx_pri1_drop_bcnt),
1123 	GBENU_STATS_P2(tx_pri2_drop_bcnt),
1124 	GBENU_STATS_P2(tx_pri3_drop_bcnt),
1125 	GBENU_STATS_P2(tx_pri4_drop_bcnt),
1126 	GBENU_STATS_P2(tx_pri5_drop_bcnt),
1127 	GBENU_STATS_P2(tx_pri6_drop_bcnt),
1128 	GBENU_STATS_P2(tx_pri7_drop_bcnt),
1129 	/* GBENU Module 3 */
1130 	GBENU_STATS_P3(rx_good_frames),
1131 	GBENU_STATS_P3(rx_broadcast_frames),
1132 	GBENU_STATS_P3(rx_multicast_frames),
1133 	GBENU_STATS_P3(rx_pause_frames),
1134 	GBENU_STATS_P3(rx_crc_errors),
1135 	GBENU_STATS_P3(rx_align_code_errors),
1136 	GBENU_STATS_P3(rx_oversized_frames),
1137 	GBENU_STATS_P3(rx_jabber_frames),
1138 	GBENU_STATS_P3(rx_undersized_frames),
1139 	GBENU_STATS_P3(rx_fragments),
1140 	GBENU_STATS_P3(ale_drop),
1141 	GBENU_STATS_P3(ale_overrun_drop),
1142 	GBENU_STATS_P3(rx_bytes),
1143 	GBENU_STATS_P3(tx_good_frames),
1144 	GBENU_STATS_P3(tx_broadcast_frames),
1145 	GBENU_STATS_P3(tx_multicast_frames),
1146 	GBENU_STATS_P3(tx_pause_frames),
1147 	GBENU_STATS_P3(tx_deferred_frames),
1148 	GBENU_STATS_P3(tx_collision_frames),
1149 	GBENU_STATS_P3(tx_single_coll_frames),
1150 	GBENU_STATS_P3(tx_mult_coll_frames),
1151 	GBENU_STATS_P3(tx_excessive_collisions),
1152 	GBENU_STATS_P3(tx_late_collisions),
1153 	GBENU_STATS_P3(rx_ipg_error),
1154 	GBENU_STATS_P3(tx_carrier_sense_errors),
1155 	GBENU_STATS_P3(tx_bytes),
1156 	GBENU_STATS_P3(tx_64B_frames),
1157 	GBENU_STATS_P3(tx_65_to_127B_frames),
1158 	GBENU_STATS_P3(tx_128_to_255B_frames),
1159 	GBENU_STATS_P3(tx_256_to_511B_frames),
1160 	GBENU_STATS_P3(tx_512_to_1023B_frames),
1161 	GBENU_STATS_P3(tx_1024B_frames),
1162 	GBENU_STATS_P3(net_bytes),
1163 	GBENU_STATS_P3(rx_bottom_fifo_drop),
1164 	GBENU_STATS_P3(rx_port_mask_drop),
1165 	GBENU_STATS_P3(rx_top_fifo_drop),
1166 	GBENU_STATS_P3(ale_rate_limit_drop),
1167 	GBENU_STATS_P3(ale_vid_ingress_drop),
1168 	GBENU_STATS_P3(ale_da_eq_sa_drop),
1169 	GBENU_STATS_P3(ale_unknown_ucast),
1170 	GBENU_STATS_P3(ale_unknown_ucast_bytes),
1171 	GBENU_STATS_P3(ale_unknown_mcast),
1172 	GBENU_STATS_P3(ale_unknown_mcast_bytes),
1173 	GBENU_STATS_P3(ale_unknown_bcast),
1174 	GBENU_STATS_P3(ale_unknown_bcast_bytes),
1175 	GBENU_STATS_P3(ale_pol_match),
1176 	GBENU_STATS_P3(ale_pol_match_red),
1177 	GBENU_STATS_P3(ale_pol_match_yellow),
1178 	GBENU_STATS_P3(tx_mem_protect_err),
1179 	GBENU_STATS_P3(tx_pri0_drop),
1180 	GBENU_STATS_P3(tx_pri1_drop),
1181 	GBENU_STATS_P3(tx_pri2_drop),
1182 	GBENU_STATS_P3(tx_pri3_drop),
1183 	GBENU_STATS_P3(tx_pri4_drop),
1184 	GBENU_STATS_P3(tx_pri5_drop),
1185 	GBENU_STATS_P3(tx_pri6_drop),
1186 	GBENU_STATS_P3(tx_pri7_drop),
1187 	GBENU_STATS_P3(tx_pri0_drop_bcnt),
1188 	GBENU_STATS_P3(tx_pri1_drop_bcnt),
1189 	GBENU_STATS_P3(tx_pri2_drop_bcnt),
1190 	GBENU_STATS_P3(tx_pri3_drop_bcnt),
1191 	GBENU_STATS_P3(tx_pri4_drop_bcnt),
1192 	GBENU_STATS_P3(tx_pri5_drop_bcnt),
1193 	GBENU_STATS_P3(tx_pri6_drop_bcnt),
1194 	GBENU_STATS_P3(tx_pri7_drop_bcnt),
1195 	/* GBENU Module 4 */
1196 	GBENU_STATS_P4(rx_good_frames),
1197 	GBENU_STATS_P4(rx_broadcast_frames),
1198 	GBENU_STATS_P4(rx_multicast_frames),
1199 	GBENU_STATS_P4(rx_pause_frames),
1200 	GBENU_STATS_P4(rx_crc_errors),
1201 	GBENU_STATS_P4(rx_align_code_errors),
1202 	GBENU_STATS_P4(rx_oversized_frames),
1203 	GBENU_STATS_P4(rx_jabber_frames),
1204 	GBENU_STATS_P4(rx_undersized_frames),
1205 	GBENU_STATS_P4(rx_fragments),
1206 	GBENU_STATS_P4(ale_drop),
1207 	GBENU_STATS_P4(ale_overrun_drop),
1208 	GBENU_STATS_P4(rx_bytes),
1209 	GBENU_STATS_P4(tx_good_frames),
1210 	GBENU_STATS_P4(tx_broadcast_frames),
1211 	GBENU_STATS_P4(tx_multicast_frames),
1212 	GBENU_STATS_P4(tx_pause_frames),
1213 	GBENU_STATS_P4(tx_deferred_frames),
1214 	GBENU_STATS_P4(tx_collision_frames),
1215 	GBENU_STATS_P4(tx_single_coll_frames),
1216 	GBENU_STATS_P4(tx_mult_coll_frames),
1217 	GBENU_STATS_P4(tx_excessive_collisions),
1218 	GBENU_STATS_P4(tx_late_collisions),
1219 	GBENU_STATS_P4(rx_ipg_error),
1220 	GBENU_STATS_P4(tx_carrier_sense_errors),
1221 	GBENU_STATS_P4(tx_bytes),
1222 	GBENU_STATS_P4(tx_64B_frames),
1223 	GBENU_STATS_P4(tx_65_to_127B_frames),
1224 	GBENU_STATS_P4(tx_128_to_255B_frames),
1225 	GBENU_STATS_P4(tx_256_to_511B_frames),
1226 	GBENU_STATS_P4(tx_512_to_1023B_frames),
1227 	GBENU_STATS_P4(tx_1024B_frames),
1228 	GBENU_STATS_P4(net_bytes),
1229 	GBENU_STATS_P4(rx_bottom_fifo_drop),
1230 	GBENU_STATS_P4(rx_port_mask_drop),
1231 	GBENU_STATS_P4(rx_top_fifo_drop),
1232 	GBENU_STATS_P4(ale_rate_limit_drop),
1233 	GBENU_STATS_P4(ale_vid_ingress_drop),
1234 	GBENU_STATS_P4(ale_da_eq_sa_drop),
1235 	GBENU_STATS_P4(ale_unknown_ucast),
1236 	GBENU_STATS_P4(ale_unknown_ucast_bytes),
1237 	GBENU_STATS_P4(ale_unknown_mcast),
1238 	GBENU_STATS_P4(ale_unknown_mcast_bytes),
1239 	GBENU_STATS_P4(ale_unknown_bcast),
1240 	GBENU_STATS_P4(ale_unknown_bcast_bytes),
1241 	GBENU_STATS_P4(ale_pol_match),
1242 	GBENU_STATS_P4(ale_pol_match_red),
1243 	GBENU_STATS_P4(ale_pol_match_yellow),
1244 	GBENU_STATS_P4(tx_mem_protect_err),
1245 	GBENU_STATS_P4(tx_pri0_drop),
1246 	GBENU_STATS_P4(tx_pri1_drop),
1247 	GBENU_STATS_P4(tx_pri2_drop),
1248 	GBENU_STATS_P4(tx_pri3_drop),
1249 	GBENU_STATS_P4(tx_pri4_drop),
1250 	GBENU_STATS_P4(tx_pri5_drop),
1251 	GBENU_STATS_P4(tx_pri6_drop),
1252 	GBENU_STATS_P4(tx_pri7_drop),
1253 	GBENU_STATS_P4(tx_pri0_drop_bcnt),
1254 	GBENU_STATS_P4(tx_pri1_drop_bcnt),
1255 	GBENU_STATS_P4(tx_pri2_drop_bcnt),
1256 	GBENU_STATS_P4(tx_pri3_drop_bcnt),
1257 	GBENU_STATS_P4(tx_pri4_drop_bcnt),
1258 	GBENU_STATS_P4(tx_pri5_drop_bcnt),
1259 	GBENU_STATS_P4(tx_pri6_drop_bcnt),
1260 	GBENU_STATS_P4(tx_pri7_drop_bcnt),
1261 	/* GBENU Module 5 */
1262 	GBENU_STATS_P5(rx_good_frames),
1263 	GBENU_STATS_P5(rx_broadcast_frames),
1264 	GBENU_STATS_P5(rx_multicast_frames),
1265 	GBENU_STATS_P5(rx_pause_frames),
1266 	GBENU_STATS_P5(rx_crc_errors),
1267 	GBENU_STATS_P5(rx_align_code_errors),
1268 	GBENU_STATS_P5(rx_oversized_frames),
1269 	GBENU_STATS_P5(rx_jabber_frames),
1270 	GBENU_STATS_P5(rx_undersized_frames),
1271 	GBENU_STATS_P5(rx_fragments),
1272 	GBENU_STATS_P5(ale_drop),
1273 	GBENU_STATS_P5(ale_overrun_drop),
1274 	GBENU_STATS_P5(rx_bytes),
1275 	GBENU_STATS_P5(tx_good_frames),
1276 	GBENU_STATS_P5(tx_broadcast_frames),
1277 	GBENU_STATS_P5(tx_multicast_frames),
1278 	GBENU_STATS_P5(tx_pause_frames),
1279 	GBENU_STATS_P5(tx_deferred_frames),
1280 	GBENU_STATS_P5(tx_collision_frames),
1281 	GBENU_STATS_P5(tx_single_coll_frames),
1282 	GBENU_STATS_P5(tx_mult_coll_frames),
1283 	GBENU_STATS_P5(tx_excessive_collisions),
1284 	GBENU_STATS_P5(tx_late_collisions),
1285 	GBENU_STATS_P5(rx_ipg_error),
1286 	GBENU_STATS_P5(tx_carrier_sense_errors),
1287 	GBENU_STATS_P5(tx_bytes),
1288 	GBENU_STATS_P5(tx_64B_frames),
1289 	GBENU_STATS_P5(tx_65_to_127B_frames),
1290 	GBENU_STATS_P5(tx_128_to_255B_frames),
1291 	GBENU_STATS_P5(tx_256_to_511B_frames),
1292 	GBENU_STATS_P5(tx_512_to_1023B_frames),
1293 	GBENU_STATS_P5(tx_1024B_frames),
1294 	GBENU_STATS_P5(net_bytes),
1295 	GBENU_STATS_P5(rx_bottom_fifo_drop),
1296 	GBENU_STATS_P5(rx_port_mask_drop),
1297 	GBENU_STATS_P5(rx_top_fifo_drop),
1298 	GBENU_STATS_P5(ale_rate_limit_drop),
1299 	GBENU_STATS_P5(ale_vid_ingress_drop),
1300 	GBENU_STATS_P5(ale_da_eq_sa_drop),
1301 	GBENU_STATS_P5(ale_unknown_ucast),
1302 	GBENU_STATS_P5(ale_unknown_ucast_bytes),
1303 	GBENU_STATS_P5(ale_unknown_mcast),
1304 	GBENU_STATS_P5(ale_unknown_mcast_bytes),
1305 	GBENU_STATS_P5(ale_unknown_bcast),
1306 	GBENU_STATS_P5(ale_unknown_bcast_bytes),
1307 	GBENU_STATS_P5(ale_pol_match),
1308 	GBENU_STATS_P5(ale_pol_match_red),
1309 	GBENU_STATS_P5(ale_pol_match_yellow),
1310 	GBENU_STATS_P5(tx_mem_protect_err),
1311 	GBENU_STATS_P5(tx_pri0_drop),
1312 	GBENU_STATS_P5(tx_pri1_drop),
1313 	GBENU_STATS_P5(tx_pri2_drop),
1314 	GBENU_STATS_P5(tx_pri3_drop),
1315 	GBENU_STATS_P5(tx_pri4_drop),
1316 	GBENU_STATS_P5(tx_pri5_drop),
1317 	GBENU_STATS_P5(tx_pri6_drop),
1318 	GBENU_STATS_P5(tx_pri7_drop),
1319 	GBENU_STATS_P5(tx_pri0_drop_bcnt),
1320 	GBENU_STATS_P5(tx_pri1_drop_bcnt),
1321 	GBENU_STATS_P5(tx_pri2_drop_bcnt),
1322 	GBENU_STATS_P5(tx_pri3_drop_bcnt),
1323 	GBENU_STATS_P5(tx_pri4_drop_bcnt),
1324 	GBENU_STATS_P5(tx_pri5_drop_bcnt),
1325 	GBENU_STATS_P5(tx_pri6_drop_bcnt),
1326 	GBENU_STATS_P5(tx_pri7_drop_bcnt),
1327 	/* GBENU Module 6 */
1328 	GBENU_STATS_P6(rx_good_frames),
1329 	GBENU_STATS_P6(rx_broadcast_frames),
1330 	GBENU_STATS_P6(rx_multicast_frames),
1331 	GBENU_STATS_P6(rx_pause_frames),
1332 	GBENU_STATS_P6(rx_crc_errors),
1333 	GBENU_STATS_P6(rx_align_code_errors),
1334 	GBENU_STATS_P6(rx_oversized_frames),
1335 	GBENU_STATS_P6(rx_jabber_frames),
1336 	GBENU_STATS_P6(rx_undersized_frames),
1337 	GBENU_STATS_P6(rx_fragments),
1338 	GBENU_STATS_P6(ale_drop),
1339 	GBENU_STATS_P6(ale_overrun_drop),
1340 	GBENU_STATS_P6(rx_bytes),
1341 	GBENU_STATS_P6(tx_good_frames),
1342 	GBENU_STATS_P6(tx_broadcast_frames),
1343 	GBENU_STATS_P6(tx_multicast_frames),
1344 	GBENU_STATS_P6(tx_pause_frames),
1345 	GBENU_STATS_P6(tx_deferred_frames),
1346 	GBENU_STATS_P6(tx_collision_frames),
1347 	GBENU_STATS_P6(tx_single_coll_frames),
1348 	GBENU_STATS_P6(tx_mult_coll_frames),
1349 	GBENU_STATS_P6(tx_excessive_collisions),
1350 	GBENU_STATS_P6(tx_late_collisions),
1351 	GBENU_STATS_P6(rx_ipg_error),
1352 	GBENU_STATS_P6(tx_carrier_sense_errors),
1353 	GBENU_STATS_P6(tx_bytes),
1354 	GBENU_STATS_P6(tx_64B_frames),
1355 	GBENU_STATS_P6(tx_65_to_127B_frames),
1356 	GBENU_STATS_P6(tx_128_to_255B_frames),
1357 	GBENU_STATS_P6(tx_256_to_511B_frames),
1358 	GBENU_STATS_P6(tx_512_to_1023B_frames),
1359 	GBENU_STATS_P6(tx_1024B_frames),
1360 	GBENU_STATS_P6(net_bytes),
1361 	GBENU_STATS_P6(rx_bottom_fifo_drop),
1362 	GBENU_STATS_P6(rx_port_mask_drop),
1363 	GBENU_STATS_P6(rx_top_fifo_drop),
1364 	GBENU_STATS_P6(ale_rate_limit_drop),
1365 	GBENU_STATS_P6(ale_vid_ingress_drop),
1366 	GBENU_STATS_P6(ale_da_eq_sa_drop),
1367 	GBENU_STATS_P6(ale_unknown_ucast),
1368 	GBENU_STATS_P6(ale_unknown_ucast_bytes),
1369 	GBENU_STATS_P6(ale_unknown_mcast),
1370 	GBENU_STATS_P6(ale_unknown_mcast_bytes),
1371 	GBENU_STATS_P6(ale_unknown_bcast),
1372 	GBENU_STATS_P6(ale_unknown_bcast_bytes),
1373 	GBENU_STATS_P6(ale_pol_match),
1374 	GBENU_STATS_P6(ale_pol_match_red),
1375 	GBENU_STATS_P6(ale_pol_match_yellow),
1376 	GBENU_STATS_P6(tx_mem_protect_err),
1377 	GBENU_STATS_P6(tx_pri0_drop),
1378 	GBENU_STATS_P6(tx_pri1_drop),
1379 	GBENU_STATS_P6(tx_pri2_drop),
1380 	GBENU_STATS_P6(tx_pri3_drop),
1381 	GBENU_STATS_P6(tx_pri4_drop),
1382 	GBENU_STATS_P6(tx_pri5_drop),
1383 	GBENU_STATS_P6(tx_pri6_drop),
1384 	GBENU_STATS_P6(tx_pri7_drop),
1385 	GBENU_STATS_P6(tx_pri0_drop_bcnt),
1386 	GBENU_STATS_P6(tx_pri1_drop_bcnt),
1387 	GBENU_STATS_P6(tx_pri2_drop_bcnt),
1388 	GBENU_STATS_P6(tx_pri3_drop_bcnt),
1389 	GBENU_STATS_P6(tx_pri4_drop_bcnt),
1390 	GBENU_STATS_P6(tx_pri5_drop_bcnt),
1391 	GBENU_STATS_P6(tx_pri6_drop_bcnt),
1392 	GBENU_STATS_P6(tx_pri7_drop_bcnt),
1393 	/* GBENU Module 7 */
1394 	GBENU_STATS_P7(rx_good_frames),
1395 	GBENU_STATS_P7(rx_broadcast_frames),
1396 	GBENU_STATS_P7(rx_multicast_frames),
1397 	GBENU_STATS_P7(rx_pause_frames),
1398 	GBENU_STATS_P7(rx_crc_errors),
1399 	GBENU_STATS_P7(rx_align_code_errors),
1400 	GBENU_STATS_P7(rx_oversized_frames),
1401 	GBENU_STATS_P7(rx_jabber_frames),
1402 	GBENU_STATS_P7(rx_undersized_frames),
1403 	GBENU_STATS_P7(rx_fragments),
1404 	GBENU_STATS_P7(ale_drop),
1405 	GBENU_STATS_P7(ale_overrun_drop),
1406 	GBENU_STATS_P7(rx_bytes),
1407 	GBENU_STATS_P7(tx_good_frames),
1408 	GBENU_STATS_P7(tx_broadcast_frames),
1409 	GBENU_STATS_P7(tx_multicast_frames),
1410 	GBENU_STATS_P7(tx_pause_frames),
1411 	GBENU_STATS_P7(tx_deferred_frames),
1412 	GBENU_STATS_P7(tx_collision_frames),
1413 	GBENU_STATS_P7(tx_single_coll_frames),
1414 	GBENU_STATS_P7(tx_mult_coll_frames),
1415 	GBENU_STATS_P7(tx_excessive_collisions),
1416 	GBENU_STATS_P7(tx_late_collisions),
1417 	GBENU_STATS_P7(rx_ipg_error),
1418 	GBENU_STATS_P7(tx_carrier_sense_errors),
1419 	GBENU_STATS_P7(tx_bytes),
1420 	GBENU_STATS_P7(tx_64B_frames),
1421 	GBENU_STATS_P7(tx_65_to_127B_frames),
1422 	GBENU_STATS_P7(tx_128_to_255B_frames),
1423 	GBENU_STATS_P7(tx_256_to_511B_frames),
1424 	GBENU_STATS_P7(tx_512_to_1023B_frames),
1425 	GBENU_STATS_P7(tx_1024B_frames),
1426 	GBENU_STATS_P7(net_bytes),
1427 	GBENU_STATS_P7(rx_bottom_fifo_drop),
1428 	GBENU_STATS_P7(rx_port_mask_drop),
1429 	GBENU_STATS_P7(rx_top_fifo_drop),
1430 	GBENU_STATS_P7(ale_rate_limit_drop),
1431 	GBENU_STATS_P7(ale_vid_ingress_drop),
1432 	GBENU_STATS_P7(ale_da_eq_sa_drop),
1433 	GBENU_STATS_P7(ale_unknown_ucast),
1434 	GBENU_STATS_P7(ale_unknown_ucast_bytes),
1435 	GBENU_STATS_P7(ale_unknown_mcast),
1436 	GBENU_STATS_P7(ale_unknown_mcast_bytes),
1437 	GBENU_STATS_P7(ale_unknown_bcast),
1438 	GBENU_STATS_P7(ale_unknown_bcast_bytes),
1439 	GBENU_STATS_P7(ale_pol_match),
1440 	GBENU_STATS_P7(ale_pol_match_red),
1441 	GBENU_STATS_P7(ale_pol_match_yellow),
1442 	GBENU_STATS_P7(tx_mem_protect_err),
1443 	GBENU_STATS_P7(tx_pri0_drop),
1444 	GBENU_STATS_P7(tx_pri1_drop),
1445 	GBENU_STATS_P7(tx_pri2_drop),
1446 	GBENU_STATS_P7(tx_pri3_drop),
1447 	GBENU_STATS_P7(tx_pri4_drop),
1448 	GBENU_STATS_P7(tx_pri5_drop),
1449 	GBENU_STATS_P7(tx_pri6_drop),
1450 	GBENU_STATS_P7(tx_pri7_drop),
1451 	GBENU_STATS_P7(tx_pri0_drop_bcnt),
1452 	GBENU_STATS_P7(tx_pri1_drop_bcnt),
1453 	GBENU_STATS_P7(tx_pri2_drop_bcnt),
1454 	GBENU_STATS_P7(tx_pri3_drop_bcnt),
1455 	GBENU_STATS_P7(tx_pri4_drop_bcnt),
1456 	GBENU_STATS_P7(tx_pri5_drop_bcnt),
1457 	GBENU_STATS_P7(tx_pri6_drop_bcnt),
1458 	GBENU_STATS_P7(tx_pri7_drop_bcnt),
1459 	/* GBENU Module 8 */
1460 	GBENU_STATS_P8(rx_good_frames),
1461 	GBENU_STATS_P8(rx_broadcast_frames),
1462 	GBENU_STATS_P8(rx_multicast_frames),
1463 	GBENU_STATS_P8(rx_pause_frames),
1464 	GBENU_STATS_P8(rx_crc_errors),
1465 	GBENU_STATS_P8(rx_align_code_errors),
1466 	GBENU_STATS_P8(rx_oversized_frames),
1467 	GBENU_STATS_P8(rx_jabber_frames),
1468 	GBENU_STATS_P8(rx_undersized_frames),
1469 	GBENU_STATS_P8(rx_fragments),
1470 	GBENU_STATS_P8(ale_drop),
1471 	GBENU_STATS_P8(ale_overrun_drop),
1472 	GBENU_STATS_P8(rx_bytes),
1473 	GBENU_STATS_P8(tx_good_frames),
1474 	GBENU_STATS_P8(tx_broadcast_frames),
1475 	GBENU_STATS_P8(tx_multicast_frames),
1476 	GBENU_STATS_P8(tx_pause_frames),
1477 	GBENU_STATS_P8(tx_deferred_frames),
1478 	GBENU_STATS_P8(tx_collision_frames),
1479 	GBENU_STATS_P8(tx_single_coll_frames),
1480 	GBENU_STATS_P8(tx_mult_coll_frames),
1481 	GBENU_STATS_P8(tx_excessive_collisions),
1482 	GBENU_STATS_P8(tx_late_collisions),
1483 	GBENU_STATS_P8(rx_ipg_error),
1484 	GBENU_STATS_P8(tx_carrier_sense_errors),
1485 	GBENU_STATS_P8(tx_bytes),
1486 	GBENU_STATS_P8(tx_64B_frames),
1487 	GBENU_STATS_P8(tx_65_to_127B_frames),
1488 	GBENU_STATS_P8(tx_128_to_255B_frames),
1489 	GBENU_STATS_P8(tx_256_to_511B_frames),
1490 	GBENU_STATS_P8(tx_512_to_1023B_frames),
1491 	GBENU_STATS_P8(tx_1024B_frames),
1492 	GBENU_STATS_P8(net_bytes),
1493 	GBENU_STATS_P8(rx_bottom_fifo_drop),
1494 	GBENU_STATS_P8(rx_port_mask_drop),
1495 	GBENU_STATS_P8(rx_top_fifo_drop),
1496 	GBENU_STATS_P8(ale_rate_limit_drop),
1497 	GBENU_STATS_P8(ale_vid_ingress_drop),
1498 	GBENU_STATS_P8(ale_da_eq_sa_drop),
1499 	GBENU_STATS_P8(ale_unknown_ucast),
1500 	GBENU_STATS_P8(ale_unknown_ucast_bytes),
1501 	GBENU_STATS_P8(ale_unknown_mcast),
1502 	GBENU_STATS_P8(ale_unknown_mcast_bytes),
1503 	GBENU_STATS_P8(ale_unknown_bcast),
1504 	GBENU_STATS_P8(ale_unknown_bcast_bytes),
1505 	GBENU_STATS_P8(ale_pol_match),
1506 	GBENU_STATS_P8(ale_pol_match_red),
1507 	GBENU_STATS_P8(ale_pol_match_yellow),
1508 	GBENU_STATS_P8(tx_mem_protect_err),
1509 	GBENU_STATS_P8(tx_pri0_drop),
1510 	GBENU_STATS_P8(tx_pri1_drop),
1511 	GBENU_STATS_P8(tx_pri2_drop),
1512 	GBENU_STATS_P8(tx_pri3_drop),
1513 	GBENU_STATS_P8(tx_pri4_drop),
1514 	GBENU_STATS_P8(tx_pri5_drop),
1515 	GBENU_STATS_P8(tx_pri6_drop),
1516 	GBENU_STATS_P8(tx_pri7_drop),
1517 	GBENU_STATS_P8(tx_pri0_drop_bcnt),
1518 	GBENU_STATS_P8(tx_pri1_drop_bcnt),
1519 	GBENU_STATS_P8(tx_pri2_drop_bcnt),
1520 	GBENU_STATS_P8(tx_pri3_drop_bcnt),
1521 	GBENU_STATS_P8(tx_pri4_drop_bcnt),
1522 	GBENU_STATS_P8(tx_pri5_drop_bcnt),
1523 	GBENU_STATS_P8(tx_pri6_drop_bcnt),
1524 	GBENU_STATS_P8(tx_pri7_drop_bcnt),
1525 };
1526 
1527 #define XGBE_STATS0_INFO(field)				\
1528 {							\
1529 	"GBE_0:"#field, XGBE_STATS0_MODULE,		\
1530 	FIELD_SIZEOF(struct xgbe_hw_stats, field),	\
1531 	offsetof(struct xgbe_hw_stats, field)		\
1532 }
1533 
1534 #define XGBE_STATS1_INFO(field)				\
1535 {							\
1536 	"GBE_1:"#field, XGBE_STATS1_MODULE,		\
1537 	FIELD_SIZEOF(struct xgbe_hw_stats, field),	\
1538 	offsetof(struct xgbe_hw_stats, field)		\
1539 }
1540 
1541 #define XGBE_STATS2_INFO(field)				\
1542 {							\
1543 	"GBE_2:"#field, XGBE_STATS2_MODULE,		\
1544 	FIELD_SIZEOF(struct xgbe_hw_stats, field),	\
1545 	offsetof(struct xgbe_hw_stats, field)		\
1546 }
1547 
1548 static const struct netcp_ethtool_stat xgbe10_et_stats[] = {
1549 	/* GBE module 0 */
1550 	XGBE_STATS0_INFO(rx_good_frames),
1551 	XGBE_STATS0_INFO(rx_broadcast_frames),
1552 	XGBE_STATS0_INFO(rx_multicast_frames),
1553 	XGBE_STATS0_INFO(rx_oversized_frames),
1554 	XGBE_STATS0_INFO(rx_undersized_frames),
1555 	XGBE_STATS0_INFO(overrun_type4),
1556 	XGBE_STATS0_INFO(overrun_type5),
1557 	XGBE_STATS0_INFO(rx_bytes),
1558 	XGBE_STATS0_INFO(tx_good_frames),
1559 	XGBE_STATS0_INFO(tx_broadcast_frames),
1560 	XGBE_STATS0_INFO(tx_multicast_frames),
1561 	XGBE_STATS0_INFO(tx_bytes),
1562 	XGBE_STATS0_INFO(tx_64byte_frames),
1563 	XGBE_STATS0_INFO(tx_65_to_127byte_frames),
1564 	XGBE_STATS0_INFO(tx_128_to_255byte_frames),
1565 	XGBE_STATS0_INFO(tx_256_to_511byte_frames),
1566 	XGBE_STATS0_INFO(tx_512_to_1023byte_frames),
1567 	XGBE_STATS0_INFO(tx_1024byte_frames),
1568 	XGBE_STATS0_INFO(net_bytes),
1569 	XGBE_STATS0_INFO(rx_sof_overruns),
1570 	XGBE_STATS0_INFO(rx_mof_overruns),
1571 	XGBE_STATS0_INFO(rx_dma_overruns),
1572 	/* XGBE module 1 */
1573 	XGBE_STATS1_INFO(rx_good_frames),
1574 	XGBE_STATS1_INFO(rx_broadcast_frames),
1575 	XGBE_STATS1_INFO(rx_multicast_frames),
1576 	XGBE_STATS1_INFO(rx_pause_frames),
1577 	XGBE_STATS1_INFO(rx_crc_errors),
1578 	XGBE_STATS1_INFO(rx_align_code_errors),
1579 	XGBE_STATS1_INFO(rx_oversized_frames),
1580 	XGBE_STATS1_INFO(rx_jabber_frames),
1581 	XGBE_STATS1_INFO(rx_undersized_frames),
1582 	XGBE_STATS1_INFO(rx_fragments),
1583 	XGBE_STATS1_INFO(overrun_type4),
1584 	XGBE_STATS1_INFO(overrun_type5),
1585 	XGBE_STATS1_INFO(rx_bytes),
1586 	XGBE_STATS1_INFO(tx_good_frames),
1587 	XGBE_STATS1_INFO(tx_broadcast_frames),
1588 	XGBE_STATS1_INFO(tx_multicast_frames),
1589 	XGBE_STATS1_INFO(tx_pause_frames),
1590 	XGBE_STATS1_INFO(tx_deferred_frames),
1591 	XGBE_STATS1_INFO(tx_collision_frames),
1592 	XGBE_STATS1_INFO(tx_single_coll_frames),
1593 	XGBE_STATS1_INFO(tx_mult_coll_frames),
1594 	XGBE_STATS1_INFO(tx_excessive_collisions),
1595 	XGBE_STATS1_INFO(tx_late_collisions),
1596 	XGBE_STATS1_INFO(tx_underrun),
1597 	XGBE_STATS1_INFO(tx_carrier_sense_errors),
1598 	XGBE_STATS1_INFO(tx_bytes),
1599 	XGBE_STATS1_INFO(tx_64byte_frames),
1600 	XGBE_STATS1_INFO(tx_65_to_127byte_frames),
1601 	XGBE_STATS1_INFO(tx_128_to_255byte_frames),
1602 	XGBE_STATS1_INFO(tx_256_to_511byte_frames),
1603 	XGBE_STATS1_INFO(tx_512_to_1023byte_frames),
1604 	XGBE_STATS1_INFO(tx_1024byte_frames),
1605 	XGBE_STATS1_INFO(net_bytes),
1606 	XGBE_STATS1_INFO(rx_sof_overruns),
1607 	XGBE_STATS1_INFO(rx_mof_overruns),
1608 	XGBE_STATS1_INFO(rx_dma_overruns),
1609 	/* XGBE module 2 */
1610 	XGBE_STATS2_INFO(rx_good_frames),
1611 	XGBE_STATS2_INFO(rx_broadcast_frames),
1612 	XGBE_STATS2_INFO(rx_multicast_frames),
1613 	XGBE_STATS2_INFO(rx_pause_frames),
1614 	XGBE_STATS2_INFO(rx_crc_errors),
1615 	XGBE_STATS2_INFO(rx_align_code_errors),
1616 	XGBE_STATS2_INFO(rx_oversized_frames),
1617 	XGBE_STATS2_INFO(rx_jabber_frames),
1618 	XGBE_STATS2_INFO(rx_undersized_frames),
1619 	XGBE_STATS2_INFO(rx_fragments),
1620 	XGBE_STATS2_INFO(overrun_type4),
1621 	XGBE_STATS2_INFO(overrun_type5),
1622 	XGBE_STATS2_INFO(rx_bytes),
1623 	XGBE_STATS2_INFO(tx_good_frames),
1624 	XGBE_STATS2_INFO(tx_broadcast_frames),
1625 	XGBE_STATS2_INFO(tx_multicast_frames),
1626 	XGBE_STATS2_INFO(tx_pause_frames),
1627 	XGBE_STATS2_INFO(tx_deferred_frames),
1628 	XGBE_STATS2_INFO(tx_collision_frames),
1629 	XGBE_STATS2_INFO(tx_single_coll_frames),
1630 	XGBE_STATS2_INFO(tx_mult_coll_frames),
1631 	XGBE_STATS2_INFO(tx_excessive_collisions),
1632 	XGBE_STATS2_INFO(tx_late_collisions),
1633 	XGBE_STATS2_INFO(tx_underrun),
1634 	XGBE_STATS2_INFO(tx_carrier_sense_errors),
1635 	XGBE_STATS2_INFO(tx_bytes),
1636 	XGBE_STATS2_INFO(tx_64byte_frames),
1637 	XGBE_STATS2_INFO(tx_65_to_127byte_frames),
1638 	XGBE_STATS2_INFO(tx_128_to_255byte_frames),
1639 	XGBE_STATS2_INFO(tx_256_to_511byte_frames),
1640 	XGBE_STATS2_INFO(tx_512_to_1023byte_frames),
1641 	XGBE_STATS2_INFO(tx_1024byte_frames),
1642 	XGBE_STATS2_INFO(net_bytes),
1643 	XGBE_STATS2_INFO(rx_sof_overruns),
1644 	XGBE_STATS2_INFO(rx_mof_overruns),
1645 	XGBE_STATS2_INFO(rx_dma_overruns),
1646 };
1647 
1648 #define for_each_intf(i, priv) \
1649 	list_for_each_entry((i), &(priv)->gbe_intf_head, gbe_intf_list)
1650 
1651 #define for_each_sec_slave(slave, priv) \
1652 	list_for_each_entry((slave), &(priv)->secondary_slaves, slave_list)
1653 
1654 #define first_sec_slave(priv)					\
1655 	list_first_entry(&priv->secondary_slaves, \
1656 			struct gbe_slave, slave_list)
1657 
1658 static void keystone_get_drvinfo(struct net_device *ndev,
1659 				 struct ethtool_drvinfo *info)
1660 {
1661 	strncpy(info->driver, NETCP_DRIVER_NAME, sizeof(info->driver));
1662 	strncpy(info->version, NETCP_DRIVER_VERSION, sizeof(info->version));
1663 }
1664 
1665 static u32 keystone_get_msglevel(struct net_device *ndev)
1666 {
1667 	struct netcp_intf *netcp = netdev_priv(ndev);
1668 
1669 	return netcp->msg_enable;
1670 }
1671 
1672 static void keystone_set_msglevel(struct net_device *ndev, u32 value)
1673 {
1674 	struct netcp_intf *netcp = netdev_priv(ndev);
1675 
1676 	netcp->msg_enable = value;
1677 }
1678 
1679 static void keystone_get_stat_strings(struct net_device *ndev,
1680 				      uint32_t stringset, uint8_t *data)
1681 {
1682 	struct netcp_intf *netcp = netdev_priv(ndev);
1683 	struct gbe_intf *gbe_intf;
1684 	struct gbe_priv *gbe_dev;
1685 	int i;
1686 
1687 	gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
1688 	if (!gbe_intf)
1689 		return;
1690 	gbe_dev = gbe_intf->gbe_dev;
1691 
1692 	switch (stringset) {
1693 	case ETH_SS_STATS:
1694 		for (i = 0; i < gbe_dev->num_et_stats; i++) {
1695 			memcpy(data, gbe_dev->et_stats[i].desc,
1696 			       ETH_GSTRING_LEN);
1697 			data += ETH_GSTRING_LEN;
1698 		}
1699 		break;
1700 	case ETH_SS_TEST:
1701 		break;
1702 	}
1703 }
1704 
1705 static int keystone_get_sset_count(struct net_device *ndev, int stringset)
1706 {
1707 	struct netcp_intf *netcp = netdev_priv(ndev);
1708 	struct gbe_intf *gbe_intf;
1709 	struct gbe_priv *gbe_dev;
1710 
1711 	gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
1712 	if (!gbe_intf)
1713 		return -EINVAL;
1714 	gbe_dev = gbe_intf->gbe_dev;
1715 
1716 	switch (stringset) {
1717 	case ETH_SS_TEST:
1718 		return 0;
1719 	case ETH_SS_STATS:
1720 		return gbe_dev->num_et_stats;
1721 	default:
1722 		return -EINVAL;
1723 	}
1724 }
1725 
1726 static void gbe_reset_mod_stats(struct gbe_priv *gbe_dev, int stats_mod)
1727 {
1728 	void __iomem *base = gbe_dev->hw_stats_regs[stats_mod];
1729 	u32  __iomem *p_stats_entry;
1730 	int i;
1731 
1732 	for (i = 0; i < gbe_dev->num_et_stats; i++) {
1733 		if (gbe_dev->et_stats[i].type == stats_mod) {
1734 			p_stats_entry = base + gbe_dev->et_stats[i].offset;
1735 			gbe_dev->hw_stats[i] = 0;
1736 			gbe_dev->hw_stats_prev[i] = readl(p_stats_entry);
1737 		}
1738 	}
1739 }
1740 
1741 static inline void gbe_update_hw_stats_entry(struct gbe_priv *gbe_dev,
1742 					     int et_stats_entry)
1743 {
1744 	void __iomem *base = NULL;
1745 	u32  __iomem *p_stats_entry;
1746 	u32 curr, delta;
1747 
1748 	/* The hw_stats_regs pointers are already
1749 	 * properly set to point to the right base:
1750 	 */
1751 	base = gbe_dev->hw_stats_regs[gbe_dev->et_stats[et_stats_entry].type];
1752 	p_stats_entry = base + gbe_dev->et_stats[et_stats_entry].offset;
1753 	curr = readl(p_stats_entry);
1754 	delta = curr - gbe_dev->hw_stats_prev[et_stats_entry];
1755 	gbe_dev->hw_stats_prev[et_stats_entry] = curr;
1756 	gbe_dev->hw_stats[et_stats_entry] += delta;
1757 }
1758 
1759 static void gbe_update_stats(struct gbe_priv *gbe_dev, uint64_t *data)
1760 {
1761 	int i;
1762 
1763 	for (i = 0; i < gbe_dev->num_et_stats; i++) {
1764 		gbe_update_hw_stats_entry(gbe_dev, i);
1765 
1766 		if (data)
1767 			data[i] = gbe_dev->hw_stats[i];
1768 	}
1769 }
1770 
1771 static inline void gbe_stats_mod_visible_ver14(struct gbe_priv *gbe_dev,
1772 					       int stats_mod)
1773 {
1774 	u32 val;
1775 
1776 	val = readl(GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
1777 
1778 	switch (stats_mod) {
1779 	case GBE_STATSA_MODULE:
1780 	case GBE_STATSB_MODULE:
1781 		val &= ~GBE_STATS_CD_SEL;
1782 		break;
1783 	case GBE_STATSC_MODULE:
1784 	case GBE_STATSD_MODULE:
1785 		val |= GBE_STATS_CD_SEL;
1786 		break;
1787 	default:
1788 		return;
1789 	}
1790 
1791 	/* make the stat module visible */
1792 	writel(val, GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
1793 }
1794 
1795 static void gbe_reset_mod_stats_ver14(struct gbe_priv *gbe_dev, int stats_mod)
1796 {
1797 	gbe_stats_mod_visible_ver14(gbe_dev, stats_mod);
1798 	gbe_reset_mod_stats(gbe_dev, stats_mod);
1799 }
1800 
1801 static void gbe_update_stats_ver14(struct gbe_priv *gbe_dev, uint64_t *data)
1802 {
1803 	u32 half_num_et_stats = (gbe_dev->num_et_stats / 2);
1804 	int et_entry, j, pair;
1805 
1806 	for (pair = 0; pair < 2; pair++) {
1807 		gbe_stats_mod_visible_ver14(gbe_dev, (pair ?
1808 						      GBE_STATSC_MODULE :
1809 						      GBE_STATSA_MODULE));
1810 
1811 		for (j = 0; j < half_num_et_stats; j++) {
1812 			et_entry = pair * half_num_et_stats + j;
1813 			gbe_update_hw_stats_entry(gbe_dev, et_entry);
1814 
1815 			if (data)
1816 				data[et_entry] = gbe_dev->hw_stats[et_entry];
1817 		}
1818 	}
1819 }
1820 
1821 static void keystone_get_ethtool_stats(struct net_device *ndev,
1822 				       struct ethtool_stats *stats,
1823 				       uint64_t *data)
1824 {
1825 	struct netcp_intf *netcp = netdev_priv(ndev);
1826 	struct gbe_intf *gbe_intf;
1827 	struct gbe_priv *gbe_dev;
1828 
1829 	gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
1830 	if (!gbe_intf)
1831 		return;
1832 
1833 	gbe_dev = gbe_intf->gbe_dev;
1834 	spin_lock_bh(&gbe_dev->hw_stats_lock);
1835 	if (gbe_dev->ss_version == GBE_SS_VERSION_14)
1836 		gbe_update_stats_ver14(gbe_dev, data);
1837 	else
1838 		gbe_update_stats(gbe_dev, data);
1839 	spin_unlock_bh(&gbe_dev->hw_stats_lock);
1840 }
1841 
1842 static int keystone_get_settings(struct net_device *ndev,
1843 				 struct ethtool_cmd *cmd)
1844 {
1845 	struct netcp_intf *netcp = netdev_priv(ndev);
1846 	struct phy_device *phy = ndev->phydev;
1847 	struct gbe_intf *gbe_intf;
1848 	int ret;
1849 
1850 	if (!phy)
1851 		return -EINVAL;
1852 
1853 	gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
1854 	if (!gbe_intf)
1855 		return -EINVAL;
1856 
1857 	if (!gbe_intf->slave)
1858 		return -EINVAL;
1859 
1860 	ret = phy_ethtool_gset(phy, cmd);
1861 	if (!ret)
1862 		cmd->port = gbe_intf->slave->phy_port_t;
1863 
1864 	return ret;
1865 }
1866 
1867 static int keystone_set_settings(struct net_device *ndev,
1868 				 struct ethtool_cmd *cmd)
1869 {
1870 	struct netcp_intf *netcp = netdev_priv(ndev);
1871 	struct phy_device *phy = ndev->phydev;
1872 	struct gbe_intf *gbe_intf;
1873 	u32 features = cmd->advertising & cmd->supported;
1874 
1875 	if (!phy)
1876 		return -EINVAL;
1877 
1878 	gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
1879 	if (!gbe_intf)
1880 		return -EINVAL;
1881 
1882 	if (!gbe_intf->slave)
1883 		return -EINVAL;
1884 
1885 	if (cmd->port != gbe_intf->slave->phy_port_t) {
1886 		if ((cmd->port == PORT_TP) && !(features & ADVERTISED_TP))
1887 			return -EINVAL;
1888 
1889 		if ((cmd->port == PORT_AUI) && !(features & ADVERTISED_AUI))
1890 			return -EINVAL;
1891 
1892 		if ((cmd->port == PORT_BNC) && !(features & ADVERTISED_BNC))
1893 			return -EINVAL;
1894 
1895 		if ((cmd->port == PORT_MII) && !(features & ADVERTISED_MII))
1896 			return -EINVAL;
1897 
1898 		if ((cmd->port == PORT_FIBRE) && !(features & ADVERTISED_FIBRE))
1899 			return -EINVAL;
1900 	}
1901 
1902 	gbe_intf->slave->phy_port_t = cmd->port;
1903 	return phy_ethtool_sset(phy, cmd);
1904 }
1905 
1906 static const struct ethtool_ops keystone_ethtool_ops = {
1907 	.get_drvinfo		= keystone_get_drvinfo,
1908 	.get_link		= ethtool_op_get_link,
1909 	.get_msglevel		= keystone_get_msglevel,
1910 	.set_msglevel		= keystone_set_msglevel,
1911 	.get_strings		= keystone_get_stat_strings,
1912 	.get_sset_count		= keystone_get_sset_count,
1913 	.get_ethtool_stats	= keystone_get_ethtool_stats,
1914 	.get_settings		= keystone_get_settings,
1915 	.set_settings		= keystone_set_settings,
1916 };
1917 
1918 #define mac_hi(mac)	(((mac)[0] << 0) | ((mac)[1] << 8) |	\
1919 			 ((mac)[2] << 16) | ((mac)[3] << 24))
1920 #define mac_lo(mac)	(((mac)[4] << 0) | ((mac)[5] << 8))
1921 
1922 static void gbe_set_slave_mac(struct gbe_slave *slave,
1923 			      struct gbe_intf *gbe_intf)
1924 {
1925 	struct net_device *ndev = gbe_intf->ndev;
1926 
1927 	writel(mac_hi(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_hi));
1928 	writel(mac_lo(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_lo));
1929 }
1930 
1931 static int gbe_get_slave_port(struct gbe_priv *priv, u32 slave_num)
1932 {
1933 	if (priv->host_port == 0)
1934 		return slave_num + 1;
1935 
1936 	return slave_num;
1937 }
1938 
1939 static void netcp_ethss_link_state_action(struct gbe_priv *gbe_dev,
1940 					  struct net_device *ndev,
1941 					  struct gbe_slave *slave,
1942 					  int up)
1943 {
1944 	struct phy_device *phy = slave->phy;
1945 	u32 mac_control = 0;
1946 
1947 	if (up) {
1948 		mac_control = slave->mac_control;
1949 		if (phy && (phy->speed == SPEED_1000)) {
1950 			mac_control |= MACSL_GIG_MODE;
1951 			mac_control &= ~MACSL_XGIG_MODE;
1952 		} else if (phy && (phy->speed == SPEED_10000)) {
1953 			mac_control |= MACSL_XGIG_MODE;
1954 			mac_control &= ~MACSL_GIG_MODE;
1955 		}
1956 
1957 		writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
1958 						 mac_control));
1959 
1960 		cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
1961 				     ALE_PORT_STATE,
1962 				     ALE_PORT_STATE_FORWARD);
1963 
1964 		if (ndev && slave->open &&
1965 		    slave->link_interface != SGMII_LINK_MAC_PHY &&
1966 		    slave->link_interface != XGMII_LINK_MAC_PHY)
1967 			netif_carrier_on(ndev);
1968 	} else {
1969 		writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
1970 						 mac_control));
1971 		cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
1972 				     ALE_PORT_STATE,
1973 				     ALE_PORT_STATE_DISABLE);
1974 		if (ndev &&
1975 		    slave->link_interface != SGMII_LINK_MAC_PHY &&
1976 		    slave->link_interface != XGMII_LINK_MAC_PHY)
1977 			netif_carrier_off(ndev);
1978 	}
1979 
1980 	if (phy)
1981 		phy_print_status(phy);
1982 }
1983 
1984 static bool gbe_phy_link_status(struct gbe_slave *slave)
1985 {
1986 	 return !slave->phy || slave->phy->link;
1987 }
1988 
1989 static void netcp_ethss_update_link_state(struct gbe_priv *gbe_dev,
1990 					  struct gbe_slave *slave,
1991 					  struct net_device *ndev)
1992 {
1993 	int sp = slave->slave_num;
1994 	int phy_link_state, sgmii_link_state = 1, link_state;
1995 
1996 	if (!slave->open)
1997 		return;
1998 
1999 	if (!SLAVE_LINK_IS_XGMII(slave)) {
2000 		if (gbe_dev->ss_version == GBE_SS_VERSION_14)
2001 			sgmii_link_state =
2002 				netcp_sgmii_get_port_link(SGMII_BASE(sp), sp);
2003 		else
2004 			sgmii_link_state =
2005 				netcp_sgmii_get_port_link(
2006 						gbe_dev->sgmii_port_regs, sp);
2007 	}
2008 
2009 	phy_link_state = gbe_phy_link_status(slave);
2010 	link_state = phy_link_state & sgmii_link_state;
2011 
2012 	if (atomic_xchg(&slave->link_state, link_state) != link_state)
2013 		netcp_ethss_link_state_action(gbe_dev, ndev, slave,
2014 					      link_state);
2015 }
2016 
2017 static void xgbe_adjust_link(struct net_device *ndev)
2018 {
2019 	struct netcp_intf *netcp = netdev_priv(ndev);
2020 	struct gbe_intf *gbe_intf;
2021 
2022 	gbe_intf = netcp_module_get_intf_data(&xgbe_module, netcp);
2023 	if (!gbe_intf)
2024 		return;
2025 
2026 	netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave,
2027 				      ndev);
2028 }
2029 
2030 static void gbe_adjust_link(struct net_device *ndev)
2031 {
2032 	struct netcp_intf *netcp = netdev_priv(ndev);
2033 	struct gbe_intf *gbe_intf;
2034 
2035 	gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
2036 	if (!gbe_intf)
2037 		return;
2038 
2039 	netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave,
2040 				      ndev);
2041 }
2042 
2043 static void gbe_adjust_link_sec_slaves(struct net_device *ndev)
2044 {
2045 	struct gbe_priv *gbe_dev = netdev_priv(ndev);
2046 	struct gbe_slave *slave;
2047 
2048 	for_each_sec_slave(slave, gbe_dev)
2049 		netcp_ethss_update_link_state(gbe_dev, slave, NULL);
2050 }
2051 
2052 /* Reset EMAC
2053  * Soft reset is set and polled until clear, or until a timeout occurs
2054  */
2055 static int gbe_port_reset(struct gbe_slave *slave)
2056 {
2057 	u32 i, v;
2058 
2059 	/* Set the soft reset bit */
2060 	writel(SOFT_RESET, GBE_REG_ADDR(slave, emac_regs, soft_reset));
2061 
2062 	/* Wait for the bit to clear */
2063 	for (i = 0; i < DEVICE_EMACSL_RESET_POLL_COUNT; i++) {
2064 		v = readl(GBE_REG_ADDR(slave, emac_regs, soft_reset));
2065 		if ((v & SOFT_RESET_MASK) != SOFT_RESET)
2066 			return 0;
2067 	}
2068 
2069 	/* Timeout on the reset */
2070 	return GMACSL_RET_WARN_RESET_INCOMPLETE;
2071 }
2072 
2073 /* Configure EMAC */
2074 static void gbe_port_config(struct gbe_priv *gbe_dev, struct gbe_slave *slave,
2075 			    int max_rx_len)
2076 {
2077 	void __iomem *rx_maxlen_reg;
2078 	u32 xgmii_mode;
2079 
2080 	if (max_rx_len > NETCP_MAX_FRAME_SIZE)
2081 		max_rx_len = NETCP_MAX_FRAME_SIZE;
2082 
2083 	/* Enable correct MII mode at SS level */
2084 	if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) &&
2085 	    (slave->link_interface >= XGMII_LINK_MAC_PHY)) {
2086 		xgmii_mode = readl(GBE_REG_ADDR(gbe_dev, ss_regs, control));
2087 		xgmii_mode |= (1 << slave->slave_num);
2088 		writel(xgmii_mode, GBE_REG_ADDR(gbe_dev, ss_regs, control));
2089 	}
2090 
2091 	if (IS_SS_ID_MU(gbe_dev))
2092 		rx_maxlen_reg = GBE_REG_ADDR(slave, port_regs, rx_maxlen);
2093 	else
2094 		rx_maxlen_reg = GBE_REG_ADDR(slave, emac_regs, rx_maxlen);
2095 
2096 	writel(max_rx_len, rx_maxlen_reg);
2097 	writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control));
2098 }
2099 
2100 static void gbe_slave_stop(struct gbe_intf *intf)
2101 {
2102 	struct gbe_priv *gbe_dev = intf->gbe_dev;
2103 	struct gbe_slave *slave = intf->slave;
2104 
2105 	gbe_port_reset(slave);
2106 	/* Disable forwarding */
2107 	cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
2108 			     ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
2109 	cpsw_ale_del_mcast(gbe_dev->ale, intf->ndev->broadcast,
2110 			   1 << slave->port_num, 0, 0);
2111 
2112 	if (!slave->phy)
2113 		return;
2114 
2115 	phy_stop(slave->phy);
2116 	phy_disconnect(slave->phy);
2117 	slave->phy = NULL;
2118 }
2119 
2120 static void gbe_sgmii_config(struct gbe_priv *priv, struct gbe_slave *slave)
2121 {
2122 	void __iomem *sgmii_port_regs;
2123 
2124 	sgmii_port_regs = priv->sgmii_port_regs;
2125 	if ((priv->ss_version == GBE_SS_VERSION_14) && (slave->slave_num >= 2))
2126 		sgmii_port_regs = priv->sgmii_port34_regs;
2127 
2128 	if (!SLAVE_LINK_IS_XGMII(slave)) {
2129 		netcp_sgmii_reset(sgmii_port_regs, slave->slave_num);
2130 		netcp_sgmii_config(sgmii_port_regs, slave->slave_num,
2131 				   slave->link_interface);
2132 	}
2133 }
2134 
2135 static int gbe_slave_open(struct gbe_intf *gbe_intf)
2136 {
2137 	struct gbe_priv *priv = gbe_intf->gbe_dev;
2138 	struct gbe_slave *slave = gbe_intf->slave;
2139 	phy_interface_t phy_mode;
2140 	bool has_phy = false;
2141 
2142 	void (*hndlr)(struct net_device *) = gbe_adjust_link;
2143 
2144 	gbe_sgmii_config(priv, slave);
2145 	gbe_port_reset(slave);
2146 	gbe_port_config(priv, slave, priv->rx_packet_max);
2147 	gbe_set_slave_mac(slave, gbe_intf);
2148 	/* enable forwarding */
2149 	cpsw_ale_control_set(priv->ale, slave->port_num,
2150 			     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
2151 	cpsw_ale_add_mcast(priv->ale, gbe_intf->ndev->broadcast,
2152 			   1 << slave->port_num, 0, 0, ALE_MCAST_FWD_2);
2153 
2154 	if (slave->link_interface == SGMII_LINK_MAC_PHY) {
2155 		has_phy = true;
2156 		phy_mode = PHY_INTERFACE_MODE_SGMII;
2157 		slave->phy_port_t = PORT_MII;
2158 	} else if (slave->link_interface == XGMII_LINK_MAC_PHY) {
2159 		has_phy = true;
2160 		phy_mode = PHY_INTERFACE_MODE_NA;
2161 		slave->phy_port_t = PORT_FIBRE;
2162 	}
2163 
2164 	if (has_phy) {
2165 		if (priv->ss_version == XGBE_SS_VERSION_10)
2166 			hndlr = xgbe_adjust_link;
2167 
2168 		slave->phy = of_phy_connect(gbe_intf->ndev,
2169 					    slave->phy_node,
2170 					    hndlr, 0,
2171 					    phy_mode);
2172 		if (!slave->phy) {
2173 			dev_err(priv->dev, "phy not found on slave %d\n",
2174 				slave->slave_num);
2175 			return -ENODEV;
2176 		}
2177 		dev_dbg(priv->dev, "phy found: id is: 0x%s\n",
2178 			dev_name(&slave->phy->dev));
2179 		phy_start(slave->phy);
2180 		phy_read_status(slave->phy);
2181 	}
2182 	return 0;
2183 }
2184 
2185 static void gbe_init_host_port(struct gbe_priv *priv)
2186 {
2187 	int bypass_en = 1;
2188 
2189 	/* Host Tx Pri */
2190 	if (IS_SS_ID_NU(priv))
2191 		writel(HOST_TX_PRI_MAP_DEFAULT,
2192 		       GBE_REG_ADDR(priv, host_port_regs, tx_pri_map));
2193 
2194 	/* Max length register */
2195 	writel(NETCP_MAX_FRAME_SIZE, GBE_REG_ADDR(priv, host_port_regs,
2196 						  rx_maxlen));
2197 
2198 	cpsw_ale_start(priv->ale);
2199 
2200 	if (priv->enable_ale)
2201 		bypass_en = 0;
2202 
2203 	cpsw_ale_control_set(priv->ale, 0, ALE_BYPASS, bypass_en);
2204 
2205 	cpsw_ale_control_set(priv->ale, 0, ALE_NO_PORT_VLAN, 1);
2206 
2207 	cpsw_ale_control_set(priv->ale, priv->host_port,
2208 			     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
2209 
2210 	cpsw_ale_control_set(priv->ale, 0,
2211 			     ALE_PORT_UNKNOWN_VLAN_MEMBER,
2212 			     GBE_PORT_MASK(priv->ale_ports));
2213 
2214 	cpsw_ale_control_set(priv->ale, 0,
2215 			     ALE_PORT_UNKNOWN_MCAST_FLOOD,
2216 			     GBE_PORT_MASK(priv->ale_ports - 1));
2217 
2218 	cpsw_ale_control_set(priv->ale, 0,
2219 			     ALE_PORT_UNKNOWN_REG_MCAST_FLOOD,
2220 			     GBE_PORT_MASK(priv->ale_ports));
2221 
2222 	cpsw_ale_control_set(priv->ale, 0,
2223 			     ALE_PORT_UNTAGGED_EGRESS,
2224 			     GBE_PORT_MASK(priv->ale_ports));
2225 }
2226 
2227 static void gbe_add_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr)
2228 {
2229 	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2230 	u16 vlan_id;
2231 
2232 	cpsw_ale_add_mcast(gbe_dev->ale, addr,
2233 			   GBE_PORT_MASK(gbe_dev->ale_ports), 0, 0,
2234 			   ALE_MCAST_FWD_2);
2235 	for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
2236 		cpsw_ale_add_mcast(gbe_dev->ale, addr,
2237 				   GBE_PORT_MASK(gbe_dev->ale_ports),
2238 				   ALE_VLAN, vlan_id, ALE_MCAST_FWD_2);
2239 	}
2240 }
2241 
2242 static void gbe_add_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr)
2243 {
2244 	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2245 	u16 vlan_id;
2246 
2247 	cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0);
2248 
2249 	for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID)
2250 		cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port,
2251 				   ALE_VLAN, vlan_id);
2252 }
2253 
2254 static void gbe_del_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr)
2255 {
2256 	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2257 	u16 vlan_id;
2258 
2259 	cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, 0, 0);
2260 
2261 	for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
2262 		cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, ALE_VLAN, vlan_id);
2263 	}
2264 }
2265 
2266 static void gbe_del_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr)
2267 {
2268 	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2269 	u16 vlan_id;
2270 
2271 	cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0);
2272 
2273 	for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
2274 		cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port,
2275 				   ALE_VLAN, vlan_id);
2276 	}
2277 }
2278 
2279 static int gbe_add_addr(void *intf_priv, struct netcp_addr *naddr)
2280 {
2281 	struct gbe_intf *gbe_intf = intf_priv;
2282 	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2283 
2284 	dev_dbg(gbe_dev->dev, "ethss adding address %pM, type %d\n",
2285 		naddr->addr, naddr->type);
2286 
2287 	switch (naddr->type) {
2288 	case ADDR_MCAST:
2289 	case ADDR_BCAST:
2290 		gbe_add_mcast_addr(gbe_intf, naddr->addr);
2291 		break;
2292 	case ADDR_UCAST:
2293 	case ADDR_DEV:
2294 		gbe_add_ucast_addr(gbe_intf, naddr->addr);
2295 		break;
2296 	case ADDR_ANY:
2297 		/* nothing to do for promiscuous */
2298 	default:
2299 		break;
2300 	}
2301 
2302 	return 0;
2303 }
2304 
2305 static int gbe_del_addr(void *intf_priv, struct netcp_addr *naddr)
2306 {
2307 	struct gbe_intf *gbe_intf = intf_priv;
2308 	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2309 
2310 	dev_dbg(gbe_dev->dev, "ethss deleting address %pM, type %d\n",
2311 		naddr->addr, naddr->type);
2312 
2313 	switch (naddr->type) {
2314 	case ADDR_MCAST:
2315 	case ADDR_BCAST:
2316 		gbe_del_mcast_addr(gbe_intf, naddr->addr);
2317 		break;
2318 	case ADDR_UCAST:
2319 	case ADDR_DEV:
2320 		gbe_del_ucast_addr(gbe_intf, naddr->addr);
2321 		break;
2322 	case ADDR_ANY:
2323 		/* nothing to do for promiscuous */
2324 	default:
2325 		break;
2326 	}
2327 
2328 	return 0;
2329 }
2330 
2331 static int gbe_add_vid(void *intf_priv, int vid)
2332 {
2333 	struct gbe_intf *gbe_intf = intf_priv;
2334 	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2335 
2336 	set_bit(vid, gbe_intf->active_vlans);
2337 
2338 	cpsw_ale_add_vlan(gbe_dev->ale, vid,
2339 			  GBE_PORT_MASK(gbe_dev->ale_ports),
2340 			  GBE_MASK_NO_PORTS,
2341 			  GBE_PORT_MASK(gbe_dev->ale_ports),
2342 			  GBE_PORT_MASK(gbe_dev->ale_ports - 1));
2343 
2344 	return 0;
2345 }
2346 
2347 static int gbe_del_vid(void *intf_priv, int vid)
2348 {
2349 	struct gbe_intf *gbe_intf = intf_priv;
2350 	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2351 
2352 	cpsw_ale_del_vlan(gbe_dev->ale, vid, 0);
2353 	clear_bit(vid, gbe_intf->active_vlans);
2354 	return 0;
2355 }
2356 
2357 static int gbe_ioctl(void *intf_priv, struct ifreq *req, int cmd)
2358 {
2359 	struct gbe_intf *gbe_intf = intf_priv;
2360 	struct phy_device *phy = gbe_intf->slave->phy;
2361 	int ret = -EOPNOTSUPP;
2362 
2363 	if (phy)
2364 		ret = phy_mii_ioctl(phy, req, cmd);
2365 
2366 	return ret;
2367 }
2368 
2369 static void netcp_ethss_timer(unsigned long arg)
2370 {
2371 	struct gbe_priv *gbe_dev = (struct gbe_priv *)arg;
2372 	struct gbe_intf *gbe_intf;
2373 	struct gbe_slave *slave;
2374 
2375 	/* Check & update SGMII link state of interfaces */
2376 	for_each_intf(gbe_intf, gbe_dev) {
2377 		if (!gbe_intf->slave->open)
2378 			continue;
2379 		netcp_ethss_update_link_state(gbe_dev, gbe_intf->slave,
2380 					      gbe_intf->ndev);
2381 	}
2382 
2383 	/* Check & update SGMII link state of secondary ports */
2384 	for_each_sec_slave(slave, gbe_dev) {
2385 		netcp_ethss_update_link_state(gbe_dev, slave, NULL);
2386 	}
2387 
2388 	/* A timer runs as a BH, no need to block them */
2389 	spin_lock(&gbe_dev->hw_stats_lock);
2390 
2391 	if (gbe_dev->ss_version == GBE_SS_VERSION_14)
2392 		gbe_update_stats_ver14(gbe_dev, NULL);
2393 	else
2394 		gbe_update_stats(gbe_dev, NULL);
2395 
2396 	spin_unlock(&gbe_dev->hw_stats_lock);
2397 
2398 	gbe_dev->timer.expires	= jiffies + GBE_TIMER_INTERVAL;
2399 	add_timer(&gbe_dev->timer);
2400 }
2401 
2402 static int gbe_tx_hook(int order, void *data, struct netcp_packet *p_info)
2403 {
2404 	struct gbe_intf *gbe_intf = data;
2405 
2406 	p_info->tx_pipe = &gbe_intf->tx_pipe;
2407 	return 0;
2408 }
2409 
2410 static int gbe_open(void *intf_priv, struct net_device *ndev)
2411 {
2412 	struct gbe_intf *gbe_intf = intf_priv;
2413 	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
2414 	struct netcp_intf *netcp = netdev_priv(ndev);
2415 	struct gbe_slave *slave = gbe_intf->slave;
2416 	int port_num = slave->port_num;
2417 	u32 reg;
2418 	int ret;
2419 
2420 	reg = readl(GBE_REG_ADDR(gbe_dev, switch_regs, id_ver));
2421 	dev_dbg(gbe_dev->dev, "initializing gbe version %d.%d (%d) GBE identification value 0x%x\n",
2422 		GBE_MAJOR_VERSION(reg), GBE_MINOR_VERSION(reg),
2423 		GBE_RTL_VERSION(reg), GBE_IDENT(reg));
2424 
2425 	/* For 10G and on NetCP 1.5, use directed to port */
2426 	if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) || IS_SS_ID_MU(gbe_dev))
2427 		gbe_intf->tx_pipe.flags = SWITCH_TO_PORT_IN_TAGINFO;
2428 
2429 	if (gbe_dev->enable_ale)
2430 		gbe_intf->tx_pipe.switch_to_port = 0;
2431 	else
2432 		gbe_intf->tx_pipe.switch_to_port = port_num;
2433 
2434 	dev_dbg(gbe_dev->dev,
2435 		"opened TX channel %s: %p with to port %d, flags %d\n",
2436 		gbe_intf->tx_pipe.dma_chan_name,
2437 		gbe_intf->tx_pipe.dma_channel,
2438 		gbe_intf->tx_pipe.switch_to_port,
2439 		gbe_intf->tx_pipe.flags);
2440 
2441 	gbe_slave_stop(gbe_intf);
2442 
2443 	/* disable priority elevation and enable statistics on all ports */
2444 	writel(0, GBE_REG_ADDR(gbe_dev, switch_regs, ptype));
2445 
2446 	/* Control register */
2447 	writel(GBE_CTL_P0_ENABLE, GBE_REG_ADDR(gbe_dev, switch_regs, control));
2448 
2449 	/* All statistics enabled and STAT AB visible by default */
2450 	writel(gbe_dev->stats_en_mask, GBE_REG_ADDR(gbe_dev, switch_regs,
2451 						    stat_port_en));
2452 
2453 	ret = gbe_slave_open(gbe_intf);
2454 	if (ret)
2455 		goto fail;
2456 
2457 	netcp_register_txhook(netcp, GBE_TXHOOK_ORDER, gbe_tx_hook,
2458 			      gbe_intf);
2459 
2460 	slave->open = true;
2461 	netcp_ethss_update_link_state(gbe_dev, slave, ndev);
2462 	return 0;
2463 
2464 fail:
2465 	gbe_slave_stop(gbe_intf);
2466 	return ret;
2467 }
2468 
2469 static int gbe_close(void *intf_priv, struct net_device *ndev)
2470 {
2471 	struct gbe_intf *gbe_intf = intf_priv;
2472 	struct netcp_intf *netcp = netdev_priv(ndev);
2473 
2474 	gbe_slave_stop(gbe_intf);
2475 	netcp_unregister_txhook(netcp, GBE_TXHOOK_ORDER, gbe_tx_hook,
2476 				gbe_intf);
2477 
2478 	gbe_intf->slave->open = false;
2479 	atomic_set(&gbe_intf->slave->link_state, NETCP_LINK_STATE_INVALID);
2480 	return 0;
2481 }
2482 
2483 static int init_slave(struct gbe_priv *gbe_dev, struct gbe_slave *slave,
2484 		      struct device_node *node)
2485 {
2486 	int port_reg_num;
2487 	u32 port_reg_ofs, emac_reg_ofs;
2488 	u32 port_reg_blk_sz, emac_reg_blk_sz;
2489 
2490 	if (of_property_read_u32(node, "slave-port", &slave->slave_num)) {
2491 		dev_err(gbe_dev->dev, "missing slave-port parameter\n");
2492 		return -EINVAL;
2493 	}
2494 
2495 	if (of_property_read_u32(node, "link-interface",
2496 				 &slave->link_interface)) {
2497 		dev_warn(gbe_dev->dev,
2498 			 "missing link-interface value defaulting to 1G mac-phy link\n");
2499 		slave->link_interface = SGMII_LINK_MAC_PHY;
2500 	}
2501 
2502 	slave->open = false;
2503 	slave->phy_node = of_parse_phandle(node, "phy-handle", 0);
2504 	slave->port_num = gbe_get_slave_port(gbe_dev, slave->slave_num);
2505 
2506 	if (slave->link_interface >= XGMII_LINK_MAC_PHY)
2507 		slave->mac_control = GBE_DEF_10G_MAC_CONTROL;
2508 	else
2509 		slave->mac_control = GBE_DEF_1G_MAC_CONTROL;
2510 
2511 	/* Emac regs memmap are contiguous but port regs are not */
2512 	port_reg_num = slave->slave_num;
2513 	if (gbe_dev->ss_version == GBE_SS_VERSION_14) {
2514 		if (slave->slave_num > 1) {
2515 			port_reg_ofs = GBE13_SLAVE_PORT2_OFFSET;
2516 			port_reg_num -= 2;
2517 		} else {
2518 			port_reg_ofs = GBE13_SLAVE_PORT_OFFSET;
2519 		}
2520 		emac_reg_ofs = GBE13_EMAC_OFFSET;
2521 		port_reg_blk_sz = 0x30;
2522 		emac_reg_blk_sz = 0x40;
2523 	} else if (IS_SS_ID_MU(gbe_dev)) {
2524 		port_reg_ofs = GBENU_SLAVE_PORT_OFFSET;
2525 		emac_reg_ofs = GBENU_EMAC_OFFSET;
2526 		port_reg_blk_sz = 0x1000;
2527 		emac_reg_blk_sz = 0x1000;
2528 	} else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) {
2529 		port_reg_ofs = XGBE10_SLAVE_PORT_OFFSET;
2530 		emac_reg_ofs = XGBE10_EMAC_OFFSET;
2531 		port_reg_blk_sz = 0x30;
2532 		emac_reg_blk_sz = 0x40;
2533 	} else {
2534 		dev_err(gbe_dev->dev, "unknown ethss(0x%x)\n",
2535 			gbe_dev->ss_version);
2536 		return -EINVAL;
2537 	}
2538 
2539 	slave->port_regs = gbe_dev->switch_regs + port_reg_ofs +
2540 				(port_reg_blk_sz * port_reg_num);
2541 	slave->emac_regs = gbe_dev->switch_regs + emac_reg_ofs +
2542 				(emac_reg_blk_sz * slave->slave_num);
2543 
2544 	if (gbe_dev->ss_version == GBE_SS_VERSION_14) {
2545 		/* Initialize  slave port register offsets */
2546 		GBE_SET_REG_OFS(slave, port_regs, port_vlan);
2547 		GBE_SET_REG_OFS(slave, port_regs, tx_pri_map);
2548 		GBE_SET_REG_OFS(slave, port_regs, sa_lo);
2549 		GBE_SET_REG_OFS(slave, port_regs, sa_hi);
2550 		GBE_SET_REG_OFS(slave, port_regs, ts_ctl);
2551 		GBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
2552 		GBE_SET_REG_OFS(slave, port_regs, ts_vlan);
2553 		GBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
2554 		GBE_SET_REG_OFS(slave, port_regs, ts_ctl2);
2555 
2556 		/* Initialize EMAC register offsets */
2557 		GBE_SET_REG_OFS(slave, emac_regs, mac_control);
2558 		GBE_SET_REG_OFS(slave, emac_regs, soft_reset);
2559 		GBE_SET_REG_OFS(slave, emac_regs, rx_maxlen);
2560 
2561 	} else if (IS_SS_ID_MU(gbe_dev)) {
2562 		/* Initialize  slave port register offsets */
2563 		GBENU_SET_REG_OFS(slave, port_regs, port_vlan);
2564 		GBENU_SET_REG_OFS(slave, port_regs, tx_pri_map);
2565 		GBENU_SET_REG_OFS(slave, port_regs, sa_lo);
2566 		GBENU_SET_REG_OFS(slave, port_regs, sa_hi);
2567 		GBENU_SET_REG_OFS(slave, port_regs, ts_ctl);
2568 		GBENU_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
2569 		GBENU_SET_REG_OFS(slave, port_regs, ts_vlan);
2570 		GBENU_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
2571 		GBENU_SET_REG_OFS(slave, port_regs, ts_ctl2);
2572 		GBENU_SET_REG_OFS(slave, port_regs, rx_maxlen);
2573 
2574 		/* Initialize EMAC register offsets */
2575 		GBENU_SET_REG_OFS(slave, emac_regs, mac_control);
2576 		GBENU_SET_REG_OFS(slave, emac_regs, soft_reset);
2577 
2578 	} else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) {
2579 		/* Initialize  slave port register offsets */
2580 		XGBE_SET_REG_OFS(slave, port_regs, port_vlan);
2581 		XGBE_SET_REG_OFS(slave, port_regs, tx_pri_map);
2582 		XGBE_SET_REG_OFS(slave, port_regs, sa_lo);
2583 		XGBE_SET_REG_OFS(slave, port_regs, sa_hi);
2584 		XGBE_SET_REG_OFS(slave, port_regs, ts_ctl);
2585 		XGBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
2586 		XGBE_SET_REG_OFS(slave, port_regs, ts_vlan);
2587 		XGBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
2588 		XGBE_SET_REG_OFS(slave, port_regs, ts_ctl2);
2589 
2590 		/* Initialize EMAC register offsets */
2591 		XGBE_SET_REG_OFS(slave, emac_regs, mac_control);
2592 		XGBE_SET_REG_OFS(slave, emac_regs, soft_reset);
2593 		XGBE_SET_REG_OFS(slave, emac_regs, rx_maxlen);
2594 	}
2595 
2596 	atomic_set(&slave->link_state, NETCP_LINK_STATE_INVALID);
2597 	return 0;
2598 }
2599 
2600 static void init_secondary_ports(struct gbe_priv *gbe_dev,
2601 				 struct device_node *node)
2602 {
2603 	struct device *dev = gbe_dev->dev;
2604 	phy_interface_t phy_mode;
2605 	struct gbe_priv **priv;
2606 	struct device_node *port;
2607 	struct gbe_slave *slave;
2608 	bool mac_phy_link = false;
2609 
2610 	for_each_child_of_node(node, port) {
2611 		slave = devm_kzalloc(dev, sizeof(*slave), GFP_KERNEL);
2612 		if (!slave) {
2613 			dev_err(dev,
2614 				"memomry alloc failed for secondary port(%s), skipping...\n",
2615 				port->name);
2616 			continue;
2617 		}
2618 
2619 		if (init_slave(gbe_dev, slave, port)) {
2620 			dev_err(dev,
2621 				"Failed to initialize secondary port(%s), skipping...\n",
2622 				port->name);
2623 			devm_kfree(dev, slave);
2624 			continue;
2625 		}
2626 
2627 		gbe_sgmii_config(gbe_dev, slave);
2628 		gbe_port_reset(slave);
2629 		gbe_port_config(gbe_dev, slave, gbe_dev->rx_packet_max);
2630 		list_add_tail(&slave->slave_list, &gbe_dev->secondary_slaves);
2631 		gbe_dev->num_slaves++;
2632 		if ((slave->link_interface == SGMII_LINK_MAC_PHY) ||
2633 		    (slave->link_interface == XGMII_LINK_MAC_PHY))
2634 			mac_phy_link = true;
2635 
2636 		slave->open = true;
2637 		if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves)
2638 			break;
2639 	}
2640 
2641 	/* of_phy_connect() is needed only for MAC-PHY interface */
2642 	if (!mac_phy_link)
2643 		return;
2644 
2645 	/* Allocate dummy netdev device for attaching to phy device */
2646 	gbe_dev->dummy_ndev = alloc_netdev(sizeof(gbe_dev), "dummy",
2647 					NET_NAME_UNKNOWN, ether_setup);
2648 	if (!gbe_dev->dummy_ndev) {
2649 		dev_err(dev,
2650 			"Failed to allocate dummy netdev for secondary ports, skipping phy_connect()...\n");
2651 		return;
2652 	}
2653 	priv = netdev_priv(gbe_dev->dummy_ndev);
2654 	*priv = gbe_dev;
2655 
2656 	if (slave->link_interface == SGMII_LINK_MAC_PHY) {
2657 		phy_mode = PHY_INTERFACE_MODE_SGMII;
2658 		slave->phy_port_t = PORT_MII;
2659 	} else {
2660 		phy_mode = PHY_INTERFACE_MODE_NA;
2661 		slave->phy_port_t = PORT_FIBRE;
2662 	}
2663 
2664 	for_each_sec_slave(slave, gbe_dev) {
2665 		if ((slave->link_interface != SGMII_LINK_MAC_PHY) &&
2666 		    (slave->link_interface != XGMII_LINK_MAC_PHY))
2667 			continue;
2668 		slave->phy =
2669 			of_phy_connect(gbe_dev->dummy_ndev,
2670 				       slave->phy_node,
2671 				       gbe_adjust_link_sec_slaves,
2672 				       0, phy_mode);
2673 		if (!slave->phy) {
2674 			dev_err(dev, "phy not found for slave %d\n",
2675 				slave->slave_num);
2676 			slave->phy = NULL;
2677 		} else {
2678 			dev_dbg(dev, "phy found: id is: 0x%s\n",
2679 				dev_name(&slave->phy->dev));
2680 			phy_start(slave->phy);
2681 			phy_read_status(slave->phy);
2682 		}
2683 	}
2684 }
2685 
2686 static void free_secondary_ports(struct gbe_priv *gbe_dev)
2687 {
2688 	struct gbe_slave *slave;
2689 
2690 	for (;;) {
2691 		slave = first_sec_slave(gbe_dev);
2692 		if (!slave)
2693 			break;
2694 		if (slave->phy)
2695 			phy_disconnect(slave->phy);
2696 		list_del(&slave->slave_list);
2697 	}
2698 	if (gbe_dev->dummy_ndev)
2699 		free_netdev(gbe_dev->dummy_ndev);
2700 }
2701 
2702 static int set_xgbe_ethss10_priv(struct gbe_priv *gbe_dev,
2703 				 struct device_node *node)
2704 {
2705 	struct resource res;
2706 	void __iomem *regs;
2707 	int ret, i;
2708 
2709 	ret = of_address_to_resource(node, XGBE_SS_REG_INDEX, &res);
2710 	if (ret) {
2711 		dev_err(gbe_dev->dev,
2712 			"Can't xlate xgbe of node(%s) ss address at %d\n",
2713 			node->name, XGBE_SS_REG_INDEX);
2714 		return ret;
2715 	}
2716 
2717 	regs = devm_ioremap_resource(gbe_dev->dev, &res);
2718 	if (IS_ERR(regs)) {
2719 		dev_err(gbe_dev->dev, "Failed to map xgbe ss register base\n");
2720 		return PTR_ERR(regs);
2721 	}
2722 	gbe_dev->ss_regs = regs;
2723 
2724 	ret = of_address_to_resource(node, XGBE_SM_REG_INDEX, &res);
2725 	if (ret) {
2726 		dev_err(gbe_dev->dev,
2727 			"Can't xlate xgbe of node(%s) sm address at %d\n",
2728 			node->name, XGBE_SM_REG_INDEX);
2729 		return ret;
2730 	}
2731 
2732 	regs = devm_ioremap_resource(gbe_dev->dev, &res);
2733 	if (IS_ERR(regs)) {
2734 		dev_err(gbe_dev->dev, "Failed to map xgbe sm register base\n");
2735 		return PTR_ERR(regs);
2736 	}
2737 	gbe_dev->switch_regs = regs;
2738 
2739 	ret = of_address_to_resource(node, XGBE_SERDES_REG_INDEX, &res);
2740 	if (ret) {
2741 		dev_err(gbe_dev->dev,
2742 			"Can't xlate xgbe serdes of node(%s) address at %d\n",
2743 			node->name, XGBE_SERDES_REG_INDEX);
2744 		return ret;
2745 	}
2746 
2747 	regs = devm_ioremap_resource(gbe_dev->dev, &res);
2748 	if (IS_ERR(regs)) {
2749 		dev_err(gbe_dev->dev, "Failed to map xgbe serdes register base\n");
2750 		return PTR_ERR(regs);
2751 	}
2752 	gbe_dev->xgbe_serdes_regs = regs;
2753 
2754 	gbe_dev->num_stats_mods = gbe_dev->max_num_ports;
2755 	gbe_dev->et_stats = xgbe10_et_stats;
2756 	gbe_dev->num_et_stats = ARRAY_SIZE(xgbe10_et_stats);
2757 
2758 	gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
2759 					 gbe_dev->num_et_stats * sizeof(u64),
2760 					 GFP_KERNEL);
2761 	if (!gbe_dev->hw_stats) {
2762 		dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
2763 		return -ENOMEM;
2764 	}
2765 
2766 	gbe_dev->hw_stats_prev =
2767 		devm_kzalloc(gbe_dev->dev,
2768 			     gbe_dev->num_et_stats * sizeof(u32),
2769 			     GFP_KERNEL);
2770 	if (!gbe_dev->hw_stats_prev) {
2771 		dev_err(gbe_dev->dev,
2772 			"hw_stats_prev memory allocation failed\n");
2773 		return -ENOMEM;
2774 	}
2775 
2776 	gbe_dev->ss_version = XGBE_SS_VERSION_10;
2777 	gbe_dev->sgmii_port_regs = gbe_dev->ss_regs +
2778 					XGBE10_SGMII_MODULE_OFFSET;
2779 	gbe_dev->host_port_regs = gbe_dev->ss_regs + XGBE10_HOST_PORT_OFFSET;
2780 
2781 	for (i = 0; i < gbe_dev->max_num_ports; i++)
2782 		gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs +
2783 			XGBE10_HW_STATS_OFFSET + (GBE_HW_STATS_REG_MAP_SZ * i);
2784 
2785 	gbe_dev->ale_reg = gbe_dev->switch_regs + XGBE10_ALE_OFFSET;
2786 	gbe_dev->ale_ports = gbe_dev->max_num_ports;
2787 	gbe_dev->host_port = XGBE10_HOST_PORT_NUM;
2788 	gbe_dev->ale_entries = XGBE10_NUM_ALE_ENTRIES;
2789 	gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1;
2790 
2791 	/* Subsystem registers */
2792 	XGBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
2793 	XGBE_SET_REG_OFS(gbe_dev, ss_regs, control);
2794 
2795 	/* Switch module registers */
2796 	XGBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
2797 	XGBE_SET_REG_OFS(gbe_dev, switch_regs, control);
2798 	XGBE_SET_REG_OFS(gbe_dev, switch_regs, ptype);
2799 	XGBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
2800 	XGBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control);
2801 
2802 	/* Host port registers */
2803 	XGBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
2804 	XGBE_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map);
2805 	XGBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
2806 	return 0;
2807 }
2808 
2809 static int get_gbe_resource_version(struct gbe_priv *gbe_dev,
2810 				    struct device_node *node)
2811 {
2812 	struct resource res;
2813 	void __iomem *regs;
2814 	int ret;
2815 
2816 	ret = of_address_to_resource(node, GBE_SS_REG_INDEX, &res);
2817 	if (ret) {
2818 		dev_err(gbe_dev->dev,
2819 			"Can't translate of node(%s) of gbe ss address at %d\n",
2820 			node->name, GBE_SS_REG_INDEX);
2821 		return ret;
2822 	}
2823 
2824 	regs = devm_ioremap_resource(gbe_dev->dev, &res);
2825 	if (IS_ERR(regs)) {
2826 		dev_err(gbe_dev->dev, "Failed to map gbe register base\n");
2827 		return PTR_ERR(regs);
2828 	}
2829 	gbe_dev->ss_regs = regs;
2830 	gbe_dev->ss_version = readl(gbe_dev->ss_regs);
2831 	return 0;
2832 }
2833 
2834 static int set_gbe_ethss14_priv(struct gbe_priv *gbe_dev,
2835 				struct device_node *node)
2836 {
2837 	struct resource res;
2838 	void __iomem *regs;
2839 	int i, ret;
2840 
2841 	ret = of_address_to_resource(node, GBE_SGMII34_REG_INDEX, &res);
2842 	if (ret) {
2843 		dev_err(gbe_dev->dev,
2844 			"Can't translate of gbe node(%s) address at index %d\n",
2845 			node->name, GBE_SGMII34_REG_INDEX);
2846 		return ret;
2847 	}
2848 
2849 	regs = devm_ioremap_resource(gbe_dev->dev, &res);
2850 	if (IS_ERR(regs)) {
2851 		dev_err(gbe_dev->dev,
2852 			"Failed to map gbe sgmii port34 register base\n");
2853 		return PTR_ERR(regs);
2854 	}
2855 	gbe_dev->sgmii_port34_regs = regs;
2856 
2857 	ret = of_address_to_resource(node, GBE_SM_REG_INDEX, &res);
2858 	if (ret) {
2859 		dev_err(gbe_dev->dev,
2860 			"Can't translate of gbe node(%s) address at index %d\n",
2861 			node->name, GBE_SM_REG_INDEX);
2862 		return ret;
2863 	}
2864 
2865 	regs = devm_ioremap_resource(gbe_dev->dev, &res);
2866 	if (IS_ERR(regs)) {
2867 		dev_err(gbe_dev->dev,
2868 			"Failed to map gbe switch module register base\n");
2869 		return PTR_ERR(regs);
2870 	}
2871 	gbe_dev->switch_regs = regs;
2872 
2873 	gbe_dev->num_stats_mods = gbe_dev->max_num_slaves;
2874 	gbe_dev->et_stats = gbe13_et_stats;
2875 	gbe_dev->num_et_stats = ARRAY_SIZE(gbe13_et_stats);
2876 
2877 	gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
2878 					 gbe_dev->num_et_stats * sizeof(u64),
2879 					 GFP_KERNEL);
2880 	if (!gbe_dev->hw_stats) {
2881 		dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
2882 		return -ENOMEM;
2883 	}
2884 
2885 	gbe_dev->hw_stats_prev =
2886 		devm_kzalloc(gbe_dev->dev,
2887 			     gbe_dev->num_et_stats * sizeof(u32),
2888 			     GFP_KERNEL);
2889 	if (!gbe_dev->hw_stats_prev) {
2890 		dev_err(gbe_dev->dev,
2891 			"hw_stats_prev memory allocation failed\n");
2892 		return -ENOMEM;
2893 	}
2894 
2895 	gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBE13_SGMII_MODULE_OFFSET;
2896 	gbe_dev->host_port_regs = gbe_dev->switch_regs + GBE13_HOST_PORT_OFFSET;
2897 
2898 	/* K2HK has only 2 hw stats modules visible at a time, so
2899 	 * module 0 & 2 points to one base and
2900 	 * module 1 & 3 points to the other base
2901 	 */
2902 	for (i = 0; i < gbe_dev->max_num_slaves; i++) {
2903 		gbe_dev->hw_stats_regs[i] =
2904 			gbe_dev->switch_regs + GBE13_HW_STATS_OFFSET +
2905 			(GBE_HW_STATS_REG_MAP_SZ * (i & 0x1));
2906 	}
2907 
2908 	gbe_dev->ale_reg = gbe_dev->switch_regs + GBE13_ALE_OFFSET;
2909 	gbe_dev->ale_ports = gbe_dev->max_num_ports;
2910 	gbe_dev->host_port = GBE13_HOST_PORT_NUM;
2911 	gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES;
2912 	gbe_dev->stats_en_mask = GBE13_REG_VAL_STAT_ENABLE_ALL;
2913 
2914 	/* Subsystem registers */
2915 	GBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
2916 
2917 	/* Switch module registers */
2918 	GBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
2919 	GBE_SET_REG_OFS(gbe_dev, switch_regs, control);
2920 	GBE_SET_REG_OFS(gbe_dev, switch_regs, soft_reset);
2921 	GBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
2922 	GBE_SET_REG_OFS(gbe_dev, switch_regs, ptype);
2923 	GBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control);
2924 
2925 	/* Host port registers */
2926 	GBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
2927 	GBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
2928 	return 0;
2929 }
2930 
2931 static int set_gbenu_ethss_priv(struct gbe_priv *gbe_dev,
2932 				struct device_node *node)
2933 {
2934 	struct resource res;
2935 	void __iomem *regs;
2936 	int i, ret;
2937 
2938 	gbe_dev->num_stats_mods = gbe_dev->max_num_ports;
2939 	gbe_dev->et_stats = gbenu_et_stats;
2940 
2941 	if (IS_SS_ID_NU(gbe_dev))
2942 		gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE +
2943 			(gbe_dev->max_num_slaves * GBENU_ET_STATS_PORT_SIZE);
2944 	else
2945 		gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE +
2946 					GBENU_ET_STATS_PORT_SIZE;
2947 
2948 	gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
2949 					 gbe_dev->num_et_stats * sizeof(u64),
2950 					 GFP_KERNEL);
2951 	if (!gbe_dev->hw_stats) {
2952 		dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
2953 		return -ENOMEM;
2954 	}
2955 
2956 	gbe_dev->hw_stats_prev =
2957 		devm_kzalloc(gbe_dev->dev,
2958 			     gbe_dev->num_et_stats * sizeof(u32),
2959 			     GFP_KERNEL);
2960 	if (!gbe_dev->hw_stats_prev) {
2961 		dev_err(gbe_dev->dev,
2962 			"hw_stats_prev memory allocation failed\n");
2963 		return -ENOMEM;
2964 	}
2965 
2966 	ret = of_address_to_resource(node, GBENU_SM_REG_INDEX, &res);
2967 	if (ret) {
2968 		dev_err(gbe_dev->dev,
2969 			"Can't translate of gbenu node(%s) addr at index %d\n",
2970 			node->name, GBENU_SM_REG_INDEX);
2971 		return ret;
2972 	}
2973 
2974 	regs = devm_ioremap_resource(gbe_dev->dev, &res);
2975 	if (IS_ERR(regs)) {
2976 		dev_err(gbe_dev->dev,
2977 			"Failed to map gbenu switch module register base\n");
2978 		return PTR_ERR(regs);
2979 	}
2980 	gbe_dev->switch_regs = regs;
2981 
2982 	gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBENU_SGMII_MODULE_OFFSET;
2983 	gbe_dev->host_port_regs = gbe_dev->switch_regs + GBENU_HOST_PORT_OFFSET;
2984 
2985 	for (i = 0; i < (gbe_dev->max_num_ports); i++)
2986 		gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs +
2987 			GBENU_HW_STATS_OFFSET + (GBENU_HW_STATS_REG_MAP_SZ * i);
2988 
2989 	gbe_dev->ale_reg = gbe_dev->switch_regs + GBENU_ALE_OFFSET;
2990 	gbe_dev->ale_ports = gbe_dev->max_num_ports;
2991 	gbe_dev->host_port = GBENU_HOST_PORT_NUM;
2992 	gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES;
2993 	gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1;
2994 
2995 	/* Subsystem registers */
2996 	GBENU_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
2997 
2998 	/* Switch module registers */
2999 	GBENU_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
3000 	GBENU_SET_REG_OFS(gbe_dev, switch_regs, control);
3001 	GBENU_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
3002 	GBENU_SET_REG_OFS(gbe_dev, switch_regs, ptype);
3003 
3004 	/* Host port registers */
3005 	GBENU_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
3006 	GBENU_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
3007 
3008 	/* For NU only.  2U does not need tx_pri_map.
3009 	 * NU cppi port 0 tx pkt streaming interface has (n-1)*8 egress threads
3010 	 * while 2U has only 1 such thread
3011 	 */
3012 	GBENU_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map);
3013 	return 0;
3014 }
3015 
3016 static int gbe_probe(struct netcp_device *netcp_device, struct device *dev,
3017 		     struct device_node *node, void **inst_priv)
3018 {
3019 	struct device_node *interfaces, *interface;
3020 	struct device_node *secondary_ports;
3021 	struct cpsw_ale_params ale_params;
3022 	struct gbe_priv *gbe_dev;
3023 	u32 slave_num;
3024 	int i, ret = 0;
3025 
3026 	if (!node) {
3027 		dev_err(dev, "device tree info unavailable\n");
3028 		return -ENODEV;
3029 	}
3030 
3031 	gbe_dev = devm_kzalloc(dev, sizeof(struct gbe_priv), GFP_KERNEL);
3032 	if (!gbe_dev)
3033 		return -ENOMEM;
3034 
3035 	if (of_device_is_compatible(node, "ti,netcp-gbe-5") ||
3036 	    of_device_is_compatible(node, "ti,netcp-gbe")) {
3037 		gbe_dev->max_num_slaves = 4;
3038 	} else if (of_device_is_compatible(node, "ti,netcp-gbe-9")) {
3039 		gbe_dev->max_num_slaves = 8;
3040 	} else if (of_device_is_compatible(node, "ti,netcp-gbe-2")) {
3041 		gbe_dev->max_num_slaves = 1;
3042 	} else if (of_device_is_compatible(node, "ti,netcp-xgbe")) {
3043 		gbe_dev->max_num_slaves = 2;
3044 	} else {
3045 		dev_err(dev, "device tree node for unknown device\n");
3046 		return -EINVAL;
3047 	}
3048 	gbe_dev->max_num_ports = gbe_dev->max_num_slaves + 1;
3049 
3050 	gbe_dev->dev = dev;
3051 	gbe_dev->netcp_device = netcp_device;
3052 	gbe_dev->rx_packet_max = NETCP_MAX_FRAME_SIZE;
3053 
3054 	/* init the hw stats lock */
3055 	spin_lock_init(&gbe_dev->hw_stats_lock);
3056 
3057 	if (of_find_property(node, "enable-ale", NULL)) {
3058 		gbe_dev->enable_ale = true;
3059 		dev_info(dev, "ALE enabled\n");
3060 	} else {
3061 		gbe_dev->enable_ale = false;
3062 		dev_dbg(dev, "ALE bypass enabled*\n");
3063 	}
3064 
3065 	ret = of_property_read_u32(node, "tx-queue",
3066 				   &gbe_dev->tx_queue_id);
3067 	if (ret < 0) {
3068 		dev_err(dev, "missing tx_queue parameter\n");
3069 		gbe_dev->tx_queue_id = GBE_TX_QUEUE;
3070 	}
3071 
3072 	ret = of_property_read_string(node, "tx-channel",
3073 				      &gbe_dev->dma_chan_name);
3074 	if (ret < 0) {
3075 		dev_err(dev, "missing \"tx-channel\" parameter\n");
3076 		ret = -ENODEV;
3077 		goto quit;
3078 	}
3079 
3080 	if (!strcmp(node->name, "gbe")) {
3081 		ret = get_gbe_resource_version(gbe_dev, node);
3082 		if (ret)
3083 			goto quit;
3084 
3085 		dev_dbg(dev, "ss_version: 0x%08x\n", gbe_dev->ss_version);
3086 
3087 		if (gbe_dev->ss_version == GBE_SS_VERSION_14)
3088 			ret = set_gbe_ethss14_priv(gbe_dev, node);
3089 		else if (IS_SS_ID_MU(gbe_dev))
3090 			ret = set_gbenu_ethss_priv(gbe_dev, node);
3091 		else
3092 			ret = -ENODEV;
3093 
3094 		if (ret)
3095 			goto quit;
3096 	} else if (!strcmp(node->name, "xgbe")) {
3097 		ret = set_xgbe_ethss10_priv(gbe_dev, node);
3098 		if (ret)
3099 			goto quit;
3100 		ret = netcp_xgbe_serdes_init(gbe_dev->xgbe_serdes_regs,
3101 					     gbe_dev->ss_regs);
3102 		if (ret)
3103 			goto quit;
3104 	} else {
3105 		dev_err(dev, "unknown GBE node(%s)\n", node->name);
3106 		ret = -ENODEV;
3107 		goto quit;
3108 	}
3109 
3110 	interfaces = of_get_child_by_name(node, "interfaces");
3111 	if (!interfaces)
3112 		dev_err(dev, "could not find interfaces\n");
3113 
3114 	ret = netcp_txpipe_init(&gbe_dev->tx_pipe, netcp_device,
3115 				gbe_dev->dma_chan_name, gbe_dev->tx_queue_id);
3116 	if (ret)
3117 		goto quit;
3118 
3119 	ret = netcp_txpipe_open(&gbe_dev->tx_pipe);
3120 	if (ret)
3121 		goto quit;
3122 
3123 	/* Create network interfaces */
3124 	INIT_LIST_HEAD(&gbe_dev->gbe_intf_head);
3125 	for_each_child_of_node(interfaces, interface) {
3126 		ret = of_property_read_u32(interface, "slave-port", &slave_num);
3127 		if (ret) {
3128 			dev_err(dev, "missing slave-port parameter, skipping interface configuration for %s\n",
3129 				interface->name);
3130 			continue;
3131 		}
3132 		gbe_dev->num_slaves++;
3133 		if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves)
3134 			break;
3135 	}
3136 
3137 	if (!gbe_dev->num_slaves)
3138 		dev_warn(dev, "No network interface configured\n");
3139 
3140 	/* Initialize Secondary slave ports */
3141 	secondary_ports = of_get_child_by_name(node, "secondary-slave-ports");
3142 	INIT_LIST_HEAD(&gbe_dev->secondary_slaves);
3143 	if (secondary_ports && (gbe_dev->num_slaves <  gbe_dev->max_num_slaves))
3144 		init_secondary_ports(gbe_dev, secondary_ports);
3145 	of_node_put(secondary_ports);
3146 
3147 	if (!gbe_dev->num_slaves) {
3148 		dev_err(dev, "No network interface or secondary ports configured\n");
3149 		ret = -ENODEV;
3150 		goto quit;
3151 	}
3152 
3153 	memset(&ale_params, 0, sizeof(ale_params));
3154 	ale_params.dev		= gbe_dev->dev;
3155 	ale_params.ale_regs	= gbe_dev->ale_reg;
3156 	ale_params.ale_ageout	= GBE_DEFAULT_ALE_AGEOUT;
3157 	ale_params.ale_entries	= gbe_dev->ale_entries;
3158 	ale_params.ale_ports	= gbe_dev->ale_ports;
3159 
3160 	gbe_dev->ale = cpsw_ale_create(&ale_params);
3161 	if (!gbe_dev->ale) {
3162 		dev_err(gbe_dev->dev, "error initializing ale engine\n");
3163 		ret = -ENODEV;
3164 		goto quit;
3165 	} else {
3166 		dev_dbg(gbe_dev->dev, "Created a gbe ale engine\n");
3167 	}
3168 
3169 	/* initialize host port */
3170 	gbe_init_host_port(gbe_dev);
3171 
3172 	spin_lock_bh(&gbe_dev->hw_stats_lock);
3173 	for (i = 0; i < gbe_dev->num_stats_mods; i++) {
3174 		if (gbe_dev->ss_version == GBE_SS_VERSION_14)
3175 			gbe_reset_mod_stats_ver14(gbe_dev, i);
3176 		else
3177 			gbe_reset_mod_stats(gbe_dev, i);
3178 	}
3179 	spin_unlock_bh(&gbe_dev->hw_stats_lock);
3180 
3181 	init_timer(&gbe_dev->timer);
3182 	gbe_dev->timer.data	 = (unsigned long)gbe_dev;
3183 	gbe_dev->timer.function = netcp_ethss_timer;
3184 	gbe_dev->timer.expires	 = jiffies + GBE_TIMER_INTERVAL;
3185 	add_timer(&gbe_dev->timer);
3186 	*inst_priv = gbe_dev;
3187 	return 0;
3188 
3189 quit:
3190 	if (gbe_dev->hw_stats)
3191 		devm_kfree(dev, gbe_dev->hw_stats);
3192 	if (gbe_dev->hw_stats_prev)
3193 		devm_kfree(dev, gbe_dev->hw_stats_prev);
3194 	cpsw_ale_destroy(gbe_dev->ale);
3195 	if (gbe_dev->ss_regs)
3196 		devm_iounmap(dev, gbe_dev->ss_regs);
3197 	of_node_put(interfaces);
3198 	devm_kfree(dev, gbe_dev);
3199 	return ret;
3200 }
3201 
3202 static int gbe_attach(void *inst_priv, struct net_device *ndev,
3203 		      struct device_node *node, void **intf_priv)
3204 {
3205 	struct gbe_priv *gbe_dev = inst_priv;
3206 	struct gbe_intf *gbe_intf;
3207 	int ret;
3208 
3209 	if (!node) {
3210 		dev_err(gbe_dev->dev, "interface node not available\n");
3211 		return -ENODEV;
3212 	}
3213 
3214 	gbe_intf = devm_kzalloc(gbe_dev->dev, sizeof(*gbe_intf), GFP_KERNEL);
3215 	if (!gbe_intf)
3216 		return -ENOMEM;
3217 
3218 	gbe_intf->ndev = ndev;
3219 	gbe_intf->dev = gbe_dev->dev;
3220 	gbe_intf->gbe_dev = gbe_dev;
3221 
3222 	gbe_intf->slave = devm_kzalloc(gbe_dev->dev,
3223 					sizeof(*gbe_intf->slave),
3224 					GFP_KERNEL);
3225 	if (!gbe_intf->slave) {
3226 		ret = -ENOMEM;
3227 		goto fail;
3228 	}
3229 
3230 	if (init_slave(gbe_dev, gbe_intf->slave, node)) {
3231 		ret = -ENODEV;
3232 		goto fail;
3233 	}
3234 
3235 	gbe_intf->tx_pipe = gbe_dev->tx_pipe;
3236 	ndev->ethtool_ops = &keystone_ethtool_ops;
3237 	list_add_tail(&gbe_intf->gbe_intf_list, &gbe_dev->gbe_intf_head);
3238 	*intf_priv = gbe_intf;
3239 	return 0;
3240 
3241 fail:
3242 	if (gbe_intf->slave)
3243 		devm_kfree(gbe_dev->dev, gbe_intf->slave);
3244 	if (gbe_intf)
3245 		devm_kfree(gbe_dev->dev, gbe_intf);
3246 	return ret;
3247 }
3248 
3249 static int gbe_release(void *intf_priv)
3250 {
3251 	struct gbe_intf *gbe_intf = intf_priv;
3252 
3253 	gbe_intf->ndev->ethtool_ops = NULL;
3254 	list_del(&gbe_intf->gbe_intf_list);
3255 	devm_kfree(gbe_intf->dev, gbe_intf->slave);
3256 	devm_kfree(gbe_intf->dev, gbe_intf);
3257 	return 0;
3258 }
3259 
3260 static int gbe_remove(struct netcp_device *netcp_device, void *inst_priv)
3261 {
3262 	struct gbe_priv *gbe_dev = inst_priv;
3263 
3264 	del_timer_sync(&gbe_dev->timer);
3265 	cpsw_ale_stop(gbe_dev->ale);
3266 	cpsw_ale_destroy(gbe_dev->ale);
3267 	netcp_txpipe_close(&gbe_dev->tx_pipe);
3268 	free_secondary_ports(gbe_dev);
3269 
3270 	if (!list_empty(&gbe_dev->gbe_intf_head))
3271 		dev_alert(gbe_dev->dev, "unreleased ethss interfaces present\n");
3272 
3273 	devm_kfree(gbe_dev->dev, gbe_dev->hw_stats);
3274 	devm_iounmap(gbe_dev->dev, gbe_dev->ss_regs);
3275 	memset(gbe_dev, 0x00, sizeof(*gbe_dev));
3276 	devm_kfree(gbe_dev->dev, gbe_dev);
3277 	return 0;
3278 }
3279 
3280 static struct netcp_module gbe_module = {
3281 	.name		= GBE_MODULE_NAME,
3282 	.owner		= THIS_MODULE,
3283 	.primary	= true,
3284 	.probe		= gbe_probe,
3285 	.open		= gbe_open,
3286 	.close		= gbe_close,
3287 	.remove		= gbe_remove,
3288 	.attach		= gbe_attach,
3289 	.release	= gbe_release,
3290 	.add_addr	= gbe_add_addr,
3291 	.del_addr	= gbe_del_addr,
3292 	.add_vid	= gbe_add_vid,
3293 	.del_vid	= gbe_del_vid,
3294 	.ioctl		= gbe_ioctl,
3295 };
3296 
3297 static struct netcp_module xgbe_module = {
3298 	.name		= XGBE_MODULE_NAME,
3299 	.owner		= THIS_MODULE,
3300 	.primary	= true,
3301 	.probe		= gbe_probe,
3302 	.open		= gbe_open,
3303 	.close		= gbe_close,
3304 	.remove		= gbe_remove,
3305 	.attach		= gbe_attach,
3306 	.release	= gbe_release,
3307 	.add_addr	= gbe_add_addr,
3308 	.del_addr	= gbe_del_addr,
3309 	.add_vid	= gbe_add_vid,
3310 	.del_vid	= gbe_del_vid,
3311 	.ioctl		= gbe_ioctl,
3312 };
3313 
3314 static int __init keystone_gbe_init(void)
3315 {
3316 	int ret;
3317 
3318 	ret = netcp_register_module(&gbe_module);
3319 	if (ret)
3320 		return ret;
3321 
3322 	ret = netcp_register_module(&xgbe_module);
3323 	if (ret)
3324 		return ret;
3325 
3326 	return 0;
3327 }
3328 module_init(keystone_gbe_init);
3329 
3330 static void __exit keystone_gbe_exit(void)
3331 {
3332 	netcp_unregister_module(&gbe_module);
3333 	netcp_unregister_module(&xgbe_module);
3334 }
3335 module_exit(keystone_gbe_exit);
3336 
3337 MODULE_LICENSE("GPL v2");
3338 MODULE_DESCRIPTION("TI NETCP ETHSS driver for Keystone SOCs");
3339 MODULE_AUTHOR("Sandeep Nair <sandeep_n@ti.com");
3340